KR980006094A - Device isolation method of semiconductor device - Google Patents

Device isolation method of semiconductor device Download PDF

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Publication number
KR980006094A
KR980006094A KR1019960025772A KR19960025772A KR980006094A KR 980006094 A KR980006094 A KR 980006094A KR 1019960025772 A KR1019960025772 A KR 1019960025772A KR 19960025772 A KR19960025772 A KR 19960025772A KR 980006094 A KR980006094 A KR 980006094A
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KR
South Korea
Prior art keywords
nitride film
oxide
oxide film
film
forming
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KR1019960025772A
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Korean (ko)
Inventor
피승호
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김주용
현대전자산업 주식회사
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019960025772A priority Critical patent/KR980006094A/en
Publication of KR980006094A publication Critical patent/KR980006094A/en

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Abstract

본 발명은 반도체소자의 소자분리 방법에 관한 것으로서, 질화막 패턴을 식각마스크로하여 다양한 크기의 폭과 간격을 갖는 트랜치들을 형성하고, 상기 트랜치를 메우는 평탄화되지 않은 산화막을 상기 구조의 전표면에 도포한후, 상기 산화막에 비해 CMP 속도가 느린 산화질화막을 상기 산화막 상에 도포하고, 상기 산화질화막과 산화막을 순차적으로 CMP 방법으로 연마하면 상기 산화질화막이 디슁이나 라운딩을 방지하여 평탄화된 표면을 갖는 소자분리영역을 형성하였으므로, 디슁이나 라운딩이 방지되어 공정수율 및 소자 동작의 신뢰성을 향상시킬 수 있다.The present invention relates to a device isolation method for a semiconductor device, in which trenches having widths and spaces of various sizes are formed using a nitride film pattern as an etching mask, and an un-planarized oxide film covering the trenches is applied to the entire surface of the structure Then, an oxide nitride film having a CMP rate slower than that of the oxide film is applied on the oxide film, and the oxide nitride film and the oxide film are sequentially polished by the CMP method to prevent the oxide nitride film from dishing or rounding, It is possible to prevent dishing or rounding, thereby improving process yield and reliability of device operation.

Description

반도체 소자의 소자분리 방법Device isolation method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제2a도 내지 제2f도는 본발명에 따른 반도체소자의 소자분리 공정도.Figs. 2a to 2f are diagrams showing a device isolation process of a semiconductor device according to the present invention. Fig.

Claims (8)

반도체기판상에 패드산화막을 형성하는 공정과, 상기 패드산화막 상에 질화막을 형성하는 공정과, 상기 반도체기판에서 소자분리 영역으로 예정되어 있는 부분 상측의 질화막과 패드산화막을 순차적으로 제거하여 반도체기판을 노출시키는 공정과, 상기 질화막 패턴에 의해 노출되어있는 반도체기판에 트랜치를 형성하는 공정과, 상기 구조의 전표면에 산화막을 증착하여 상기 트랜치를 메우는 공정과, 상기 산화막상에 상기 산화막 보다 CMP 속도가 느린 산화질화막을 형성하는 공정과, 상기 산화질화막과 산화막을 상기 질화막 패턴들을 노출시키는 두께 만큼 CMP 방법으로 연마하여 평탄화하는 공정을 구비하는 반도체소자의 소자분리 방법.A step of forming a pad oxide film on the semiconductor substrate; a step of forming a nitride film on the pad oxide film; a step of sequentially removing the nitride film and the pad oxide film on the upper side of the semiconductor substrate, A step of forming a trench in the semiconductor substrate exposed by the nitride film pattern; a step of depositing an oxide film on the entire surface of the structure to fill the trench; and a step of depositing, on the oxide film, A step of forming a slow oxidized nitride film; and a step of planarizing the oxide nitride film and the oxide film by polishing by a CMP method to a thickness that exposes the nitride film patterns. 제1항에 있어서,상기 패드산화막을 50~500Å 두께로 형성하는 것을 특징으로하는 반도체소자의 소자분리방법.The method according to claim 1, wherein the pad oxide layer is formed to a thickness of 50-500 Å. 제1항에 있어서, 상기 질화막을 500~3000Å 두께로 형성하는 것을 특징으로하는 반도체소자의 소자분리 방법.The method according to claim 1, wherein the nitride film is formed to a thickness of 500 to 3000 Å. 제1항에 있어서, 상기 트랜치를 1000~5000Å 깊이로 형성하는 것을 특징으로 하는 반도체소자의 소자분리 방법.The method of claim 1, wherein the trench is formed at a depth of 1000 to 5000 Å. 제1항에 있어서, 상기 트랜치 형성 후 노출되는 반도체기판의 표면을 50~500Å 두께 산화시켜 산화막을 형성하는 공정을 구비하는 것을 특징으로하는 반도체소자의 소자분리 방법.The method of claim 1, further comprising forming an oxide film by oxidizing the surface of the semiconductor substrate exposed after forming the trench by 50 to 500 Å. 제1항에 있어서, 상기 산화막을 2000~10000Å 두께로 형성하는 것을 특징으로하는 반도체소자의 소자분리방법.The method according to claim 1, wherein the oxide film is formed to a thickness of 2000 to 10000 Å. 제1항에 있어서, 상기 산화질화막을 300~2000Å 두께로 형성하는 것을 특징으로하는 반도체소자의 소자분리방법.The method according to claim 1, wherein the oxide nitride film is formed to a thickness of 300 to 2000 Å. 제1항에 있어서, 상기 CMP 공정 후 남아 있는 산화질화막을 BOE로 제거하는 것을 특징으로하는 반도체소자의 소자분리 방법.The method of claim 1, wherein the remaining oxide layer is removed by BOE after the CMP process. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960025772A 1996-06-29 1996-06-29 Device isolation method of semiconductor device KR980006094A (en)

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KR1019960025772A KR980006094A (en) 1996-06-29 1996-06-29 Device isolation method of semiconductor device

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KR1019960025772A KR980006094A (en) 1996-06-29 1996-06-29 Device isolation method of semiconductor device

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100475138B1 (en) * 2002-06-29 2005-03-10 매그나칩 반도체 유한회사 Method for Forming Semiconductor Device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100475138B1 (en) * 2002-06-29 2005-03-10 매그나칩 반도체 유한회사 Method for Forming Semiconductor Device

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