TW349250B - Plastic encapsulation for integrated circuits having plated copper top surface level interconnect - Google Patents

Plastic encapsulation for integrated circuits having plated copper top surface level interconnect

Info

Publication number
TW349250B
TW349250B TW086107667A TW86107667A TW349250B TW 349250 B TW349250 B TW 349250B TW 086107667 A TW086107667 A TW 086107667A TW 86107667 A TW86107667 A TW 86107667A TW 349250 B TW349250 B TW 349250B
Authority
TW
Taiwan
Prior art keywords
surface level
plastic encapsulation
integrated circuits
top surface
plated copper
Prior art date
Application number
TW086107667A
Other languages
English (en)
Chinese (zh)
Inventor
Taylor R Efland
Dale J Skelton
Quang Xuan Mai
Charles E Williams
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of TW349250B publication Critical patent/TW349250B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5525—Materials of bond wires comprising metals or metalloids, e.g. silver comprising copper [Cu]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Chemically Coating (AREA)
TW086107667A 1996-05-31 1997-07-02 Plastic encapsulation for integrated circuits having plated copper top surface level interconnect TW349250B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US1876096P 1996-05-31 1996-05-31

Publications (1)

Publication Number Publication Date
TW349250B true TW349250B (en) 1999-01-01

Family

ID=21789647

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086107667A TW349250B (en) 1996-05-31 1997-07-02 Plastic encapsulation for integrated circuits having plated copper top surface level interconnect

Country Status (4)

Country Link
US (1) US6140702A (enExample)
JP (1) JP3862362B2 (enExample)
KR (1) KR100521820B1 (enExample)
TW (1) TW349250B (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6646347B2 (en) 2001-11-30 2003-11-11 Motorola, Inc. Semiconductor power device and method of formation
EP1403926A2 (en) * 2002-09-27 2004-03-31 Matsushita Electric Industrial Co., Ltd. Semiconductor device
DE102004047522B3 (de) * 2004-09-28 2006-04-06 Infineon Technologies Ag Halbleiterchip mit einer Metallbeschichtungsstruktur und Verfahren zur Herstellung desselben
DE102006018765A1 (de) * 2006-04-20 2007-10-25 Infineon Technologies Ag Leistungshalbleiterbauelement, Leistungshalbleiterbauteil sowie Verfahren zu deren Herstellung
US8030733B1 (en) 2007-05-22 2011-10-04 National Semiconductor Corporation Copper-compatible fuse target
US7964934B1 (en) 2007-05-22 2011-06-21 National Semiconductor Corporation Fuse target and method of forming the fuse target in a copper process flow
US7709956B2 (en) * 2008-09-15 2010-05-04 National Semiconductor Corporation Copper-topped interconnect structure that has thin and thick copper traces and method of forming the copper-topped interconnect structure
US8282846B2 (en) * 2010-02-27 2012-10-09 National Semiconductor Corporation Metal interconnect structure with a side wall spacer that protects an ARC layer and a bond pad from corrosion and method of forming the metal interconnect structure
US9437589B2 (en) * 2014-03-25 2016-09-06 Infineon Technologies Ag Protection devices
US9559036B1 (en) 2014-08-01 2017-01-31 Altera Corporation Integrated circuit package with plated heat spreader
US9922949B2 (en) 2015-07-15 2018-03-20 Chip Solutions, LLC Semiconductor device and method
US10586746B2 (en) 2016-01-14 2020-03-10 Chip Solutions, LLC Semiconductor device and method
US10332775B2 (en) 2015-07-15 2019-06-25 Chip Solutions, LLC Releasable carrier and method
WO2017123870A1 (en) * 2016-01-14 2017-07-20 Chip Solutions, LLC Releasable carrier and method

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR96113E (fr) * 1967-12-06 1972-05-19 Ibm Dispositif semi-conducteur.
JPS5282183A (en) * 1975-12-29 1977-07-09 Nec Corp Connecting wires for semiconductor devices
JPS594050A (ja) * 1982-06-30 1984-01-10 Fujitsu Ltd 半導体装置
US4845543A (en) * 1983-09-28 1989-07-04 Hitachi, Ltd. Semiconductor device and method of manufacturing the same
US4843453A (en) * 1985-05-10 1989-06-27 Texas Instruments Incorporated Metal contacts and interconnections for VLSI devices
JPS63148646A (ja) * 1986-12-12 1988-06-21 Toshiba Corp 半導体装置
US4835120A (en) * 1987-01-12 1989-05-30 Debendra Mallik Method of making a multilayer molded plastic IC package
FR2616966B1 (fr) * 1987-06-22 1989-10-27 Thomson Semiconducteurs Structure de transistors mos de puissance
JP2659714B2 (ja) * 1987-07-21 1997-09-30 株式会社日立製作所 半導体集積回路装置
US4931323A (en) * 1987-12-10 1990-06-05 Texas Instruments Incorporated Thick film copper conductor patterning by laser
US5191405A (en) * 1988-12-23 1993-03-02 Matsushita Electric Industrial Co., Ltd. Three-dimensional stacked lsi
US5229646A (en) * 1989-01-13 1993-07-20 Mitsubishi Denki Kabushiki Kaisha Semiconductor device with a copper wires ball bonded to aluminum electrodes
US5272098A (en) * 1990-11-21 1993-12-21 Texas Instruments Incorporated Vertical and lateral insulated-gate, field-effect transistors, systems and methods
US5441684A (en) * 1993-09-24 1995-08-15 Vlsi Technology, Inc. Method of forming molded plastic packages with integrated heat sinks
US5637922A (en) * 1994-02-07 1997-06-10 General Electric Company Wireless radio frequency power semiconductor devices using high density interconnect
US6150722A (en) * 1994-11-02 2000-11-21 Texas Instruments Incorporated Ldmos transistor with thick copper interconnect
US5495667A (en) * 1994-11-07 1996-03-05 Micron Technology, Inc. Method for forming contact pins for semiconductor dice and interconnects
TW373308B (en) * 1995-02-24 1999-11-01 Agere Systems Inc Thin packaging of multi-chip modules with enhanced thermal/power management

Also Published As

Publication number Publication date
KR970077573A (ko) 1997-12-12
JPH1056031A (ja) 1998-02-24
KR100521820B1 (ko) 2006-01-27
JP3862362B2 (ja) 2006-12-27
US6140702A (en) 2000-10-31

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees