TW346598B - Division device - Google Patents

Division device

Info

Publication number
TW346598B
TW346598B TW086101566A TW86101566A TW346598B TW 346598 B TW346598 B TW 346598B TW 086101566 A TW086101566 A TW 086101566A TW 86101566 A TW86101566 A TW 86101566A TW 346598 B TW346598 B TW 346598B
Authority
TW
Taiwan
Prior art keywords
redundant binary
represented
partial remainder
binary digits
quotient
Prior art date
Application number
TW086101566A
Other languages
English (en)
Inventor
Hiroaki Suzuki
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of TW346598B publication Critical patent/TW346598B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/535—Dividing only
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/4824—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices using signed-digit representation

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
TW086101566A 1996-11-01 1997-02-12 Division device TW346598B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29194396A JP3604518B2 (ja) 1996-11-01 1996-11-01 除算装置

Publications (1)

Publication Number Publication Date
TW346598B true TW346598B (en) 1998-12-01

Family

ID=17775472

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086101566A TW346598B (en) 1996-11-01 1997-02-12 Division device

Country Status (5)

Country Link
US (1) US5907499A (zh)
JP (1) JP3604518B2 (zh)
KR (1) KR100329909B1 (zh)
CN (1) CN1101018C (zh)
TW (1) TW346598B (zh)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10307705A (ja) * 1997-05-02 1998-11-17 Fujitsu Ltd 冗長２進符号変換回路及びこれを用いた乗算回路
FR2820905B1 (fr) * 2001-02-09 2005-02-18 Gemplus Card Int Dispositif et procede de traitement de valeurs numeriques, notamment sous forme non-adjacente
JP5233473B2 (ja) * 2008-07-25 2013-07-10 大日本印刷株式会社 暗号処理装置
RU2450325C2 (ru) * 2010-05-24 2012-05-10 Лев Петрович Петренко ФУНКЦИОНАЛЬНАЯ СТРУКТУРА ЛОГИКО-ДИНАМИЧЕСКОГО ПРОЦЕССА ПОСЛЕДОВАТЕЛЬНОЙ СКВОЗНОЙ АКТИВИЗАЦИИ НЕАКТИВНЫХ АРГУМЕНТОВ "0" ВТОРОЙ ПРОМЕЖУТОЧНОЙ СУММЫ +[S2 i]f(&)-И В СУММАТОРЕ f(Σ) ПРИ ПРЕОБРАЗОВАНИИ ПОЗИЦИОННЫХ АРГУМЕНТОВ СЛАГАЕМЫХ [ni]f(2n) И [mi]f(2n) (ВАРИАНТЫ)
RU2450326C2 (ru) * 2010-05-25 2012-05-10 Лев Николаевич Петренко ФУНКЦИОНАЛЬНАЯ СТРУКТУРА ЛОГИКО-ДИНАМИЧЕСКОГО ПРОЦЕССА ПАРАЛЛЕЛЬНО-ПОСЛЕДОВАТЕЛЬНОЙ СКВОЗНОЙ АКТИВИЗАЦИИ fi(←«+1/-1»)k НЕАКТИВНЫХ АРГУМЕНТОВ "0" ВТОРОЙ ПРОМЕЖУТОЧНОЙ СУММЫ [S2 i]f(2n) В ПРОЦЕДУРЕ СУММИРОВАНИЯ ПОЗИЦИОННЫХ АРГУМЕНТОВ СЛАГАЕМЫХ [ni]f(2n) И [mi]f(2n) (ВАРИАНТЫ РУССКОЙ ЛОГИКИ)
US9377996B2 (en) 2012-07-27 2016-06-28 Avago Technologies General Ip (Singapore) Pte. Ltd. Parameterized digital divider
CN110147217B (zh) * 2018-02-12 2024-07-30 北京忆芯科技有限公司 除法器

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63182740A (ja) * 1987-01-23 1988-07-28 Matsushita Electric Ind Co Ltd 除算器
JP2857505B2 (ja) * 1990-04-10 1999-02-17 松下電器産業株式会社 除算装置
JP3153370B2 (ja) * 1993-01-14 2001-04-09 三菱電機株式会社 乗算装置
JPH07261982A (ja) * 1994-03-24 1995-10-13 Hitachi Ltd 基数２の除算器

Also Published As

Publication number Publication date
JP3604518B2 (ja) 2004-12-22
CN1101018C (zh) 2003-02-05
KR19980041693A (ko) 1998-08-17
JPH10133857A (ja) 1998-05-22
CN1182911A (zh) 1998-05-27
KR100329909B1 (ko) 2002-07-31
US5907499A (en) 1999-05-25

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