TW333698B - The method for output circuit to select switch transistor & semiconductor memory - Google Patents

The method for output circuit to select switch transistor & semiconductor memory

Info

Publication number
TW333698B
TW333698B TW085111362A TW85111362A TW333698B TW 333698 B TW333698 B TW 333698B TW 085111362 A TW085111362 A TW 085111362A TW 85111362 A TW85111362 A TW 85111362A TW 333698 B TW333698 B TW 333698B
Authority
TW
Taiwan
Prior art keywords
output circuit
semiconductor memory
switch transistor
select switch
positive power
Prior art date
Application number
TW085111362A
Other languages
English (en)
Inventor
Takesada Akiba
Gorou Kitsukawa
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of TW333698B publication Critical patent/TW333698B/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
TW085111362A 1996-01-30 1996-09-17 The method for output circuit to select switch transistor & semiconductor memory TW333698B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US1007396P 1996-01-30 1996-01-30

Publications (1)

Publication Number Publication Date
TW333698B true TW333698B (en) 1998-06-11

Family

ID=21743687

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085111362A TW333698B (en) 1996-01-30 1996-09-17 The method for output circuit to select switch transistor & semiconductor memory

Country Status (4)

Country Link
US (1) US5703825A (zh)
KR (1) KR100471737B1 (zh)
SG (1) SG54460A1 (zh)
TW (1) TW333698B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI512778B (zh) * 2012-08-03 2015-12-11

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6343045B2 (en) * 1996-05-24 2002-01-29 Uniram Technology, Inc. Methods to reduce the effects of leakage current for dynamic circuit elements
US6127878A (en) * 1999-01-05 2000-10-03 Siemens Aktiengesellschaft Driver circuit with negative lower power rail
US6215349B1 (en) 1999-01-05 2001-04-10 International Business Machines Corp. Capacitive coupled driver circuit
US6529427B1 (en) * 1999-08-12 2003-03-04 Vanguard International Semiconductor Corporation Test structures for measuring DRAM cell node junction leakage current
US6512705B1 (en) * 2001-11-21 2003-01-28 Micron Technology, Inc. Method and apparatus for standby power reduction in semiconductor devices
US6848434B2 (en) * 2003-03-17 2005-02-01 Cummins, Inc. System for diagnosing operation of an EGR cooler
JP4313744B2 (ja) * 2004-09-06 2009-08-12 富士通マイクロエレクトロニクス株式会社 半導体記憶装置
KR100699832B1 (ko) 2005-01-05 2007-03-27 삼성전자주식회사 Ｍｔｃｍｏｓ 제어 회로
KR100713907B1 (ko) * 2005-06-10 2007-05-07 주식회사 하이닉스반도체 반도체 장치의 라인 구동 회로
US7151712B1 (en) * 2005-10-19 2006-12-19 Winbond Electronics Corp. Row decoder with low gate induce drain leakage current
KR100801059B1 (ko) * 2006-08-02 2008-02-04 삼성전자주식회사 누설 전류를 감소시키기 위한 반도체 메모리 장치의드라이버 회로
US7671663B2 (en) * 2006-12-12 2010-03-02 Texas Instruments Incorporated Tunable voltage controller for a sub-circuit and method of operating the same
JP2008293604A (ja) * 2007-05-25 2008-12-04 Elpida Memory Inc 半導体記憶装置の出力回路、および半導体記憶装置の出力回路のデータ出力方法
US7961546B2 (en) * 2008-02-05 2011-06-14 Texas Instruments Incorporated Memory power management systems and methods
KR101020293B1 (ko) * 2009-02-12 2011-03-07 주식회사 하이닉스반도체 반도체 메모리 장치
US9065433B2 (en) 2013-01-16 2015-06-23 Freescale Semiconductor, Inc. Capacitor charging circuit with low sub-threshold transistor leakage current
TWI563482B (en) * 2014-10-21 2016-12-21 Ind Tech Res Inst Driver circuit with device variation compensation and operation method thereof

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02171020A (ja) * 1988-12-23 1990-07-02 Nec Corp Ｍｏｓ型信号入力回路
US5272676A (en) * 1990-11-20 1993-12-21 Hitachi, Ltd. Semiconductor integrated circuit device
JPH057149A (ja) * 1991-06-27 1993-01-14 Fujitsu Ltd 出力回路
KR100254134B1 (ko) * 1991-11-08 2000-04-15 나시모토 류우조오 대기시 전류저감회로를 가진 반도체 집적회로
JP3212150B2 (ja) * 1992-08-07 2001-09-25 株式会社日立製作所 半導体装置
US5408144A (en) * 1993-01-07 1995-04-18 Hitachi, Ltd. Semiconductor integrated circuits with power reduction mechanism
JPH06208790A (ja) * 1993-01-12 1994-07-26 Toshiba Corp 半導体装置
JP3477781B2 (ja) * 1993-03-23 2003-12-10 セイコーエプソン株式会社 Ｉｃカード
JPH07105682A (ja) * 1993-10-06 1995-04-21 Nec Corp ダイナミックメモリ装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI512778B (zh) * 2012-08-03 2015-12-11

Also Published As

Publication number Publication date
SG54460A1 (en) 1998-11-16
KR970060217A (ko) 1997-08-12
KR100471737B1 (ko) 2005-06-27
US5703825A (en) 1997-12-30

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