TW241376B - Planarization process with increasing etching ratio - Google Patents
Planarization process with increasing etching ratioInfo
- Publication number
- TW241376B TW241376B TW82110426A TW82110426A TW241376B TW 241376 B TW241376 B TW 241376B TW 82110426 A TW82110426 A TW 82110426A TW 82110426 A TW82110426 A TW 82110426A TW 241376 B TW241376 B TW 241376B
- Authority
- TW
- Taiwan
- Prior art keywords
- oxide layer
- planarization process
- etching
- doping
- etching ratio
- Prior art date
Links
Abstract
A planarization process with increasing etching ratio includes: 1. depositing oxide layer with high thickness on the uneven layer on the substrate; 2. overlaying one thin spin-on-glass on the oxide layer with high thickness; 3. implementing ion implantation, and doping the upper section of oxide layer; 4. wet selective etching back; By the above ion implantation the extruding parts of oxide layer upper section becomes with high etching rate features by doping in order to conduct wet selective etching back to constitue planarization by even etching sweepingly.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW82110426A TW241376B (en) | 1993-12-09 | 1993-12-09 | Planarization process with increasing etching ratio |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW82110426A TW241376B (en) | 1993-12-09 | 1993-12-09 | Planarization process with increasing etching ratio |
Publications (1)
Publication Number | Publication Date |
---|---|
TW241376B true TW241376B (en) | 1995-02-21 |
Family
ID=51400917
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW82110426A TW241376B (en) | 1993-12-09 | 1993-12-09 | Planarization process with increasing etching ratio |
Country Status (1)
Country | Link |
---|---|
TW (1) | TW241376B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19837395A1 (en) * | 1998-08-18 | 2000-03-02 | Siemens Ag | Method for producing a semiconductor insulation layer and a semiconductor component containing this semiconductor insulation layer |
-
1993
- 1993-12-09 TW TW82110426A patent/TW241376B/en active
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19837395A1 (en) * | 1998-08-18 | 2000-03-02 | Siemens Ag | Method for producing a semiconductor insulation layer and a semiconductor component containing this semiconductor insulation layer |
US6207517B1 (en) | 1998-08-18 | 2001-03-27 | Siemens Aktiengesellschaft | Method of fabricating a semiconductor insulation layer and a semiconductor component containing the semiconductor insulation layer |
DE19837395C2 (en) * | 1998-08-18 | 2001-07-19 | Infineon Technologies Ag | Method for producing a semiconductor component containing a structured insulation layer |
US6365525B2 (en) | 1998-08-18 | 2002-04-02 | Siemens Aktiengesellschaft | Method of fabricating a semiconductor insulation layer |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW376545B (en) | Method of producing silicon layer having surface controlling to be even | |
CA2034481A1 (en) | Self-aligned gate process for fabricating field emitter arrays | |
WO2001071734A3 (en) | Multi-layer tunneling device with a graded stoichiometry insulating layer | |
TW352454B (en) | Improved method for forming aluminum contacts | |
CA2027067A1 (en) | Method for forming a continuous oxide superconductor layer having different thickness portions for superconductor device | |
TW241376B (en) | Planarization process with increasing etching ratio | |
KR960016231B1 (en) | Semiconductor metal wire forming method | |
CA2355614A1 (en) | Combination cmp-etch method for forming a thin planar layer over the surface of a device | |
JPS55118627A (en) | Compound semiconductor wafer and its manufacturing method | |
TW358214B (en) | Vacuum closure containing an electron source and method for manufacturing the same | |
JPS57113296A (en) | Switching element | |
JPS5772331A (en) | Manufacture of semiconductor device | |
KR970005681B1 (en) | Global planar method in semiconductor device | |
JPS6449259A (en) | Semiconductor device | |
KR970008817B1 (en) | Thin film transistor manufacture | |
TW276365B (en) | Read only memory self-aligned implantation coding method | |
JPS5447492A (en) | Thyristor | |
KR970003737B1 (en) | Thin film transistor manufacturing method | |
TW238425B (en) | Process for the read only memory | |
JPS5762054A (en) | Photoconductive member | |
TW375772B (en) | Field implant method | |
TW350088B (en) | Method of adding effective space of rugged polysilicon layers | |
KR960004083B1 (en) | Forming method of double metal line for semiconductor device | |
KR960016234B1 (en) | Source/drain junction forming method | |
TW326573B (en) | Fabrication method of SRAM and its polysilicon loading resistance |