TW202329347A - 採用具有雙面嵌入式跡線基板（ｅｔｓ）的封裝基板的積體電路（ｉｃ）封裝以及相關製造方法 - Google Patents

採用具有雙面嵌入式跡線基板（ｅｔｓ）的封裝基板的積體電路（ｉｃ）封裝以及相關製造方法 Download PDF

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Publication number
TW202329347A
TW202329347A TW111140827A TW111140827A TW202329347A TW 202329347 A TW202329347 A TW 202329347A TW 111140827 A TW111140827 A TW 111140827A TW 111140827 A TW111140827 A TW 111140827A TW 202329347 A TW202329347 A TW 202329347A
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TW
Taiwan
Prior art keywords
metal
layer
ets
package
substrate
Prior art date
Application number
TW111140827A
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English (en)
Chinese (zh)
Inventor
弘博 魏
瓊雷伊維拉爾巴 比奧
米雪兒藝珍 金
姜歸源
安尼奇 佩托
Original Assignee
美商高通公司
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Application filed by 美商高通公司 filed Critical 美商高通公司
Publication of TW202329347A publication Critical patent/TW202329347A/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
TW111140827A 2021-11-22 2022-10-27 採用具有雙面嵌入式跡線基板（ｅｔｓ）的封裝基板的積體電路（ｉｃ）封裝以及相關製造方法 TW202329347A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US17/456,068 US11791320B2 (en) 2021-11-22 2021-11-22 Integrated circuit (IC) packages employing a package substrate with a double side embedded trace substrate (ETS), and related fabrication methods
US17/456,068 2021-11-22

Publications (1)

Publication Number Publication Date
TW202329347A true TW202329347A (zh) 2023-07-16

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
TW111140827A TW202329347A (zh) 2021-11-22 2022-10-27 採用具有雙面嵌入式跡線基板（ｅｔｓ）的封裝基板的積體電路（ｉｃ）封裝以及相關製造方法

Country Status (7)

Country Link
US (1) US11791320B2 (https=)
EP (1) EP4437586A1 (https=)
JP (1) JP2024541421A (https=)
KR (1) KR20240101796A (https=)
CN (1) CN118284964A (https=)
TW (1) TW202329347A (https=)
WO (1) WO2023091851A1 (https=)

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US12362269B2 (en) 2021-10-18 2025-07-15 Qualcomm Incorporated Integrated circuit (IC) packages employing supplemental metal layer coupled to embedded metal traces in a die-side embedded trace substrate (ETS) layer, and related fabrication methods
US11791320B2 (en) * 2021-11-22 2023-10-17 Qualcomm Incorporated Integrated circuit (IC) packages employing a package substrate with a double side embedded trace substrate (ETS), and related fabrication methods
US12469808B2 (en) * 2022-08-21 2025-11-11 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor package and manufacturing method thereof
US12500197B2 (en) 2022-12-23 2025-12-16 Deca Technologies Usa, Inc. Encapsulant-defined land grid array (LGA) package and method for making the same
US20250062235A1 (en) * 2023-08-16 2025-02-20 Qualcomm Incorporated Package substrate with metallization layer(s) that includes an additional metal pad layer to facilitate reduced via size for reduced bump pitch, and related integrated circuit (ic) packages and fabrication methods
US12593709B2 (en) * 2023-08-17 2026-03-31 Qualcomm Incorporated Substrate(s) for an integrated circuit (IC) package employing a core layer and an adjacent insulation layer(s) with an embedded metal structure(s) positioned from the core layer
US12424450B2 (en) 2023-11-22 2025-09-23 Deca Technologies Usa, Inc. Embedded component interposer or substrate comprising displacement compensation traces (DCTs) and method of making the same
US12500198B2 (en) 2024-03-01 2025-12-16 Deca Technologies Usa, Inc. Quad flat no-lead (QFN) package with tie bars and direct contact interconnect build-up structure and method for making the same
US12616038B2 (en) 2024-07-03 2026-04-28 Deca Technologies Usa, Inc. Interconnect substrate and method of making

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US11791320B2 (en) * 2021-11-22 2023-10-17 Qualcomm Incorporated Integrated circuit (IC) packages employing a package substrate with a double side embedded trace substrate (ETS), and related fabrication methods

Also Published As

Publication number Publication date
JP2024541421A (ja) 2024-11-08
CN118284964A (zh) 2024-07-02
EP4437586A1 (en) 2024-10-02
WO2023091851A1 (en) 2023-05-25
US11791320B2 (en) 2023-10-17
KR20240101796A (ko) 2024-07-02
US20230163112A1 (en) 2023-05-25

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