TW202139306A - Gold-coated bonding wire, manufacturing method therefor, semiconductor wire bonding structure, and semiconductor device - Google Patents

Abstract

Considering the needs of making chips thinner and multi-stage lamination for semiconductor devices such as memory, instead of a bonding wire that uses gold as the main component, provided is a gold-coated bonding wire that has the same characteristics as gold and can be applied to a method (CWB) of direct wedge bonding between multi-stage laminated chip electrodes, and does not incur material costs. This gold-coated bonding wire 1 of the present invention has: a core material 2 that includes silver or copper as a main component; and a coating layer 3 that is provided on the surface of the core material 2, and that has gold as a main component. The problem is addressed by having the film thickness of the gold-coated layer be 5 to 200 nm inclusive, and by controlling the compressive stress when deformed by 60% with respect to the wire diameter to be 290 to 590 MPa inclusive.

Description

Gold-coated bonding wire and manufacturing method thereof, semiconductor wire bonding structure and semiconductor device

The present invention relates to a gold-coated bonding wire, a manufacturing method thereof, a semiconductor wire bonding structure, and a semiconductor device.

Among semiconductor devices, integrated circuits such as ICs or LSIs that integrate semiconductor elements such as capacitors and diodes, etc., account for the majority in terms of market size. A "semiconductor chip" made of silicon single crystals is assembled in the integrated circuit. Semiconductor chips contain many electronic circuit components that perform complex functions, and are precision electronic components that are extremely vulnerable to vibration and shock. In addition, there are a plurality of electrodes on the surface of a semiconductor chip (called chip electrodes or spacers), which are mainly electrodes for circuit substrates such as lead frames or circuit substrates that support and fix the semiconductor chip and function to connect to external wiring by bonding wires. The part and the electrode of the wafer electrode are joined for wiring.

The bonding wire, for example, generally uses a method called ball bonding to bond one end of the bonding wire to the chip electrode (first bonding), and uses a method called wedge bonding (or stitch bonding). The other end of the bonding wire is bonded to an external electrode of a circuit substrate such as a lead frame (second bonding). In the sphere bonding, one end of the bonding wire is melted by electric discharge or the like, and solidified into a spherical shape by surface tension or the like to form a sphere. The solidified ball is called a solder ball (FAB, Free Air Ball), which is connected to the chip electrode by ultrasonic and thermocompression bonding. In wedge bonding, ultrasonic waves and a load are applied to the wire by a bonding tool (welded pipe) to bond to the electrode.

For bonding wires, metal wires such as gold wires, silver wires, and copper wires with a wire diameter of about 15 to 35 μm, or covered wires coated with other metals on these wires are used. The semiconductor device is configured by resin sealing a semiconductor chip and a circuit base material connected by wire bonding.

In addition, computers, smart phones, digital cameras, mobile music players, etc. have built-in memory devices (memory), and the memory is divided into mechanical read-write devices represented by hard disks and semiconductor memories such as flash memory. body. Semiconductor memory system A type of semiconductor device in which electronic components called cells are assembled in a semiconductor chip to store data. Semiconductor memory has a high cost per unit capacity. As far as external memory is concerned, it has been seldom used in the past. However, in recent years, due to the low cost and the weakness that mechanical hard drives will be damaged due to vibration, the demand for semiconductor memory is increasing. Increase.

In addition, because there is a strong demand for the storage of large-capacity data of music and movies, and the miniaturization and thinning of mobile devices such as mobile music players, the demand for large-capacity and miniaturization of semiconductor memory is gradually increasing. For example, NAND flash memory began to be used to store images from digital cameras, and USB memory (Universal Serial Bus) began to be used in smart phones, mobile audio and video players, etc. In 2000, the memory capacity was 1Gb or less, and compared with the demand of 100Gb or more in 2010, there has been continuous demand for larger capacity in recent years.

On the other hand, due to the miniaturization of mobile devices, the requirements for the miniaturization of semiconductor memory have also increased, and of course, the semiconductor memory chip has also been required to be thinner. In 2000, a wafer with a thickness of about 150 μm was sufficient. However, the thinning of the wafer rapidly progressed, and in 2010, a wafer with a thickness of about 30 μm began to be adopted. In recent years, further development of wafers with a thickness of only 20μm (0.020mm) has begun. Of course, the thinning of the chip, in terms of electronic parts that are originally very precise and will be destroyed if not handled carefully, will become more easily damaged, so it must be handled more carefully, and this need not be said.

In order to cope with these contradictory requirements of large-capacity and miniaturization, various manufacturers of semiconductor memory have devoted themselves to the thinning of memory chips and multi-stage multilayer packaging. The memory capacity of a memory chip also has a limit, and its specification is about 4-8Gb each. Therefore, for example, for a 128Gb memory capacity requirement, at least 16 chips are required. If a plurality of semiconductor devices are assembled, the memory product itself becomes larger. Therefore, stacking thin chips in a semiconductor device becomes a means to meet the needs of both large-capacity and miniaturization. The stacking method includes a method of stacking wafers stepwise in a single direction as shown in FIG. 11 and FIG. 12 described later, and a case where the stacking is a lateral V-shape as shown in FIG. 13.

In the field of the above-mentioned semiconductor memory, it is necessary to use bonding wires to bond the electrodes on the surface of such stacked precision and fragile wafers to the electrodes of the lead frame and the circuit board for wiring. The joining method that has been performed so far will be explained here. For example, in the case of a semiconductor device in which the circuit board of FIG. 9 is laminated with 3 wafers on top of 4 stages, first, bump electrodes called bumps are formed on the electrodes of each wafer, and then the electrodes of the circuit board are bonded After the wire is ball-bonded, looping is performed, and the bonding wire is wedge-shaped on the surface of the bump formed on the wafer electrode. This bonding method is called BSOB (BALL "STITCH" ON" BALL) method or reverse bonding. For the precise and fragile chip electrodes, the purpose of this method is to obtain the buffer material-like effect of preventing chip damage by forming bumps. In order to connect the wafer electrode and the circuit board, this BSOB was performed three times. The usual procedure is not to form bumps on the wafer electrodes, but after the wafer electrodes are directly ball-bonded and wire-bonded, the bonding wires are wedge-bonded on the electrodes of the circuit board. Such a joining method is called a positive joining method. Generally, the chip electrode and the circuit board are connected by a positive bonding method. However, with the recent thinning of semiconductor packages, it is necessary to reduce the arc height. Therefore, the reverse bonding method is adopted for bonding on the laminated wafer. In ball bonding, after the FAB is formed, it is difficult to make the wire straight up and then bend at an acute angle near the neck between the ball portion and the wire portion. Ball bonding becomes a necessary space up to a higher position, which is very disadvantageous for the thinning of the semiconductor memory. Therefore, this is one of the important reasons for reverse bonding from the electrode of the circuit board at the lower position to the electrode of the upper wafer. In addition, the conditions of the bonding wire applicable to the reverse bonding method include not destroying the flexibility of the precise chip electrode and in order to perform wedge bonding on the bumps, so that the bump surface and the wire surface have high corrosion resistance and oxidation resistance. sex. Therefore, the gold (Au) bonding wire and the gold (Au) bumps are used mainly composed of soft and non-oxidized gold (Au).

However, in the above-mentioned bonding method, the distance between the wafer electrode and the circuit board becomes longer, and the wafer electrode and the circuit board are connected by one wire. Therefore, man-hours are required to go back and forth between the wafer electrode and the circuit board, resulting in a decrease in productivity. In addition, since the length of the wire arc becomes longer, problems such as control of the straightness of the wire after wire bonding have occurred. Therefore, as shown in FIG. 10, a method of connecting the wafer electrodes with wires and then connecting the wafer electrodes with the electrodes of the circuit substrate (cascade bonding method) has been adopted. The cascade joining method will be described. In the case of a 4-stage semiconductor device in which the circuit board and 3 wafers are stacked, the connection starts from the upper stage of the wafer (the circuit board at the bottom stage is the first stage, and the chip at the top stage is the fourth stage). First, bumps are formed on the third-stage wafer electrodes, and after ball bonding is performed on the fourth-stage wafer electrodes and wire bonding is performed, the bonding wires are wedge-shaped to the bumps formed on the third-stage wafer electrodes. In this way, the third stage and the fourth stage wafer electrodes are connected. Next, bumps are formed on the wafer electrodes of the second stage, and ball bonding is performed on the bumps that are located on the wafer electrodes of the third stage and subjected to wedge bonding. After the wire bonding operation is performed, wedge bonding is performed on the bumps formed on the second stage wafer electrodes. In this way, the second, third, and fourth wafer electrodes are connected. Finally, ball bonding is performed on the bumps together with the wedge-shaped bonding portion formed on the second-stage wafer electrode, and the bonding wire is wedge-bonded on the first-stage circuit board after the wire bonding operation. As a result, it is in a state where series wiring is performed from the uppermost wafer electrode to the lowermost circuit board electrode. In the case of this method, the required characteristics of the bonding wire are the same as the reverse bonding method, and flexibility and oxidation resistance are required, so gold (Au) bonding wire and gold (Au) bumps are used.

Among these methods, although the requirements for large-capacity and miniaturization of semiconductor devices are met, at present, for such methods, it is necessary to perform the following four-step cycle corresponding to the number of wafers according to the number of wafers: (1) Forming bumps, (2) sphere bonding, (3) wedge bonding, (4) breaking the wire; therefore, with the increase in capacity in recent years, there are more than 16 wafers and 32 wafers. In terms of chemistry, 64 steps and 128 steps are required, and the number of man-hours becomes too high, resulting in a decrease in productivity and a problem of very expensive manufacturing costs. Therefore, as an improved joining method, centered on joining device manufacturers, a multi-stage continuous joining method of welded pipe wedge bonding (CWB, Capillary "Wedge" Bonding) has been proposed. CWB is not conventional ball bonding. It is a method as follows: after wedge bonding is performed on the uppermost wafer electrode, wire bonding is performed, and wedge bonding is performed on the next wafer electrode. The same wire is continuously connected to the wafer electrode of the next stage, and finally to the electrode of the circuit board. If this method is used, the disconnection after the bump formation and the wedge bonding and the sphere after the FAB are formed can be omitted, and the man-hours can be greatly reduced. Specifically, since it becomes only one step of wedge bonding for each wafer, the man-hour is one-fourth of the conventional one. Since bumps and FABs are not formed and continuous bonding is possible, the bonding time can be significantly shortened. . In addition, since bumps and FAB are not formed, the amount of bonding wires used can be greatly reduced. This significantly improves productivity and can reduce manufacturing costs (FIG. 6 is an example of conventional ball bonding, and FIGS. 11 and 12 are an example of CWB).

As described above, by using the CWB method with the bonding device, the productivity of continuous bonding of multi-stage laminated wafers can be greatly improved. The premise is the improvement of the so-called hard surface, and the bonding wires of consumables still use gold wires that will not damage the electrodes of the chip. As mentioned above, although it is optimized without the formation of bumps and FAB, if it is necessary to form a multi-stage build-up wafer, the amount of bonding wires used will also increase significantly. Therefore, although the productivity is improved, the use of expensive gold increases the material cost. This has led to new issues such as rising total costs.

The problem of the inventor of this case is to develop a bonding wire instead of a bonding wire with gold as the main component, which has the same characteristics as gold and can be applied to the CWB method without costly material. Reorganize the line conditions required for continuous bonding of multi-stage laminated wafer electrodes by CWB method, including: (1) good wedge bonding (with continuous bonding and bonding strength), (2) no damage to the chip electrodes , (3) Thin wires with a wire diameter below 35μm, (4) The material cost is not expensive, (5) Not limited to CWB, but low specific resistance and other conditions.

For example, Japanese Patent Application Laid-Open No. 2007-012776 (Patent Document 1) describes a bonding wire, which is a bonding wire that improves the formability and bonding properties of the sphere and can increase the bonding strength of the wedge-shaped bonding. The core material of the composition and the outer skin layer on the core material, the outer skin layer contains one or both of the composition or the composition of the conductive metal and copper different from the core material, and the thickness of the outer skin layer is 0.001 to 0.02 μm (1 ~20nm). In addition, Japanese Patent Application Laid-Open No. 2007-1297 (Patent Document 2) describes a bonding wire that improves the formability and bonding properties of a sphere and can increase the bonding strength of wedge bonding. The core material with one or more of palladium, platinum, and aluminum as the main component element and the outer skin layer with the conductive metal different from the main component element as the main component, and the thickness of the outer skin layer is 0.001 to 0.09 μm (1 to 90nm). These bonding wires are nothing more than the thickness of the outer skin layer, the thickness of the concentration gradient between the core material and the outer skin layer, the control of the concentration distribution, etc. to improve the wedge-shaped bonding, etc., and did not focus on having the outer skin layer. The characteristics of the bonding wire body have not been controlled. In addition, the object of wedge bonding referred to here is the electrode of the lead frame and the circuit board, or the bumps on the chip electrode, which is basically different from the case where the wedge bonding is directly performed on the thin chip electrode which is delicate and fragile.

In addition, International Publication No. 2013/129253 (Patent Document 3) describes a power semiconductor device in which a metal wire is used for both the metal electrode (element electrode) of the power semiconductor element and the metal electrode (connection electrode) of the substrate. The power semiconductor device formed by wedge connection, in which the metal wire is Ag or Ag alloy wire with a diameter of more than 50μm and 2mm or less, or the surface of the Ag or Ag alloy wire has Pd, Au, Zn, Pt, Wires coated with one or more of Ni and Sn or alloys of these or oxides or nitrides of these metals. In this power semiconductor device, the metal wire is wedge-joined on both the element electrode and the connecting electrode. However, the metal wire is a thick wire with a diameter of more than 50μm and less than 2mm, and the thin wire with a wire diameter of about 15-35μm is not considered. metal wire. In addition, in this power semiconductor device, only by selecting the constituent metal and thickness of the electrode coating layer covering the electrode surface of the element, the wedge bonding property is improved. In addition, the electrodes of power semiconductors that handle relatively large power are fundamentally different from the electrodes of thin chips that are delicate and easily damaged, such as memory. [Prior Technical Literature] [Patent Literature]

[Patent Document 1] JP 2007-012776 A [Patent Document 2] JP 2007-123597 A [Patent Document 3] International Publication No. 2013/129253

[The problem to be solved by the invention]

As mentioned above, the inventors of the present invention took into account the needs of thinner and multi-layered wafers for semiconductor devices such as memory, and developed a bonding wire instead of a bonding wire with gold as the main component. The characteristics of it can be applied to the method of directly wedge bonding (CWB) between the electrodes of multi-segment laminated wafers without consuming material costs. As the necessary conditions for the wire, the following are again listed: (1) Good wedge bonding (with continuous bonding and bonding strength), (2) No damage to the wafer electrode, (3) Thin wire with a wire diameter of 35μm or less , (4) The material cost is not expensive, (5) not limited to CWB, but the conditions such as low specific resistance.

In addition, if the wafer is stacked in multiple stages in order to make the semiconductor device thinner, in the horizontal V-shaped direction in FIG. 13, there will be a space under the electrode portion of the wafer and there will be no underlayer (support) of the wafer. It is known that in the absence of an underlayer, ultrasonic waves cannot be effectively applied with a welded pipe, resulting in a decrease in the bonding energy to the wafer and a weakening of the bonding strength. Because it is multi-stage, it is necessary to individually set the joining energy suitable for each place. The bonding energy is the range of conditions in order to obtain a stable bonding, and the wedge bonding conditions are mainly load, ultrasonic application, and heating temperature. When the conditions around the joint are different, a wide range of joint energy conditions are required.

The inventor of the present case has repeatedly tried and made mistakes with regard to the bonding wire that does not contain the existing gold as the main component. However, because the range of the corresponding bonding energy in the existing bonding wire is narrow, it is known that in the continuous wedge bonding, the low bonding Energy, that is, the bonding strength is weak when the amount of wire pressing is small and the load is low. In the subsequent wire bonding process, wire peeling (peeling) will occur on the bonding interface. On the contrary, if the bonding energy is high (wire pressing) Large amount and high load), chip damage will occur, and the wire will become extremely thin after deformation. In the subsequent wire bonding process, the wire will be broken at the thinned part of the joint. [Means to solve the problem]

The present invention provides a bonding wire that can continuously and well perform wedge bonding between thin and multi-layered wafer electrodes such as semiconductor memory, without causing damage to the wafer electrodes, wide range of bonding energy conditions, low specific resistance, and No material cost is consumed. In addition, the manufacturing method and the semiconductor wire bonding structure and semiconductor device using the bonding wire are provided to solve the problem.

In order to solve the above-mentioned wedge bonding problem, the inventor of the present invention conducted a detailed study on the bonding wire, and after repeated trial and error, the conclusion reached is that the compressive stress system of the control wire is found to be effective. Compressive stress refers to the strength (force) value per unit area when the wire is deformed by the force in the compression direction. It is found in the present invention that the compressive stress when the wire is compressed (deformed) by 60% relative to the wire diameter is 290 MPa or more and 590 MPa or less The problem can be solved within the scope of the project.

The details of the compressive stress measurement method of the present invention are described in the following paragraphs [0050] to [0053], which are calculated by the following formula. The compressive stress of the wire (MPa) = the force applied when it deforms 60% relative to the wire diameter (N)/(circumference ratio×wire diameter (mm)/2)×indenter diameter (mm)) In addition, the compressive stress can also use the value automatically calculated in the compression tester. The diameter of the indenter is the diameter of the indenter installed on the compression testing machine. The pi system uses 3.14.

The basic idea of the present invention is to control the above-mentioned compressive stress range, low specific resistance and low price, and focus on using Ag wire or Cu wire as the base material to coat the surface of these wires with soft Au. Such a line structure.

The gold-coated bonding wire of the present invention has a core material containing silver or copper as the main component and a coating layer provided on the surface of the core material and containing gold as the main component. The compressive stress when the diameter is 60% deformed is 290 MPa or more and 590 MPa or less.

The method for manufacturing a gold-coated bonding wire of the present invention is used to manufacture a gold-coated bonding wire having a core material containing silver or copper as the main component and a coating layer provided on the surface of the core material and containing gold as the main component. It is characterized by It is such that the compressive stress when deforming 60% with respect to the wire diameter of the gold-coated bonding wire is 290 MPa or more and 590 MPa or less.

The semiconductor wire bonding structure of the present invention has a gold-coated bonding wire, an electrode of a semiconductor wafer, and a wedge-shaped bonding portion formed by bonding the wire and the electrode; the gold-coated bonding wire has a core material containing silver or copper as a main component and The coating layer with gold as the main component is characterized in that in the gold-coated bonding wire, the coating layer has a film thickness of 5 nm or more and 200 nm or less, and the compressive stress when deformed by 60% with respect to the wire diameter is 290 MPa or more and 590 MPa or less.

The semiconductor device of the present invention includes: one or more semiconductor wafers having at least one first electrode; a circuit substrate selected from a lead frame and a circuit board having at least one second electrode; and a gold-coated bonding wire, selected from At least one of "between the first electrode of the semiconductor chip and the second electrode of the circuit substrate" and "between the first electrodes of the plurality of semiconductor chips" is electrically connected, and the first electrode is electrically connected to the The second electrode, or at least one of the plurality of first electrodes performs wedge bonding; characterized in that: the gold-coated bonding wire has a core material containing silver or copper as a main component and a core material provided on the surface of the core material and containing gold As the main component of the coating layer, the compressive stress of the gold-coated bonding wire is 290 MPa or more and 590 MPa or less. [Effects of Invention]

According to the gold-coated bonding wire and the manufacturing method thereof of the present invention, by making the compressive stress 290 MPa or more and 590 MPa or less, even in the case of continuous wedge bonding with different bonding energy conditions due to the joints such as multi-stage laminated wafer electrodes. There is no damage to the semiconductor wafer electrode, etc., and stable wedge bonding strength can be obtained. In addition, according to the semiconductor device of the present invention, by using such a gold-coated bonding wire, it is possible to provide a thin semiconductor memory with a large memory capacity and the like at a low price while suppressing the total cost.

The present invention, in addition to the above effects, of course has effects in terms of bonding stability, bonding reliability, etc., in general spherical bonding to semiconductor wafer electrodes, and wedge bonding to substrate circuits, lead frames, and the like.

Hereinafter, the gold-coated bonding wire and the manufacturing method thereof, the semiconductor wire bonding structure, and the semiconductor device of the embodiment of the present invention will be described with reference to the drawings. In each embodiment, the same reference numerals are given to substantially the same constituent parts, and the description thereof may be partially omitted. The drawings are for illustration only, and the relationship between the thickness and the plane size, the ratio of the thickness of each part, the ratio of the vertical size and the horizontal size, etc. may be different from reality. In addition, the compressive stress (MPa) in this specification uses the value based on the conversion formula of ^{1kgf/mm 2 =9.8MPa.} (Gold-coated bonding wire and its manufacturing method)

The gold-coated bonding wire 1 of the implementation type, as shown in Figures 1 and 2, has a core material 2 with silver (Ag) or copper (Cu) as the main component and a core material 2 provided on the surface of the core material 2 and containing gold (Au) Coating layer 3 as the main component. The gold-coated bonding wire 1 of the implementation type, as shown in FIG. 3 and FIG. 4, may further have an intermediate metal layer 4 provided between the core material 2 and the coating layer 3. The intermediate metal layer 4 is mainly composed of a metal selected from palladium (Pd), platinum (Pt), and nickel (Ni).

The gold-coated bonding wire 1 of the embodiment has a compressive stress of 290 MPa or more and 590 MPa or less when deformed by 60% with respect to the wire diameter. The compressive stress of the gold-coated bonding wire 1 when wedge-shaped bonding is performed to the electrode of the semiconductor wafer, the electrode of the circuit substrate such as the circuit substrate or the lead frame, the amount of wire deformation affects the bonding property to the electrode. In this regard, by using the gold-coated bonding wire 1 having a compressive stress of 290 MPa or more and 590 MPa or less, it is possible to obtain stable wedge bondability and wedge bond strength without causing damage to the semiconductor wafer during wedge bonding. With this, especially when the electrodes of a multi-stage stacked semiconductor wafer are continuously connected by CWB using a bonding wire at each junction with different connection energy conditions, sufficient damage can be obtained without chip damage. The wedge joint strength.

Explain the critical significance of setting the compressive stress range. If the compressive stress of the gold-coated bonding wire 1 is less than 290 MPa, the energy during the wedge bonding, specifically the ultrasonic wave and the load applied, is excessively deformed, and the wire pressing width of the wire bonding portion facing the electrode becomes too large. If a part of the pressed wire exceeds the outside of the electrode, it is likely to come into contact with the adjacent wire bonding portion and cause a short circuit failure. In addition, the wire to be joined by excessive pressing of the wire bonding portion becomes thinner, and when a wire arc is formed with a bonding tool (welded pipe), the wire of the bonding portion is likely to be broken or the like. In particular, when the electrodes of the semiconductor wafer are continuously connected with one bonding wire by CWB, the wire pressing width and the wire thickness of the wire bonding portion tend to become unstable. Conversely, if wedge bonding is performed with low bonding energy in order to avoid such a problem, the deformation of the wire of the bonding portion is insufficient, the strength of the wedge bonding becomes weak, and wire peeling is likely to occur at the bonding interface during the subsequent wire arc formation. In addition, as a means for evaluating the bonding strength, there is a pull test, and wire peeling is called lift, which is an index to evaluate the possibility of peeling at the bonding interface between the wire and the electrode. The compressive stress of the gold-coated bonding wire 1 is preferably 340 MPa or more.

On the other hand, if the compressive stress of the gold-coated bonding wire 1 exceeds 590 MPa, the wire is not easily deformed even if the wedge bonding is performed with high bonding energy, the bonding area of the wire bonding portion is reduced, and the bonding strength becomes weak. During the formation, wire peeling easily occurs at the bonding interface. This will also cause peeling during the tensile test. Therefore, the compressive stress of the gold-coated bonding wire 1 is preferably 540 MPa or less, and more preferably, 490 MPa or less. That is, by using the gold-coated bonding wire 1 having a compressive stress of 290 MPa or more and 590 MPa or less, stable wedge bonding can be performed under a wide range of wedge bonding conditions.

Regarding the compressive stress of the gold-coated bonding wire 1, as described in detail in the following paragraphs, by appropriately controlling the composition of the metal material (silver-based material or copper-based material) constituting the core material 2, the composition and heat treatment of the core material 2, and the coating layer 3. And the thickness of the intermediate metal layer 4, the wire diameter of the bonding wire 1, the heat treatment conditions applied to the bonding wire 1, etc., a compressive stress of 290 MPa or more and 590 MPa or less can be obtained. However, the compressive stress of the gold-coated bonding wire 1 is not limited to the material, manufacturing steps, and manufacturing conditions of the gold-coated bonding wire 1, and its characteristics can be exhibited as long as it falls within the above-mentioned range.

The above-mentioned gold-coated bonding wire 1 preferably has a wire diameter of 13 μm or more and 35 μm or less (diameter D shown in FIG. 1 ). If the wire diameter of the wire 1 is less than 13 μm, when the bonding wire 1 is used for wire bonding during the manufacture of a semiconductor device, there is a concern that the strength and conductivity of the wire bonding may be reduced, which may reduce the reliability of the wire bonding. If the wire diameter of the wire 1 exceeds 35 μm, there is a concern that the bondability of the electrode, especially the bondability of the wedge bonding, will decrease. For example, the opening area of the electrode of the semiconductor device whose pitch is narrowed becomes smaller. If a bonding wire 1 with a wire diameter of more than 35 μm is wedge-bonded within the opening area of such a narrowed electrode, the passivation film may be broken and a short circuit may occur between adjacent bonding portions. In addition, the passivation film has the function of protecting the inside from external moisture and metal ions from the insulating film on the uppermost layer of the wafer, sealing resin, etc. Therefore, if the vertical cross-section of the wafer is observed, the passivation film is higher than the bonding surface of the wafer. If the wire diameter exceeds 35 μm, the passivation film will be destroyed due to contact with the side surface of the wire near the junction and contact with the wire pressed at the junction during bonding.

The core material 2 mainly constitutes the part of the bonding wire 1 of the embodiment, and it functions as the bonding wire 1. As the main component of this core material 2, silver or copper is used. Here, the inclusion of silver or copper as a main component means that the core material 2 contains at least 50% by mass or more of silver or copper. When a material containing silver as the main component is used as the core material 2, the core material 2 may be made of pure silver, but it is preferably made of a silver alloy in which an additional element is added to the silver. Furthermore, when a material containing copper as the main component is used as the core material 2, the core material 2 may be composed of pure copper, but it is preferably composed of a copper alloy in which an additional element is added to copper. If it is a pure metal, it has the disadvantage of being too soft due to self annealing (self annealing), making it difficult to handle in the manufacturing process. If alloyed, it becomes harder than pure metal, and there is an advantage that the bonding wire becomes easier to handle in the manufacturing step. Moreover, not only this, but also by using the core material 2 composed of a silver alloy or a copper alloy, there is an advantage that it is easy to obtain a gold-coated bonding wire 1 having a compressive stress of 290 MPa or more and 590 MPa or less.

In principle, the compressive stress of the entire control wire is the most important condition for achieving the subject. However, the core material 2 containing silver or copper as a main component has a Vickers hardness (Hv) of 40 or more and 80 or less. The Vickers hardness referred to here is the Vickers hardness of the core material 2 in the cross section of the gold-coated bonding wire 1. When the Vickers hardness of the core material 2 is 40 or more and 80 or less, it is easy to obtain a gold-coated bonding wire 1 having a compressive stress of 290 MPa or more and 590 MPa or less. That is, if the Vickers hardness of the core material 2 is less than 40, the compressive stress of the gold-coated bonding wire 1 becomes too low, and it becomes difficult to obtain a compressive stress of 290 MPa or more. If the Vickers hardness of the core material 2 exceeds 80, the compressive stress of the gold-coated bonding wire 1 becomes too high, and it becomes difficult to obtain a compressive stress of 590 MPa or less. The Vickers hardness of the core material 2 is more preferably 45 or more, and still more preferably 70 or less. Of course, not only is it easy to obtain the target compressive stress, but by making the Vickers hardness within this range, the wedge-shaped joining property is further improved due to the multiplying effect of the compressive stress and the hardness. In addition, the compressive stress and Vickers hardness are not necessarily in a purely proportional relationship.

When the core material 2 is composed of a silver alloy, the silver content in the silver alloy is preferably 97% by mass or more. The silver alloy constituting the core material 2 preferably contains selected from copper (Cu), calcium (Ca), phosphorus (P), gold (Au), palladium (Pd), platinum (Pt), nickel (Ni), and rhodium At least one element of the group consisting of (Rh), indium (In), and iron (Fe). The elements added to the silver alloy constituting the core material 2 have the effect of improving the reliability (corrosion resistance) of the gold-coated bonding wire 1 and preventing self annealing (self annealing) by increasing the Vickers hardness of the core material 2. If the wire becomes too soft after self-annealing, the wire becomes difficult to handle during the manufacturing step, and it is easy to cause scratches. However, if the content of the additive element is too large, the specific resistance of the core material 2 increases, and the conductivity of the core material 2 and even the gold-coated bonding wire 1 decreases. The content of the additive element is preferably in the range of 1 ppm by mass or more and 3% by mass or less with respect to the entire amount of thread 1.

If the content of the additive element in the silver alloy constituting the core material 2 is less than 1 mass ppm relative to the total amount of the wire 1, the reliability of the gold-coated bonding wire 1 cannot be sufficiently obtained and the effect of suppressing the self-annealing of the core material 2 And other doubts. When the content of the additive element exceeds 3% by mass relative to the total amount of the wire 1, the specific resistance of the gold-coated bonding wire 1 increases. The content of the additive element is preferably set so that the specific resistance of the gold-coated bonding wire 1 is in the range of 2.3 μΩ･cm or less.

When the core material 2 is composed of a copper alloy, the copper content in the copper alloy is preferably 98% by mass or more. The copper alloy constituting the core material 2 preferably contains selected from phosphorus (P), gold (Au), palladium (Pd), platinum (Pt), nickel (Ni), silver (Ag), rhodium (Rh), and indium At least one element in the group consisting of (In), gallium (Ga), and iron (Fe). Similarly, the elements added to the copper alloy constituting the core material 2 improve the reliability (corrosion resistance) of the gold-coated bonding wire 1, and increase the Vickers hardness of the core material 2 to prevent self annealing (self annealing). )Effect. If the wire becomes too soft after self-annealing, not only the wire becomes difficult to handle in the manufacturing step, but it is also easy to cause scratches due to slight impact. However, if the content of the additive element is too large, the specific resistance of the core material 2 increases, and the function of the core material 2 and even the gold-coated bonding wire 1 decreases. The content of the additive element is preferably in the range of 1 ppm by mass or more and 2% by mass or less with respect to the entire amount of thread 1.

If the content of the additive element in the copper alloy constituting the core material 2 is less than 1 mass ppm relative to the total amount of the wire 1, the reliability of the gold-coated bonding wire 1 cannot be sufficiently obtained and the self-annealing of the core material 2 is suppressed. Doubts about effectiveness. If the content of the additive element exceeds 2% by mass relative to the total amount of the wire 1, the specific resistance of the gold-coated bonding wire 1 increases. The content of the additive element is preferably set so that the specific resistance of the gold-coated bonding wire 1 is in the range of 2.3 μΩ･cm or less.

In the gold-coated bonding wire 1 using the core material 2 made of silver or silver alloy, the compressive stress is preferably 290 MPa or more and 440 MPa or less. By using such a gold-coated bonding wire 1, the wire characteristics of the gold-coated bonding wire 1 using the silver-based core material 2 can be satisfied on the one hand, and the wedge bondability can be improved on the other hand. In addition, in the gold-coated bonding wire 1 using the core material 2 composed of the above-mentioned copper or copper alloy, the compressive stress is preferably 440 MPa or more and 590 MPa or less. By using such a gold-coated bonding wire 1, it is possible to satisfy the wire characteristics of the gold-coated bonding wire 1 using the copper-based core material 2 and to improve the wedge bonding property.

The gold-coated bonding wire 1 of the embodiment has a coating layer 3 provided on the surface of the core material 2 mainly composed of silver or copper. The coating layer 3 contains gold as a main component. Here, the inclusion of gold as a main component means that the coating layer 3 contains 50% by mass or more of gold. The coating layer 3 containing gold as the main component improves the corrosion resistance of the wire. (Au alloy), silver (Ag) plating or silver alloy (Ag alloy) plating formed on the inner lead surface of the lead frame has good compatibility and is easy to diffuse, so it exhibits good bonding strength, especially good Wedge bonding strength. Therefore, wedge bonding is performed on the bonding wire 1 having the coating layer 3 containing gold as the main component on the surface, especially when continuous bonding is performed by CWB, the bonding wire 1 can be wedge bonding with good bonding strength and bonding reliability.

The coating layer 3 may be composed of pure gold (a gold content of 99.9% or more), or may be composed of a gold alloy obtained by adding additional elements to gold. The gold alloy constituting the coating layer 3 preferably contains at least one selected from the group consisting of antimony (Sb), palladium (Pd), platinum (Pt), nickel (Ni), cobalt (Co), and bismuth (Bi) An element. The elements added to the gold alloy constituting the coating layer 3 show the effect of improving the reliability of the bonding between the gold coating layer 3 and the aluminum (Al) constituting the electrode of the semiconductor wafer. In addition, the film thickness of the gold coating layer 3 is preferably 5 nm or more and 200 nm or less. By setting the film thickness of the gold coating layer 3 to be 5 nm or more, the wedge bonding properties of the gold coating layer 3 to aluminum electrodes, gold electrodes, silver-plated electrodes, and the like can be sufficiently improved. If the film thickness of the gold coating layer 3 exceeds 200 nm, the manufacturing cost of the gold-coated bonding wire 1 increases, which is not preferable. As described above, the product of the present invention is sometimes used for sphere bonding. Therefore, if the gold coating layer exceeds 200 nm, the sphere formation properties such as FAB eccentricity may decrease. In addition, the film thickness of the gold coating layer 3 is preferably more than 20 nm, more preferably 50 nm or more, and still more preferably 150 nm or less.

As described above, the gold-coated bonding wire 1 of the implementation type, as shown in FIGS. 3 and 4, may also have an intermediate metal layer 4 disposed between the core material 2 and the coating layer 3. The intermediate metal layer 4 is mainly composed of a metal selected from palladium (Pd), platinum (Pt), and nickel (Ni). By providing such an intermediate metal layer 4 between the core material 2 and the coating layer 3, not only the reliability (corrosion resistance) can be improved, but also the constituent material of the core material 2 can be prevented from oozing out of the coating layer 3 at high temperatures. Join the surface of the wire 1. For example, if copper is exposed on the outermost surface of the core material 2, the suspicion of oxidation increases, and if silver is exposed on the outermost surface of the core material 2, the susceptibility of vulcanization increases. These are the main reasons that lead to the decrease in the reliability of the bonding of the gold-coated bonding wire 1 to the electrode. For such a point, by providing the intermediate metal layer 4 between the core material 2 and the covering layer 3, it is possible to suppress the seepage of copper or silver to the wire surface in a high-temperature environment, and to improve the bonding reliability.

The intermediate metal layer 4 may also be composed of pure palladium, pure platinum, or pure nickel, or may be composed of an alloy containing two or more of these metals. Furthermore, the intermediate metal layer 4 may also be composed of a metal selected from palladium, platinum, and nickel as a main component, and a palladium alloy, platinum alloy, or nickel alloy with additional elements added thereto.

The intermediate metal layer 4 preferably has a thickness of 60 nm or less. If the thickness of the intermediate metal layer 4 exceeds 60 nm, there is a concern that the original characteristics such as the sphere formation of the FAB of the gold-coated bonding wire 1 may be impaired. In addition, since the effect of suppressing the above-mentioned copper and silver wire surface exposure can be sufficiently obtained, the thickness of the intermediate metal layer 4 is preferably 1 nm or more. In addition, the gold-coated bonding wire 1 of the implementation type is not limited to only the core material 2 and the coating layer 3, or the core material 2, the coating layer 3, and the intermediate metal layer 4. The gold-coated bonding wire 1 of the implementation type can also be formed into a structure other than these according to requirements, such as a three-layer coating, a four-layer coating, and the like.

The compressive stress of the gold-coated bonding wire 1 can be measured in the following manner. That is, the gold-coated bonding wire 1 is cut out to a length of several centimeters without applying tension to prepare a wire sample. While taking care not to stretch or slack the wire sample, place it laterally on the flat sample table of a compression testing machine (for example, a micro-compression testing machine model MCT-W-500 manufactured by Shimadzu Corporation). Next, as the setting of the device, the sample shape is round, the indenter size is φ200 μm, the deformation in the cross-sectional direction of the wire is 60% of the wire diameter, and the maximum load corresponding to the wire diameter is set. For example, for the maximum load setting, when the wire diameter is φ20μm, the standard value is 3.5N.

Next, move the stage so that the wire is moved to the center of the indenter, and the surface of the wire is compressed by the indenter to obtain the compressive stress of the wire. The compressive stress value is automatically calculated by the device, and there is no problem using this value. In terms of the formula, the force applied when compressing 60% of the wire diameter is divided by the cross-sectional area of the wire after being pressed. The method for obtaining the cross-sectional area is explained here. In an ideal state, it is not limited to the case where the wire surface is evenly thinned with the indenter, and the shape (cross section) of the wire after pressing becomes a quadrilateral, and the thickness is close to zero without limitation. The transverse length of the section is the diameter of the indenter, and the longitudinal length is a value that is unlimitedly close to half of the circumferential length of the line. Therefore, the cross-sectional area of the line is obtained by the horizontal × vertical direction, and becomes the diameter of the indenter × (circumference × diameter/2).

To illustrate with a specific example, the 60% compression of a wire diameter of 20 μm is based on the force (N) applied to press the wire to a height of 8 μm divided by the cross-sectional area (mm ² ) defined above. That is, the value obtained by dividing the force by (indenter size 200μm=0.2mm)×(half the circumference of the wire)=(wire diameter 0.02mm×3.14/2) is the compressive stress. Strictly speaking, where the wire is deformed by 60%, the wire is not completely flattened, so the longitudinal length of the cross-sectional area is not equal to half the length of the circumference, but whether it is a measured value calculated from this cross-sectional area, or rigorous The measured value calculated based on the cross-sectional area when the ground is deformed by 60% is only slightly different, and will not produce a difference beyond the critical significance range. Therefore, the method of measuring this value is adopted in the present invention. The compressive stress is expressed by a simple formula below. The compressive stress of the wire (MPa) = the force applied when it deforms 60% relative to the wire diameter (N)/((circumference ratio×wire diameter (mm)/2)×indenter diameter (mm))

Also, be careful that after compressing the wire, take the tested wire and use a scanning electron microscope to observe the shape of the indentation. The state of the indentation is shown in Figure 5 (attached SEM image). The length of the indentation is ±20% of the diameter of the indenter, and the longitudinal direction of the line is taken as the axis. Confirm that the pressing width is symmetrical. If these conditions are not met, it may be an incorrect measurement value, so re-measurement is performed. The measured value is taken as the average of three measurements, and the unit is MPa. In addition, when the output unit of the compression test device is kgf/mm ² , the value converted according to the conversion formula of 1 kgf/mm ^{2 =9.8 MPa is applied.} In addition, the reason for setting the amount of compression deformation to 60% of the wire diameter is that the average wire pressing rate in wedge bonding is about 60%.

The Vickers hardness in the cross section of the core material 2 was measured in the following manner. That is, the gold-coated bonding wire is cut out to a length of several centimeters, and a plurality of wire samples are prepared. On the one hand, pay attention to avoid stretching or slack of the wire sample, on the other hand, stick it straight and flat on the metal (Ag-plated frame) board. After that, press the metal plate to put the wire sample into a cylindrical mold (mold) so that the metal plate becomes the bottom of the cylinder, pour the filling resin into the mold, and then add a hardener to harden the resin. Then, the cylindrical resin that has been hardened and embedded with the wire sample is roughly polished with a grinder so that the cross section of the wire is exposed. After that, the cross section is processed by final polishing, and then the residual strain on the polished surface is removed by ion polishing to obtain a smooth surface. In addition, the ion milling device was finely adjusted so that the wire cut section was perpendicular to the longitudinal direction of the wire. Fix it on the sample table of the hardness tester (an example: HM-220 manufactured by Mitutoyo) so that the cross section of the line sample (that is, the polished surface of the sample) is parallel to the sample table, with a test force of 0.001 kgf and a load time of 4.0 The measurement of Vickers hardness is carried out near the center of the line profile under the conditions of 2 seconds, holding time 10.0 seconds, unloading time 4.0 seconds, and approach speed 60.0um/s. The hardness measurement was carried out for 5 pieces, and the average value was calculated.

In the gold-coated bonding wire 1, when the core material 2 is composed of a silver alloy or a copper alloy, the content of the added element relative to the entire wire 1, the content of the gold constituting the coating layer 3 relative to the entire wire 1, the coating layer is composed of a gold alloy In the case of 3, the content of the additive element relative to the entire wire 1, the content of palladium, platinum, or nickel constituting the intermediate metal layer 4 relative to the entire wire 1, and the additive element relative to the wire 1 in the case of an alloy forming the intermediate metal layer 4 The overall content is measured in the following way. That is, first, in order to calculate the gold content, the bonding wire 1 is put into dilute nitric acid to dissolve the core material 2, and then the solution is collected. Add hydrochloric acid to this solution, and use ultrapure water as a constant volume solution. Use this constant volume solution to perform ICP-AES (Inductively Coupled Plasma Atomic Emission Spectroscopy) or Inductively Coupled Plasma-Mass Spectrometry (ICP-MS) to measure core material 2 The content of added elements.

The thickness of the coating layer 3 and the intermediate metal layer 4 was measured in the following manner. That is, from the surface of the gold-coated bonding wire 1, a scanning-type Auger Electron Spectroscopy (AES, Auger Electron Spectroscopy) analysis device (for example, manufactured by Japan Electronics Corporation, trade name: JAMP-9500F) is used to analyze the elements in the depth direction composition. The setting conditions of the AES analyzer are: the acceleration voltage of the primary electron beam is 10kV, the current is 50nA, the energy beam diameter is 5μm, the acceleration voltage of argon ion sputtering is 1kV, and the sputtering speed is 2.5nm/min (in SiO ₂ conversion). The surface of the gold-coated bonding wire 1 was analyzed in the depth direction until the detected concentration of the main component of the core material became 50 atomic% or more, and the average concentration of gold relative to the sum of gold and silver or copper was determined. When the intermediate metal layer 4 is provided, the average concentrations of gold and element M with respect to the sum of the main constituent element M of the intermediate metal layer 4 and gold and silver or copper are respectively determined.

The coating layer 3 is defined as the region from the surface of the wire 1 to the point where the ratio of the above-mentioned gold to the total of silver or copper and gold becomes 50.0 atomic %, and the thickness of this region is determined as the thickness of the coating layer 3. The place where the proportion of gold becomes 50.0 atomic% is the boundary between the core material 2 and the coating layer 3. The intermediate metal layer 4 is defined as the region from the point where the ratio of the above-mentioned gold to the sum of silver or copper and gold and the element M becomes 50.0 atomic% to the point where the ratio of the element M becomes 50.0 atomic %, and find the thickness of this region As the thickness of the intermediate metal layer 4.

Next, a method of manufacturing the gold-coated bonding wire 1 of the embodiment will be described. In addition, the manufacturing method of the gold-coated bonding wire of the embodiment is not particularly limited to the manufacturing method shown below. The gold-coated bonding wire 1 of the implementation type is obtained, for example, by the following method: a layer containing gold as the main component is formed on the surface of the wire with silver or copper as the core material 2 as the main component, thereby making the wire The wire is drawn to the required wire diameter of the gold-coated bonding wire 1, and then heat treatment is performed according to the demand. In addition, the case of the gold-coated bonding wire 1 having the intermediate metal layer 4 is obtained by, for example, the following method: on the surface of the silver or copper wire that becomes the core material 2, the layers and the layers of the intermediate metal layer 4 are sequentially formed The layer containing gold as the main component is used to produce the raw material of the wire, and the wire drawing process is performed to the required wire diameter of the gold-coated bonding wire 1, and then heat treatment is performed as required.

In the case of using silver or copper as the core material 2, the silver or copper of a predetermined purity is dissolved, and in the case of using a silver alloy or copper alloy, the method is to dissolve the silver of the predetermined purity with the added element, or to make the silver of the predetermined purity. The copper is dissolved together with the added elements, thereby obtaining the material of the silver core material or the material of the copper core material. The melting system uses heating furnaces such as electric arc heating furnaces, high frequency heating furnaces, resistance heating furnaces, and continuous casting furnaces. For the purpose of preventing the mixing of oxygen and hydrogen from the atmosphere, the silver soup or copper soup of the heating furnace is preferably kept in a vacuum or an inert gas environment such as argon and nitrogen. The melted core material is solidified in continuous casting from a heating furnace to a predetermined wire diameter, or the melted core material is cast in a mold to produce an ingot, and then the ingot Perform roll calendering. According to the demand, heat treatment is carried out, and the wire is drawn to a predetermined wire diameter to obtain silver wire or copper wire (including silver alloy wire and copper alloy wire).

As a method of forming a layer as the gold layer or the intermediate metal layer 4 on the surface of the silver wire or the copper wire, for example, a plating method (wet method) or vapor deposition method (dry method) is used. The plating method may be either an electroplating method or an electroless plating method. Electroplating such as impact plating or flash plating has a fast plating speed, and if applied to gold plating, good adhesion of the gold layer to silver or copper wires can be obtained. In the plating method, in order to make the gold layer or the palladium layer, platinum layer or nickel layer as the intermediate metal layer 4 contain additional elements, for example, in the above-mentioned electroplating, plating of the constituent elements of the gold plating solution or the intermediate metal layer 4 is used. The coating solution contains a plating solution containing a plating additive of the added element. At this time, by adjusting the types and amounts of plating additives, the amounts of added elements in the coating layer 3 and the intermediate metal layer 4 can be adjusted.

As the vapor deposition method, physical vapor deposition (PVD) such as sputtering, ion implantation, and vacuum vapor deposition, or chemical vapor deposition (CVD) such as thermal CVD, plasma CVD, and metal organic vapor growth (MOCVD) can be used. ). With this method, there is no need to clean the gold coating layer or the intermediate metal layer after the formation, and there is no doubt that the surface will be contaminated during cleaning. As a method for adding an additive element to the gold layer or the palladium layer, platinum layer or nickel layer as the intermediate metal layer 4 by the vapor deposition method, there is the use of a gold target containing an additive element or a constituent material target of the intermediate metal layer 4. A method of forming a gold layer or an intermediate metal layer by magnetron sputtering or the like. In the case of applying other methods, it is sufficient to use a raw material in which the gold material or the constituent material of the intermediate metal layer 4 contains the desired additional element.

In addition, as another method, there is also a clad manufacturing method in which a tubular container is formed with a pre-coated material, and then a core material is inserted into it to manufacture it.

The processing rate of the wire drawing process is determined in accordance with the final wire diameter and application of the gold-coated bonding wire 1 to be manufactured. The processing rate of wire drawing processing is generally, as the processing rate of processing the coated silver wire or copper wire to the final wire diameter, preferably 90% or more. This processing rate can be calculated as the shrinkage rate of the line cross-sectional area. The wire drawing process is preferably performed by using a plurality of diamond molds to reduce the wire diameter in stages. In this case, the reduction ratio (processing ratio) of each diamond mold is preferably 5% or more and 15% or less.

After the silver wire or copper wire coated with the constituent material layer of the gold layer and the intermediate metal layer 4 is drawn to the final wire diameter, it is preferable to perform a final heat treatment. The final heat treatment is performed in consideration of the strain removal heat treatment that removes the strain of the metallic structure remaining in the wire 1 at the final wire diameter and the necessary wire characteristics. To remove the strain heat treatment, it is better to consider the necessary line characteristics, especially the compressive stress of the line 1, to determine the temperature and time. In addition, it is also possible to perform heat treatment according to the purpose at any stage of the on-line manufacturing. As such heat treatment, there are strain removal heat treatment in the wire drawing process, diffusion heat treatment to improve adhesion after forming the constituent material layer of the gold layer or the intermediate metal layer 4, and the like. By performing diffusion heat treatment, the adhesion between the core material 2 and the coating layer 3 can be improved. The heat treatment is preferably a progressive heat treatment in which the wire passes through a heating environment heated to a predetermined temperature for heat treatment, because it is easy to adjust the heat treatment conditions. In the case of progressive heat treatment, the heat treatment time is calculated from the passing speed of the wire and the passing distance of the wire in the heating device. As the heating device, an electric furnace or the like is used. To suppress the oxidation of the wire surface _{, it is effective to flow inert gas such as N 2} and Ar on the one hand, and heat on the other hand. If necessary, a reductive mixed gas of _{N 2} and H _{2 is used.}

In the manufacturing steps of the above-mentioned gold-coated bonding wire 1, the composition of the metal material (silver-based material or copper-based material) that constitutes the core material 2 depends on the material and thickness of the coating layer 3 and the intermediate metal layer 4 formed as required. , The wire diameter of the bonding wire 1 and other manufacturing conditions such as heat treatment conditions are appropriately controlled, and a compressive stress of 290 MPa or more and 590 MPa or less can be obtained. For example, the core material 2 is preferably composed of a silver alloy or a copper alloy, and further has a tendency that the larger the amount of the added element in the silver alloy or the copper alloy, the higher the compressive stress. In addition, the thicker the thickness of the coating layer 3, the lower the compressive stress tends to be. Furthermore, the core material 2 using a copper alloy tends to increase the compressive stress compared to the core material 2 using a silver alloy.

It is preferable to select the heat treatment conditions based on the tendency of the compressive stress based on the constituent material of the above-mentioned gold-coated bonding wire 1 and the like. The heat treatment is preferably carried out in two stages of the intermediate stage and the final stage. Regarding the final heat treatment, the higher the temperature, the lower the compressive stress. Regarding the intermediate heat treatment, the higher the temperature, the lower the compressive stress. In view of these viewpoints, when using a material that tends to exhibit high compressive stress as a constituent material, it is preferable to set the intermediate heat treatment temperature to 400°C or more and 600°C or less, and the heat treatment time to be 0.2 second or more and 20 seconds or less. When using a material that tends to exhibit low compressive stress as the constituent material, it is preferable to set the intermediate heat treatment temperature to 200°C or more and less than 400°C, and to set the heat treatment time to 0.2 second or more and 20 seconds or less. Furthermore, when using a material that tends to exhibit high compressive stress as the constituent material, it is preferable to set the final heat treatment temperature to 350°C or more and 650°C or less, and the heat treatment time to be 0.01 second or more and 5 seconds or less. In the case of using a material that tends to exhibit low compressive stress as the constituent material, it is preferable to set the final heat treatment temperature to 150°C or more and 350°C or less, and to set the heat treatment time to 0.01 second or more and 5 seconds or less.

In addition, even if the heat treatment conditions are the same, depending on the structure of the heat treatment device and the type and amount of additional elements in the core material, the compressive stress may be affected. In this regard, in the manufacturing steps of the gold-coated copper bonding wire of this embodiment, the compressive stress of the wire can be controlled by adjusting the elongation during the heat treatment in the final heat treatment. In the case of a wire containing a core material containing copper as a main component, it is preferable to adjust the elongation to 5.0% or more and 20.0% or less, more preferably 8.0% or more and 20.0% or less. When a core material containing silver as a main component is used as a constituent material, the elongation is preferably adjusted to 1.5% or more and 15.0% or less, and more preferably 2.0% or more and 11.0% or less.

The elongation is the value obtained from the tensile test of the bonding wire. The elongation can be measured in accordance with JIS-Z2241 or JIS-Z2201. For example, in a tensile test device (for example, Autocom manufactured by TSE Co., Ltd.), when a bonding wire with a length of 10 cm is stretched at a speed of 20 mm/min and a load cell of 2N, the ratio of the stretched length to the break is calculated . Taking into account the unevenness of the measurement results, it is desirable to find the average value of 5 as the elongation.

For the above supplementary explanation. Originally, in order to adjust the range of compressive stress to the target of the final product, it is ideal to adjust the final heat treatment conditions while measuring the compressive stress. However, from the viewpoint of achieving simplification of the manufacturing operation, it is regarded as a rough compressive stress. Standard, use the elongation of the easy-to-measure thread as an alternative. Of course, in terms of controlling elongation, it is not necessarily limited to the range adjusted to the target compressive stress. (Semiconductor device)

Next, the semiconductor device using the gold-coated bonding wire 1 of the implementation type will be described with reference to FIGS. 6 to 8, FIG. 11 and FIG. 12. In addition, FIG. 6 shows a cross-sectional view of the semiconductor device of the embodiment type before resin sealing, FIG. 7 is a cross-sectional view of the semiconductor device of the embodiment type resin-sealed, and FIG. 8 shows the semiconductor device of the embodiment type. A cross-sectional view of the wedge-shaped bonding portion of the gold-coated bonding wire 1 bonded to the electrode of the semiconductor wafer. 11 and 12 are respectively cross-sectional views showing modification examples of the semiconductor device of the implementation type.

The semiconductor device 10 of the embodiment (the semiconductor device 10X before resin sealing), as shown in FIGS. 6 and 7, includes: a circuit substrate 12 with electrodes (substrate electrodes) 11; and a plurality of semiconductor wafers 14 (14A, 14B, 14C), arranged on the circuit board 12, each having at least one electrode (wafer electrode) 13; and bonding wire 15 (gold-coated bonding wire 1), connecting the electrode 11 of the circuit board 12, the electrode 13 of the semiconductor wafer 14 and a plurality of The electrodes 13 of the semiconductor wafer 14 are connected to each other. For the circuit board 12, for example, a printed wiring board or a ceramic circuit board in which a wiring net is provided on the surface and inside of an insulating base material such as a resin material or a ceramic material, and electrodes connected to the wiring net are provided on the surface.

6 and 7 show the semiconductor device 10 in which a plurality of semiconductor wafers 14 are mounted on the circuit board 12, but the configuration of the semiconductor device 10 is not limited to this. For example, the semiconductor chip can also be mounted on the lead frame. In this case, the electrode of the semiconductor chip is connected to the inner lead through the bonding wire 15 and the inner lead functions as an internal terminal (electrode) of the lead frame. The number of semiconductor chips 14 mounted on the circuit board 12 or the lead frame may be one or more. The bonding wire 15 is used to connect at least one of the electrode 11 of the circuit board 12 and the electrode 13 of the semiconductor wafer 14, the lead frame and the electrode of the semiconductor wafer, and the electrode 13 of the plurality of semiconductor wafers 14, where they are connected (two At least one of the electrodes) is wedge-shaped. As will be described later, when a plurality of semiconductor wafers 14 are stacked on the circuit board 12 or the lead frame to be mounted in steps, it may be between the plurality of semiconductor wafers 14 and between the semiconductor wafer 14 and the circuit board 2. One bonding wire 15 is continuously connected by wedge bonding by CWB.

Among the plurality of semiconductor wafers 14 of the semiconductor device 10 shown in FIGS. 6 and 7, the semiconductor wafers 14A and 14C are mounted on the wafer mounting area of the circuit board 12 through a die bonding material 16. The semiconductor chip 14B is mounted on the semiconductor chip 14A through a die bonding material 16. One electrode 13 of the semiconductor chip 14A is connected to the electrode 11 of the circuit board 12 through the bonding wire 15, the other electrode 13 is connected to the electrode 13 of the semiconductor chip 14B through the bonding wire 15, and the other electrode 13 is connected to the semiconductor chip 14C through the bonding wire 15 The electrodes 13 are connected. The other electrode 13 of the semiconductor wafer 14B is connected to the electrode 11 of the circuit board 12 through a bonding wire 15. The other electrode 13 of the semiconductor wafer 14C is connected to the electrode 11 of the circuit board 12 through a bonding wire 15.

The semiconductor chip 14 is provided with an integrated circuit (IC) composed of a silicon (Si) semiconductor or a compound semiconductor. The wafer electrode 13 is composed of, for example, an aluminum electrode having an aluminum (Al) layer, AlSiCu, AlCu, or other aluminum alloy layer at least on the outermost surface. The aluminum electrode, for example, is formed by coating an electrode material such as Al or Al alloy on the surface of a silicon (Si) substrate in a manner that is electrically connected to internal wiring. The semiconductor chip 14 performs data transmission between the substrate electrode 11 and the bonding wire 15 and an external device, and supplies power from the external device.

The electrode 11 of the circuit board 12 is electrically connected to the electrode 13 of the semiconductor chip 14 mounted on the circuit board 12 through the bonding wire 15. In the semiconductor device 10 of the embodiment type, the bonding wire 15 is composed of the gold-coated bonding wire 1 of the above-mentioned embodiment type. In some of the bonding wires 15, one end is ball-bonded to the wafer electrode 13 (first bonding), and the other end is wedge-bonded to the substrate electrode 11 (second bonding). The ball bonding and the wedge bonding may be reversed, and the ball bonding (first bonding) may be performed on the substrate electrode 11 and the wedge bonding (second bonding) may be performed on the wafer electrode 13. The same applies to the connection between the electrodes 13 of a plurality of semiconductor wafers 14 with bonding wires 15. One end is ball-bonded to the wafer electrode 13 (first bonding), and the other end is wedge-bonded to the other wafer electrode 13 ( 2nd junction). In addition, the electrode 13 of the semiconductor chip 14 electrically bonded by the bonding wire 15 also includes bumps (not shown in the figure) that are pre-bonded to the electrode of the semiconductor chip 14.

Wire connection by the bonding wire 15, for example, one end of the bonding wire 15 is melted by electric discharge or the like, and solidified into a spherical shape by surface tension or the like to form a FAB, and this FAB is placed on the electrode 13 of the semiconductor chip 14 After the ball bonding is performed, the bonding tool (welded pipe) is lifted to form a wire arc structure, and ultrasonic waves and a load are applied in a state where the bonding wire 15 is pressed against the electrode 11 of the circuit board 12 to perform wedge bonding. As shown in FIG. 8, after the wedge-shaped bonding portion 17 is formed on the substrate electrode 11, the bonding wire 15 is torn off, thereby ending the connection at one point. The same applies to the connection between the electrodes 13 of the semiconductor wafer 14 (the electrodes 13 of different built-in wafers) by the bonding wire 15. After that, a sealing resin layer 18 is formed on the circuit substrate 12 by resin-sealing a plurality of semiconductor wafers 14 and bonding wires 15, thereby manufacturing the semiconductor device 10. Semiconductor devices, specifically, include logic ICs, analog ICs, discrete semiconductors, memory, optical semiconductors, and the like.

In the semiconductor device 10 of the embodiment, if the gold-coated bonding wire 1 used as the bonding wire 15 has a compressive stress of 290 MPa or more and 590 MPa or less, even if the bonding wire 15 is placed on the electrode 11 or semiconductor device that is not suitable for contact with the circuit board 12 The electrode 13 of the wafer 14, especially the position where the electrode 13 of the wafer is joined, such as an unsupported position, can also be well wedge-joined under a wide range of ultrasonic conditions or load conditions, so it will not be used for semiconductor wafers 14 Damage is caused, and stable wedge joint strength can be obtained. In addition, since the width of the wedge can be controlled within an appropriate range, it is possible to suppress short circuits between electrodes whose pitch has been narrowed. With this, it is possible to provide a semiconductor device with improved connection reliability between the electrodes of the bonding wire 15 and the electrodes.

Next, another semiconductor device 1 will be described with reference to FIGS. 11 and 12. The semiconductor device 1 shown in FIG. 11 has four semiconductor wafers 14A, 14B, 14C, and 14D laminated on a circuit board 12 in multiple stages. These semiconductor wafers 14A, 14B, 14C, and 14D are stacked in a stepped shape so that the respective electrodes 13 are exposed. The electrodes 13 of the semiconductor wafers 14A, 14B, 14C, and 14D and the electrodes 11 of the circuit board 12 are continuously connected with one bonding wire 15. That is, the four electrodes 13 and the substrate electrode 11 are connected with one bonding wire 15 by CWB. In addition, the arrow indicates the joining direction.

Specifically, the bonding wire 15 held by the bonding tool (welded pipe) is first wedge-shaped to the electrode 13 of the uppermost semiconductor wafer 14D. Next, without tearing the bonding wire 15, the bonding tool (welded tube) is lifted to form a wire arc structure, and the bonding wire 15 is moved to the electrode 13 of the semiconductor wafer 14C to perform wedge bonding. Similarly, without breaking the bonding wire 15, the bonding wire 15 is wedge-bonded to the electrode 13 of the semiconductor wafer 14B and the electrode 13 of the semiconductor wafer 14A in this order. After the bonding wires 15 are wedge-bonded to the electrodes 13 of the semiconductor wafers 14D, 14C, 14B, and 14A in sequence, the bonding wires 15 are similarly wedge-bonded to the electrodes 11 of the circuit board 12, and then the bonding wires 15 are broken. In this way, without breaking the bonding wire 15 on the way, the electrodes 13 of the semiconductor wafers 14A, 14B, 14C, and 14D and the electrodes 11 of the circuit board 12 are continuously connected with one bonding wire 15.

The four wafer electrodes 13 and the substrate electrodes 11 are continuously wedge-shaped and electrically connected with one bonding wire 15, thereby reducing the number of ball formation and the number of wire tearing, thereby realizing high-speed bonding. And improve productivity based on this speedup. When performing continuous wedge joining, the wedge joining property of the joining wire 15 becomes important. In this regard, since the gold-coated bonding wire 1 having a compressive stress of 290 MPa or more and 590 MPa or less is used as the bonding wire 15, the bondability to the electrodes 13, 11 in continuous wedge bonding can be improved. Therefore, without causing damage to the semiconductor wafer 14, the wafer electrode 13 can be well wedge-bonded under a wide range of bonding conditions. Therefore, the productivity and reliability of the semiconductor device 10 to which CWB is applied can be improved.

The wire bonding to which CWB is applied is not limited to the structure shown in FIG. 11. For example, as shown in FIG. 12, the bonding wire 15 may be ball-bonded to the substrate electrode 11 of the lowermost circuit board 12 to form a ball bonding portion 19. The electrodes 13 of the wafers 14A, 14B, 14C, and 14D are wedge-shaped, and then the bonding wires 15 are pulled off. In the semiconductor device 10 to which this CWB is applied, the continuous wedge bondability can also be improved based on the effect of improving the wedge bondability of the bonding wire 15, thereby improving the productivity and reliability of the semiconductor device 10 to which CWB is applied. The arrow indicates the joining direction.

In the semiconductor device 10 of the implementation type, when the two electrodes are connected by the bonding wire 15, it is only necessary to perform wedge bonding to at least one electrode, so that the gold-coated bonding wire 1 of the implementation type can be used to improve the wedge bonding. The effect of sex, according to this, the effect of improving the bonding strength and bonding reliability of the wedge-shaped bonding. However, when it is desired to more effectively exert the effect of improving the wedge-shaped bonding with the gold-coated bonding wire 1 of the implementation type, it is ideal that at least one of the two electrodes connected by the bonding wire 15 is the electrode 13 of the semiconductor chip 14 It is ideal for the semiconductor device 10 formed by wedge bonding of such wafer electrodes 13. In particular, the semiconductor device 10 of the implementation type, as shown in FIG. 11 and FIG. 12, is suitable for a semiconductor device that uses CWB to implement wire bonding. In this case, the good wedge bonding performance and the resulting Good joint strength and joint reliability. [Example]

Next, an embodiment of the present invention will be described. The present invention is not limited to the following embodiments. (Manufacturing method and attributes of the embodiment)

Prepare the core material shown in Table 1 and process it by continuous wire drawing to an intermediate wire diameter of 0.2 to 0.5 mm. Then, the core material is immersed in a gold plating bath while continuously feeding the core material to a current density of 0.15 to 2.00 A current of A/dm ² forms the gold coating layer.

Regarding Examples 16 to 19, 21, and 31 to 36, the intermediate layers shown in Table 1 were formed by the same plating method before forming the gold coating layer. Examples 1 to 19 were processed to the intermediate wire diameter from φ38μm to 100μm, and Examples 22 to 36 were processed to the intermediate wire diameter from φ50μm to 200μm. Temperature), the wire feeding speed is 0.20～1.00m/sec for heat treatment. The heat treatment is about 0.5 to 3 seconds in terms of time. After that, each wire was drawn to the final wire diameter shown in Table 1, and the heat treatment temperature and wire feeding speed were adjusted with the target elongation rate shown in Table 1, and the final heat treatment was performed. In this way, the gold-coated bonding wires of Examples 1 to 34 were produced.

For these completed gold-coated bonding wires, the compressive stress and the Vickers hardness of the core material section were measured by the above-mentioned method. The results are shown in Table 1. The thus-obtained gold-coated bonding wire was provided to the characteristic evaluation described later. (The manufacturing method and attributes of the comparative example)

Explain a comparative example. The bonding wires having a compressive stress outside the scope of the present invention are shown in Comparative Examples 1 to 6, 11 to 18, and the bonding wires forming a coating layer other than gold are shown in Comparative Examples 10, 19, and 20. In addition, the bonding wires in which the coating layer is not formed are shown in Comparative Examples 7-9. Except for making the above-mentioned changes, the bonding wires of Comparative Examples 1 to 20 were basically produced by the same manufacturing method as the Examples. As in the examples, the compressive stress of these bonding wires and the Vickers hardness of the core material section were measured by the above method, and the results are shown in Table 1. The bonding wire thus obtained was used for the evaluation of the characteristics described later. (Evaluation of wedge bondability in Examples and Comparative Examples)

The evaluation of the wedge bonding of the samples prepared above will be described. There are two types of objects for wedge bonding: electrodes on a circuit board and wafer electrodes. The details are described in the following paragraph, and the following three types of evaluation are performed as evaluation items: whether a defect occurs during continuous bonding (continuous bonding), whether the bonding is secure (bonding strength), and whether the wafer is damaged. The evaluation results are shown in Table 1 and Table 2. Among them, the evaluation of wafer damage was performed only for wafer electrodes that were delicate and easily damaged. (Joining energy of wedge joining evaluation)

As described above, when the bonding wire is wedge-shaped to the electrode of the multi-layer laminated wafer, the bonding must be sure, and the wafer does not break due to the bonding position or location. Therefore, a wide range of different bonding conditions are required. As an index of the adaptability of the measurement line, the joining energy is suitable as an evaluation method. Therefore, it is confirmed whether the conditions of joining energy can be passed without any problem in the above three evaluation items even if the conditions of the joining energy are changed widely.

The bonding energy generally depends on the pressing rate of the wire. For example, in order to press the wire to a large extent, it is necessary to increase the load pressure, load time, ultrasonic wave and other conditions of the wire in general. Here, the bonding energy is divided into 3 levels based on the pressing rate relative to the wire diameter ((thickness of the pressed wire/wire diameter before pressing)×100) (%). That is, a wire pressing rate of 47% or more and 53% or less is defined as low joining energy, 57% or more and 63% or less as medium joining energy, and 67% or more and 73% or less as high joining energy. These bonding energy conditions are adjusted by the bonding device (IConn PLUS manufactured by Kulicke & Soffa).

As mentioned above, wedge bonding has two types of circuit board electrodes and chip electrodes. For the wedge bonding of circuit board electrodes, the bottom support is reliable. Compared with the chip electrodes, the bonding environment is not significantly different. The conditions under high bonding energy evaluate the wedge bondability. On the other hand, wafer electrodes are likely to be forced into various bonding environments, so the wedge bondability is evaluated under the conditions of low, medium, and high bonding energy levels.

Furthermore, in order to more rigorously simulate the severe bonding environment that is close to the installation level of the continuous wedge bonding of the precision multi-layer chip electrode, compared with the general chip, the chip used in Table 1 is used to reduce the adhesion of the Al electrode By. The cross-sectional structure of this wafer has an insulating film (SiO ₂ film) on a Si substrate, and an Al film is formed on the SiO _{2 film.} On the other hand, the cross-sectional structure of a general wafer has an insulating film (TEOS: tetraethoxysilane) on a Si substrate, and a TiN layer is provided between the insulating film and the Al electrode, and the adhesion of the Al electrode has been improved. structure. The use of this wafer becomes a situation and condition where wafer damage or wafer electrode (pad) damage (a phenomenon in which the Al electrode peels off the wafer during the wire bonding operation after wedge bonding) is likely to occur. In addition, the electrode thickness is 0.8μm, and the electrode material is Al-0.5%Cu, or Al-1%Si-0.5%Cu. (Continuous bonding of wedge bonding on substrate electrodes)

Regarding the wedge bondability on the substrate electrode, the evaluation was performed by continuous wire bonding of the wafer electrode and the substrate electrode (lead frame). The wedge bonding conditions were based on the above high bonding conditions, 36 cycles × 2 sets of 72 wedge bondings were performed on the Ag-plated lead frame. A cycle here refers to the process from bonding the ball on the wafer electrode to wedge bonding and breaking the wire on the frame. This cycle is continuously performed 36 times, and 2 sets are performed. During a total of 72 bonding times, the device did not stop due to failures such as failure of the wedge-shaped bonding portion or disconnection, and the continuous bonding was good, so it was indicated as "◎". If the number of stoppages of the device is less than 2 due to the defective wedge-shaped joint, it can be improved in the mass production step and marked as "○". If the number of stops of the device is more than 2 times, it is regarded as defective, and it is indicated as "×". (Tensile test on substrate electrode = evaluation of bonding strength)

For samples that were wedge-joined by wire bonding, use a bonding strength tester (an example: Bond tester 4000, manufactured by Dage), and hook a hook near the wedge-joint of the sample. From the samples performed under this condition Twenty lines are randomly selected to perform a tensile test to confirm whether there is peeling (one of the breaking modes). The setting condition of the bonding strength tester is Load Cell WP100, the measuring range is 50%, and the test speed is 250μm/min. In the breaking mode of the tensile test, the condition where the wire of the joint did not peel off from the substrate was considered good, and it was indicated as "◎". If the number of peeling occurrences is less than 3, it can be improved in the mass production step, and it is indicated as "○". If the number of occurrences of peeling is 3 or more, it is considered defective, and it is indicated as "×". In addition, if the tensile strength is less than 2gf, as long as one occurrence is defective, it is indicated as "×". (Continuous bonding of wedge bonding on wafer electrodes)

In this evaluation, a device in which the wafer was mounted on an Ag-plated lead frame was used. Using the CWB method on this wafer, continuous wedge bonding of 360 strips (10 strips/cycle×36 cycles) is performed. In one cycle, set the wedge bonding conditions (3 levels of low bonding energy, medium bonding energy, and high bonding energy), and each cycle has 3 wedge bonding conditions × 3 levels of wedge bonding (the first one is the first The joints of the joints are performed by ball joints, so there are 9 wedge joints in a cycle). Therefore, in each wafer, there are 108 wires bonded at each level (the number of wedge bonding 108 bonding = 3 × 36 cycles). The shape of the welded pipe for wedge joining is H diameter: 1.2 to 1.3 times the wire diameter, CD diameter: 1.5 to 1.8 times the wire diameter, T: 3.5 to 3.8 times the wire diameter, FA: 0°, OR diameter: 4 to 12μm, using surface finish Matte specification. The device was not stopped due to defects such as non-bonding of the wedge bonding portion, peeling of the Al film, wire breakage, and the like. The continuous bonding of the wedge bonding in each bonding energy was good, and it was indicated as "◎". If the number of times the device is stopped due to a defect in the wedge-shaped joint portion in each joining energy is less than 5, it can be improved in the mass production step, and it is marked as "○". When the number of stops of the device is 5 or more, the wedge-shaped bondability in the bonding energy is poor, and it is indicated as "×". (Tensile test on wafer electrode = evaluation of bonding strength)

For the sample fabricated by wedge bonding on the wafer, 20 wires were randomly selected from 108 wires in each bonding energy condition, and implemented by a bonding strength tester (an example: Bond tester 4000 type manufactured by Dage) Hook a hook on the sample and stretch it for a tensile test to confirm the breaking mode. The setting condition of the bonding strength tester is Load Cell WP100, the measuring range is 50%, and the test speed is 250μm/min. In the breaking mode of the tensile test, the wire of the joint did not peel off from the wafer electrode, and the wedge-shaped joint strength in the joint energy was good, and it was indicated as "◎". If the number of peeling occurrences is less than 3, it can be improved in the mass production step, so it is indicated as "○". When the number of occurrences of peeling is 3 or more, the wedge bonding strength in the bonding energy is poor, and it is indicated as "×". (Evaluation of chip damage)

In this evaluation, a device in which the wafer was mounted on an Ag-plated lead frame was used, and on the wafer, a continuous bonding of 64 (16 strips/cycle×4 sets) was performed on the wafer by the CWB method. In one cycle, set the wedge-shaped joining conditions (three levels of low joining energy, medium joining energy, and high joining energy). For each cycle, it is divided into 3 joining energy levels in units of 5 (same as the above, initially The first article is for spherical joints, so the total number of wedge joints is 15). For each wafer, there are 20 wires bonded at each level (the number of wedge bonding: 20 bonding = 5 × 4 groups). For the welded pipe for wedge joining, use the same as in paragraph [0095].

After bonding, in order to dissolve the wafer electrodes and expose the wafer bottom layer, the wedge-bonded sample is immersed in an aqueous sodium hydroxide solution for about 30 minutes to confirm that the line is peeled from the wafer, and then rinsed with pure water, alcohol, and dried. After the samples were cleaned in the order of, the bottom layer (Si or SiO ₂ ) of the exposed wafer was randomly observed with an optical microscope at 10 joints at each bonding energy level. In the case of no cracks in the gasket (wafer electrode), the wedge bondability in the bonding energy is good, and it is indicated as "◎". As long as one liner crack occurs, the wedge bondability in the bonding energy is considered to be poor, and it is indicated as "×".

Regarding the wedge bonding properties in Tables 1 and 2, as long as there is a bad "×" in the evaluation items of continuous bonding, bonding strength, and wafer damage, it is estimated that it cannot be compatible with continuous wedge bonding in a multi-stage laminated structure. , Is unqualified in the comprehensive evaluation. In addition, an evaluator without "×" is considered a pass in the comprehensive evaluation.

[Table 1] Sample number The properties of the seam line Wedge joint evaluation Overview Process Wire diameter (μm) Epidermis middle layer Core Compressive stress (MPa) Wedge bonding on substrate electrodes Wedge bonding on wafer electrodes Intermediate heat treatment Final characteristic target value Au film thickness (nm) main ingredient Film thickness (nm) main ingredient Main component concentration (mass%) Add element Section hardness (Hv) Continuity Bonding strength Continuity Bonding strength (tension test Chip damage Temperature (℃) Elongation(%) Low joining energy Mid-junction energy High bonding energy Low joining energy Mid-junction energy High bonding energy Low joining energy Mid-junction energy High bonding energy Example 1 350 7.7 20 112 — — Ag 99.9 Pd 40 290 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 2 500 5.8 20 80 — — Ag 99.0 Pd 60 353 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 3 450 2.1 20 116 — — Ag 97.0 Pd 80 588 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 4 550 2.6 15 15 — — Ag 99.0 Pd 67 343 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 5 550 4.3 20 72 — — Ag 98.0 Pd 49 372 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 6 600 7.1 15 5 — — Ag 99.0 Pt 45 323 ◎ ◎ ○ ○ ○ ○ ○ ○ ◎ ◎ ◎ qualified 7 550 4.4 20 11 — — Ag 99.0 Pd 85 500 ◎ ◎ ○ ○ ○ ○ ○ ○ ◎ ◎ ◎ qualified 8 500 6.0 30 200 — — Ag 99.5 Pd 55 323 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 9 600 7.3 20 64 — — Ag 99.0 Pt 43 304 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 10 500 3.2 20 152 — — Ag 98.5 Pt 73 431 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 11 400 2.2 20 97 — — Ag 99.0 Ni 79 568 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 12 250 5.4 20 56 — — Ag 99.99 - 53 314 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 13 300 3.5 20 160 — — Ag 99.95 Cu 62 363 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 14 500 4.0 20 138 — — Ag 99.8 In 53 314 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 15 450 3.8 20 108 — — Ag 99.6 In 58 343 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 16 500 5.7 20 121 Pd 7 Ag 99.99 Cu 57 333 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 17 600 5.1 20 83 Pd twenty two Ag 99.0 Pd 68 402 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 18 550 3.1 20 60 Ni 4 Ag 99.99 Ca 78 540 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 19 500 4.6 20 78 Ni 15 Ag 99.5 Au 77 451 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 20 — 10.8 20 115 — — Ag 99.0 Pd 54 382 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified twenty one — 15.8 20 95 Pd 9 Cu 99.99 - 71 539 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified twenty two 600 18.7 20 101 — — Cu 99.999 P 45 343 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified twenty three 500 13.0 20 115 — — Cu 99.9 Ni 68 519 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified twenty four 600 8.9 20 98 — — Cu 98.0 Ni 77 590 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 25 550 10.5 15 15 — — Cu 99.99 - 66 500 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 26 550 15.4 20 85 — — Cu 99.99 P 63 480 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 27 450 19.8 30 200 — — Cu 99.95 P 71 539 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 28 500 12.7 20 61 — — Cu 99.0 Pt 64 490 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 29 500 11.1 20 124 — — Cu 99.5 Ni 69 529 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 30 450 9.9 20 36 — — Cu 99.0 Pt 80 549 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 31 600 16.6 20 161 Pt 1 Cu 99.99 - 49 372 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 32 580 17.2 20 189 Pt 33 Cu 99.995 Ag 60 461 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 33 550 14.2 20 77 Pd 18 Cu 99.995 Ag 67 510 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 34 580 10.8 20 156 Pd 53 Cu 99.99 P 75 568 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 35 550 12.0 20 144 Ni 29 Cu 99.99 - 63 480 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified 36 500 8.4 20 176 Ni 60 Cu 99.999 Fe 73 559 ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ qualified

[Table 2] Sample number The properties of the seam line Wedge joint evaluation Overview Process Wire diameter (μm) Epidermis middle layer Core Compressive stress (MPa) Wedge bonding on substrate electrodes Wedge bonding on wafer electrodes Intermediate heat treatment Final characteristic target value Au film thickness (nm) main ingredient Film thickness (nm) main ingredient Main component concentration (mass%) Add element Section hardness (Hv) Continuity Bonding strength Continuity Bonding strength (tensile test) Chip damage Temperature (℃) Elongation(%) Low joining energy Mid-junction energy High bonding energy Low joining energy Mid-junction energy High bonding energy Low joining energy Mid-junction energy High bonding energy Comparative example 1 650 20.9 20 11 — — Ag 99.0 Pt 36 255 ○ X ○ ○ ○ ╳ ╳ ╳ ◎ ◎ ◎ Unqualified 2 610 21.5 20 75 — — Ag 99.99 - 33 235 ○ X ○ ○ ○ ╳ ╳ ╳ ◎ ◎ ◎ Unqualified 3 625 23.2 30 206 — — Ag 99.9 Pd 39 274 ○ X ○ ○ ○ ╳ ╳ ╳ ◎ ◎ ◎ Unqualified 4 - 1.2 15 10 — — Ag 99.0 Pd 89 637 ○ ○ ○ ○ ○ ○ ○ ╳ ╳ ╳ ╳ Unqualified 5 - 1.3 20 104 — — Ag 98.0 Pd 85 617 ○ ○ ○ ○ ○ ○ ○ ╳ ╳ ╳ ╳ Unqualified 6 - 1.1 30 255 — — Ag 97.0 Ni 97 686 ○ ○ ○ ○ ○ ○ ○ ╳ ╳ ╳ ╳ Unqualified 7 550 3.3 20 — — — Ag 99.0 Pd 67 392 ╳ ○ ╳ ╳ ╳ ╳ ○ ○ ◎ ◎ ◎ Unqualified 8 600 5.1 20 — — — Ag 95.0 Pd 74 549 ╳ ○ ╳ ╳ ╳ ╳ ○ ○ ◎ ◎ ◎ Unqualified 9 600 4.5 20 — — — Ag 90.0 Au・Pd 79 578 ╳ ○ ╳ ╳ ╳ ╳ ○ ○ ◎ ◎ ◎ Unqualified 10 450 2.6 20 — Pd 84 Ag 98.5 Pd 62 441 ╳ ○ ╳ ╳ ╳ ╳ ○ ○ ◎ ◎ ◎ Unqualified 11 650 24.1 20 4 — — Cu 99.5 Pt 40 284 ○ ╳ ○ ○ ○ ╳ ╳ ╳ ◎ ◎ ◎ Unqualified 12 650 22.8 20 97 — — Cu 99.999 - 37 265 ◎ ╳ ○ ◎ ◎ ╳ ╳ ╳ ◎ ◎ ◎ Unqualified 13 650 30.3 30 211 — — Cu 99.99 P 39 274 ◎ ╳ ○ ◎ ◎ ╳ ╳ ╳ ◎ ◎ ◎ Unqualified 14 - 4.7 15 8 Pd 52 Cu 99.99 - 85 608 ○ ◎ ╳ ╳ ○ ○ ○ ○ ╳ ╳ ╳ Unqualified 15 - 5.9 20 131 — — Cu 98.0 Ni 91 647 ◎ ◎ ○ ○ ○ ○ ○ ○ ╳ ╳ ╳ Unqualified 16 - 7.2 30 224 — — Cu 99.99 P 99 706 ◎ ◎ ○ ○ ○ ○ ○ ○ ╳ ╳ ╳ Unqualified 17 - 3.8 20 90 Pd 13 Cu 99.9 Ni 94 666 ◎ ◎ ○ ○ ○ ○ ○ ○ ╳ ╳ ╳ Unqualified 18 - 5.0 20 64 Ni twenty two Cu 99.5 Pd 96 686 ◎ ◎ ○ ○ ○ ○ ○ ○ ╳ ╳ ╳ Unqualified 19 500 11.3 20 — Pd 75 Cu 99.99 - 73 519 ╳ ○ ╳ ╳ ╳ ╳ ╳ ╳ ◎ ◎ ◎ Unqualified 20 500 8.7 20 — Ni 55 Cu 99.99 - 76 540 ╳ ○ ╳ ╳ ╳ ╳ ╳ ╳ ◎ ◎ ◎ Unqualified

It can be seen from Table 2 that the gold-coated bonding wire with a compressive stress of less than 290 MPa or more than 590 MPa, whether in the case of using a silver core material (Comparative Examples 1 to 6) or a case of using a copper core material (Comparative Examples 11 to In 18), the wedge bonding on the substrate electrode or the wafer electrode is not good. Furthermore, it can be seen that in the bonding wires without a gold coating layer and the bonding wires covered with a coating layer other than gold, the wedge bonding on the substrate electrode or the wafer electrode is not good. In particular, all the bonding wires of the comparative example have at least one defective "×" in any evaluation of continuous bonding, tensile test, and chip damage. Therefore, it is considered that these wires cannot overcome the problem of continuous multi-segment wedge. A technical issue in terms of bonding wires in bonded CWBs.

In contrast, as shown in Table 1, it can be seen that the gold-coated bonding wires of Examples 1 to 36 having a compressive stress of 290 MPa or more and 590 MPa or less have excellent wedge bonding properties on both the substrate electrode and the wafer electrode. Especially in the evaluation of the wedge bondability on the wafer electrode, the continuous bondability, tensile test, and wafer damage were all evaluated as good even in the wedge bonding conditions where the bonding energy is low, medium, and high. As far as the conclusion is concerned, sufficient results can be obtained to overcome technical problems in the intangible (bonding wire) in CWB.

According to the present invention, in particular, it is possible to provide a bonding wire that meets the opposite market demand for memory capacity increase and miniaturization represented by semiconductor memory and suppresses material costs and production costs. Therefore, it is considered to be useful for the development of the semiconductor industry and the electronics industry. Have a huge contribution.

1: Gold coated bonding wire 2: core material 3: Coating layer 4: Intermediate metal layer 10: Semiconductor device 10X: Semiconductor device 11: substrate electrode 12: Circuit board 13: Wafer electrode 14, 14A, 14B, 14C, 14D: semiconductor wafer 15: Bonding wire 16: Die bonding material 17: Wedge joint 18: Sealing resin layer 19: Sphere joint D: diameter

Fig. 1 is a longitudinal cross-sectional view showing an embodiment of a gold-coated bonding wire. FIG. 2 is a cross-sectional view showing the gold-coated bonding wire of the implementation type. Fig. 3 is a longitudinal cross-sectional view showing a modification of the gold-coated bonding wire of the embodiment. FIG. 4 is a cross-sectional view showing a modification of the gold-coated bonding wire of the implementation type. FIG. 5 is a diagram showing the shape of the indentation in the compression stress test of the bonding wire of the implementation type. 6 is a cross-sectional view showing a stage before the resin sealing of the semiconductor device of the embodiment type. FIG. 7 is a cross-sectional view showing a stage after resin sealing of the semiconductor device of the embodiment type. 8 is a cross-sectional view showing the wedge-shaped bonding portion of the gold-coated bonding wire bonded to the electrode of the semiconductor wafer in the semiconductor device of the implementation type FIG. 9 is a diagram showing an example of a wire connection structure of a semiconductor wafer laminated in multiple stages in the related art. FIG. 10 is a diagram showing another example of a wire connection structure of a semiconductor wafer laminated in multiple stages in the related art. FIG. 11 is a cross-sectional view showing a first modification of the semiconductor device of the embodiment type. FIG. 12 is a cross-sectional view showing a second modification of the semiconductor device of the embodiment type. FIG. 13 is a cross-sectional view showing an example of a semiconductor device having a multi-stage stacked structure of semiconductor wafers.

1: Gold coated bonding wire

2: core material

3: Coating layer

D: diameter

Claims (15)

A gold-coated bonding wire has a core material containing silver or copper as the main component, and a coating layer provided on the surface of the core material and containing gold as the main component, Among them, in this gold-coated bonding wire, the coating layer has a film thickness of 5 nm or more and 200 nm or less, and the compressive stress when the wire diameter is deformed by 60% is 290 MPa or more and 590 MPa or less. Such as the gold-coated bonding wire of claim 1, wherein the Vickers hardness (Hv) in the cross section of the core material is 40 or more and 80 or less. The gold-coated bonding wire of claim 1 or 2, wherein the core material is composed of a silver alloy containing 97% by mass or more of silver, and relative to the total amount of the wire, it is 1 mass ppm or more and 3 mass% The following ranges include at least one metal selected from the group consisting of copper, calcium, phosphorus, gold, palladium, platinum, nickel, rhodium, indium, and iron. The gold-coated bonding wire of claim 1 or 2, wherein the core material is composed of a copper alloy containing 98% by mass or more of copper, and relative to the total amount of the wire, the amount is 1 mass ppm or more and 2 mass% The following range includes at least one metal selected from the group consisting of phosphorus, gold, palladium, platinum, nickel, silver, rhodium, indium, gallium, and iron. The gold-coated bonding wire according to any one of claims 1 to 4, wherein the wire diameter of the gold-coated bonding wire is 13 μm or more and 35 μm or less. The gold-coated bonding wire of any one of claims 1 to 5, which further has an intermediate metal layer provided between the core material and the coating layer, the intermediate metal layer being composed of palladium, platinum, and nickel A metal in the group as the main component. The gold-coated bonding wire of claim 6, wherein the intermediate metal layer has a thickness of 60 nm or less. Such as the gold-coated bonding wire of any one of claims 1 to 7, which is used for semiconductor memory. A method for manufacturing a gold-coated bonding wire has a core material containing silver or copper as the main component, and a coating layer provided on the surface of the core material and containing gold as the main component, Wherein, the film thickness of the gold-coated bonding wire is made 5 nm or more and 200 nm or less, and the compressive stress is made 290 MPa or more and 590 MPa or less. A semiconductor wire bonding structure having a gold-coated bonding wire, an electrode of a semiconductor chip, and a wedge-shaped junction formed by bonding the wire and the electrode, the gold-coated bonding wire having a core material containing silver or copper as the main component and gold as the main component The main component of the coating layer, In this gold-coated bonding wire, the film thickness of the coating layer is 5 nm or more and 200 nm or less, and the compressive stress when deformed by 60% with respect to the wire diameter is 290 MPa or more and 590 MPa or less. Such as the semiconductor wire bonding structure of claim 10, which has two or more of the semiconductor chips and two or more of the wedge-shaped bonding portions formed by sequentially connecting the electrodes of the two semiconductor chips and the wires. The semiconductor wire bonding structure of claim 9 or 10 is used for semiconductor memory. A semiconductor device including: One or more semiconductor wafers with at least one first electrode; The circuit base material selected from the lead frame and the circuit substrate has at least one second electrode; A gold-coated bonding wire electrically connects at least one selected from between the first electrode of the semiconductor chip and the second electrode of the circuit substrate and between the first electrodes of the plurality of semiconductor chips; and A wedge-shaped junction is formed by joining the first electrode or the second electrode and the gold-coated bonding wire, The gold-coated bonding wire has a core material containing silver or copper as the main component and a coating layer containing gold as the main component and having a film thickness of 5 nm or more and 200 nm or less on the surface of the core material. The compressive stress when deformed by 60% with respect to the wire diameter of the gold-coated bonding wire is 290 MPa or more and 590 MPa or less. The semiconductor device of claim 13, further comprising a plurality of the semiconductor chips each having at least one of the first electrodes, The plurality of semiconductor wafers are laminated so that the first electrode is exposed, The semiconductor device has two or more wedge-shaped bonding portions formed by sequentially connecting the first electrodes of the plurality of semiconductor wafers with the gold-coated bonding wires. Such as the semiconductor device of claim 13 or 14, which is used in semiconductor memory.

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