TW202115270A - 第六族金屬沈積方法 - Google Patents

第六族金屬沈積方法 Download PDF

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TW202115270A
TW202115270A TW109129074A TW109129074A TW202115270A TW 202115270 A TW202115270 A TW 202115270A TW 109129074 A TW109129074 A TW 109129074A TW 109129074 A TW109129074 A TW 109129074A TW 202115270 A TW202115270 A TW 202115270A
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substrate
oxide
molybdenum
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世輝 陳
尚恩 Ｄ 納吉彥
布萊恩 C 漢迪克斯
湯瑪士 Ｈ 邦姆
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美商恩特葛瑞斯股份有限公司
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Abstract

本發明提供氣相沈積鉬或鎢之方法及六羰基鉬(Mo(CO)6 )或六羰基鎢(W(CO)6 )在例如製造期望有含鉬或含鎢膜之半導體裝置中用於該沈積之用途。根據本發明之一個態樣，已發現，六羰基鉬(Mo(CO)6 )在氣相沈積方法(例如化學氣相沈積(CVD))中與脈衝沈積方法(其中利用涉及H2 O之短暫脈衝的步驟)聯合提供低電阻率、高沈積速率膜。發現H2 O蒸氣之此脈衝輸送有效降低自基於Mo(CO)6 之CVD方法產生之膜的碳含量。

Description

第六族金屬沈積方法
本發明係屬熱沈積某些第六族金屬前體以在微電子基板上形成例如鉬及鎢金屬之領域。
由於鉬之極高熔點、低熱膨脹係數、低電阻率和高導熱率之特徵，因此其越來越多地用於製造半導體裝置，包括在擴散障壁層、電極、光罩、電力電子基板、低電阻率閘極及互連中之使用。
此實用性已促使努力達成用於該等應用之鉬膜之沈積，其特徵在於所沈積膜之高保形性及高沈積速率以適應有效的大批量製造操作。此轉而促進開發可用於氣相沈積操作之經改良鉬源試劑以及利用該等試劑之經改良製程參數之努力。
本發明係關於某些第六族金屬(例如鎢及鉬)之氣相沈積及六羰基鉬(Mo(CO)6 )及羰基鎢(W(CO)6 )在例如製造期望有鉬或鎢膜之半導體裝置中用於該沈積之用途。在本發明之一個態樣中，已發現，六羰基鉬(Mo(CO)6 )在氣相沈積方法(例如化學氣相沈積(CVD))中與脈衝沈積方法(其中利用涉及H2 O之短暫脈衝的步驟)聯合提供低電阻率、高沈積速率膜。就此而言，已發現，脈衝輸送H2 O蒸氣之此中間步驟有效降低自基於Mo(CO)6 之CVD方法產生之膜的碳含量。在一個態樣中，本發明係關於在基板上形成含鉬材料之方法，其包含在氣相沈積條件下使該基板依序與六羰基鉬蒸氣、H2 O蒸氣及還原氣體接觸，以在該基板上沈積該含鉬材料。重複此脈衝序列，直至在該基板上達成期望膜厚度為止。
本發明係關於某些含第六族金屬之化合物(例如鎢及鉬)之氣相沈積及六羰基鉬(Mo(CO)6 )及羰基鎢(W(CO)6 )用於該等沈積之用途，例如在製造期望有鉬或鎢膜之微電子裝置中。在本發明之一個態樣中，已發現，六羰基鉬(Mo(CO)6 )在氣相沈積方法(例如化學氣相沈積(CVD))中提供低電阻率、高沈積速率膜。在一個態樣中，本發明係關於在基板上形成含鉬材料之方法，其包含在氣相沈積條件下使基板與六羰基鉬(Mo(CO)6 )蒸氣接觸，以在基板上沈積該含鉬材料。已發現，在本發明之各實施例中，使用六羰基鉬(Mo(CO)6 )作為前體用於含鉬材料於基板上之氣相沈積、隨後氧化氣體(例如H2 O蒸氣)、之後還原氣體(例如H2 )之脈衝步驟可提供剛沈積之電阻率小於25 µΩ-cm之鉬膜。此外，與通常使用Mo(CO)6 作為前體所產生者相比，本發明之膜具有降低之碳含量，通常小於5%、或小於2%或小於1.2% (原子百分比)碳。
因此，在第一態樣中，本發明提供在基板上形成含鉬材料或含鎢材料之方法，其包含在脈衝氣相沈積條件下使基板分別與Mo(CO)6 或W(CO)6 接觸，其中該等脈衝氣相沈積條件包含： (i) 將該基板暴露於Mo(CO)6 或W(CO)6 ； (ii) 將該基板暴露於氧化氣體；及 (iii) 將該基板暴露於還原氣體。
在某些實施例中，(i)、(ii)及(iii)係依序實施之步驟。在其他實施例中，重複(i)、(ii)及(iii)直至已在基板上沈積期望厚度之含鉬或鎢之膜為止。
在本發明之某些實施例中，氧化氣體包含選自H2 O蒸氣、H2 O2 、O3 及N2 O之氣體。在本發明之某些實施例中，還原氣體包含選自H2 、肼(N2 H4 )、甲基肼、第三丁基肼、1,1-二甲基肼、1,2-二甲基肼及NH3 之氣體。應瞭解，考慮到H2 O2 及O3 之氧化電位，該等氣體不應與肼(N2 H4 )、甲基肼、第三丁基肼、1,1-二甲基肼或1,2-二甲基肼共同使用，或若依序使用，則應在將基板暴露於另一反應物之前自反應器吹掃自此一步驟剩餘之任何該等氣體。
在某些實施例中，(i)之後係(ii)與(iii)之組合，前提條件係還原氣體相對於氧化氣體係以莫耳過量使用，且進一步前提條件係當還原氣體係肼、甲基肼、第三丁基肼、1,1-二甲基肼或1,2-二甲基肼時，氧化氣體不為H2 O2 或O3 。
Mo(CO)6 或W(CO)6 可在約0.1至50托(Torr)之範圍內、或0.5托至25托之範圍內或1至5托範圍內之壓力下沈積。
在一個實施例中，三步脈衝序列通常包含Mo(CO)6 (或W(CO)6 )蒸氣、隨後H2 O、隨後還原氣體(例如H2 、肼、甲基肼、第三丁基肼、1,1-二甲基肼或1,2-二甲基肼)、隨後Mo(CO)6 蒸氣等，直至獲得期望厚度之Mo (或W)膜為止。在某些實施例中，Mo(CO)6 或W(CO)蒸氣之脈衝持續時間為約100微秒至約1秒、或約500微秒至約0.5秒、或約0.15至約0.35秒或約0.25秒。在某些實施例中，氧化氣體暴露(例如H2 O蒸氣)之脈衝持續時間約0.5至約3秒、或約0.8秒至約1.2秒或約1秒。在某些實施例中，還原氣體暴露之脈衝持續時間為約50秒至約200秒、或約75秒至約125秒或約100秒。
在各個實施例中，氣相沈積條件包含除涉及氧化氣體及還原氣體之步驟以外之惰性氣氛。
氣相沈積條件可為任何適宜類型，且可例如包含還原氣氛(蒸氣)，例如氫、肼、甲基肼、第三丁基肼、1,1-二甲基肼或1,2-二甲基肼，以使得含鉬(或含鎢)材料包含所沈積膜中之元素鉬(或鎢)材料。如此沈積之含鉬(或含鎢)材料可包含元素鉬、或氧化鉬、或其他含鉬材料或鎢、氧化鎢或其他含鎢材料，或另一選擇由其組成或基本上由其組成。
在一個實施例中，沈積於基板表面上之含鉬或鎢層可例如藉由脈衝化學氣相沈積(CVD)或原子層沈積(ALD)或其他氣相沈積技術形成，而不需要預先形成成核層且因此直接利用六羰基鉬(Mo(CO)6 )蒸氣或六羰基鎢(W(CO)6 )蒸氣。各別鉬或六羰基鎢(Mo(CO)6 )蒸氣接觸步驟、氧化氣體(例如H2 O蒸氣)及還原氣體步驟可重複實施所需之多個循環，以形成期望厚度之鉬膜。
如本文所用，術語「微電子裝置」對應於經製造用於微電子、積體電路或電腦晶片應用之半導體基板，包括3D NAND結構、平板顯示器及微機電系統(MEMS)。應理解，術語「微電子裝置」並不意欲以任何方式限制且包括包含負通道金屬氧化物半導體(nMOS)及/或正通道金屬氧化物半導體(pMOS)電晶體且最終將變成微電子裝置或微電子總成之任何基板。半導體裝置可為任何適宜類型，且可例如包含DRAM裝置、3-D NAND裝置或其他裝置或裝置積體結構。在各個實施例中，基板可包含含鉬材料沈積於其中之導通孔。裝置可例如具有在10:1至40:1範圍內之深度對橫向尺寸之縱橫比。在其他實施例中，裝置可為用於平板顯示器或行動裝置中之膜。
位於本發明沈積方法中所利用之該等微電子裝置上之基板可為任何適宜類型，且可例如包含半導體裝置基板，例如矽基板、二氧化矽基板或其他基於矽之基板。在各個實施例中，基板可包含一或多種金屬或介電基板，例如Co、Cu、Al、W、WN、WC、TiN、Mo、MoC、SiO2 、W、SiN、WCN、Al2 O3 、AlN、ZrO2 、HfO2 、SiO2 、氧化鑭(La2 O3 )、氮化鉭(TaN)、氧化釕(RuO2 )、氧化銥(IrO2 )、氧化鈮(Nb2 O3 )及氧化釔(Y2 O3 )。
在某些實施例中，例如在氧化物基板(例如二氧化矽)或另一選擇矽或多晶矽基板之情形中，基板可經處理或製作以在其上包括障壁層(例如氮化鈦)用於隨後沈積之材料。
在另一態樣中，本發明提供在基板上形成含鉬材料之方法，其中該基板選自氮化鈦、氮化鉭、氮化鋁、氧化鋁、氧化鋯、氧化鉿、二氧化矽、氮化矽、氧化鑭、氧化釕、氧化銥、氧化鈮及氧化釔，該方法包含在脈衝氣相沈積條件使該基板與Mo(CO)6 接觸，其中該脈衝氣相沈積條件包含： (i) 將該基板暴露於Mo(CO)6 達約100微秒至約1秒之時期； (ii) 將該基板暴露於H2 O蒸氣達約0.8至約1.2秒之時期；及 (iii) 將該基板暴露於氫氣達約75秒至約125秒之時期。
在某些實施例中，(i)、(ii)及(iii)係依序實施之步驟。在其他實施例中，重複(i)、(ii)及(iii)直至在基板上沈積期望厚度之含鉬材料為止。
根據本發明方法沈積之含鉬或鎢材料可藉由任何適當評估度量及參數表徵，例如含鉬材料之沈積速率、含鉬材料之碳含量、所沈積含鉬材料之膜電阻率、所沈積含鉬或鎢材料之膜形貌、所沈積含鉬或鎢材料之膜應力、材料之階梯覆蓋及適當製程條件之製程窗或製程包。可採用任何適當評估度量及參數以表徵所沈積材料並使其與特定製程條件相關聯，以能夠大量生產相應半導體產品。有利地，本發明方法能將高純度鉬或鎢之膜沈積於微電子裝置上。在鉬之情形中，發現膜具有許多期望品質。因此，在另一態樣中，本發明提供具有沈積於其上之鉬膜之微電子裝置，其中該膜包含大於95%鉬、小於1%氧、小於4%碳，且當在厚度為200Å之膜上量測時電阻率小於25 µΩ·CM。
本發明可藉由其較佳實施例之以下實例進一步說明，但應理解，除非另外特定指出，否則包括該等實例僅用於說明之目的且並非意欲限制本發明之範圍。
實例 一般程序： 可藉由以下製程步驟序列在基板上製作半導體裝置，該基板在二氧化矽基層上包含氮化鈦障壁層。 步驟1：吹掃沈積室； 步驟2：使基板之障壁層(TiN層)與六羰基鉬(Mo(CO)6 )之脈衝、隨後H2 O蒸氣之脈衝、隨後氫氣(H2 )在例如約400℃之溫度下接觸； 步驟3；將系統在H2 或惰性氣體(例如Ar)下吹掃，以使六羰基鉬(Mo(CO)6 )與H2 共反應物及基板完全反應。 步驟4：視需要重複步驟1-3，以形成具有期望特徵之鉬膜層。 實例1
   CVD溫度(℃) XRF Mo厚度(Å) 剛沈積之電阻率(µΩ-cm) 剛沈積之XRF C (µg/cm2 /10 nm Mo) 800℃退火電阻率(µΩ· cm) 800℃ RTH XRF C (µΩ· cm/10 nm Mo)
實例A 500 170.8 22.7 0.27 14.0 0.21
實例B 400 198.0 23.7 0.29 12.4 0.15
實例2 步驟1：吹掃沈積室； 步驟2：使基板之障壁層(TiN層)與六羰基鉬(Mo(CO)6 )之脈衝、隨後氫氣(H2 )在例如約500℃之溫度下接觸； 步驟3；將系統在H2 或惰性氣體(例如Ar)下吹掃，以使六羰基鉬(Mo(CO)6 )與H2 共反應物及基板完全反應。 步驟4：視需要重複步驟1-3，以形成具有期望特徵之鉬膜層。
共反應物 CVD溫度(℃) XRF Mo (nm) 剛沈積之電阻率(µΩ·cm)
無H2 O脈衝 500 18.7 32.9
具有H2 O脈衝 500 18.3 20.3
圖1係利用本發明方法之鉬膜的X射線繞射圖(XRD)，該方法係在400℃之平臺溫度下利用H2 共反應物及H2 O脈衝實施，如實例1中所闡釋。未檢測到Mo2 C。 圖2係實例1中所製備膜(即，400℃沈積之Mo膜)之二次離子質譜(SIMS)。碳及氧雜質含量分別為1.1原子%及0.24原子%。12.4 µΩ· cm之退火電阻率係Mo(CO)6 所達成之最低值。碳、氮及氧濃度(以原子/cc表示)繪示於左側垂直軸上，且鉬、矽及鈦強度(以任意單位表示)繪示於右側垂直軸上。 圖3圖解說明Mo(CO)6 及H2 O之較短脈衝間隔對產生具有較低電阻率膜之效應。0.25秒Mo(CO)6 脈衝、隨後100秒1200 sccm之流速下之H2 (圓點)達成約30 µΩ-cm之剛沈積(as-deposited)之電阻率。添加1秒H2 O蒸氣脈衝、隨後Mo(CO)6 脈衝(正方形)使得剛沈積之電阻率降至約20 µΩ-cm。 圖4比較使用1秒及3秒之H2 O脈衝時間之所得Mo膜的電阻率且顯示增加脈衝間隔不會改良電阻率。 圖5圖解說明400℃對500℃沈積溫度對剛沈積之電阻率的效應。

Claims (10)

  1. 一種用於在基板上形成含鉬材料或含鎢材料之方法，其包含在脈衝氣相沈積條件下使該基板分別與Mo(CO)6 或W(CO)6 接觸，其中該等脈衝氣相沈積條件包含： (i) 將該基板暴露於Mo(CO)6 或W(CO)6 ； (ii) 將該基板暴露於氧化氣體；及 (iii) 將該基板暴露於還原氣體。
  2. 如請求項1之方法，其中該基板選自氮化鈦、氮化鉭、氮化鋁、氧化鋁、氧化鋯、氧化鉿、二氧化矽、氮化矽、氧化鑭、氧化釕、氧化銥、氧化鈮及氧化釔。
  3. 如請求項1之方法，其中該基板暴露於Mo(CO)6 係在約250℃至約750℃之溫度下實施。
  4. 如請求項1之方法，其中該基板暴露於W(CO)6 係在約250℃至約750℃之溫度下實施。
  5. 如請求項1之方法，其中該氧化氣體包含選自H2 O蒸氣、H2 O2 、O3 及N2 O之氣體。
  6. 如請求項1之方法，其中該還原氣體包含選自H2 、肼、甲基肼、第三丁基肼、1,1-二甲基肼、1,2-二甲基肼及NH3 之氣體。
  7. 如請求項1之方法，其中該還原氣體係H2 且溫度係約300℃至約600℃。
  8. 如請求項1之方法，其中(i)之持續時間係約100微秒至約1秒。
  9. 一種用於在基板上形成含鉬材料之方法，其中該基板選自氮化鈦、氮化鉭、氮化鋁、氧化鋁、氧化鋯、氧化鉿、二氧化矽、氮化矽、氧化鑭、氧化釕、氧化銥、氧化鈮及氧化釔，該方法包含在脈衝氣相沈積條件下使該基板與Mo(CO)6 接觸，其中該等脈衝氣相沈積條件包含： (i) 將該基板暴露於Mo(CO)6 達約100微秒至約1秒之時期； (ii) 將該基板暴露於H2 O蒸氣達約0.8至約1.2秒之時期；及 (iii) 將該基板暴露於氫氣達約75秒至約125秒之時期。
  10. 一種具有沈積於其上之鉬膜的微電子裝置，其中該膜包含大於95%鉬、小於1%氧、小於4%碳，以及當在厚度為200Å之膜上量測時小於25 µΩ·CM之電阻率。
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