TW202112539A - Chip scale package structure for moisture-sensitive high-gamut backlight applications, and manufacturing method - Google Patents
Chip scale package structure for moisture-sensitive high-gamut backlight applications, and manufacturing method Download PDFInfo
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Abstract
Description
本發明涉及一種背光領域,尤其是涉及一種用於潮氣敏感的高色域背光應用的晶片級封裝結構及製造方法。The present invention relates to the field of backlights, in particular to a wafer-level packaging structure and manufacturing method for moisture-sensitive high-color gamut backlight applications.
隨著倒裝LED晶片級封裝(chip scale package, CSP)製造技術的日漸成熟,TFT-LCD(薄膜電晶體液晶顯示器)採用CSP(晶片級封裝)的白光LED作為背光發光元件逐漸成為主流,為追求高色域顯示效果,LED螢光粉採用半峰寬較窄的KSF氟化物螢光粉及ß-SiAlON螢光粉組合。KSF類螢光粉由於遇水會發生化學反應而變質,雖然螢光粉廠商有進行螢光粉表面鈍化處理,但針對長期可靠性要求,單純的進行KSF螢光粉的表面處理不能阻止水氣的進入,即採用普通的單層五面封裝結構不能達到保護KSF螢光粉的目的。所以,需要從結構設計上考慮將含KSF的封裝材料置於封裝體內層、且封裝製造過程中排除以水作為降溫介質的切割製程。With the gradual maturity of flip-chip LED chip scale package (CSP) manufacturing technology, TFT-LCD (Thin Film Transistor Liquid Crystal Display) adopts CSP (chip-level package) white LED as the backlight light-emitting element has gradually become the mainstream. In pursuit of high color gamut display effect, the LED phosphor adopts a combination of KSF fluoride phosphor with a narrower half-width and ß-SiAlON phosphor. KSF phosphors deteriorate due to chemical reactions in water. Although phosphor manufacturers do phosphor surface passivation treatment, for long-term reliability requirements, simply performing KSF phosphor surface treatment cannot prevent moisture. The use of ordinary single-layer five-sided packaging structure can not achieve the purpose of protecting the KSF phosphor. Therefore, it is necessary to consider the KSF-containing packaging material in the inner layer of the package from the structural design, and the cutting process in which water is used as the cooling medium is excluded from the packaging manufacturing process.
背光應用通常使用中大功率的LED CSP,晶片發出的藍光激發螢光粉時釋放大量的熱,而矽膠的導熱能力差,普通單層膠膜封裝的五面CSP在大功率點亮時,會出現裂膠問題,導致關於失效或者色座標變化,所以需要解決封裝體散熱問題。矽膠的硬度相對較低,封裝體表面容易劃傷,分選機操作性能不佳,所以需要提高封裝體的硬度。所以,開發一種抗潮氣、高硬度、耐熱的晶片級封裝LED尤為重要。In backlight applications, medium and high-power LED CSPs are usually used. The blue light emitted by the chip releases a lot of heat when the phosphor is excited, and the thermal conductivity of silicon is poor. The five-sided CSP packaged with a single-layer film will cause high-power lighting. There is a glue cracking problem, which leads to failure or color coordinate changes, so it is necessary to solve the heat dissipation problem of the package. The hardness of silicone is relatively low, the surface of the package body is easily scratched, and the operation performance of the sorting machine is not good, so it is necessary to increase the hardness of the package body. Therefore, it is particularly important to develop a moisture-resistant, high-hardness, and heat-resistant wafer-level packaged LED.
本發明的目的在於提供一種晶片級封裝結構及製造方法,屬於用於潮氣敏感的高色域背光應用的晶片級封裝結構及製造方法。The purpose of the present invention is to provide a wafer-level packaging structure and manufacturing method, belonging to a wafer-level packaging structure and manufacturing method for moisture-sensitive high-color gamut backlight applications.
本發明的技術目的通過下述技術方案予以實現。The technical objectives of the present invention are achieved through the following technical solutions.
一種用於潮氣敏感的高色域背光應用的晶片級封裝結構(即晶片級封裝結構),具有雙層封裝結構:內層為含KSF螢光粉的螢光膠膜;外層是含有無機填料的透明膠膜。A wafer-level packaging structure (ie, wafer-level packaging structure) used for moisture-sensitive high-color gamut backlight applications. It has a double-layer packaging structure: the inner layer is a phosphor film containing KSF phosphor; the outer layer is containing inorganic fillers Transparent film.
螢光膠膜的厚度為30-70um,透明膠膜的厚度為50-80um。The thickness of the fluorescent film is 30-70um, and the thickness of the transparent film is 50-80um.
晶片級封裝結構的製造方法包括以下步驟:(1)倒裝LED晶片陣列於基板上;(2)晶片五面真空保型貼合含KSF螢光粉的螢光膠膜;(3)沿封裝體外立面切割底部膠膜;(4)切割後的封裝體二次陣列於基板上;(5)切割後的封裝體外面通過真空壓合封裝含微米級無機填料的有機矽透明膠膜;(6)固化後進行晶片級封裝體切割。The manufacturing method of the wafer-level package structure includes the following steps: (1) flip-chip LED chip array on the substrate; (2) vacuum conformal bonding of the five sides of the chip to the phosphor film containing KSF phosphor; (3) along the package Cut the bottom adhesive film on the external facade; (4) The cut package body is secondly arrayed on the substrate; (5) The cut package body is vacuum-compressed to encapsulate the organic silicon transparent film containing micron-level inorganic fillers; ( 6) Carry out wafer-level package cutting after curing.
含KSF螢光粉的螢光膠膜,按照下述步驟進行製備:
步驟1,按質量稱取:道康寧高折有機矽封裝樹脂A、B組分共20-99份,KSF螢光粉1-80份,β-SiAlON螢光粉1-80份,攪拌機混合均勻後得到混合物4;每一質量份為1g;優選道康寧高折有機矽封裝樹脂A、B組分共40-80份,KSF螢光粉10-40份,β-SiAlON螢光粉10-50份;
步驟2,將混合物4擠出或塗覆或壓延至離型膜上,形成厚度30-70um均勻的膠膜。The fluorescent film containing KSF fluorescent powder is prepared according to the following steps:
在含有無機填料的透明膠膜中,無機填料的質量百分比為1-60%(即無機填料質量/透明膠膜質量),優選10-60%。In the transparent adhesive film containing inorganic filler, the mass percentage of the inorganic filler is 1-60% (that is, the mass of inorganic filler/the mass of the transparent adhesive film), preferably 10-60%.
無機填料為微米級無機填料,通式可以表示為M(1-x-y-z-u)+v Ax By Cz Du Ev O0.5(1+x+2y+3z+3u) ,其中M=Na,K;A=Mg、Ca、Sr、Zn;B=B、Al、Ga;C=Si、Ge、Sn;D=Zr、Ti;E=F、Cl;對各元素的含量,規定x>0.3;0.1>y>0.3;0.4>z>0.7;u>0.3;v>0.1,並且x+y+z+u-v>0.1,具體詳見申請人在先申請之中國專利案申請號2019104635590。Inorganic fillers are micron-sized inorganic fillers, and the general formula can be expressed as M (1-xyzu)+v A x B y C z D u E v O 0.5(1+x+2y+3z+3u) , where M=Na, K; A = Mg, Ca, Sr, Zn; B = B, Al, Ga; C = Si, Ge, Sn; D = Zr, Ti; E = F, Cl; for the content of each element, x>0.3;0.1>y>0.3;0.4>z>0.7;u>0.3;v>0.1, and x+y+z+uv>0.1. For details, please refer to the applicant's earlier application in China Patent Application No. 2019104635590.
含有無機填料的透明膠膜即含微米級無機填料的透明膠膜,按照下述步驟進行製備:
步驟1,按質量稱取市售成品高折有機矽封裝樹脂A、B組分(如道康寧OE-6650樹脂)共40-99份,1-60份微米級無機填料(兩者之和為100質量份),經攪拌機、混煉機或者捏合機混合均勻後得混合物1;
步驟2,將混合物1擠出或者塗覆或者壓延至離型膜上,形成厚度50-80um均勻的有機矽透明膠膜。The transparent adhesive film containing inorganic fillers, that is, the transparent adhesive film containing micron-sized inorganic fillers, is prepared according to the following steps:
含有無機填料的透明膠膜即含微米級無機填料的透明膠膜,還可以按照下述步驟進行製備:
步驟1,按質量稱取:10-50份苯基乙烯基矽樹脂,1-60份微米級無機填料,經攪拌機、混煉機或者捏合機混合均勻後得混合物2;
所述苯基乙烯基矽樹脂的乙烯基含量為0.001重量%-15重量%、黏度為1000-200000mPa.s;
步驟2,按質量稱取:0.00005~0.001份抑製劑,0.1~5份增黏劑,3.0×10-4~1.5×10-3份卡式鉑金催化劑,氫含量為0.1重量%-1.6重量%、黏度為5-20000mPa.s的苯基含氫矽油,使所述苯基含氫矽油中的Si-H摩爾數是混合物2中乙烯基摩爾數的1.01-5倍;
步驟3,將步驟2的各個組分加入到混合物2(各個組分質量之和為100質量份),經攪拌機、混煉機或者捏合機混合均勻後得混合物3,將混合物3通過擠出或者壓延或者塗覆的方式製得厚度為50-80um的有機矽透明膠膜。The transparent adhesive film containing inorganic fillers, that is, the transparent adhesive film containing micron-sized inorganic fillers, can also be prepared according to the following steps:
本發明的晶片級封裝結構的製造方法,按照下述步驟進行:
步驟(1),將倒裝LED晶片陣列於基板上,晶片通過耐200℃以上的高溫膠帶固定,LED晶片(或稱為LED晶片)數量為1-10000顆;
在步驟(1)中,所用的倒裝LED晶片尺寸為3535、4040、4545或者其他尺寸的額定功率在1w以上的倒裝晶片。
步驟(2),晶片五面真空保型貼合含KSF螢光粉的螢光膠膜12;
在步驟(2)中,螢光膠膜是用道康寧A/B雙組份矽膠製備的,螢光粉添加量為5-80重量%(即螢光粉質量/螢光膠膜質量),通過擠出或者壓延或者塗覆的方式,製備成30-70um厚度的薄膜。
步驟(3),沿步驟(2)得到的封裝體的外立面切割底部膠膜;
步驟(4),切割後的封裝體二次陣列於基板上封裝,通過耐200℃以上的高溫膠帶固定;
步驟(5),陣列後的封裝體通過真空壓合封裝含微米級無機填料的(有機矽)透明膠膜;
在步驟(5)中,所用的含微米級無機填料的(有機矽)透明膠膜可用市售的A/B雙組份矽膠,如道康寧OE-6650A/B ,40-99份,1-60份微米級無機填料,經攪拌機、混煉機或者捏合機混合均勻後通過擠出或者壓延或者塗覆的方式,製備成厚度為50-80um的有機矽透明膠膜。
步驟(6),於150℃烤箱固化後進行CSP(chip scale package)封裝體的切割,形成單顆用於潮氣敏感的高色域背光應用的晶片級封裝光源。
在步驟(2)中螢光膠膜是一種熱熔材料,即一種有機矽樹脂半固化預聚物,其流變特性如下:由TA DHR流變儀,直徑D=25mm的椎板測試,震盪頻率1Hz,應變0.1%,測試溫度範圍為25°C—150°C,升溫速率為5°C/分,儲存模量Gˊ值為20-2000KPa、損耗模量為30-900KPa,凝膠點出現在7.2min;流變特性需滿足黏度6000-8000mPa.s,測試溫度為60°C,轉子旋轉速度20RPM。The manufacturing method of the wafer-level package structure of the present invention is carried out according to the following steps:
Step (1), the flip-chip LED chip array is placed on the substrate, and the chip is fixed by a high-temperature adhesive tape with a temperature resistance of more than 200°C. The number of LED chips (or LED chips) is 1-10,000;
In step (1), the flip-chip LED chip size used is 3535, 4040, 4545 or other sizes of flip-chip chips with a rated power of 1w or more.
Step (2), vacuum conformal bonding on the five sides of the wafer with the
與現有技術相比,本發明通過雙層封裝,將KSF螢光粉與矽膠預製成超薄螢光膠膜(30-70um)置於晶片表面而遠離封裝體表面,然後在外層用預製的含有微米級無機填料的透明螢光膠膜再次封裝,無機填料具有優異的防潮性能,充分保護KSF螢光粉免受水氣的影響,而且封裝過程中的前兩次切割製程均採用基於片狀刀具的“乾法”切割。這樣的結構優點是,首先內層超薄結構產生的熱量低而且更容易傳導至基板進行散熱,其次是外層膠膜中微米級的填料貢獻出優異的耐熱性能,從而使整體的封裝結構具有良好的耐熱性能,可用於大功率器件。而且外層膠膜中微米級的填料還增加了外層膠膜的硬度,使封裝後的CSP具有更高的硬度,避免劃傷而且易於分選機操作。Compared with the prior art, the present invention prefabricates KSF phosphor and silicon gel into an ultra-thin phosphor film (30-70um) on the surface of the chip away from the surface of the package body through a double-layer package, and then uses a prefabricated layer containing micrometers on the outer layer. The transparent phosphor film of the inorganic filler is re-encapsulated. The inorganic filler has excellent moisture resistance and fully protects the KSF phosphor from moisture. In addition, the first two cutting processes in the packaging process are based on sheet cutters. "Dry method" cutting. The advantages of this structure are that firstly, the inner ultra-thin structure generates low heat and is easier to conduct to the substrate for heat dissipation. Secondly, the micron-level filler in the outer layer of the adhesive film contributes excellent heat resistance, so that the overall package structure has a good The heat resistance can be used for high-power devices. In addition, the micron-level filler in the outer layer of the adhesive film also increases the hardness of the outer layer of the adhesive film, so that the packaged CSP has a higher hardness, avoids scratches and is easy to operate the sorting machine.
下面結合具體實施例進一步說明本發明的技術方案。本技術領域的人士可通過說明書中的內容輕易地瞭解本發明的優點。在進一步描述本發明具體實施方式之前,應理解,本發明的保護範圍並不局限於下述特定的實施例;下述實施例中未注明具體條件的實驗方法,通常按照常規條件,或者按照廠商所建議的條件。當實施例給出數值範圍時,應理解,除非本發明另有說明,每個數值範圍的兩個端點以及兩個端點之間任何一個數值均可選用。The technical solution of the present invention will be further described below in conjunction with specific embodiments. Those skilled in the art can easily understand the advantages of the present invention through the content of the description. Before further describing the specific embodiments of the present invention, it should be understood that the scope of protection of the present invention is not limited to the following specific examples; the following examples do not indicate the specific conditions of the experimental methods, usually according to conventional conditions, or according to The conditions suggested by the manufacturer. When numerical ranges are given in the examples, it should be understood that, unless otherwise specified in the present invention, the two endpoints of each numerical range and any value between the two endpoints can be selected.
圖1是現有技術中普通五面出光CSP的結構示意圖,倒裝晶片外部設置添加螢光粉的有機矽膠膜。本發明用於潮氣敏感的高色域背光應用的晶片級封裝結構如圖2所示,其中含有KSF螢光粉的螢光膠膜12保型貼合在倒裝晶片11的四周,螢光膠膜12的厚度為30um、50um或70um,其中含有KSF和β-SiAlON的螢光粉組合13;最外層是含有微米級無機填料的有機矽透明膠層14,其中含有的微米級無機填料15具有抗潮氣性能,能充分保護內層KSF螢光粉不被破壞,厚度為80um。FIG. 1 is a schematic diagram of the structure of an ordinary five-side light emitting CSP in the prior art, and an organic silicon film with phosphor added is provided on the outside of the flip chip. The chip-level package structure of the present invention for moisture-sensitive high-color gamut backlight applications is shown in FIG. 2, in which a
本發明所使用的各成分物質如下: (1)螢光膠膜用膠水,LF-1112A、LF-1112B,THE DOW CHEMICAL COMPANY。 (2)KSF和β-SiAlON螢光粉,KR-3K01、GR-MW540K8SD,日本電氣化學株式會社。 (3)微米級無機填料,TLF-158,天津德高化成新材料股份有限公司。 (4)有機矽透明層所用膠水,OE-6650A、OE-6650B,THE DOW CHEMICAL COMPANY。 (5)倒裝晶片,F36A-CB,華燦光電股份有限公司。 (6)抗沉澱粉,DM-30,德山化工(浙江)有限公司。 (7)真空貼合機,VHP-200,日東精密回路技術(深圳)有限公司。 (8)排片機,LEDA.PNP M6500 MAPPING SORTER,日東精密回路技術(深圳)有限公司。 (9)鼓風乾燥箱,DHG-9070A,上海一恒科學儀器有限公司。 (10)精密劃片切割機,DS613,瀋陽和研科技有限公司。The components used in the present invention are as follows: (1) Glue for fluorescent film, LF-1112A, LF-1112B, THE DOW CHEMICAL COMPANY. (2) KSF and β-SiAlON phosphors, KR-3K01, GR-MW540K8SD, Nippon Denki Co., Ltd. (3) Micron-level inorganic filler, TLF-158, Tianjin Degao Chemical New Materials Co., Ltd. (4) Glue used for transparent organic silicon layer, OE-6650A, OE-6650B, THE DOW CHEMICAL COMPANY. (5) Flip chip, F36A-CB, HC Semitek Co., Ltd. (6) Anti-precipitation powder, DM-30, Deshan Chemical (Zhejiang) Co., Ltd. (7) Vacuum laminating machine, VHP-200, Nitto Precision Circuit Technology (Shenzhen) Co., Ltd. (8) Chip arranging machine, LEDA.PNP M6500 MAPPING SORTER, Nitto Precision Circuit Technology (Shenzhen) Co., Ltd. (9) Blast drying oven, DHG-9070A, Shanghai Yiheng Scientific Instrument Co., Ltd. (10) Precision dicing cutting machine, DS613, Shenyang Heyan Technology Co., Ltd.
以下實施例中測試用的螢光膠膜的組成如下:稱取LF-1112A膠水20重量份、LF-1112B膠水20重量份、KR-3K01螢光粉40總量份、GR-MW540K8SD螢光粉20重量份,混合均勻後,塗覆成厚度為30um的螢光膠膜。The composition of the fluorescent film used in the test in the following examples is as follows: Weigh 20 parts by weight of LF-1112A glue, 20 parts by weight of LF-1112B glue, 40 parts by weight of KR-3K01 phosphor, and GR-MW540K8SD phosphor 20 parts by weight, mixed uniformly, and coated into a fluorescent film with a thickness of 30um.
以下實施例中測試用的含有微米級透明填料的有機矽透明膠膜的組成如下:稱取OE-6650A/B共39-98重量份,DM-30 1重量份,微米級無機填料1-60重量份,混合均勻後,塗覆成厚度為80um的透明膠膜。The composition of the organosilicon transparent film containing micron-level transparent fillers used in the following examples is as follows: weigh 39-98 parts by weight of OE-6650A/B, 1 part by weight of DM-30, and 1-60 parts by weight of micron-level inorganic fillers After mixing uniformly, it is coated into a transparent film with a thickness of 80um.
以下實施例中測試用的CSP的製備方法如下:將倒裝F36A-CB用MPI排片機排列,然後將膠膜放於晶片上面用真空貼合機貼合在一起,放於股份乾燥箱中150℃烘烤2hrs後用精密劃片切割機進行切割,成為單顆CSP。The preparation method of the CSP used in the test in the following examples is as follows: arrange the flip-chip F36A-CB with an MPI layup machine, then put the film on the wafer and glue it together with a vacuum laminator, and place it in a drying oven 150 After baking at ℃ for 2hrs, it is cut with a precision dicing machine to become a single CSP.
本發明用於潮氣敏感的高色域背光應用的晶片級封裝結構如圖2所示,其最外層是含有微米級無機填料的有機矽透明膠層14,其中含有的微米級無機填料15具有抗潮氣性能,能充分保護內層KSF螢光粉不被破壞。表一為透明膠膜中微米級無機填料的添加量與吸水率的關係。吸水率測試方法如下:將預製的含有不同添加量的微米級無機填料的厚度為80um的透明膠膜裁切成50mm*20mm的長條,稱重M0
,然後浸於沸水中煮1小時,然後取出用無塵紙吸乾膠膜表面水分,再稱重M1
,然後帶入公式一求得沸水吸收率。測試結果顯示,不添加微米級無機填料的膠膜沸水吸收率最大,加入微米級無機填料的膠膜沸水吸收率隨著填料的含量增加而降低。The wafer-level packaging structure of the present invention for moisture-sensitive high-color gamut backlight applications is shown in Figure 2. The outermost layer is an organosilicon transparent
沸水吸收率=(M1 -M0 )/M0 *100% (公式)Boiling water absorption rate = (M 1 -M 0 )/M 0 *100% (formula)
表一 微米級無機填料的添加量與吸水率的關係
本發明用於潮氣敏感的高色域背光應用的晶片級封裝結構如圖2所示,其最外層是含有微米級無機填料的有機矽透明膠層14,其中含有的微米級無機填料15添加量在1-60重量%,可以增加有機矽膠膜的硬度至ShoreD70~ShoreD80,可以防止CSP劃傷且利於成品CSP的分選操作。將預製的含有不同添加量的微米級無機填料的厚度為80um的透明膠膜進行硬度測試,硬度的測試設備為ShoreD數顯邵氏硬度計,上海雙旭電子有限公司。表二為微米級無機填料的添加量與硬度的關係。硬度隨著微米級無機填料添加量的增加而增大。The wafer-level packaging structure of the present invention for moisture-sensitive high-color gamut backlight applications is shown in Figure 2. The outermost layer is an organosilicon transparent
表二 微米級無機填料的添加量與硬度的關係
本發明用於潮氣敏感的高色域背光應用的晶片級封裝結構如圖2所示,其最外層是含有微米級無機填料的有機矽透明膠層14,其中含有的微米級無機填料15具有優異的導熱及抗光衰性能,可用於1W以上的大功率LED器件。以下熱阻測試設備為T3Ster熱阻測試儀,深圳市邁昂科技有限公司。表三為微米級無機填料的添加量與熱阻的關係,結果顯示,最外層透明層中微米級無機填料的添加量越大,熱阻越低,即產品的導熱性能越好。The wafer-level packaging structure of the present invention for moisture-sensitive high-color gamut backlight applications is shown in Figure 2. The outermost layer is an organosilicon transparent
表三 微米級無機填料的添加量與熱阻的關係
本發明用於潮氣敏感的高色域背光應用的晶片級封裝結構如圖2所示,其最外層是含有微米級無機填料的有機矽透明膠層14,其中含有的微米級無機填料15可以提升CSP成品的出光效率。表四為本發明雙層結構CSP(其中外層透明膠層中添加20%重量份微米級無機填料)與普通雙層結構CSP(即KSF螢光層與普通透明層封裝的CSP)進行遠場光學測試的對比結果,其中內層KSF螢光層完全相同。測試設備為LED626 分佈光度計,杭州遠方光電資訊股份有限公司。測試範圍為C0-180度,即測試-90度-90度的光強分佈資料,測試間隔為1.0度。測試結果顯示,本發明雙層結構CSP的光效更高,而且平均光強擴散角更大,即出光光型更好。The wafer-level packaging structure of the present invention for moisture-sensitive high-color gamut backlight applications is shown in Figure 2. The outermost layer is an organosilicon transparent
表四 本發明製備的雙層結構CSP與普通雙層結構CSP遠場光學測試的對比結果
本發明所述的如圖2中微米級無機填料15粒徑:D10為1-3um,D50為10-15um,D90為40-50um,D97為60-70um。粒徑過大時,預製的膠膜表面有螢光粉大顆粒造成的凸起,封裝成CSP後表面不光滑,嚴重的會影響CSP封裝體的色溫一致性;粒徑過小時,則對增加硬度、抗潮氣、耐熱等性能作用不明顯。According to the present invention, the particle size of the micron-sized
本發明所述的如圖2中微米級無機填料15的添加量在1-60重量%,優選10-50重量%添加量。因為添加量低於10%時,其對於抗潮氣、提高硬度、耐熱及抗光衰的作用不明顯;而添加量高於50%時,整個有機矽體系的黏度過高(>50000mPa.s),預製成膜困難。The addition amount of the micron-sized
如圖2所示,倒裝晶片11四周保型貼合的含有KSF螢光粉的螢光膠膜12中,添加的KSF和β-SiAlON的螢光粉組合是DENKA日本電氣化學-上海大都(總公司)提供的。As shown in Figure 2, in the
本發明用於潮氣敏感的高色域背光應用的晶片級封裝結構的製造方法流程圖如圖3所示,其製作方法包括以下步驟:
(1)將倒裝LED晶片陣列於基板上,晶片通過耐200℃以上的高溫膠帶固定;
(2)晶片五面真空保型貼合含KSF螢光粉的螢光膠膜12;
(3)沿封裝體的外立面切割底部膠膜;
(4)切割後的封裝體二次陣列於基板上封裝體通過耐200℃以上的高溫膠帶固定;
(5)陣列後的封裝體通過真空壓合封裝含微米級無機填料的有機矽透明膠膜;
(6)於150℃烤箱固化後進行CSP(chip scale package)封裝體的切割,形成單顆用於潮氣敏感的高色域背光應用的晶片級封裝光源。The flow chart of the manufacturing method of the wafer-level package structure for moisture-sensitive high-color gamut backlight applications of the present invention is shown in Fig. 3, and the manufacturing method includes the following steps:
(1) Place the flip-chip LED chip array on the substrate, and the chip is fixed by a high-temperature adhesive tape that can withstand 200℃ or more;
(2) The five sides of the chip are vacuum conformal and bonded to the
步驟(1)所用的倒裝LED晶片尺寸為3535、4040、4545或者其他尺寸的額定功率在1w以上的倒裝晶片。Step (1) The size of the flip-chip LED chip used is 3535, 4040, 4545 or other size flip-chip chips with a rated power above 1w.
步驟(2)所用的含KSF螢光粉的螢光膠膜是用道康寧A/B雙組份矽膠製備的,螢光粉添加量為5-80重量%,通過擠出或者壓延或者塗覆的方式,製備成30-70um厚度的薄膜。The phosphor film containing KSF phosphor used in step (2) is prepared with Dow Corning A/B two-component silicone gel, the phosphor addition amount is 5-80% by weight, and it is extruded or calendered or coated Method, prepared into a film with a thickness of 30-70um.
步驟(5)所用的含微米級無機填料的有機矽透明膠膜可用市售的A/B雙組份矽膠,如道康寧OE-6650A/B ,40-99份,1-60份微米級無機填料,經攪拌機、混煉機或者捏合機混合均勻後通過擠出或者壓延或者塗覆的方式,製備成厚度為50-80um的有機矽透明膠膜。Step (5) The organic silicon transparent film containing micron-level inorganic fillers can be commercially available A/B two-component silicone, such as Dow Corning OE-6650A/B, 40-99 parts, 1-60 parts micron-level inorganic fillers , After being uniformly mixed by a mixer, a mixer or a kneader, a transparent organosilicon film with a thickness of 50-80um is prepared by extrusion, calendering or coating.
本發明製備的CSP產品與單層膠膜普通五面CSP封裝體以及含KSF螢光層與普通透明層的雙層封裝CSP產品做1000小時點亮老化測試,對比結果如表五所示。其中所用晶片都是55*55mil,點亮電壓為3V,電流1500mA。測試結果中CIE X和CIE Y的變化值ΔX和ΔY越小表示產品性能越好。點亮1000小時後置於100℃紅墨水中2小時,然後觀察封裝膠層是否有紅墨水滲入,若有,則表示性能差;若無,則表示性能好。測試結果是,普通單層五面CSP 和普通雙層結構CSP(即KSF螢光層與普通透明層封裝的CSP)表面封裝膠層中均有紅墨水滲入,而本發明雙層結構CSP(其中外層透明膠層中添加20%重量份微米級無機填料)的表面封裝層中沒有紅墨水。The CSP product prepared by the present invention, a single-layer adhesive film common five-sided CSP package, and a double-layer package CSP product containing a KSF fluorescent layer and a common transparent layer were subjected to a 1000-hour lighting aging test. The comparison results are shown in Table 5. The chips used are all 55*55mil, the lighting voltage is 3V, and the current is 1500mA. In the test results, the smaller the change values ΔX and ΔY of CIE X and CIE Y, the better the product performance. After lighting for 1000 hours, place it in red ink at 100°C for 2 hours, and then observe whether there is red ink infiltrated into the packaging adhesive layer. If there is, it indicates poor performance; if not, it indicates good performance. The test result is that both the ordinary single-layer five-sided CSP and the ordinary double-layer structure CSP (that is, the CSP encapsulated by the KSF fluorescent layer and the ordinary transparent layer) have red ink infiltration, while the double-layer structure CSP of the present invention (in which There is no red ink in the surface encapsulation layer where 20% by weight of micron-level inorganic filler is added to the outer transparent adhesive layer.
表五 1000小時點亮老化測試對比資料
由所述實例製備的CSP封裝體,抗潮氣性能、耐熱及抗光衰性能優異,而且有較高的硬度及出光效率,適合於對潮氣敏感的高色域背光應用。The CSP package prepared by the example has excellent moisture resistance, heat resistance and light decay resistance, and has higher hardness and light extraction efficiency, and is suitable for moisture-sensitive high-color gamut backlight applications.
根據本發明內容進行製程參數和材料的調整,均可實現本發明的晶片封裝結構,且表現出與本發明基本一致的性能。以上對本發明做了示例性的描述,應該說明的是,在不脫離本發明的核心的情況下,任何簡單的變形、修改或者其他本領域技術人員能夠不花費創造性勞動的等同替換均落入本發明的保護範圍。By adjusting the process parameters and materials according to the content of the present invention, the chip package structure of the present invention can be realized, and the performance is basically consistent with that of the present invention. The present invention has been exemplarily described above. It should be noted that, without departing from the core of the present invention, any simple deformation, modification or other equivalent substitutions that can be made by those skilled in the art without any creative effort fall into the present invention. The scope of protection of the invention.
1:倒裝晶片 2:添加螢光粉的有機矽膠膜 3:螢光粉顆粒 11:倒裝晶片 12:螢光膠膜 13:KSF和β-SiAlON的螢光粉組合 14:含有微米級無機填料的有機矽透明膠膜 15:微米級無機填料1: flip chip 2: Organic silicone film with phosphor 3: Phosphor particles 11: flip chip 12: Fluorescent film 13: Phosphor combination of KSF and β-SiAlON 14: Organosilicon transparent film containing micron-level inorganic fillers 15: Micron-level inorganic filler
圖1為普通五面出光CSP的結構示意圖; 圖2為本發明用於潮氣敏感的高色域背光應用的晶片級封裝結構的示意圖; 圖3為本發明用於潮氣敏感的高色域背光應用的晶片級封裝結構的製造方法流程圖。Figure 1 is a schematic diagram of the structure of an ordinary five-side light emitting CSP; 2 is a schematic diagram of a wafer-level package structure used in moisture-sensitive high-color gamut backlight applications of the present invention; FIG. 3 is a flow chart of the manufacturing method of the wafer-level package structure for moisture-sensitive high-color gamut backlight applications of the present invention.
11:倒裝晶片11: flip chip
12:螢光膠膜12: Fluorescent film
13:KSF和β-SiAlON的螢光粉組合13: Phosphor combination of KSF and β-SiAlON
14:含有微米級無機填料的有機矽透明膠膜14: Organosilicon transparent film containing micron-level inorganic fillers
15:微米級無機填料15: Micron-level inorganic filler
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