TW202042399A - 形成氣隙間隔件與主動區上方之閘極接觸之方法及所產生之裝置 - Google Patents

形成氣隙間隔件與主動區上方之閘極接觸之方法及所產生之裝置 Download PDF

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TW202042399A
TW202042399A TW108143935A TW108143935A TW202042399A TW 202042399 A TW202042399 A TW 202042399A TW 108143935 A TW108143935 A TW 108143935A TW 108143935 A TW108143935 A TW 108143935A TW 202042399 A TW202042399 A TW 202042399A
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source
drain
gate
air gap
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謝瑞龍
朱利安 弗羅吉爾
朴燦柔
慷果 程
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美商格芯（美國）集成電路科技有限公司
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Abstract

一種裝置，包括基板與形成於該基板上方的至少一鰭片。至少一電晶體在該鰭片之頂部與該鰭片集成。該電晶體包括主動區，該主動區包含源極、汲極與在該源極及汲極間之通道區。閘極結構形成於該通道區上方，且該閘極結構包括HKMG與形成於該HKMG之對立側壁上的氣隙間隔件。該氣隙間隔件各自包括沿著溝槽矽化物區形成的氣隙，且該氣隙經形成為低於該HKMG的頂端。閘極接觸形成於該主動區上方。

Description

形成氣隙間隔件與主動區上方之閘極接觸之方法及所產生之裝置
本揭示內容係有關於形成於鰭式場效電晶體(FinFET)中之主動區之上的氣隙間隔件及閘極接觸，及其形成方法。
在現有加工下，氣隙間隔件提供優於傳統間隔件的電容減少，從而提高效能。藉由形成閘極接觸於主動區上方可實現按比例縮小的效益。儘管氣隙間隔件和在主動區上方之閘極接觸(gate-contact-over-active-area)在繼續鑽研先進技術節點時對於半導體裝置有合意效益，然而由於地道問題(subway issues)而被認為彼等不相容，亦即，閘極接觸與氣隙間隔件之間，以及源極/汲極接觸與氣隙間隔件之間有不良的相互作用。
先前的氣隙間隔件方案係形成犧牲閘極蓋體(sacrificial gate cap)及閘極側壁間隔件，接著是形成源極/汲極接觸。閘極側壁間隔件及閘極蓋體用可能對溝槽矽化物(TS)及高k金屬閘極(HKMG)完整性可能有不利影響的深反應性離子蝕刻(RIE)回蝕。形成非共形氮化物沉積物以改造犧牲閘極蓋體及氣隙間 隔件。不過，犧牲閘極蓋體很低且在源極/汲極接觸形成期間容易破裂從而打開氣隙且造成潛行通過問題(sneak pass issues)。
因此，亟須一種具有與在主動區上方之閘極接觸完全相容之改良氣隙間隔件的裝置以規避閘極接觸與氣隙間隔件之間以及源極/汲極接觸與氣隙間隔件之間的地道問題，以及製作該裝置的相關方法。
本揭示內容的一態樣為一種邏輯或記憶體單元，其具有形成低於閘極金屬之頂端的氣隙以防閘極接觸與氣隙接觸，即使該閘極接觸在主動區上方。同樣，本揭示內容的另一態樣為一種邏輯或記憶體單元，其具有形成低於閘極金屬之頂端的氣隙以防源極/汲極接觸與氣隙接觸。
本揭示內容的另一態樣為一種用於形成氣隙的製程，該氣隙經形成為低於閘極金屬之頂端以防閘極接觸與氣隙接觸，即使該閘極接觸在主動區上方。同樣，本揭示內容的另一態樣為一種用於形成氣隙的製程，該氣隙經形成為低於閘極金屬之頂端以防該源極/汲極接觸與該氣隙接觸。
根據本揭示內容，一些技術效果可用一種裝置來部分實現，該裝置包括基板與形成於該基板上方的至少一鰭片。至少一電晶體在該鰭片之頂部與該鰭片集成。該電晶體包括主動區，該主動區包含源極、汲極與在該源極及汲極間之通道區。閘極結構形成於該通道區上方，且該閘極結構包括HKMG與形成於該HKMG之對立側壁上的氣隙間隔件。該氣隙間隔件各自包括沿著溝槽矽化物(TS)區形成的氣隙，且該氣隙經形成為低於該HKMG的頂端。閘極接觸形成於該主動區上方。
本揭示內容的另一態樣為一種方法，其包括形成至少一鰭片於半導體基板上。形成至少一主動區，其具有源極、汲極與在該源極及汲極之間的通道區。形成至少一閘極結構於該通道區上方。該閘極結構包括HKMG與形成於該HKMG之對立側壁上的氣隙間隔件。該氣隙間隔件各自包括沿著TS區形成的氣隙。該氣隙經形成為低於該閘極電極的頂端。閘極接觸形成於該閘極電極上方。
本揭示內容的又一態樣為一種裝置，其包括基板與形成於該基板上方的第一鰭片及第二鰭片。第一電晶體在該第一鰭片的頂部與該第一鰭片集成，以及第二電晶體在該第二鰭片的頂部與該第二鰭片集成。該第一及第二電晶體各自包括主動區，其包括源極、汲極以及在該源極及汲極之間的通道區。閘極結構形成於該通道區上方。該閘極結構包括HKMG與形成於該HKMG之對立側壁上的氣隙間隔件。各氣隙間隔件包括沿著TS區形成的氣隙，且該氣隙經形成為低於該HKMG的頂端。自對準閘極接觸形成於該第一電晶體的該主動區上方，且自對準源極/汲極接觸形成於該第二電晶體的源極或汲極上方。
熟諳此藝者由以下詳細說明可明白本揭示內容的其他態樣及技術效果，其中係僅以預期可實現本揭示內容的最佳模式舉例描述本揭示內容的具體實施例。應瞭解，本揭示內容能夠做出其他及不同的具體實施例，以及在各種明顯的態樣，能夠修改數個細節而不脫離本揭示內容。因此，附圖及說明內容本質上應被視為圖解說明用而不是用來限定。按照隨附申請專利範圍的特別提示，可實現及得到本揭示內容的優點。
101:閘極、閘極結構、HKMG
103:鰭片
105:半導體基板、基板
107:閘極側壁間隔件、閘極間隔件
107a:閘極間隔件侵蝕
109:源極-汲極磊晶接觸
111:SAC Cap、閘極蓋體
111a:閘極蓋體侵蝕
113:層間電介質(ILD)
115:OPL
117:TS空腔
119:OPL
121:氣隙間隔件
123:氣隙
125:開口
127:TS接觸
129:TS蓋體
131:閘極接觸
133:源極/汲極接觸
135、137:開口
136:ILD
A-A'、B-B':割線
在此用附圖舉例說明而不是限定本揭示內容，圖中類似的元件用相同的元件符號表示，且其中：
第1圖根據示範具體實施例圖示邏輯或記憶體單元的上視圖；
第2圖至第8圖沿著割線A-A’繪出的橫截面圖係根據示範具體實施例示意圖示用於形成在FinFET中具有氣隙間隔件之邏輯或記憶體單元裝置的製程流程；
第9圖根據示範具體實施例圖示邏輯或記憶體單元的另一上視圖；以及
第10圖及第11圖沿著割線B-B’繪出的橫截面圖係根據示範具體實施例示意圖示用於在FinFET中形成自對準閘極接觸及源極/汲極接觸的製程流程。
為了解釋，在以下的說明中，提出許多特定細節供徹底瞭解示範具體實施例。不過，顯然在沒有該等特定細節下或用等價配置仍可實施示範具體實施例。在其他情況下，眾所周知的結構及裝置用方塊圖圖示以免不必要地混淆示範具體實施例。此外，除非另有說明，在本專利說明書及申請專利範圍中表示成分、反應條件等等之數量、比例及數值性質的所有數字應被理解為在所有情況下可用措辭”約”來修飾。
本揭示內容針對且解決與氣隙間隔件之形成相關的問題以避免閘極接觸與氣隙間隔件之間以及源極/汲極接觸與氣隙間隔件之間的不良相互作 用。尤其是，該等問題係藉由沿著TS區形成氣隙間隔件來解決。氣隙只位在氣隙間隔件的較低高度，其低於金屬閘極的頂端。
根據本揭示內容之具體實施例的裝置包括基板與形成於基板上方的至少一鰭片。至少一電晶體在鰭片頂部與鰭片集成。該電晶體包括主動區，其包含源極、汲極、以及在源極、汲極之間的通道區。閘極結構形成於通道區上方，且該閘極結構包括HKMG與形成於HKMG之對立側壁上的氣隙間隔件。各氣隙間隔件包括沿著TS區形成的氣隙，且該氣隙經形成為低於HKMG的頂端。閘極接觸形成於主動區上方。
此外，熟諳此藝者由以下詳細說明可明白其他的態樣、特徵及技術效果，其中係僅以預期可實現本揭示內容的最佳模式舉例描述本揭示內容的具體實施例。本揭示內容能夠做出其他及不同的具體實施例，而且其數個細節在各種明顯不同的態樣能夠修改。因此，附圖及說明內容本質上應被視為圖解說明用而不是用來限定。
第1圖示意圖示有閘極101及鰭片103之邏輯或記憶體單元的上視圖。割線A-A’沿著越過閘極101的鰭片103中之一者圖示。第2圖示意圖示沿著第1圖割線A-A’繪出的橫截面圖。邏輯或記憶體單元的閘極結構101例如可為取代金屬閘極(RMG)結構，其具有越過且垂直於先前形成之半導體鰭片103的閘極與半導體基板105。該RMG製程始於能使源極與汲極植入物自對準的虛擬閘極結構，然後剝除虛擬閘極結構且換成HKMG 101，其圖示於第1圖至第11圖。
基板105可包括任何含矽基板，包括但不限於矽(Si)、單晶矽、多晶矽、非晶矽、無物上覆矽(SON)、絕緣體上覆矽(SOI)或取代絕緣體上覆矽(SRI) 或矽鍺基板及其類似者。基板105可另外或替代包括各種隔離、摻雜及/或裝置特徵。基板105可包括其他適當的元素半導體，例如，結晶的鍺(Ge)，化合物半導體，例如碳化矽(SiC)、砷化鎵(GaAs)、磷化鎵(GaP)、磷化銦(InP)、砷化銦(InAs)、及/或銻化銦(InSb)或彼等之組合；包括GaAsP、AlInAs、GaInAs、GaInP或GaInAsP或彼等之組合的合金半導體。
如第2圖所示，鰭片103形成於基板105上以從它向上延伸，以及淺溝槽隔離(STI)區(未圖示於此橫截面圖)形成於在鰭片103之間的基板105上。各虛擬閘極結構形成於STI之上且鄰接在各個通道區的一對鰭片103。
在第2圖中，隨後，使用習知技術，形成環繞各個虛擬閘極結構的閘極側壁間隔件107，例如，在各個虛擬閘極結構四周共形地沉積電介質間隔件材料層，然後進行非等向蝕刻製程以從各個虛擬閘極結構及STI的水平面移除電介質間隔件材料。電介質間隔件材料層在各個虛擬閘極結構之側壁上的其餘垂直部份變成閘極側壁間隔件107。閘極側壁間隔件107可由低k材料形成，例如基於氧化矽的材料(SiO2、SiOC、SiOCN、等等)，或基於氮化矽的材料(SiN、SiBCN、SiCN、等等)或有類似功能性質的其他材料。
例如，用磊晶成長形成源極-汲極磊晶接觸109於鰭片103在虛擬閘極結構之間的邊緣上。源極-汲極區形成於鰭片103的暴露部分中以鄰接各個通道區致使通道區橫向位在源極-汲極凹部之間。然後，例如，使用磊晶半導體沉積製程形成源極-汲極磊晶接觸109。在一實例中，源極-汲極磊晶接觸109可由含磷的矽(Si：P)形成於n型FET中，或由Ge百分比有[30-50%]的摻硼矽鍺(SiGe：B)形成於p型FET中。
選擇性地移除各個虛擬閘極結構以提供暴露通道區的閘極開口。由RMG製程形成的閘極堆疊通常包括一或多個閘極電介質層與沉積於閘極電介質層上以填滿閘極開口的一或多個金屬層。基於功函數及FET導電型來選擇閘極堆疊之電介質及金屬層的材料及厚度。例如，最終閘極結構包括層間氧化物與高k閘極電介質層。高k閘極電介質層可由電介質常數大於3.9的電介質材料形成，例如氧化鉿(IV)(HfO2)、二氧化鋯(ZrO2)、或有類似功能性質的任何其他材料。為求簡化，閘極結構內的諸層未圖示於附圖。用於選擇性移除虛擬閘極結構和形成最終閘極堆疊及自對準接觸蓋體(SAC Cap)的技術為本技藝所習知且本專利說明書予以省略以便讓讀者聚焦於所揭示方法的突出態樣。RMG製程後的各個閘極結構包括HKMG 101、SAC Cap 111與閘極側壁間隔件107，如第2圖所示。用於該等閘極的材料包括選自下列各物的金屬：氮化鈦(TiN)、氮化鉭(TaN)、鋁化鈦(TiAl)、摻鋁的碳化鈦(TiAlC)、碳化鈦(TiC)、鎢(W)及/或鈷(Co)。用於SAC Cap 111的材料包括氮化矽(SiN)或有類似性質的其他適當材料。
在第2圖中，沉積OPL 115於例如二氧化矽(SiO2)的層間電介質(ILD)113上方，且於該結構上方作為圖案化層。根據本發明的一具體實施例，OPL 115可為包括碳、氫及氮的有機聚合物。OPL 115的非限定性實施例包括JSR HM8006，JSR HM8014，AZ UM10M2，Shin Etsu ODL 102，或來自例如JSR，TOK，Sumitomo，Rohm & Haas等等之廠商的其他類似市售材料。可用例如旋塗法沉積OPL 115且回蝕多餘的OPL 115。沉積例如二氧化鈦(TiO2)、矽基抗反射塗層(SiARC)、低溫氧化矽(LTO)、氮氧化矽(SiON)或有類似功能性質之任何其他材料的抗反射層(未圖示)以及光阻堆疊(未圖示)於OPL 115上。在圖案化微影後，用RIE或任何其他類似蝕刻製程形成TS空腔117於裝置的主動區中。在TS 空腔117的形成期間，在RIE期間可能發生顯著的閘極間隔件侵蝕107a與部分的閘極蓋體侵蝕111a。
如第3圖所示，執行OPL 119填充然後使其凹陷致使OPL 119填充TS空腔117。OPL 119的頂部低於HKMG 101的頂部。在第4圖中，完成選擇性間隔件移除以移除在HKMG 101、源極-汲極磊晶接觸109之間的閘極間隔件107。此步驟達成的重要效益在於閘極間隔件107移除容易得多，因為在頂端區中的大部份閘極間隔件107已被暴露且可用對閘極蓋體111及OPL 119有選擇性的等向蝕刻可輕易移除。
如第5圖所示，氣隙間隔件121用沉積步驟及間隔件RIE形成。形成低於HKMG 101之頂端的氣隙123以防止閘極接觸與氣隙123相互作用。氣隙間隔件121有5至15奈米的間隔件寬度且由低k材料形成，例如基於氧化矽的材料(SiO2、SiOC、SiOCN等等)，或基於氮化矽的材料(SiN、SiBCN、SiCN等等)或有類似功能性質的其他材料。該間隔件材料使用共形沉積製程沉積，例如原子層沉積(ALD)，電漿增強化學氣相沉積(PECVD)，及夾止機構(pinch-off mechanism)以引起氣隙123的囊封。該等氣隙間隔件沿著一TS區定位。氣隙123形成在HKMG 101與OPL 119之間。如第6圖所示，用蝕刻、灰化或其他適當技術移除OPL 119以在源極-汲極磊晶接觸109上方形成開口125。
在第7圖中，用金屬化製程形成TS接觸127。在一具體實施例中，藉由沉積鎢(W)、鈷(Co)或釕(Ru)，接著藉由移除多餘金屬的凹陷步驟(recess step)來形成TS接觸127。在一實例中，在形成TS接觸127之前，可在開口125中形成TS襯裡(未圖示)。例如，可選擇該TS襯裡以匹配TS接觸127的材料，例如，在TS接觸127由鎢形成時，TS襯裡可由鈦(Ti)形成。TS接觸127的凹陷 高度被形成高於HKMG 101頂端。在某些具體實施例中，凹陷高度可高於HKMG 101的頂端10至30奈米。
在第8圖中，TS蓋體129形成於TS接觸127上方。用例如用於基於氮化物之間隔件材料的熱磷酸或用於基於氧化物之間隔件材料的氫氟酸的蝕刻步驟移除氣隙間隔件121的暴露部分。接下來，TS蓋體129形成於TS接觸127上方。在某些具體實施例中，該等TS蓋體可由碳化矽(SiC)或有類似性質的其他適當材料形成。可執行化學機械研磨(CMP)以移除多餘的TS蓋體129以便與閘極蓋體111實質共面。
第9圖的另一上視圖示意圖示有閘極101及鰭片103的邏輯或記憶體單元。割線B-B’沿著鰭片103且越過在基板105之兩個不同區域中的閘極101圖示。圖中顯示閘極接觸131與源極/汲極接觸133以及TS接觸127。
第10圖及第11圖示意圖示沿著第9圖之割線B-B’繪出的橫截面圖。執行自對準RIE以形成用於閘極接觸131的開口135與用於源極/汲極接觸133的開口137。開口135向下延伸穿過ILD 136到HKMG 101的頂面。用RIE移除閘極蓋體111以及TS蓋體129的數個部分。開口135在主動區上方但是不會達到低於HKMG 101之頂面的氣隙123。結果，可防止電氣短路。本發明的製程與在主動區上方之閘極接觸完全相容。開口137向下延伸穿過ILD 136到TS接觸127及氣隙間隔件121但是不會達到位於氣隙間隔件121之底部或較低高度附近的氣隙123。結果，可防止電氣短路。如第11圖所示，執行金屬化製程以沉積金屬於開口135及137中以各自形成閘極接觸131和源極/汲極接觸133。可執行CMP步驟以移除向下到ILD 136上表面的多餘金屬化物。
本揭示內容的具體實施例可實現數種技術效果，包括提供與在主動區上方之閘極接觸完全相容的改良氣隙間隔件，且不易遭受閘極接觸地道問題或者是源極/汲極接觸地道問題。根據本揭示內容之數個具體實施例所形成的裝置可用於各種工業應用，例如微處理器、智慧型手機、行動電話、手機、機上盒、DVD燒錄機及播放機、汽車導航、印表機及周邊設備、網路及電信設備，遊戲系統及數位相機。因此，本揭示內容在產業上可用於包括邏輯或記憶體單元的各種半導體裝置中之任一者，特別是14奈米技術節點以上者。
在以上說明中，用數個特定示範具體實施例來描述本揭示內容。不過，顯然仍可做出各種修改及改變而不脫離本揭示內容更寬廣的精神及範疇，如申請專利範圍所述。因此，本專利說明書及附圖應被視為圖解說明用而非限定。應瞭解，本揭示內容能夠使用各種其他組合及具體實施例且在如本文所述的本發明概念範疇內能夠做出任何改變或修改。
131:閘極接觸
133:源極/汲極接觸
136:ILD
B-B':割線

Claims (20)

  1. 一種裝置，包含：
    基板；
    至少一鰭片，形成於該基板上方；
    至少一電晶體，在該鰭片之頂部與該鰭片集成，該電晶體包含：
    主動區，包含源極、汲極與在該源極及汲極間之通道區；
    閘極結構，在該通道區上方，該閘極結構包含高電介質常數金屬閘極(HKMG)與形成於該HKMG之對立側壁上的氣隙間隔件，
    其中，該等氣隙間隔件各自包含沿著溝槽矽化物(TS)區形成的氣隙，且該氣隙經形成為低於該HKMG的頂端；以及
    閘極接觸，形成於該主動區上方。
  2. 如申請專利範圍第1項所述之裝置，其中，該TS區包含形成於該源極及汲極上方的TS金屬化物。
  3. 如申請專利範圍第2項所述之裝置，進一步包含TS蓋體，形成於該TS金屬化物上方。
  4. 如申請專利範圍第1項所述之裝置，其中，該TS蓋體包含碳化矽(SiC)。
  5. 如申請專利範圍第2項所述之裝置，進一步包含源極/汲極接觸，在該基板之第二區中形成於該TS金屬化物上方，
    其中，該閘極接觸與源極/汲極接觸自對準。
  6. 如申請專利範圍第1項所述之裝置，其中，該源極及汲極為磊晶源極及汲極。
  7. 一種方法，包含：
    形成至少一鰭片於半導體基板上；
    形成至少一主動區，該主動區具有源極、汲極與在該源極及汲極之間的通道區；
    形成至少一閘極結構於該通道區上方，該閘極結構包含高電介質常數金屬閘極(HKMG)與形成於該HKMG之對立側壁上的氣隙間隔件，
    其中，該等氣隙間隔件各自包含沿著溝槽矽化物(TS)區形成的氣隙，且該氣隙經形成為低於該閘極電極的頂端；以及
    形成閘極接觸於該閘極電極上方。
  8. 如申請專利範圍第7項所述之方法，其中，該TS區包含在該源極及汲極上方的TS金屬化物。
  9. 如申請專利範圍第8項所述之方法，進一步包含：
    形成TS蓋體於該TS金屬化物上方。
  10. 如申請專利範圍第9項所述之方法，其中，該TS蓋體包含碳化矽(SiC)。
  11. 如申請專利範圍第9項所述之方法，進一步包含：
    形成自對準閘極接觸於該閘極電極上方。
  12. 如申請專利範圍第11項所述之方法，進一步包含：
    在該基板用於第二閘極結構的第二區中，形成源極/汲極接觸於該TS金屬化物上方。
  13. 如申請專利範圍第7項所述之方法，其中，該源極及汲極為磊晶源極及汲極。
  14. 如申請專利範圍第11項所述之方法，其中，該氣隙間隔件包含選自下列各物的材料：基於氧化矽的材料，或基於氮化矽的材料。
  15. 一種裝置，包含：
    基板；
    第一鰭片及第二鰭片，形成於該基板上方；
    第一電晶體及第二電晶體，該第一電晶體在該第一鰭片之頂部與該第一鰭片集成，該第二電晶體在該第二鰭片之頂部與該第二鰭片集成，該第一及第二電晶體各自包含：
    主動區，包含源極、汲極與在該源極及汲極間之通道區；
    閘極結構，在該通道區上方，該閘極結構包含高電介質常數金屬閘極(HKMG)與形成於該HKMG之對立側壁上的氣隙間隔件，
    其中，該等氣隙間隔件各自包含沿著溝槽矽化物(TS)區形成的氣隙，且該氣隙經形成為低於該HKMG的頂端；
    自對準閘極接觸，形成於該第一電晶體之該主動區上方；以及
    自對準源極/汲極接觸，形成於該第二電晶體之源極或汲極上方。
  16. 如申請專利範圍第15項所述之裝置，其中，該TS區包含形成於該源極及汲極上方的TS金屬化物。
  17. 如申請專利範圍第16項所述之裝置，進一步包含TS蓋體，形成於該TS金屬化物上方。
  18. 如申請專利範圍第1項所述之裝置，其中，該TS蓋體包含碳化矽(SiC)。
  19. 如申請專利範圍第17項所述之裝置，進一步包含源極/汲極接觸，在該基板之第二區中形成於該TS金屬化物上方，
    其中，該閘極接觸與源極/汲極接觸自對準。
  20. 如申請專利範圍第15項所述之裝置，其中：
    該源極及汲極為磊晶源極及汲極，且
    該氣隙間隔件包含選自下列各物的材料：基於氧化矽的材料，或基於氮化矽的材料。
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