TW201842574A - 矽氮化物之準原子層蝕刻方法 - Google Patents
矽氮化物之準原子層蝕刻方法 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 80
- 238000005530 etching Methods 0.000 title claims abstract description 62
- 229910052581 Si3N4 Inorganic materials 0.000 title claims abstract description 40
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 title claims abstract description 40
- 239000000463 material Substances 0.000 claims abstract description 74
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- 229910052731 fluorine Inorganic materials 0.000 claims abstract description 17
- 229910052717 sulfur Inorganic materials 0.000 claims abstract description 6
- 239000007789 gas Substances 0.000 claims description 52
- 238000012545 processing Methods 0.000 claims description 48
- 239000001257 hydrogen Substances 0.000 claims description 15
- 229910052739 hydrogen Inorganic materials 0.000 claims description 15
- 125000006850 spacer group Chemical group 0.000 claims description 14
- 238000000059 patterning Methods 0.000 claims description 13
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims description 10
- 239000011737 fluorine Substances 0.000 claims description 10
- 239000011261 inert gas Substances 0.000 claims description 9
- 150000003254 radicals Chemical class 0.000 claims description 9
- 150000002500 ions Chemical class 0.000 claims description 7
- -1 hydrogen ions Chemical class 0.000 claims description 6
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- 229910004298 SiO 2 Inorganic materials 0.000 claims description 2
- 238000009616 inductively coupled plasma Methods 0.000 claims description 2
- 230000003213 activating effect Effects 0.000 claims 1
- 230000006698 induction Effects 0.000 claims 1
- 230000007935 neutral effect Effects 0.000 claims 1
- 229910052756 noble gas Inorganic materials 0.000 abstract 1
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 9
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 229910052710 silicon Inorganic materials 0.000 description 7
- 239000010703 silicon Substances 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 6
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- 150000002431 hydrogen Chemical class 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
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- 239000012044 organic layer Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical class [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
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- 229910052786 argon Inorganic materials 0.000 description 2
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- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- YZCKVEUIGOORGS-UHFFFAOYSA-N Hydrogen atom Chemical compound [H] YZCKVEUIGOORGS-UHFFFAOYSA-N 0.000 description 1
- 229910000673 Indium arsenide Inorganic materials 0.000 description 1
- 229910003811 SiGeC Inorganic materials 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
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- 238000011065 in-situ storage Methods 0.000 description 1
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 1
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- 238000001465 metallisation Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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- 229910003465 moissanite Inorganic materials 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
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- 238000000926 separation method Methods 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 239000011593 sulfur Substances 0.000 description 1
- 230000002459 sustained effect Effects 0.000 description 1
- 239000013077 target material Substances 0.000 description 1
- 229910052723 transition metal Inorganic materials 0.000 description 1
- 229910000314 transition metal oxide Inorganic materials 0.000 description 1
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Abstract
描述一種蝕刻的方法。該方法包含提供具有包含矽氮化物的第一材料及不同於該第一材料之第二材料的一基板;藉由電漿激發包含H及選用性地包含一惰性氣體之第一處理氣體以形成第一化學混合物;以及將在該基板上的該第一材料暴露於該第一化學混合物。其後,該方法包含藉由電漿激發包含S、F及選用性地包含一惰性元素之第二處理氣體而形成第二化學混合物;以及將在該基板上的該第一材料暴露於經電漿激發的該第二處理氣體,以相對於該第二材料選擇性地蝕該第一材料。
Description
相關申請案的交互參照:本申請案主張2017年02月23日提交的案名為「METHOD OF QUASI-ATOMIC LAYER ETCHING OF SILICON NITRIDE」的美國臨時專利申請案第62/462,764號的權益,在此以參照全文的方法引入。
本發明係關於一種蝕刻的方法,具體而言,係關於蝕刻用於電子元件應用之薄膜的精確蝕刻技術。
本發明係關於一種製造半導體元件(例如積體電路及用於積體電路的電晶體及電晶體元件)的方法。在半導體元件的製造中(特別是在微觀尺度上),執行各種製造程序,例如成膜沉積、蝕刻遮罩產生、圖案化、材料蝕刻與移除、以及摻雜處理係重複地執行以在基板上形成所期望的半導體元件。歷史上,使用微製程的情況下,電晶體已產生於一平面中,且佈線/金屬化在上方形成,因而以二維(2D)電路或2D製造為特徵。縮放上之努力已大幅提高2D電路中每單位面積之電晶體的數目,然而隨著縮放進入單位數奈米半導體元件製造節點,縮放上之努力遭遇更大的挑戰。半導體元件製造者已表達對於其中電晶體堆疊於彼此之上的三維(3D)半導體元件的期望。
隨著元件結構增密並垂直地發展,對於精確的材料蝕刻之需求變得更加強烈。在選擇性、輪廓、ARDE(深寬比相依的蝕刻)、及電漿蝕刻處理中的均勻性之間的權衡變得難以管理。現今藉由平衡該等權衡而進行圖案化及圖案轉移的方法係無法持續維持的。該等權衡之根本原因在於無法獨立控制離子能量、離子通量、以及自由基通量。然而,自限性處理(例如原子層蝕刻(ALE))提供一種避開該等權衡之可行途徑,其藉由將蝕刻處理分為表面改質及改質之表面區域的移除之連續步驟,從而容許自由基通量及離子通量與能量之作用的分離。
本文之技術關於利用精確蝕刻技術的元件製造。
描述一種蝕刻的方法。該方法包含提供具有包含矽氮化物的第一材料及不同於該第一材料之第二材料的一基板;藉由電漿激發包含H及選用性地包含一惰性氣體之第一處理氣體以形成第一化學混合物;以及將在該基板上的該第一材料暴露於該第一化學混合物。其後,該方法包含藉由電漿激發包含S、F及選用性地包含一惰性元素之第二處理氣體而形成第二化學混合物;以及將在該基板上的該第一材料暴露於經電漿激發的該第二處理氣體,以相對於該第二材料選擇性地蝕該第一材料。
描述另一種蝕刻的方法。該方法包含提供具有包含矽氮化物的第一材料及不同於該第一材料之第二材料的一基板;藉由電漿激發包含H及選用性地包含一惰性氣體之第一處理氣體以形成第一化學混合物;以及將在該基板上的該第一材料暴露於該第一化學混合物。其後,該方法包含藉由電漿激發包含高氟含量分子及選用性地包含一惰性元素之第二處理氣體以形成第二化學混合物,其中該高氟含量分子的氟對其他原子元素之比率超過一;以及將在該基板上的該第一材料暴露於經電漿激發的該第二處理氣體,以相對於該第二材料選擇性地蝕該第一材料。
當然,本文所述之不同步驟的討論順序已為了清楚解釋而呈現。一般而言,可以任何適當順序執行這些步驟。此外,雖然本文之每個不同特徵、技術、構造等可於本揭露內容的不同地方討論,擬使每個概念可各自單獨或互相組合而執行。因此,可以許多不同方式實施及分析本發明。
應注意此發明內容之章節並未指明本發明或申請專利範圍之所有實施例及/或漸增之新穎態樣。而應為,此發明內容僅提供不同實施例及相對於習知技術之新穎性對應點的初步討論。關於本發明及實施例之額外的細節及/或可能的觀點,讀者將被導向如下進一步討論之本發明的實施方式之章節及對應之圖式。
本文之技術係關於利用精確蝕刻技術之元件製造。若干範例顯示於半導體加工中的前段製程(FEOL,例如電晶體製造)及後段製程(BEOL,例如互連線製造)兩者中,其中氧化物及氮化物薄膜(本質上通常含矽)需以高精確度蝕刻。
在半導體加工中之許多製造程序要求精確蝕刻技術。將在以後討論之範例包含: (1)針對2D(二維)及3D(三維)元件結構的閘極間隙壁蝕刻、(2) 針對用於多重圖案化的側壁圖像轉移(SIT)的間隙壁蝕刻、(3)自後間隙壁蝕刻 (post-spacer etch)之SIT結構移除心軸、以及(4)自凸起之結構蝕刻襯墊。
作為另一範例,自對準嵌段(SAB)結構之製造已成為在自對準雙重圖案化(SADP)、自對準四重圖案化(SAQP)、及自對準多重圖案化(SAMP)之其他變化中的關鍵步驟。作為SAB流程的一部分,以相對於氧化物間隙壁之選擇性而非等向性地蝕刻矽氮化物心軸。現今蝕刻矽氮化物心軸的方法不具有所需之選擇性,該所需之選擇性超過15 (亦即,矽氮化物的蝕刻速率大於15倍之矽氧化物的蝕刻速率)以在不損壞氧化物間隙壁的情況下蝕刻心軸。
本發明係關於非等向性處理的發展,該非等向性處理可相對於氧化物間隙壁以極高之選擇性(例如,>15、或>20、或>30、或>50、或>80、及甚至>100)蝕刻矽氮化物心軸,因此可達成SAB製造流程。
根據若干實施例,圖1及2顯示蝕刻薄膜的方法。描繪成流程圖200之方法包含提供具有含矽氮化物的第一材料100及不同於第一材料100之第二材料(未顯示)的基板;在步驟210中藉由電漿激發包含H及選用性地包含惰性氣體之第一處理氣體以形成第一化學混合物;以及在步驟220中將在基板上的第一材料暴露於第一化學混合物,以上之組合係描繪成圖1中的102。其後,該方法包含在步驟230中藉由電漿激發包含N、F、O及選用性地包含惰性氣體之第二處理氣體以形成第二化學混合物;以及在步驟240中將基板上的第一材料100暴露於第二電漿激發處理氣體,以相對於第二材料選擇性地蝕刻第一材料100,以上之組合係描繪成圖1中的104。或者,該方法包含在步驟230中藉由電漿激發包含S與F及選用性地包含惰性氣體之第二處理氣體以形成第二化學混合物;以及在步驟240中將基板上的第一材料100暴露於第二電漿激發處理氣體,以相對於第二材料選擇性地蝕刻第一材料100,以上之組合係描繪成圖1中的104。
待蝕刻之第一材料100包含矽氮化物、實質上由矽氮化物所組成、或由矽氮化物所組成(矽氮化物表示為Si3
N4
,或更一般性地表示為Six
Ny
,其中x及y為大於零之實數)。第二材料(未顯示)可包含矽氧化物(例如SiO2
)或其他含矽材料、金屬或含金屬材料、或有機材料,如有機平坦化層(OPL)、光阻、或抗反射塗層(ARC)。
如上所述,第一化學混合物係由電漿激發第一處理氣體而形成。第一處理氣體包含氫(H),並可包含原子氫(H)、分子氫(H2
)、亞穩態之氫、氫自由基、或氫離子、或其兩者以上之任何組合。在一實施例中,第一處理氣體包含H2
、或H2
及Ar。在另一實施例中,第一處理氣體實質上由H2
所組成或由H2
所組成。在又另一實施例中,第一處理氣體實質上由H2
及Ar所組成或由H2
及Ar所組成。
亦如上所述,第二化學混合物係由電漿激發第二處理氣體而形成。第二處理氣體可包含高氟含量之分子,其中氟對其他原子元素之比率超過一。第二處理氣體可包含氮(N)、氟(F)、以及氧(O),並可選用性地包含惰性元素(例如Ar(氬))。在一實施例中,第二處理氣體包含NF3
、O2
、及Ar。在另一實施例中,第二處理氣體實質上由NF3
、O2
、及Ar所組成或由NF3
、O2
、及Ar所組成。或者,第二處理氣體可包含硫(S)及氟(F),並可選用性地包含惰性元素(例如Ar(氬))。在一實施例中,第二處理氣體包含SF6
及Ar。在另一實施例中,第二處理氣體實質上由SF6
及Ar所組成或由SF6
及Ar所組成。
可原位(亦即,第一及/或第二化學混合物係在緊鄰接觸基板之氣相、真空環境內形成)、或異地(亦即,第一及/或第二化學混合物係在位於相對於基板遠處之氣相、真空環境內形成)執行第一處理氣體及/或第二處理氣體之電漿激發。圖9A至9D提供可用以促進處理氣體之電漿激發的若干電漿產生系統。圖9A顯示電容耦合電漿(CCP)系統,其中電漿係在上板電極(UEL)與下板電極(LEL)之間靠近於基板而形成,該下電極亦作為靜電夾頭(ESC)以支撐及固持基板。電漿係藉由將射頻(RF)功率連接至該等電極的其中至少一者而形成。如圖9A所示,RF功率係連接至上及下電極兩者,且功率連接可包含不同的RF頻率。或者,多個RF功率源可連接至相同的電極。此外,直流(DC)功率可連接至上電極。
圖9B顯示感應耦合電漿(ICP)系統,其中電漿係在電感元件(例如,平面的、或螺管/螺旋的線圈)與下板電極(LEL)之間靠近於基板而形成,該下電極亦作為靜電夾頭(ESC)以支撐及固持基板。電漿係藉由將射頻(RF)功率連接至電感耦合元件而形成。如圖9B所示,RF功率係連接至電感元件及下電極兩者,且功率連接可包含不同的RF頻率。
圖9C顯示表面波電漿(SWP)系統,其中電漿係在槽孔式平面天線與下板電極(LEL)之間靠近於基板而形成,該下電極亦作為靜電夾頭(ESC)以支撐及固持基板。電漿係藉由將在微波頻率的射頻(RF)功率透過波導(waveguide)及同軸線連接至槽孔式平面天線而形成。如圖9C所示,RF功率係連接至槽孔式平面天線及下電極兩者,且功率連接可包含不同的RF頻率。
圖9D顯示遠程電漿系統,其中電漿係在遠離基板的區域中形成、且係藉由過濾器與基板分隔,該過濾器係配置以阻止帶電粒子由遠程電漿源傳送至靠近基板的處理區域。基板係藉由下板電極(LEL)支撐,該下板電極(LEL)亦作為靜電夾頭(ESC)以固持基板。電漿係藉由將射頻(RF)功率連接至靠近位於遠處之區域的電漿產生裝置而形成。如圖9D所示,RF功率係連接至靠近遠程區域的電漿產生裝置及下電極兩者,且功率連接可包含不同的RF頻率。
圖9A至9D的電漿處理系統係意圖說明用以執行所描述的步驟式離子/自由基處理的各種技術。其他實施例係考量包含所描述之系統的組合及變化兩者。
當藉由電漿激發包含H及選用性地包含惰性氣體之第一處理氣體以形成第一化學混合物、以及將在基板上的第一材料暴露於第一化學混合物時,該暴露之氣體壓力可為小於或等於100 mTorr。例如,氣體壓力可在20 mTorr至100 mTorr之範圍。此外,可藉由將RF功率連接至下板電極(LEL)而使基板電性偏壓。RF功率亦可或可不被施加至電漿產生裝置。
當藉由電漿激發包含N、F、及O(或S及F)及選用性地包含惰性氣體之第二處理氣體以形成第二化學混合物、以及將基板上的第二材料暴露於第二化學混合物時,該暴露之氣體壓力可為大於或等於100 mTorr。例如,氣體壓力可在100 mTorr至1000 mTorr之範圍。此外,可藉由將RF功率連接至下板電極(LEL)而使基板電性偏壓。RF功率亦可或可不被施加至電漿產生裝置。
現參照圖3及表1,藉由化學氣相沉積(CVD)沉積的矽氮化物薄膜(CVD SiN)係與毗鄰的矽氧化物薄膜一同暴露於若干蝕刻處理。在第一範例中,根據表1所提供的條件,該二薄膜僅暴露於氫(H2
)電漿。在此離子驅動之氫電漿中,該二薄膜未受蝕刻且在薄膜之間並未觀察到選擇性。在第二範例中,該二薄膜係暴露於由NF3
、O2
及Ar所構成的電漿。在此自由基驅動之電漿中,從矽氮化物薄膜蝕刻十一(11)埃,而僅從矽氧化物薄膜蝕刻一(1)埃,因此導致11比1之蝕刻選擇性。在第三範例中,該二薄膜係依序暴露於氫(H2
)電漿,而接著暴露於由NF3
、O2
及Ar所構成的電漿。在此離子及自由基驅動之序列式電漿中,從矽氮化物薄膜蝕刻六十一(61)埃,而實質上未觀察到矽氧化物薄膜之蝕刻,因此導致超過60比1之蝕刻選擇性。
表1
在第四範例中,該二薄膜係暴露於由SF6
及Ar所構成的電漿。在此自由基驅動之電漿中,從矽氮化物薄膜蝕刻約二十(20)埃。在第五範例中,該二薄膜係依序暴露於氫(H2
)電漿,而接著暴露於由SF6
及Ar所構成的電漿。在此自由基及離子驅動之序列式電漿中,從矽氮化物薄膜蝕刻約一百三十八(138)埃。
本發明人推測在氫電漿步驟期間的氫離子富集於矽氮化物及矽氧化物的表面區域,導致上升的次表面氫濃度;見圖4及5。如圖5所示,氫含量在區域1(重度改質的次表面區域)中增加至最大值,接著在區域2(中度改質的次表面區域)衰減通過中等濃度位準,直到其在區域3中衰減至低位準(原始或初始的材料)。接著,NF3
及O2
電漿、或SF6
及Ar電漿產生自由基,該自由基選擇性地與氫化的矽氮化物反應且以相比於第二材料(例如矽氧化物或有機材料)更高的速率揮發。圖3顯示各示例處理所達成的蝕刻量。並且,如圖4所示,當蝕刻從相對高的氫濃度至相對低的氫濃度通過次表面區域而進行時,在NF3
及O2
、或SF6
及Ar步驟期間所達成的蝕刻量減少(或蝕刻速率衰減)。
在圖6A至6D中,提供在需要精確蝕刻技術之半導體加工中的製造程序的若干範例。在各範例中,必須相對於其他材料以高選擇性移除矽氮化物,且該等範例包含: (1)針對2D(二維)及3D(三維)元件結構的閘極間隙壁蝕刻、(2) 針對用於多重圖案化的側壁圖像轉移(SIT)的間隙壁蝕刻、(3)自後間隙壁蝕刻之SIT結構移除心軸、以及(4)自凸起之結構蝕刻襯墊。圖6A顯示從閘極結構610的覆蓋區域選擇性地移除矽氮化物615。圖6B顯示從自對準多重圖案化(SAMP)方法中所使用之心軸620周圍的覆蓋區域及底腳(footer)區域選擇性地移除矽氮化物625。圖6C顯示從後間隙壁蝕刻結構630選擇性地移除矽氮化物心軸635,以留下雙重圖案化的間隙壁結構。圖6D顯示選擇性地移除矽氮化物襯墊645,以留下凸起之特徵部640。
在又另一範例中,自對準嵌段(SAB)結構之製造已成為在自對準雙重圖案化(SADP)、自對準四重圖案化(SAQP)、以及自對準多重圖案化(SAMP)之其他變化中的關鍵步驟。作為SAB流程的一部分,以相對於氧化物間隙壁之選擇性而非等向性地蝕刻矽氮化物心軸。現今蝕刻矽氮化物心軸的方法不具有所需之選擇性,該所需之選擇性超過15 (亦即,矽氮化物的蝕刻速率大於15倍之矽氧化物的蝕刻速率)以在不損壞氧化物間隙壁的情況下蝕刻心軸。
如圖7A所示,基板700可包含覆蓋薄膜堆疊710的圖案化層720,該薄膜堆疊710包含待蝕刻或圖案化之一或更多選用性的膜層712、714及716。圖案化層720可界定覆蓋一或更多額外的膜層之開放特徵部圖案。基板700更包含元件層。元件層可包含工件上之待轉移圖案至其中或待移除目標材料的任何薄膜或結構。此外,圖案化層720可包含保留層722及待移除的目標層724。
目標層724可由矽氮化物所構成。如圖7A及7B所示,目標層724填充保留層722內的溝槽或介層孔725,該溝槽或介層孔725具有深度(D)727、寬度(W)726、以及深寬比(D/W)。深寬比可為大於3、4、或5。對於一些結構,深寬比可為大於10、15、或甚至20。寬度(W)726可為小於50 nm、40 nm、30 nm、或20 nm。在一些應用中,寬度(W)726為小於10 nm。保留層722可由選自由矽氧化物(SiOx
)、矽氮氧化物(SiOx
Ny
)、過渡金屬氧化物(例如,鈦氧化物(TiOx
))、過渡金屬氮化物(例如鈦氮化物(TiNy
))、以及含矽有機材料所組成之群組的材料所構成,該含矽有機材料具有在15%至50%重量之矽之範圍的矽含量。
舉例而言,圖7A中的圖案化層720可包含環繞用於多重圖案化方法中之心軸層的間隙壁層。或者,例如,圖7A中的圖案化層720可包含虛設的矽氮化物層,該虛設的矽氮化物層填充將以先進閘極結構(例如金屬閘極結構)取代的區域。
基板700可包含主體矽基板、單晶矽(摻雜或未摻雜)基板、絕緣體上半導體(SOI)基板、或包含例如Si、SiC、SiGe、SiGeC、Ge、GaAs、InAs、InP、及其他III/V或II/VI族化合物之半導體、或其任何組合的任何其他半導體基板(II、III、V、VI族指涉在元素週期表中傳統的或舊的IUPAC表示法;根據修訂或新的IUPAC表示法,該等族分別指涉第2、13、15、16族)。基板700可為任何尺寸,例如,200 mm(毫米)之基板、300 mm之基板、450 mm之基板、或甚至更大之基板。元件層可包含可將圖案轉移進入其中之任何薄膜或元件結構。
有機層721覆蓋基板700的各種區域,並暴露嵌段區域,在該嵌段區域內矽氮化物心軸係將從高深寬比特徵部移除。在圖7B中,以對於矽氧化物間隙壁及有機層721影響最小的方式選擇性地移除矽氮化物心軸714。
根據另一實施例,圖8描繪用於蝕刻基板的流程圖800。在810中,製備自對準嵌段(SAB)結構。並且,在820中,將心軸從SAB結構之暴露的區域移除。圖8描繪從高深寬比特徵部選擇性地蝕刻矽氮化物心軸以留下矽氧化物間隙壁的方法。該深寬比可超過十(10),且用以相對於其他材料(例如,矽氧化物及有機材料)而移除矽氮化物心軸的蝕刻選擇性可超過20比1、或50比1、或甚至100比1。
在以下之申請專利範圍中,任何附屬項的限制可附屬於任何獨立請求項。
在前述中,已提出特定細節,例如處理系統之特定幾何以及其中所使用之各種元件及處理之敘述。然而,吾人應了解,本文之技術可實行於不同於這些特定細節之其他實施例,且此等細節係用於解釋之目的而非用以設限制。本文揭露之實施例已參照附圖敘述。同樣地,為了作解釋,已提到特定數目、材料、及設置以供徹底理解。然而,在無這些特定細節的情況下,亦可能實行實施例。實質上具有相同功能性結構之元件係由類似的參考符號表示,因此可能省略所有多餘的敘述。
已將各種技術描述為多重的分散操作以協助理解各實施例。不應將描述之順序解釋為隱含有這些操作必須係順序相依之意。這些操作確實並不需依描述之順序執行。所述之操作可依不同於所述之實施例的順序執行。在額外之實施例中,可執行各種額外之操作及/或可省略所述之操作。
本文所提及之「基板」或「目標基板」基本上指涉依據本發明受處理之物體。該基板可包含任何材料部分或元件之結構,特別係半導體或其他電子元件,以及可係例如一基底基板結構,如半導體晶圓、標線片,或是在基底基板結構之上方或覆蓋其上之膜層例如一薄膜。因此,基板並不限於任何特定基底結構、基底層或覆蓋層、經圖案化或未經圖案化,而係考量包含任何此類膜層或基底結構,以及任何膜層及/或基底結構之組合。該敘述可參考基板之特定類型,但僅為了說明之目的。
熟悉本技藝者亦將理解,可對前述之該技術之操作做出許多變化,而依然能達到本發明之相同目的。本發明之範圍擬包含此類變化。因此,不擬將本發明之實施例之以上敘述視為限制性者。而擬將對於本發明之實施例的任何限制於以下申請專利範圍說明。
100‧‧‧第一材料
102‧‧‧處理
104‧‧‧處理
200‧‧‧流程圖
210‧‧‧步驟
220‧‧‧步驟
230‧‧‧步驟
240‧‧‧步驟
610‧‧‧閘極結構
615‧‧‧矽氮化物
620‧‧‧心軸
625‧‧‧矽氮化物
630‧‧‧蝕刻結構
635‧‧‧矽氮化物心軸
640‧‧‧凸起特徵部
645‧‧‧襯墊
700‧‧‧基板
710‧‧‧薄膜堆疊
712‧‧‧膜層
714‧‧‧膜層/矽氮化物心軸
716‧‧‧膜層
720‧‧‧圖案化層
721‧‧‧有機層
722‧‧‧保留層
724‧‧‧目標層
725‧‧‧溝槽或介層孔
726‧‧‧寬度
727‧‧‧深度
800‧‧‧流程圖
810‧‧‧步驟
820‧‧‧步驟
在隨附圖式中:
圖1根據一實施例顯示在基板上蝕刻薄膜之方法的示意圖;
圖2根據一實施例提供說明蝕刻基板之方法的流程圖;
圖3顯示使用圖1及2中描繪之蝕刻方法所獲得的結果;
圖4及5顯示使用圖1及2中描繪之蝕刻方法所獲得的額外結果;
圖6A至6D根據若干實施例顯示可對其應用圖1及2中所描繪之蝕刻方法之各種範例製造程序;
圖7A及7B根據另一實施例顯示在基板上蝕刻薄膜之方法的示意圖;
圖8根據又另一實施例提供顯示蝕刻基板之方法的流程圖;以及
圖9A至9D根據各種實施例提供用於執行蝕刻的方法之電漿處理系統的示意圖。
Claims (20)
- 一種蝕刻的方法,包含: 提供具有包含矽氮化物的第一材料及不同於該第一材料之第二材料的一基板; 藉由電漿激發包含H及選用性地包含一惰性氣體之第一處理氣體以形成第一化學混合物; 將該基板上的該第一材料暴露於該第一化學混合物; 其後,藉由電漿激發包含S、F及選用性地包含一惰性元素之第二處理氣體以形成第二化學混合物;以及 將該基板上的該第一材料暴露於經電漿激發的該第二處理氣體,以相對於該第二材料而選擇性地蝕刻該第一材料。
- 如申請專利範圍第1項之蝕刻的方法,其中該第一處理氣體包含H2 。
- 如申請專利範圍第1項之蝕刻的方法,其中該第一處理氣體由H2 所組成。
- 如申請專利範圍第1項之蝕刻的方法,其中該第一處理氣體由H2 及Ar所組成。
- 如申請專利範圍第1項之蝕刻的方法,其中該第二處理氣體包含SF6 及Ar。
- 如申請專利範圍第1項之蝕刻的方法,其中該第二處理氣體由SF6 及Ar所組成。
- 如申請專利範圍第1項之蝕刻的方法,其中該第一化學混合物包含氫離子。
- 如申請專利範圍第1項之蝕刻的方法,其中該第二化學混合物包含實質上電中性物種。
- 如申請專利範圍第1項之蝕刻的方法,其中該第二材料係選自由SiO2 及有機材料所組成之群組。
- 如申請專利範圍第1項之蝕刻的方法,其中該第一材料包含在該基板上之凸起特徵部,該第二材料在該等凸起特徵部之垂直部分上形成側壁間隙壁,且其中該暴露步驟移除該第一材料之該等凸起特徵部而不移除該等側壁間隙壁。
- 如申請專利範圍第1項之蝕刻的方法,其中該第一處理氣體或該第二處理氣體的該電漿激發包含利用含有一上板電極及支撐該基板之一下板電極的一電容耦合電漿源以產生電漿。
- 如申請專利範圍第1項之蝕刻的方法,其中該第一處理氣體或該第二處理氣體的該電漿激發包含利用含有一感應元件及支撐該基板之一下板電極的一感應耦合電漿源以產生電漿。
- 如申請專利範圍第1項之蝕刻的方法,其中該第一處理氣體或該第二處理氣體的該電漿激發包含利用產生一高自由基對離子通量之比率的一遠程電漿源以產生電漿。
- 如申請專利範圍第1項之蝕刻的方法,更包含: 重複形成該第一化學混合物、將該第一材料暴露於該第一化學混合物、形成該第二化學混合物、以及將該第一材料暴露於該第二化學混合物的步驟,以逐量地移除該第一材料的額外部分。
- 如申請專利範圍第1項之蝕刻的方法,其中以相對於該第二材料之大於100比1的蝕刻選擇性移除該第一材料。
- 如申請專利範圍第1項之蝕刻的方法,其中該第一材料係保形地塗佈在一閘極結構上之間隔層的一部分。
- 如申請專利範圍第1項之蝕刻的方法,其中該第一材料係在一自對準多重圖案化(SAMP)處理中保形地塗佈在心軸上之間隔層的一部分。
- 如申請專利範圍第1項之蝕刻的方法,其中該第一材料係在一自對準多重圖案化(SAMP)處理中的心軸。
- 如申請專利範圍第1項之蝕刻的方法,其中該第一心軸係在一凸起特徵部上的一襯墊或在一凹入特徵部中的一襯墊。
- 一種蝕刻的方法,包含: 提供具有包含矽氮化物的第一材料及不同於該第一材料之第二材料的一基板; 藉由電漿激發包含H及選用性地包含一惰性氣體之第一處理氣體以形成第一化學混合物; 將該基板上的該第一材料暴露於該第一化學混合物; 其後,藉由電漿激發包含高氟含量分子及選用性地包含一惰性元素之第二處理氣體以形成第二化學混合物,其中該高氟含量分子的氟對其他原子元素之比率超過一;以及 將該基板上的該第一材料暴露於經電漿激發的該第二處理氣體,以相對於該第二材料而選擇性地蝕刻該第一材料。
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US10373828B2 (en) | 2016-05-29 | 2019-08-06 | Tokyo Electron Limited | Method of sidewall image transfer |
FR3052911B1 (fr) | 2016-06-20 | 2018-10-12 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede de formation des espaceurs d'une grille d'un transistor |
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2018
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- 2018-02-23 WO PCT/US2018/019551 patent/WO2018156975A1/en active Application Filing
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US10431470B2 (en) | 2019-10-01 |
TWI756367B (zh) | 2022-03-01 |
KR20190112821A (ko) | 2019-10-07 |
WO2018156975A1 (en) | 2018-08-30 |
KR102537097B1 (ko) | 2023-05-25 |
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