TW201812880A - Wafer processing method capable of performing plasma etching without decreasing quality of devices - Google Patents
Wafer processing method capable of performing plasma etching without decreasing quality of devices Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
- H01L21/02052—Wet cleaning only
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/02307—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a liquid
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
Abstract
Description
發明領域 本發明是有關於一種藉由所謂的電漿蝕刻來將晶圓分割成一個個的器件之晶圓的加工方法。FIELD OF THE INVENTION The present invention relates to a method of processing a wafer by dividing a wafer into individual devices by so-called plasma etching.
發明背景 被分割預定線所區劃而在半導體基板的正面形成有IC、LSI等複數個器件之晶圓，是藉由切割裝置、雷射加工裝置等而被分割成一個個的器件，且利用於行動電話、個人電腦等電氣機器上。BACKGROUND OF THE INVENTION A wafer that is divided by a predetermined division line and has a plurality of devices such as ICs and LSIs formed on the front surface of a semiconductor substrate is divided into individual devices by a dicing device, a laser processing device, and the like, and is used in On electrical equipment such as mobile phones and personal computers.
又，作為使器件的抗折強度提升，並且能一次將晶圓分割成一個個的器件之生產性良好的分割方法，已提出的有一種電漿蝕刻的技術之方案(參照例如專利文獻1)。 先前技術文獻 專利文獻In addition, as a method for improving the flexural strength of a device, and capable of dividing a wafer into individual devices at a time, a method of plasma etching has been proposed (see, for example, Patent Document 1). . Prior Art Literature Patent Literature
專利文獻1：日本專利特開2002-093752號公報Patent Document 1: Japanese Patent Laid-Open No. 2002-093752
發明概要 發明欲解決之課題 根據記載於上述專利文獻1之電漿蝕刻的技術，雖然所期待的是生產效率變好，且被分割的器件之抗折強度變得良好，但在晶圓的正面將用於保護器件的抗蝕膜(resist film)形成為均勻的厚度的作法比較困難，且由於在實行電漿蝕刻時，該抗蝕膜也會稍微被蝕刻，因此當在抗蝕膜較薄的部分進行電漿蝕刻時，會有局部地露出器件，而使器件的品質降低的問題。又，在分割預定線上積層有包含TEG(test element group，測試元件群組)的金屬膜的情形下，也有電漿蝕刻被遮蔽而無法以電漿蝕刻進行分割的問題。SUMMARY OF THE INVENTION The problem to be solved by the invention is based on the plasma etching technique described in the above-mentioned Patent Document 1. Although the production efficiency is expected to be improved, and the flexural strength of the divided device is improved, it is on the front side of the wafer. It is difficult to form a resist film for protecting a device with a uniform thickness, and since the resist film is also slightly etched when plasma etching is performed, the resist film is thinner. When plasma etching is performed on a part, there is a problem that the device is partially exposed and the quality of the device is lowered. In addition, when a metal film including a TEG (test element group) is laminated on a predetermined division line, there is also a problem that plasma etching is blocked and division cannot be performed by plasma etching.
本發明是有鑒於上述事實而作成之發明，其主要的技術課題在於提供一種可以在不使器件的品質降低的情形下實行電漿蝕刻之晶圓的加工方法。 用以解決課題之手段The present invention has been made in view of the above-mentioned facts, and its main technical problem is to provide a method for processing a wafer capable of performing plasma etching without degrading the quality of a device. Means to solve the problem
為了解決上述之主要的技術課題，根據本發明可提供一種晶圓的加工方法，其為將晶圓分割成一個個的器件，該晶圓是將在正面積層有鈍化膜(passivation film)的器件以分割預定線區劃而在半導體基板的正面形成有複數個，該晶圓的加工方法至少是由下述步驟所構成： 保護膜形成步驟，在該晶圓的正面被覆液狀樹脂以形成保護膜； 半導體基板露出步驟，對分割預定線照射雷射光線，以去除積層於分割預定線的鈍化膜或金屬膜，使半導體基板沿著分割預定線露出； 保護膜去除步驟，從該晶圓的正面去除該保護膜；及 分割步驟，以覆蓋該器件的鈍化膜作為遮蔽膜，且將已於分割預定線露出的半導體基板藉由電漿蝕刻進行分割。In order to solve the above-mentioned main technical problems, a method for processing a wafer may be provided according to the present invention. The method is to divide a wafer into individual devices. The wafer is a device having a passivation film in a positive area. A plurality of lines are formed on the front surface of the semiconductor substrate by dividing predetermined line divisions. The processing method of the wafer is composed of at least the following steps: a protective film forming step, in which a liquid resin is coated on the front surface of the wafer to form a protective film A step of exposing the semiconductor substrate, irradiating laser light on the predetermined division line to remove a passivation film or a metal film laminated on the predetermined division line, so that the semiconductor substrate is exposed along the predetermined division line; a protective film removal step, from the front side of the wafer Removing the protective film; and a dividing step, using the passivation film covering the device as a shielding film, and dividing the semiconductor substrate that has been exposed at a predetermined division line by plasma etching.
較理想的是，在該保護膜形成步驟中將使用的液狀樹脂設為水溶性樹脂，且在該保護膜去除步驟中，以水去除保護膜。又，可以將該鈍化膜藉由SiO2 膜、Si3 N4 膜、聚醯亞胺(polyimide)膜中之任一種來形成，且半導體基板是矽基板，並將在電漿蝕刻中使用的氣體設為氟系氣體，來實施上述晶圓的加工方法。 發明效果Preferably, the liquid resin used in the protective film forming step is a water-soluble resin, and in the protective film removing step, the protective film is removed with water. The passivation film may be formed of any one of a SiO 2 film, a Si 3 N 4 film, and a polyimide film, and the semiconductor substrate is a silicon substrate, and is used for plasma etching. The gas is a fluorine-based gas, and the wafer processing method is performed. Invention effect
本發明之晶圓的加工方法，是將晶圓分割成一個個器件，該晶圓是將在正面積層有鈍化膜的器件以分割預定線區劃而在半導體基板的正面形成有複數個，該晶圓的加工方法至少由下述步驟所構成： 保護膜形成步驟，在該晶圓的正面被覆液狀樹脂以形成保護膜； 半導體基板露出步驟，對分割預定線照射雷射光線，以去除積層於分割預定線的鈍化膜或金屬膜，使半導體基板沿著分割預定線露出； 保護膜去除步驟，從該晶圓的正面去除該保護膜；及 分割步驟，以覆蓋該器件的鈍化膜作為遮蔽膜，且藉由電漿蝕刻對已於分割預定線露出的半導體基板進行分割， 藉此，在變得必須對正面積層有鈍化膜的晶圓實行電漿蝕刻的情形下之使半導體基板沿著分割預定線露出的步驟中，即使由於雷射光線的照射而發生的加工屑、所謂的碎屑，朝外部飛散，也能藉由具有該保護膜而不會有附著於器件的正面之情形，且可防止使器件的品質降低之情形。The processing method of the wafer of the present invention is to divide the wafer into individual devices. The wafer is a device in which a passivation film is layered on a positive area to divide a predetermined line to form a plurality of lines on the front surface of a semiconductor substrate. The method for processing a circle is composed of at least the following steps: a protective film forming step, in which a liquid resin is coated on the front surface of the wafer to form a protective film; a semiconductor substrate exposing step, irradiating laser light onto a predetermined division line to remove the build-up layer Dividing a passivation film or metal film of a predetermined line to expose the semiconductor substrate along the predetermined dividing line; a protective film removing step of removing the protective film from the front side of the wafer; and a dividing step of using a passivation film covering the device as a shielding film Furthermore, the semiconductor substrate that has been exposed at the predetermined division line is divided by plasma etching, whereby the semiconductor substrate is divided along the division in the case where it becomes necessary to perform plasma etching on a wafer having a passivation film in a positive area. In the step in which the planned line is exposed, even if machining chips and so-called chips generated by the irradiation of laser light are scattered to the outside, There the protective film is attached to the case without the front of the device, and preventing the reduction of the case so that the quality of the device.
又，實行電漿蝕刻時，由於是將已積層於器件的正面的鈍化膜作為電漿蝕刻時的遮蔽膜來利用，因此毋需形成要均勻地塗佈會比較困難之抗蝕膜(1~5μm)，也可抑制以該抗蝕膜作為遮蔽膜來實施電漿蝕刻時的品質的降低。In addition, when performing plasma etching, since the passivation film laminated on the front surface of the device is used as a shielding film during plasma etching, it is not necessary to form a resist film (1 ~ 5 μm), it is also possible to suppress a reduction in quality when plasma etching is performed using this resist film as a shielding film.
用以實施發明之形態 以下，針對本發明的晶圓的加工方法的較佳實施形態，參照附加圖式以詳細地說明。Embodiments for Carrying Out the Invention Hereinafter, preferred embodiments of the wafer processing method of the present invention will be described in detail with reference to the attached drawings.
如圖1所示，在本實施形態中被加工之晶圓10，是由半導體基板(矽基板)10a、與器件14所形成，該器件14是形成在該半導體基板10a的正面側之藉由複數條分割預定線12所區劃出的區域中，此外，如圖1(a)中以局部放大截面圖所示，是在形成有該器件14之正面側的全域中形成有鈍化膜16(例如，二氧化矽膜(SiO2 ))，該鈍化膜16具有可從來自外部的污染與不純物等的進入中保護器件14的作用。該鈍化膜16是以電漿CVD法來積層之情形是已知的，在此省略其詳細內容。再者，作為藉由依據本發明之晶圓的加工方法而被加工的晶圓，並不一定限定於圖1(a)所示的晶圓，也可以將例如在分割預定線12上並未形成鈍化膜，而是形成有包含TEG(test element group，測試元件群組)的金屬膜18之晶圓作為對象(參照圖1(b))。As shown in FIG. 1, the wafer 10 to be processed in this embodiment is formed by a semiconductor substrate (silicon substrate) 10a and a device 14, which is formed on the front side of the semiconductor substrate 10a. In the area defined by the plurality of predetermined division lines 12, as shown in a partially enlarged sectional view in FIG. 1 (a), a passivation film 16 (for example, , A silicon dioxide film (SiO 2 )), and the passivation film 16 has a function of protecting the device 14 from external pollution and entry of impurities. It is known that the passivation film 16 is laminated by a plasma CVD method, and the details are omitted here. The wafer processed by the method for processing a wafer according to the present invention is not necessarily limited to the wafer shown in FIG. 1 (a). A passivation film is formed, and a wafer including a TEG (test element group) metal film 18 is formed as an object (see FIG. 1 (b)).
於圖1、2中顯示有保護膜形成裝置20的一部分(省略全體圖)，且顯示有構成該保護膜形成裝置20的一部分之保持機構22。該保持機構22的吸附夾頭24是由具有通氣性的多孔陶瓷所形成，且連接於圖未示的吸引機構，並藉由使該吸引機構作動而構成為可吸引保持被載置的被加工物。A part of the protective film forming apparatus 20 is shown in FIGS. 1 and 2 (the entire figure is omitted), and a holding mechanism 22 constituting a part of the protective film forming apparatus 20 is shown. The suction chuck 24 of the holding mechanism 22 is formed of a porous ceramic having air permeability, and is connected to a suction mechanism (not shown). The suction mechanism is configured to attract and hold a workpiece to be placed by operating the suction mechanism Thing.
準備了上述的晶圓10後，實施保護膜形成步驟。更具體而言，首先，是在該保持機構22上載置且吸引保持晶圓10。然後，將噴射液體樹脂(例如聚乙烯醇(polyvinyl alcohol，PVA))的噴射噴嘴26定位到已被載置於保持機構22上之晶圓10的上方，且以100rpm的旋轉速度使保持機構22旋轉，並且從在概要截面圖所示的噴射噴嘴26中噴射液體樹脂。作為噴射噴嘴26，如圖所示，是一邊在前端部將流通於噴射噴嘴26之本體中央的流通路之液狀樹脂混入到從外周側供給的壓縮空氣中，一邊從噴嘴前端部以霧狀形式進行噴射。再者，在圖2中，雖然是極為簡化而顯示噴射噴嘴26，但可以採用一般所知的氣刷(air brush)等之構成。After the wafer 10 is prepared, a protective film forming step is performed. More specifically, first, the holding mechanism 22 is placed on the holding mechanism 22 to attract and hold the wafer 10. Then, the spray nozzle 26 that sprays a liquid resin (for example, polyvinyl alcohol (PVA)) is positioned above the wafer 10 that has been placed on the holding mechanism 22, and the holding mechanism 22 is caused to rotate at a rotation speed of 100 rpm. The liquid resin is rotated and ejected from the ejection nozzle 26 shown in the schematic sectional view. As the spray nozzle 26, as shown in the figure, the liquid resin flowing through the flow path in the center of the main body of the spray nozzle 26 is mixed into the compressed air supplied from the outer peripheral side at the front end portion, while the spray nozzle 26 is mist-shaped Spraying. In addition, although the spray nozzle 26 is shown in FIG. 2 as being extremely simplified, it is possible to adopt a generally known configuration such as an air brush.
對晶圓10噴射了預定量的液狀樹脂後，停止來自噴射噴嘴26的噴射，且使保持了晶圓10的保持機構22移動到紫外線照射器28的正下方。使保持機構22移動到紫外線照射器28的正下方後，從紫外線照射器28照射紫外線，以使該液狀樹脂硬化，且形成具有約5μm的厚度之保護膜21。再者，在本實施形態中，雖然作為水溶性的紫外線硬化型樹脂而採用了聚乙烯醇(PVA)，但本發明並不受限於此，作為藉由照射紫外線而硬化的液狀樹脂，可以使用水溶性酚醛樹脂、丙烯酸系水溶性樹脂等之水溶性樹脂。After a predetermined amount of the liquid resin is sprayed on the wafer 10, the spraying from the spray nozzle 26 is stopped, and the holding mechanism 22 holding the wafer 10 is moved directly below the ultraviolet irradiator 28. After the holding mechanism 22 is moved directly below the ultraviolet irradiator 28, ultraviolet rays are irradiated from the ultraviolet irradiator 28 to harden the liquid resin, and a protective film 21 having a thickness of about 5 μm is formed. In this embodiment, although polyvinyl alcohol (PVA) is used as the water-soluble ultraviolet curable resin, the present invention is not limited to this. As a liquid resin that is cured by irradiating ultraviolet rays, Water-soluble resins such as water-soluble phenol resins and acrylic water-soluble resins can be used.
實施該保護膜形成步驟後，藉由圖3所示的雷射加工裝置30(僅顯示局部而省略全體圖)實施半導體基板露出步驟，其為使半導體基板10a沿著分割預定線12露出。將上述晶圓10之形成有保護膜21之正面側設成朝向上方來載置並吸引保持在該雷射加工裝置30的圖未示之保持台上。並且，藉由雷射光線照射機構32以至少去除形成於分割預定線之鈍化膜16、或構成TEG之金屬膜18的可能的加工條件，更具體而言是照射對於構成鈍化膜16、或金屬膜18的材料具有吸收性之波長的雷射光線LB，並且使晶圓10在箭頭X所示的方向上相對地移動，來沿著分割預定線12施行所謂的燒蝕加工，以去除該保護膜21、鈍化膜16或金屬膜18，使半導體基板10a露出。保持晶圓10之圖未示的保持台是構成為也可適當在Y方向、旋轉方向上移動，且藉由使其對雷射光線照射機構32相對移動，以對所有的分割預定線12都施行該雷射加工，而成為沿著全部的分割預定線12露出半導體基板10a的狀態。在本實施形態中，由於是藉由上述之保護膜形成步驟來塗佈液狀樹脂並形成保護膜21，因此藉由該燒蝕加工而飛散的碎屑會由於保護膜21而不會有附著在器件的正面之情形，器件的品質即受到保護。After the protective film forming step is performed, a semiconductor substrate exposing step is performed by a laser processing device 30 (only a part is shown and the entire figure is omitted) shown in FIG. 3 so as to expose the semiconductor substrate 10 a along a predetermined division line 12. The front side of the wafer 10 on which the protective film 21 is formed is set to face upward to attract and hold it on a holding table (not shown) of the laser processing apparatus 30. In addition, possible processing conditions for removing at least the passivation film 16 formed on the predetermined division line or the metal film 18 constituting the TEG by the laser light irradiation mechanism 32 are more specifically irradiating the passivation film 16 or the metal constituting the passivation film 16. The material of the film 18 has an absorptive laser light LB, and the wafer 10 is relatively moved in the direction indicated by the arrow X to perform a so-called ablation process along the predetermined division line 12 to remove the protection The film 21, the passivation film 16, or the metal film 18 exposes the semiconductor substrate 10a. A holding table (not shown) that holds the wafer 10 is configured to be able to move in the Y direction and the rotation direction as appropriate, and relatively moves the laser light irradiation mechanism 32 so that all the division lines 12 are divided. This laser processing is performed, and the semiconductor substrate 10a is exposed along all the planned division lines 12. In this embodiment, since the liquid resin is applied and the protective film 21 is formed by the protective film forming step described above, the debris scattered by this ablation process is not attached by the protective film 21 On the front side of the device, the quality of the device is protected.
再者，例如本實施形態之雷射加工條件可設定成以下的形式。 波長 ：355nm 重複頻率 ：50kHz 平均輸出 ：2W 聚光光斑 ：φ30μm 進給速度 ：100mm/秒In addition, for example, the laser processing conditions of this embodiment can be set as follows. Wavelength: 355nm Repetition frequency: 50kHz Average output: 2W Spotlight spot: φ30μm Feed rate: 100mm / s
如上述地實施半導體基板露出步驟後，實施保護膜去除步驟，其為去除形成於晶圓10的正面之保護膜22。由於在本實施形態中所形成的保護膜22是水溶性樹脂，因此可以在配設於雷射加工裝置30的圖未示之洗淨區域中，對晶圓10的正面供給洗淨水，而容易地去除(參照圖4(a))。如此進行而去除保護膜22之晶圓10的概要截面圖顯示於圖4(b)。如圖所示，可將全部的保護膜21從晶圓10的正面去除，而形成沿著分割預定線12露出有半導體基板10a的半導體基板區域10b。再者，根據本發明，藉由在施行該雷射加工前於晶圓10的正面全體形成有保護膜21之作法，使照射雷射光線時飛散的碎屑不直接附著在器件13上，而是附著在保護膜21上。因此，藉由實行保護膜去除步驟，將飛散到晶圓10上的碎屑也與保護膜21一起去除，使晶圓10的正面成為乾淨的狀態，並藉由下一步驟的分割步驟(電漿蝕刻)成為合適的狀態。After the semiconductor substrate exposing step is performed as described above, a protective film removing step is performed to remove the protective film 22 formed on the front surface of the wafer 10. Since the protective film 22 formed in this embodiment is a water-soluble resin, it is possible to supply washing water to the front surface of the wafer 10 in a washing area (not shown) arranged in the laser processing apparatus 30, and Easily removed (see Fig. 4 (a)). A schematic cross-sectional view of the wafer 10 with the protective film 22 removed in this manner is shown in FIG. 4 (b). As shown in the figure, the entire protective film 21 can be removed from the front surface of the wafer 10 to form a semiconductor substrate region 10 b with the semiconductor substrate 10 a exposed along the planned division line 12. Furthermore, according to the present invention, by forming a protective film 21 on the entire front surface of the wafer 10 before the laser processing is performed, the debris scattered when the laser light is radiated is not directly attached to the device 13, and It is attached to the protective film 21. Therefore, by implementing the protective film removing step, the debris scattered on the wafer 10 is also removed together with the protective film 21, so that the front surface of the wafer 10 becomes a clean state, and the dividing step of the next step (electrical Slurry etching) into a suitable state.
實施上述之保護膜去除步驟後，實施分割步驟，其為進行用於將晶圓10分割成一個個的器件的電漿蝕刻。於所述的電漿蝕刻中，可以使用例如於圖5簡化而顯示之電漿蝕刻裝置40。此電漿蝕刻裝置40具備供給氟系氣體的氣體供給部41，且具備有在內部進行蝕刻處理的腔室42。可從氣體供給部41在該腔室42內供給例如SF6 、C4 F8 ，作為氟系氣體。After performing the protective film removal step described above, a dicing step is performed, which is a plasma etching for dicing the wafer 10 into individual devices. In the plasma etching, for example, a plasma etching apparatus 40 which is simplified and shown in FIG. 5 can be used. This plasma etching apparatus 40 includes a gas supply unit 41 that supplies a fluorine-based gas, and includes a chamber 42 that performs an etching process inside. As the fluorine-based gas, for example, SF 6 and C 4 F 8 can be supplied from the gas supply unit 41 into the chamber 42.
如圖所示，在進行電漿蝕刻的腔室42的上部側，配設有連接於氣體供給部41的蝕刻氣體供給機構43，且於下部側配設有保持會被蝕刻之作為被加工物的晶圓10的工作夾台44。As shown in the figure, an etching gas supply mechanism 43 connected to the gas supply unit 41 is disposed on the upper side of the chamber 42 where plasma etching is performed, and a workpiece to be etched is disposed on the lower side. Work table 44 of the wafer 10.
蝕刻氣體供給機構43在內部具備有氣體流通路徑43a，且具有透過以多孔構件所形成的下表面43b來向保持於工作夾台44的晶圓10的露出面側(形成有器件14之側)供給蝕刻氣體的功能。再者，蝕刻氣體供給機構43是在腔室42內部藉由圖未示的移動機構而被驅動並朝上下升降自如地被構成。The etching gas supply mechanism 43 is provided with a gas flow path 43a inside, and has a lower surface 43b formed by a porous member to supply to the exposed surface side (side where the device 14 is formed) of the wafer 10 held on the stage 44. Function of etching gas. It should be noted that the etching gas supply mechanism 43 is configured to be driven upward and downward in the chamber 42 by a movement mechanism (not shown).
另一方面，工作夾台44是藉由腔室42可旋動地支撐其軸部，並將圖未示的吸引源透過吸引路徑44a連接到構成為具有通氣性之上表面44b。腔室42的底部具備有連接於圖未示的氣體排出部之排氣口45，排氣口45會發揮對腔室內進行減壓、或將使用過的蝕刻氣體排出的功能。又，於蝕刻氣體供給機構43、工作夾台44連接有高頻電源46，而可以供給高頻電壓，並將腔室42內的蝕刻氣體電漿化。本實施形態中的電漿蝕刻裝置40是如以上概要構成，以下說明關於藉由電漿蝕刻裝置40實行的分割步驟。On the other hand, the work clamp table 44 rotatably supports its shaft portion by the chamber 42 and connects a suction source (not shown) to the upper surface 44b configured to have air permeability through the suction path 44a. The bottom of the chamber 42 is provided with an exhaust port 45 connected to a gas exhaust portion (not shown). The exhaust port 45 functions to reduce the pressure in the chamber or exhaust used etching gas. Further, a high-frequency power source 46 is connected to the etching gas supply mechanism 43 and the work table 44 so that a high-frequency voltage can be supplied and the etching gas in the chamber 42 is plasmatized. The plasma etching apparatus 40 in this embodiment is configured as described above. The following describes the division steps performed by the plasma etching apparatus 40.
首先，透過具有黏著性及可撓性的保護膠帶T，將已實施保護膜去除步驟的晶圓10保持在框架F上。該晶圓10是從圖未示的腔室42的搬入搬出口搬入到腔室42內。將已搬入腔室42內的晶圓10以形成有蝕刻加工中作為遮蔽膜而發揮功能之鈍化膜16的正面側朝上方來載置且吸引固定在工作夾台44上。將晶圓10載置在工作夾台44上後，並將腔室42設成密閉空間後，將內部空氣排氣以進行減壓。First, the wafer 10 on which the protective film removal step has been performed is held on the frame F by a protective tape T having adhesiveness and flexibility. The wafer 10 is transferred into the chamber 42 from a loading / unloading port of a chamber 42 (not shown). The wafer 10 that has been carried into the chamber 42 is placed on the work clamp table 44 with the front side of the passivation film 16 that functions as a shielding film during the etching process being formed facing upward, and is suction-fixed. After the wafer 10 is placed on the work table 44 and the chamber 42 is set as a closed space, the internal air is exhausted to reduce the pressure.
已將腔室42內減壓後，藉由圖未示的移動機構一邊使蝕刻氣體供給機構43下降來調整與晶圓10的距離，一邊從氣體供給部41透過蝕刻氣體供給機構43使蝕刻氣體(SF6 )朝腔室42內噴出，並且使高頻電源46作動以將高頻電壓施加在蝕刻氣體供給機構43與工作夾台44之間，以使已供給到腔室42內的蝕刻氣體(SF6 )電漿化。然後，藉由電漿的蝕刻效果將晶圓10的正面之中，已去除鈍化膜16(或金屬膜18)之半導體基板露出區域10b的底部進行預定時間蝕刻。如此進行而將半導體露出區域10b的底部削除預定量後，接著將從氣體供給部41供給的蝕刻氣體切換成作為另一個蝕刻氣體的C4 F8 ，且使高頻電源作動以使所供給的氣體電漿化。藉此，可在半導體基板露出區域10b的側壁形成保護膜。其後，同樣進行，並一邊反覆進行SF6 、C4 F8 的供給，一邊使其進行蝕刻。藉由如此進行而實行蝕刻10~15分鐘，可實行如在圖5(b)以概要截面圖所示的異方性蝕刻，且可形成向下方垂直地延伸之良好的分割溝10c。然後，藉由僅蝕刻相當於半導體基板10a的厚度量，可將晶圓10分割成一個個的器件14，而完成分割步驟。再者，一般而言該電漿蝕刻方法是作為波希法(Bosch Process)而廣為周知，圖所示的蝕刻裝置是概要圖，其他的構成已被省略。After the pressure in the chamber 42 has been reduced, the etching gas supply mechanism 43 is lowered by a moving mechanism (not shown) to adjust the distance from the wafer 10, and the etching gas is passed through the etching gas supply mechanism 43 from the gas supply unit 41 to cause the etching gas (SF 6 ) is ejected into the chamber 42, and the high-frequency power source 46 is operated to apply a high-frequency voltage between the etching gas supply mechanism 43 and the work table 44 so that the etching gas that has been supplied into the chamber 42 (SF 6 ) Plasmaization. Then, the bottom of the exposed region 10b of the semiconductor substrate from which the passivation film 16 (or the metal film 18) has been removed from the front surface of the wafer 10 is etched for a predetermined time by the plasma etching effect. After cutting the bottom of the semiconductor exposed region 10b by a predetermined amount in this manner, the etching gas supplied from the gas supply unit 41 is switched to C 4 F 8 as another etching gas, and the high-frequency power supply is operated to cause the supplied Gas plasma. Thereby, a protective film can be formed on a sidewall of the semiconductor substrate exposed region 10b. After that, the same was performed, and the SF 6 and C 4 F 8 were repeatedly supplied while being etched. By performing the etching for 10 to 15 minutes in this way, anisotropic etching can be performed as shown in a schematic cross-sectional view in FIG. 5 (b), and a good divided trench 10c extending vertically downward can be formed. Then, by etching only the thickness corresponding to the semiconductor substrate 10a, the wafer 10 can be divided into individual devices 14 to complete the dividing step. In addition, this plasma etching method is generally known as a Bosch process. The etching apparatus shown in the figure is a schematic diagram, and other configurations have been omitted.
藉由該分割步驟沿著全部的分割預定線12形成分割溝10c後，將保持該晶圓10的框架F移送到圖未示的拾取步驟。然後，利用將保護膠帶T朝半徑方向擴張的擴張機構，變得可將該保護膠帶擴張，而可容易地對已分割成一個個的器件14進行拾取。After the dividing grooves 10 c are formed along all the dividing lines 12 by this dividing step, the frame F holding the wafer 10 is transferred to a picking step (not shown). Then, by using an expansion mechanism that expands the protective tape T in the radial direction, the protective tape can be expanded, and the divided devices 14 can be easily picked up.
根據本發明之晶圓的加工方法，雖然可如上述實施形態地實施，但本發明並非受限於此之發明。在本實施形態中，雖然作為半導體基板的材料而採用了矽，但並不受限於此，可以採用砷化鎵(GaAs)等其他的半導體基板。又，雖然作為朝晶圓10的正面側噴射而成為保護膜的液狀樹脂，採用了可藉由水容易地去除的水溶性樹脂，但並不受限於此，也可採用其他的液狀樹脂，亦可為例如可藉由特定的藥劑去除的液狀樹脂。Although the wafer processing method according to the present invention can be implemented as described above, the present invention is not limited to the invention. In this embodiment, although silicon is used as the material of the semiconductor substrate, it is not limited to this, and other semiconductor substrates such as gallium arsenide (GaAs) may be used. In addition, although a water-soluble resin that can be easily removed by water is used as the liquid resin that is sprayed toward the front side of the wafer 10 to form a protective film, it is not limited to this, and other liquids may be used. The resin may be, for example, a liquid resin that can be removed by a specific chemical.
又，關於本實施形態方面，雖然作為鈍化膜16而採用了二氧化矽(SiO2 )膜，但並不受限於此，可以選擇聚醯亞胺膜、氮化矽膜(Si3 N4 )。此外，在本實施形態的電漿蝕刻中，雖然藉由作為交互地供給SF6 、C4 F8 之所謂的波希法而已知的蝕刻方法來實行分割步驟，但並不受限於此，也可以採用一般所熟知的其他的電漿蝕刻法。實行電漿蝕刻時，宜選擇會成為異方性蝕刻的蝕刻條件，且可以考慮：半導體基板10a的厚度(例如，200~300μm)、與作為遮蔽膜來發揮功能之作為鈍化膜16的構件而被選擇的膜材之蝕刻速率的比(例如，Si：SiO2 膜＝700：1、Si：聚醯亞胺(polyimide)膜、Si：氮化矽膜(Si3 N4 )＝100：1等)，來選擇到分割半導體基板10a之前作為遮蔽膜而發揮功能之鈍化膜厚度(例如1~5μm)，而適當調整蝕刻條件。再者，關於電漿蝕刻由於已是眾所周知的技術，因此在此省略更多的詳細說明。In this embodiment, although a silicon dioxide (SiO 2 ) film is used as the passivation film 16, the invention is not limited to this, and a polyimide film or a silicon nitride film (Si 3 N 4 ). In addition, in the plasma etching of the present embodiment, the dividing step is performed by an etching method known as a so-called Bosch method of supplying SF 6 and C 4 F 8 alternately, but it is not limited to this. Other generally known plasma etching methods can also be used. When performing plasma etching, it is desirable to select an etching condition that will be anisotropic etching. The thickness of the semiconductor substrate 10a (for example, 200 to 300 μm) and the member that functions as a masking film as the passivation film 16 may be considered. Ratio of etching rate of selected film material (for example, Si: SiO 2 film = 700: 1, Si: polyimide film, Si: silicon nitride film (Si 3 N 4 ) = 100: 1 Etc.), the thickness of the passivation film (for example, 1 to 5 μm) that functions as a shielding film before the semiconductor substrate 10 a is divided is selected, and the etching conditions are appropriately adjusted. In addition, since plasma etching is a well-known technique, more detailed description is omitted here.
10‧‧‧晶圓10‧‧‧ wafer
10a‧‧‧半導體基板10a‧‧‧ semiconductor substrate
10b‧‧‧半導體基板區域10b‧‧‧Semiconductor substrate area
10c‧‧‧分割溝10c‧‧‧ divided trench
12‧‧‧分割預定線12‧‧‧ divided scheduled line
14‧‧‧器件14‧‧‧device
16‧‧‧鈍化膜16‧‧‧ passivation film
18‧‧‧金屬膜18‧‧‧ metal film
20‧‧‧保護膜形成裝置20‧‧‧ protective film forming device
21‧‧‧保護膜21‧‧‧ protective film
22‧‧‧保持機構22‧‧‧ holding agency
26‧‧‧噴射噴嘴26‧‧‧jet nozzle
28‧‧‧紫外線照射器28‧‧‧ UV Irradiator
30‧‧‧雷射加工裝置30‧‧‧laser processing equipment
32‧‧‧雷射光線照射機構32‧‧‧laser light irradiation mechanism
40‧‧‧電漿蝕刻裝置40‧‧‧ Plasma Etching Device
41‧‧‧氣體供給部41‧‧‧Gas Supply Department
42‧‧‧腔室42‧‧‧ chamber
43‧‧‧蝕刻氣體供給機構43‧‧‧Etching gas supply mechanism
43a‧‧‧氣體流通路徑43a‧‧‧Gas circulation path
43b‧‧‧下表面43b‧‧‧ lower surface
44‧‧‧工作夾台44‧‧‧Working table
44a‧‧‧吸引路徑44a‧‧‧Attraction path
44b‧‧‧上表面44b‧‧‧ Top surface
45‧‧‧排氣口45‧‧‧ exhaust port
46‧‧‧高頻電源46‧‧‧High Frequency Power
F‧‧‧框架F‧‧‧Frame
LB‧‧‧雷射光線LB‧‧‧Laser Ray
T‧‧‧保護膠帶T‧‧‧protective tape
X、Y‧‧‧方向X, Y‧‧‧ directions
圖1(a)、(b)是說明在本發明的晶圓的加工方法中被加工之晶圓的說明圖。 圖2(a)、(b)是用於說明在本發明的晶圓的加工方法中所實施之保護膜形成步驟的說明圖。 圖3是用於說明在本發明的晶圓的加工方法中的半導體基板露出步驟的說明圖。 圖4(a)、(b)是用於說明在本發明中的保護膜去除步驟的說明圖。 圖5(a)、(b)是用於說明實施本發明中的分割步驟用的電漿蝕刻裝置的概要之說明圖。1 (a) and 1 (b) are explanatory diagrams illustrating a wafer to be processed in the wafer processing method of the present invention. FIGS. 2 (a) and 2 (b) are explanatory diagrams for explaining a protective film forming step performed in the wafer processing method of the present invention. FIG. 3 is an explanatory diagram for explaining a semiconductor substrate exposure step in the method of processing a wafer of the present invention. 4 (a) and 4 (b) are explanatory diagrams for explaining a protective film removing step in the present invention. 5 (a) and 5 (b) are explanatory diagrams for explaining an outline of a plasma etching apparatus for performing a dividing step in the present invention.
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2016
- 2016-07-04 JP JP2016132228A patent/JP2018006587A/en active Pending
-
2017
- 2017-06-01 TW TW106118067A patent/TW201812880A/en unknown
- 2017-06-23 KR KR1020170079897A patent/KR20180004660A/en not_active Application Discontinuation
- 2017-06-28 CN CN201710504880.XA patent/CN107579042A/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| KR20180004660A (en) | 2018-01-12 |
| CN107579042A (en) | 2018-01-12 |
| JP2018006587A (en) | 2018-01-11 |
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