TW201810634A - Optical component package structure - Google Patents
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- TW201810634A TW201810634A TW106120055A TW106120055A TW201810634A TW 201810634 A TW201810634 A TW 201810634A TW 106120055 A TW106120055 A TW 106120055A TW 106120055 A TW106120055 A TW 106120055A TW 201810634 A TW201810634 A TW 201810634A
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- 230000004888 barrier function Effects 0.000 claims abstract description 66
- 238000004806 packaging method and process Methods 0.000 claims description 74
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electromagnetism (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Light Receiving Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
本案有關於一種光學元件封裝結構,尤指一種具有較佳可靠度及較小封裝尺寸的光學元件封裝結構。 This case relates to an optical component packaging structure, especially an optical component packaging structure with better reliability and smaller packaging size.
圖1為習知影像感測器封裝結構10的側面剖視圖,其中,影像感測晶片12固定在基板11上,並透過打線13及基板11內的通孔14電性連接至外部線路(未繪示),影像感測晶片12的周圍設有阻隔結構15,透光板16放置在阻隔結構15上,使得影像感測晶片12位於基板11、阻隔結構15及透光板16圍成的容置空間內,最外層的封膠體17則包覆固定基板11、阻隔結構15及透光板16。 1 is a side cross-sectional view of a conventional image sensor package structure 10, in which the image sensor chip 12 is fixed on a substrate 11 and is electrically connected to an external circuit through a bonding wire 13 and a through hole 14 in the substrate 11 (not shown) (Showing), a barrier structure 15 is provided around the image sensing chip 12, and the light-transmitting plate 16 is placed on the barrier structure 15, so that the image sensing chip 12 is located in the housing surrounded by the substrate 11, the barrier structure 15 and the light-transmitting plate 16 In the space, the outermost encapsulant 17 covers the fixed substrate 11, the barrier structure 15 and the light-transmitting plate 16.
當環境或測試條件嚴峻時,例如其條件涉及高溫或高濕度環境,從通孔14進入的水氣如果在影像感測晶片12的感測面或透光板16的下表面凝結成小水珠,將嚴重影響影像感測晶片12擷取影像的品質,滲入的濕氣也會影響封裝內部的電氣性能,因此整個光學元件品質及可靠度皆產生大幅下降,往往不合產品規格或是長期正常使用之需求。 When the environment or test conditions are severe, for example, the conditions involve high-temperature or high-humidity environments, if water vapor entering from the through holes 14 condenses into small water droplets on the sensing surface of the image sensing wafer 12 or the lower surface of the translucent plate 16 , Which will seriously affect the quality of the image captured by the image sensor chip 12, and the infiltrated moisture will also affect the electrical performance inside the package, so the quality and reliability of the entire optical component are greatly reduced, often not conforming to product specifications or long-term normal use Demand.
另一方面,習知影像感測器封裝結構10之封裝尺寸往往過於龐大,不但生產材料之耗用成本無法下降,製造工具的使用耗 損及維護成本也甚為龐大。 On the other hand, the package size of the conventional image sensor packaging structure 10 is often too large, not only the cost of production materials cannot be reduced, but the consumption of manufacturing tools Damage and maintenance costs are also huge.
再者,習知影像感測器封裝結構10的封膠體17包覆到透光板16的上表面,容易於製程中汙染透光板16,影響影像感測器封裝結構10之功能的正常使用。 Furthermore, the sealant 17 of the conventional image sensor packaging structure 10 is coated on the upper surface of the light-transmitting plate 16, which is easy to contaminate the light-transmitting plate 16 during the manufacturing process and affect the normal use of the function of the image sensor packaging structure 10 .
因此,在不影響正常功能的條件下,提出一種小型化且具有高可靠度性能的光學元件封裝結構為發展本案之主要目的之一。 Therefore, it is one of the main objectives of the development of this case to propose a miniaturized optical element packaging structure with high reliability performance without affecting normal functions.
為了解決上述問題,本案提出一種小型化光學元件封裝結構,使用之封裝材料可減量,節省製造成本。 In order to solve the above-mentioned problems, this case proposes a miniaturized optical element packaging structure, the packaging material used can be reduced, and the manufacturing cost is saved.
為了解決上述問題,本案提出一種具較佳可靠度之光學元件封裝結構,可改善水氣進入光學元件封裝結構內影響內部光學元件的情況。 In order to solve the above-mentioned problems, this case proposes an optical element packaging structure with better reliability, which can improve the situation where water vapor enters the optical element packaging structure and affects the internal optical elements.
本案提供一種光學元件封裝結構,包括:一基板,具有相對的第一表面及第二表面;一阻隔結構,形成於該基板之該第一表面上,圍繞該基板上之一容置區域;一光學元件晶片,放置於該基板之該第一表面上並位於該容置區域內;一接合層,形成於該阻隔結構之部分上緣上方;一透光板,放置於該接合層上,完全覆蓋該接合層及該容置區域,該透光板之側緣超出該接合層之外緣,該透光板具有相對的第一表面及第二表面,該第二表面朝向該容置區域;以及一封膠體,完全覆蓋該透光板之該側緣及該接合層之該外緣,並部分覆蓋該透光板之該第二表面及該阻隔結構之該上緣。 The present case provides an optical component packaging structure, including: a substrate having opposing first and second surfaces; a barrier structure formed on the first surface of the substrate and surrounding a receiving area on the substrate; The optical element chip is placed on the first surface of the substrate and is located in the accommodating area; a bonding layer is formed above a part of the upper edge of the barrier structure; a light-transmitting plate is placed on the bonding layer, completely Covering the bonding layer and the containing area, the side edge of the light-transmitting plate exceeds the outer edge of the bonding layer, the light-transmitting plate has a first surface and a second surface opposite, the second surface faces the containing area; And a gel, completely covering the side edge of the light-transmitting plate and the outer edge of the bonding layer, and partially covering the second surface of the light-transmitting plate and the upper edge of the barrier structure.
於一實施例中,該封膠體之外緣與該阻隔結構之外緣對齊。 In one embodiment, the outer edge of the sealing body is aligned with the outer edge of the blocking structure.
於一實施例中,該封膠體更完全覆蓋該阻隔結構之外緣,並部分覆蓋該基板之該第一表面,該封膠體之外緣與該基板之側緣對齊。 In one embodiment, the sealant more completely covers the outer edge of the barrier structure and partially covers the first surface of the substrate. The outer edge of the sealant is aligned with the side edge of the substrate.
於一實施例中,該封膠體之上緣與該透光板之該第一表面之延伸平面呈一夾角,該夾角介於5度~60度之間。 In one embodiment, the upper edge of the sealing body and the extension plane of the first surface of the light-transmitting plate form an angle, and the angle is between 5 degrees and 60 degrees.
於一實施例中,更包括至少一打線,電性連接該光學元件晶片與一外部電路;至少一焊墊,與該至少一打線連接,該焊墊設置於該基板之該第一表面上或該阻隔結構之該上緣。 In one embodiment, it further includes at least one bonding wire electrically connecting the optical element chip and an external circuit; at least one bonding pad connected to the at least one bonding wire, the bonding pad is disposed on the first surface of the substrate or The upper edge of the barrier structure.
於一實施例中,該基板內具有複數個通孔,貫通該基板之該第一表面及該第二表面,該些通孔於該基板之該第一表面之開口係位於該光學元件晶片、該阻隔結構或該封膠體下方,該些開口與該光學元件晶片、該阻隔結構或該封膠體之間形成一保護膜。 In one embodiment, the substrate has a plurality of through holes penetrating the first surface and the second surface of the substrate, the openings of the through holes on the first surface of the substrate are located on the optical device chip, Below the blocking structure or the sealing compound, a protective film is formed between the openings and the optical element chip, the blocking structure or the sealing compound.
於一實施例中,該透光板具有一階梯狀側緣,該封膠體完全覆蓋該階梯狀側緣。 In one embodiment, the light-transmitting plate has a stepped side edge, and the sealant completely covers the stepped side edge.
本案提供一種光學元件封裝結構,包括:一基板,具有相對的第一表面及第二表面;一阻隔結構,形成於該基板之該第一表面上,圍繞該基板上之一容置區域;一光學元件晶片,放置於該基板之該第一表面上並位於該容置區域內;至少一打線,電性連接該光學元件晶片與一外部電路;一透光板,放置於該阻隔結構上,完全覆蓋該容置區域;以及一封膠體,完全覆蓋該透光板之側緣及該阻隔結構之外緣,其中,該基板內具有複數個通孔,貫穿該基板之該第一表面及該第二表面,該些通孔於該基板之該第一表面之開 口係位於該光學元件晶片、該阻隔結構或該封膠體下方,該些開口與該光學元件晶片、該阻隔結構或該封膠體之間形成一保護膜,該打線通過該通孔電性連接至該外部電路。 The present case provides an optical component packaging structure, including: a substrate having opposing first and second surfaces; a barrier structure formed on the first surface of the substrate and surrounding a receiving area on the substrate; An optical element chip is placed on the first surface of the substrate and is located in the accommodating area; at least one wire is electrically connected to the optical element chip and an external circuit; a light-transmitting plate is placed on the blocking structure, Completely covering the accommodating area; and an adhesive body completely covering the side edge of the transparent plate and the outer edge of the blocking structure, wherein the substrate has a plurality of through holes penetrating the first surface of the substrate and the The second surface, the through holes are opened in the first surface of the substrate The opening is located under the optical element chip, the blocking structure or the sealing compound, a protective film is formed between the openings and the optical element chip, the blocking structure or the sealing compound, and the bonding wire is electrically connected to the through hole The external circuit.
於一實施例中,該保護膜為一防焊漆。 In one embodiment, the protective film is a solder mask.
於一實施例中,該通孔內填塞入導電材料、防焊漆或樹脂。 In one embodiment, the through hole is filled with conductive material, solder resist or resin.
於一實施例中,更包括一接合層,位於該透光板與該阻隔結構之間,該透光板完全覆蓋該接合層且該透光板之側緣超出該接合層之外緣。 In one embodiment, it further includes a bonding layer between the light-transmitting plate and the blocking structure. The light-transmitting plate completely covers the bonding layer and the side edge of the light-transmitting plate exceeds the outer edge of the bonding layer.
10、20‧‧‧光學元件封裝結構 10.20‧‧‧Optical component packaging structure
11、21‧‧‧基板 11, 21‧‧‧ substrate
12、22‧‧‧光學元件晶片 12, 22‧‧‧Optical element chip
13、23、43‧‧‧打線 13, 23, 43‧‧‧‧
14、24‧‧‧通孔 14, 24‧‧‧Through hole
15、25‧‧‧阻隔結構 15, 25‧‧‧ blocking structure
16、26、26’‧‧‧透光版 16, 26, 26’‧‧‧ Translucent
17、27、27’、57‧‧‧封膠體 17, 27, 27 ’, 57‧‧‧ seal colloid
28‧‧‧接合層 28‧‧‧Joint layer
31‧‧‧層合膜 31‧‧‧Laminated film
32‧‧‧保護膜 32‧‧‧Protection film
35‧‧‧容置區域 35‧‧‧accommodation area
42‧‧‧電路晶片 42‧‧‧circuit chip
51‧‧‧被動元件 51‧‧‧Passive components
65‧‧‧凹槽 65‧‧‧groove
66‧‧‧間隔 66‧‧‧Interval
211、261‧‧‧第一表面 211, 261‧‧‧ First surface
212、262‧‧‧第二表面 212, 262‧‧‧Second surface
213、263、263’‧‧‧側緣 213, 263, 263 ’
221‧‧‧工作表面 221‧‧‧Working surface
222‧‧‧光學微結構 222‧‧‧Optical microstructure
231、431‧‧‧焊墊 231、431‧‧‧solder pad
232‧‧‧佈線 232‧‧‧Wiring
241‧‧‧填充物 241‧‧‧filler
251、271、271’、281、571‧‧‧內緣 251, 271, 271 ’, 281, 571
252、272、282、572‧‧‧外緣 252, 272, 282, 572
253、273、273’‧‧‧上緣 253, 273, 273’‧‧‧ upper edge
D1、D2‧‧‧高度 D1, D2‧‧‧ Height
圖1為習知影像感測器封裝結構的側面剖視圖。 FIG. 1 is a side cross-sectional view of a conventional image sensor packaging structure.
圖2為根據本案一實施例之光學元件封裝結構的側面剖視圖。 2 is a side cross-sectional view of an optical element packaging structure according to an embodiment of the present case.
圖3為根據本案另一實施例之光學元件封裝結構的側面剖視圖。 3 is a side cross-sectional view of an optical element packaging structure according to another embodiment of the present case.
圖4為根據本案又一實施例之光學元件封裝結構的側面剖視圖。 4 is a side cross-sectional view of an optical element packaging structure according to yet another embodiment of the present case.
圖5為根據本案又一實施例之光學元件封裝結構的側面剖視圖。 5 is a side cross-sectional view of an optical element packaging structure according to yet another embodiment of the present case.
圖6為根據本案又一實施例之光學元件封裝結構的側面剖視圖。 6 is a side cross-sectional view of an optical element packaging structure according to yet another embodiment of the present case.
圖7為根據本案又一實施例之光學元件封裝結構的側面剖視圖。 7 is a side cross-sectional view of an optical element packaging structure according to yet another embodiment of the present case.
圖8為根據本案又一實施例之光學元件封裝結構的側面剖視圖。 8 is a side cross-sectional view of an optical element packaging structure according to yet another embodiment of the present case.
圖9為根據本案又一實施例之光學元件封裝結構的側面剖視圖。 9 is a side cross-sectional view of an optical element packaging structure according to yet another embodiment of the present case.
圖10為根據本案又一實施例之光學元件封裝結構的側面剖視圖。 10 is a side cross-sectional view of an optical element packaging structure according to yet another embodiment of the present case.
圖11A為用於生成本案一實施例之光學元件封裝結構的基板設計 上視圖。 FIG. 11A is a substrate design for generating an optical element packaging structure according to an embodiment of this case Top view.
圖11B為使用圖11A之基板設計所生成光學元件封裝結構的側視圖。 11B is a side view of the optical element packaging structure generated using the substrate design of FIG. 11A.
圖12A為用於生成本案另一實施例之光學元件封裝結構的基板設計上視圖。 12A is a top view of a substrate design for generating an optical element packaging structure according to another embodiment of this case.
圖12B為使用圖12A之基板設計所生成光學元件封裝結構的側視圖。 12B is a side view of the optical element packaging structure generated using the substrate design of FIG. 12A.
圖13A為用於生成本案又一實施例之光學元件封裝結構的基板設計上視圖。 FIG. 13A is a top view of a substrate design for generating an optical element packaging structure according to yet another embodiment of this case.
圖13B為使用圖13A之基板設計所生成光學元件封裝結構的側視圖。 13B is a side view of the optical element packaging structure generated using the substrate design of FIG. 13A.
體現本案特徵與優點的一些典型實施例將在說明中詳細敘述,應理解的是本案能夠在不同的樣態上具有各種的變化,其皆不脫離本案的範圍,且其中的說明及圖式在本質上係當作說明之用,而非用以限制本案。 Some typical embodiments embodying the characteristics and advantages of this case will be described in detail in the description. It should be understood that this case can have various changes in different forms, all of which do not deviate from the scope of this case, and the description and drawings therein Essentially, it is used as an illustration, not as a limitation of this case.
圖2為根據本案一實施例之光學元件封裝結構的側面剖視圖,光學元件封裝結構20包括基板21、光學元件晶片22、阻隔結構25、接合層28,透光板26以及封膠體27。其中,基板21(例如為塑膠基板)具有相對的第一表面211及第二表面212,光學元件晶片22固定在基板21的第一表面211上(例如以黏著層、膠體、或是晶片接著樹脂(die bond epoxy)等固著方式),光學元件晶片22的工作面(感測面)221朝向遠離基板21的方向,亦即朝向透光 板26,在基板21的第一表面211上另外設置可與第二表面212上的錫球(solder ball)、接腳、引腳、接墊、接線或電極等(未繪示)電性連接的焊墊231,光學元件晶片22藉由打線23與焊墊231完成電性連接,焊墊231與打線23的數量依實際需求配置,使光學元件晶片22的感測訊號可以傳送到外部電路(未繪示)、或自外部電路接收驅動訊號。本案的光學元件晶片22例如為影像感測晶片,但並不限於此,任何易受濕氣影響的其他光學元件晶片均可利用本案各實施例的封裝結構以提高其耐候性及可靠性。 2 is a side cross-sectional view of an optical element packaging structure according to an embodiment of the present invention. The optical element packaging structure 20 includes a substrate 21, an optical element chip 22, a barrier structure 25, a bonding layer 28, a light-transmitting plate 26, and an encapsulant 27. The substrate 21 (for example, a plastic substrate) has a first surface 211 and a second surface 212 opposite to each other, and the optical element chip 22 is fixed on the first surface 211 of the substrate 21 (for example, with an adhesive layer, glue, or die-bonding resin) (die bond epoxy and other fixing methods), the working surface (sensing surface) 221 of the optical element chip 22 faces away from the substrate 21, that is, toward light transmission The board 26 is additionally provided on the first surface 211 of the substrate 21 and can be electrically connected with solder balls, pins, pins, pads, wires or electrodes (not shown) on the second surface 212 (not shown) The bonding pad 231, the optical element chip 22 is electrically connected to the bonding pad 231 through the bonding wire 23, and the number of bonding pads 231 and bonding wire 23 is configured according to actual needs, so that the sensing signal of the optical element chip 22 can be transmitted to an external circuit ( (Not shown), or receive drive signals from external circuits. The optical element chip 22 in this case is, for example, an image sensing chip, but it is not limited to this. Any other optical element chip susceptible to moisture can utilize the packaging structure of each embodiment of this case to improve its weather resistance and reliability.
在基板21上方設置有阻隔結構25,圍繞在光學元件晶片22的外圍,阻隔結構25可以和基板21的材質相同,例如塑膠,另外亦可使用彈性體或矽膠,用於隔離外部環境並保護光學元件晶片22,阻隔結構25可利用已知的方式固定在基板21的第一表面211上,較佳者,可利用層合膜(lamination film)3將阻隔結構25貼附在基板21的第一表面211上。 A barrier structure 25 is provided above the substrate 21 and surrounds the periphery of the optical element chip 22. The barrier structure 25 can be made of the same material as the substrate 21, such as plastic, and an elastomer or silicone can also be used to isolate the external environment and protect the optics The element wafer 22 and the barrier structure 25 can be fixed on the first surface 211 of the substrate 21 in a known manner. Preferably, the barrier structure 25 can be attached to the first surface of the substrate 21 using a lamination film 3 Surface 211.
透光板26具有相對的第一表面261和第二表面262,其中第二表面262朝向光學元件晶片22,透光板26藉由阻隔結構25跨設在光學元件晶片22上方,亦即透光板26與光學元件晶片22之間具有間隙,透光板26可以為光學玻璃、透鏡或是透光板狀體,更進一步可以具有單面鍍膜或是雙面鍍膜,而單面鍍膜或雙面鍍膜的任一鍍膜層可以包括抗反射層、紅外線穿透層、抗紅外線層或抗紫外線層等具有特殊效果的膜層。 The light-transmitting plate 26 has a first surface 261 and a second surface 262 opposite to each other, wherein the second surface 262 faces the optical element chip 22, and the light-transmitting plate 26 straddles the optical element chip 22 through the blocking structure 25, that is, transmits light There is a gap between the plate 26 and the optical element wafer 22. The light-transmitting plate 26 may be optical glass, a lens or a light-transmitting plate-like body, and may further have a single-sided coating or double-sided coating, and a single-sided coating or double-sided coating Any coating layer of the coating film may include an anti-reflection layer, an infrared transmission layer, an anti-infrared layer, an anti-ultraviolet layer, or other layers with special effects.
在阻隔結構25與透光板26之間設置了一圈接合層28(例如以塗佈方式形成),其材質可為玻璃接著樹脂(glass mount epoxy,GME),特別是對於玻璃有較佳的黏著性,因此基板21、阻 隔結構25、接合層28及透光板26圍出密閉空間的容置區域35,光學元件晶片22便放置在容置區域35內。接合層28的內緣281大致上不超出阻隔結構25的內緣251,舉例來說接合層28的內緣281與阻隔結構25的內緣251對齊,或是接合層28的內緣281位於阻隔結構25的內緣251及外緣252之間,如此塗佈的樹脂不會流入容置區域35內與線材接觸;另外,透光板26的側緣263則超出接合層28的外緣282,亦即接合層28的上表面完全被透光板26覆蓋。接合層28的高度D2和阻隔結構25的高度D1總合定義了容置區域35的高度,因此可藉由調整阻隔結構25的高度D1及/或接合層28的高度D2來控制光學元件晶片22到透光板26的第一表面261之間的距離,亦即光學元件晶片22的工作距離,至於要調整何者的高度則可視製程難易度、可靠性等參數進行選擇,當工作距離越大時,於透光板26的第一表面261或第二表面262上之微粒或汙染的成像越不明顯,但是增加封裝體整體高度,以及增加容置區域35的高度,對於可靠性會有所影響。 A ring of bonding layer 28 (for example, formed by coating) is provided between the barrier structure 25 and the light-transmitting plate 26, and its material may be glass mount epoxy (GME), especially for glass. Adhesion, so the substrate 21, resistance The partition structure 25, the bonding layer 28 and the light-transmitting plate 26 enclose an accommodating area 35 of the sealed space, and the optical element wafer 22 is placed in the accommodating area 35. The inner edge 281 of the bonding layer 28 does not substantially exceed the inner edge 251 of the barrier structure 25, for example, the inner edge 281 of the bonding layer 28 is aligned with the inner edge 251 of the barrier structure 25, or the inner edge 281 of the bonding layer 28 is located at the barrier Between the inner edge 251 and the outer edge 252 of the structure 25, the resin coated in this way will not flow into the accommodating area 35 and come into contact with the wire; in addition, the side edge 263 of the light-transmitting plate 26 exceeds the outer edge 282 of the bonding layer 28, That is, the upper surface of the bonding layer 28 is completely covered by the light-transmitting plate 26. The sum of the height D2 of the bonding layer 28 and the height D1 of the barrier structure 25 defines the height of the accommodating region 35, so the optical element chip 22 can be controlled by adjusting the height D1 of the barrier structure 25 and / or the height D2 of the bonding layer 28 The distance to the first surface 261 of the light-transmitting plate 26, that is, the working distance of the optical element chip 22, as for which height to be adjusted, can be selected according to the process difficulty, reliability and other parameters. When the working distance is greater , The imaging of particles or contamination on the first surface 261 or the second surface 262 of the light-transmitting plate 26 is less obvious, but increasing the overall height of the package and increasing the height of the accommodating area 35 will affect reliability .
封膠體27形成於基板21的部分第一表面211上,可以有效減緩水氣進入容置區域35的情況,封膠體27的材料為模造封膠體(molding compound),其外緣272與基板21的側緣213對齊,內緣271則完全覆蓋透光板26的側緣263、接合層28的外緣282以及阻隔結構25的外緣252,其上緣273與透光板26的第一表面261大致上齊平。因為接合層28的外緣282比透光板26的側緣263及阻隔結構25的外緣252內縮(即接合層28內緣281到外緣282的距離小於接合層28內緣281到透光板26側緣263的距離,也小於接合層28內緣281到阻隔結構25外緣252的距離),因此封膠體27的內緣271接 觸並黏附在透光板26的側緣263、透光板26的部分第二表面262(接合層28的外緣282到透光板26的側緣263之間)、接合層28的外緣282、阻隔結構25的部分上緣253(接合層28的外緣282到阻隔結構25的外緣252之間)、以及阻隔結構25的外緣252,封膠體27並黏附在基板21的部分第一表面211(阻隔結構25的外緣252到基板21的側緣213之間),增加了封膠體27與其他元件之間不同方向的接觸面積,可降低透光板26、接合層28及阻隔結構25各接觸面之間的界面應力,提供更緊密的咬合或嵌合效果。另外,當封膠體27的上緣273沒有超出透光板26的第一表面261時,在製程中可達到避免溢膠而汙染到透光板26,確保光學元件封裝結構20的功能正常,也可減少製程後續清潔的麻煩,而且扣除掉凸出透光板26的封膠體27部分,封膠體27的使用量可以減少,降低製造成本。 The sealing compound 27 is formed on a part of the first surface 211 of the substrate 21, which can effectively slow the moisture entering the accommodating region 35. The material of the sealing compound 27 is a molding compound, and its outer edge 272 is connected to the substrate 21. The side edge 213 is aligned, and the inner edge 271 completely covers the side edge 263 of the light-transmitting plate 26, the outer edge 282 of the bonding layer 28, and the outer edge 252 of the barrier structure 25, and the upper edge 273 and the first surface 261 of the light-transmitting plate 26 Roughly flush. Because the outer edge 282 of the bonding layer 28 is narrower than the side edge 263 of the light-transmitting plate 26 and the outer edge 252 of the barrier structure 25 (that is, the distance from the inner edge 281 of the bonding layer 28 to the outer edge 282 is smaller than the inner edge 281 of the bonding layer 28 to the transparent The distance from the side edge 263 of the light board 26 is also smaller than the distance from the inner edge 281 of the bonding layer 28 to the outer edge 252 of the barrier structure 25), so the inner edge 271 of the sealant 27 is connected Touch and adhere to the side edge 263 of the light-transmitting plate 26, the part of the second surface 262 of the light-transmitting plate 26 (between the outer edge 282 of the bonding layer 28 to the side edge 263 of the light-transmitting plate 26), the outer edge of the bonding layer 28 282, a portion of the upper edge 253 of the barrier structure 25 (between the outer edge 282 of the bonding layer 28 to the outer edge 252 of the barrier structure 25), and the outer edge 252 of the barrier structure 25, the sealant 27 is attached to the portion of the substrate 21 A surface 211 (between the outer edge 252 of the barrier structure 25 and the side edge 213 of the substrate 21) increases the contact area between the encapsulant 27 and other components in different directions, which can reduce the light-transmitting plate 26, the bonding layer 28 and the barrier The interfacial stress between the contact surfaces of the structure 25 provides a tighter bite or fit effect. In addition, when the upper edge 273 of the encapsulant 27 does not exceed the first surface 261 of the light-transmitting plate 26, it is possible to avoid the overflow of glue and contamination of the light-transmitting plate 26 during the manufacturing process, ensuring the function of the optical element packaging structure 20 is normal, The trouble of subsequent cleaning in the manufacturing process can be reduced, and the portion of the encapsulant 27 protruding from the light-transmitting plate 26 is eliminated, and the amount of the encapsulant 27 used can be reduced, reducing the manufacturing cost.
完成的光學元件封裝結構20必須經過封裝後溫度循環測試(temperature cycle test),例如做為車用電子產品規範的AEC-Q100標準,其中在測試機械應力的階段,光學元件封裝結構20會經過上千次-65℃~150℃溫度來回變化,以檢測光學元件封裝結構20是否能耐得住熱脹冷縮而不會產生各界面剝離現象,前述位於阻隔結構25及基板21間之層合膜31可以吸收結構應力,避免基板21和阻隔結構25之間發生脫層(delamination)現象,能夠有效提高光學元件封裝結構20的耐候性及可靠性。 The completed optical element packaging structure 20 must undergo a post-package temperature cycle test (temperature cycle test), such as the AEC-Q100 standard as a specification for automotive electronic products, in which the optical element packaging structure 20 will pass through the stage of testing mechanical stress Thousands of times -65 ° C ~ 150 ° C temperature change back and forth to detect whether the optical element packaging structure 20 can withstand thermal expansion and contraction without causing peeling phenomenon at each interface. The aforementioned laminated film 31 between the barrier structure 25 and the substrate 21 It can absorb structural stress, avoid delamination between the substrate 21 and the barrier structure 25, and can effectively improve the weather resistance and reliability of the optical element packaging structure 20.
為了使基板21的第一表面211上之焊墊231、佈線、接線(trace)或電路與第二表面212上之錫球、接腳、引腳、接墊、接線或電極形成電性連接,必須有貫穿第一表面211與第二表面212之間的導電結構,例如通孔(through hole/via)一般多設於焊墊231的 附近,本案的光學元件封裝結構20則可再進一步改良,請參閱圖3,通孔(through hole)24在基板21第一表面211的開口可位於光學元件晶片22、阻隔結構25、封膠體27或其他電路晶片(未繪示)的下方,如果有層合膜31則可位於層合膜31下方,配合在基板21的第一表面211上之佈線232,完成連通外部電路與光學元件封裝結構20內部,佈線232上方再覆蓋一層保護膜32,保護膜32例如為防焊漆(綠漆),可保護佈線232不受刮傷或是與外界空氣接觸而產生氧化和腐蝕,並提供防焊功能,避免造成短路或斷路,請注意圖中的通孔數量及相對位置僅為示意,不用於限定本案之實施方式。另外,因為光學元件晶片22、阻隔結構25、封膠體27及保護膜32的阻礙,水氣更不容易進入容置區域35,因此光學元件封裝結構20能長時間保持品質,大大提升了其耐候性及可靠度。 In order to electrically connect the solder pads 231, wiring, traces or circuits on the first surface 211 of the substrate 21 with the solder balls, pins, pins, pads, wires or electrodes on the second surface 212, There must be a conductive structure that penetrates between the first surface 211 and the second surface 212, for example, through holes (via holes) are generally provided on the pad 231 Nearby, the optical element packaging structure 20 of the present case can be further improved. Please refer to FIG. 3. The opening of the through hole 24 on the first surface 211 of the substrate 21 can be located in the optical element chip 22, the barrier structure 25, and the encapsulant 27 Or under the other circuit chip (not shown), if there is a lamination film 31, it can be located under the lamination film 31, matching the wiring 232 on the first surface 211 of the substrate 21, to complete the connection between the external circuit and the optical element packaging structure 20. Inside the wiring 232, a protective film 32 is further covered. The protective film 32 is, for example, solder resist (green paint), which protects the wiring 232 from being scratched or in contact with the outside air to generate oxidation and corrosion, and provides solder resist. Function, to avoid short circuit or open circuit, please note that the number and relative position of the through holes in the figure are only for illustration, and are not used to limit the implementation of this case. In addition, because of the obstruction of the optical element wafer 22, the barrier structure 25, the encapsulant 27, and the protective film 32, moisture is less likely to enter the accommodating area 35, so the optical element packaging structure 20 can maintain quality for a long time, greatly improving its weather resistance Sex and reliability.
通孔24內部則可視製程或需求,填塞入填充物241,填充物241可以是電鍍銅等導電材料、防焊漆或樹脂,以增加電性連結之穩定或進一步阻隔濕氣滲透進入容置區域35。通孔24在基板21第二表面212的開口則可配合不同的封裝形式與錫球、接腳、引腳、接墊、接線或電極等(未繪示)連接,例如球柵陣列(ball grid array,BGA)、無引腳(leadless chip carrier,LCC)、平面網格陣列(land grid array,LGA)、方形扁平封裝(quad flat package,QFP)、方形扁平無引腳(quad flat no-lead,QFN)或其他封裝形式。本實施例的通孔結構可應用至後文所述的所有實施例而不再於各實施例中贅述。 The inside of the through-hole 24 can be filled with a filler 241 depending on the manufacturing process or demand. The filler 241 can be conductive material such as electroplated copper, solder resist or resin to increase the stability of the electrical connection or further block the penetration of moisture into the storage area 35. The opening of the through hole 24 on the second surface 212 of the substrate 21 can be connected to solder balls, pins, pins, pads, wires, or electrodes (not shown) with different packaging forms, such as a ball grid array (ball grid array) array, BGA), leadless chip carrier (LCC), land grid array (LGA), quad flat package (QFP), quad flat no-lead , QFN) or other packaging forms. The through hole structure of this embodiment can be applied to all the embodiments described later and will not be repeated in each embodiment.
圖4~圖10顯示本案之光學元件封裝結構的多種實施樣態及變化,以下僅說明主要相異特點,其他未提到的元件可與本案所 有實施例中所提到的相似元件通用,其材質、功能、外觀等不再贅述,並請注意各實施例中的主要相異點也可應用至其他實施例,而不限於個別圖式所顯示的樣態。 Figures 4 to 10 show various implementations and changes of the optical component packaging structure of this case. The following only illustrates the main different features. Other unmentioned components can be used in this case. The similar elements mentioned in the embodiments are common, and their materials, functions, appearance, etc. are not repeated here. Please note that the main differences between the embodiments can also be applied to other embodiments, not limited to the individual drawings. The appearance of the display.
於圖4中,視應用之需要可於光學元件晶片22的工作面(感測面)221上設置多個光學微結構222,形成例如微透鏡陣列,用以提供繞射、聚焦或校正等特定功能,以加強光學元件晶片22之感測效果。 In FIG. 4, a plurality of optical microstructures 222 can be provided on the working surface (sensing surface) 221 of the optical element wafer 22 to form a microlens array to provide specific diffraction, focusing, or correction, etc., as required by the application Function to enhance the sensing effect of the optical element chip 22.
於圖5中,如果封膠體27’由液態封膠體(liquid compound)固化生成,封膠體27’的上緣273’可能不會與透光板26第一表面261呈現平行的狀態,例如封膠體27’的上緣273’會與透光板26第一表面261之延伸平面呈一夾角θ,根據液態封膠體對透光板26的附著力和本身的內聚力以及使用膠量的多寡,夾角θ大約介於5度~60度之間。 In FIG. 5, if the sealant 27 'is formed by solidification of a liquid compound, the upper edge 273' of the sealant 27 'may not be parallel to the first surface 261 of the light-transmitting plate 26, for example, the sealant The upper edge 273 'of 27' will form an angle θ with the extension plane of the first surface 261 of the transparent plate 26. According to the adhesion of the liquid encapsulant to the transparent plate 26 and its own cohesion and the amount of glue used, the included angle θ Approximately between 5 degrees and 60 degrees.
於圖6中,容置區域35內可以設置超過一個晶片,如圖中堆疊設置的光學元件晶片22及電路晶片42,其中光學元件晶片22可以是影像感測晶片而電路晶片42可以是影像訊號處理晶片(image signal processor,ISP)或是數位訊號處理晶片(digital signal processor,DSP),基板21的第一表面211上設置多個焊墊231與431,堆疊結構上方的光學元件晶片22利用打線23與焊墊231電性連接,下方的電路晶片42利用打線43與焊墊431電性連接,如此可以實現多晶片封裝(multi-chip package),整合多個晶片於一個封裝結構中,比個別封裝節省了許多空間,有助於縮小電子產品的體積。 In FIG. 6, more than one chip may be disposed in the accommodating area 35, as shown in the optical element chip 22 and the circuit chip 42 stacked in the figure, wherein the optical element chip 22 may be an image sensing chip and the circuit chip 42 may be an image signal An image signal processor (ISP) or a digital signal processor (DSP), a plurality of bonding pads 231 and 431 are provided on the first surface 211 of the substrate 21, and the optical element chip 22 above the stack structure is wired 23 is electrically connected to the bonding pad 231, and the lower circuit chip 42 is electrically connected to the bonding pad 431 by the bonding wire 43, so that a multi-chip package can be realized, integrating multiple chips into one package structure Packaging saves a lot of space and helps reduce the size of electronic products.
於圖7中,與光學元件晶片22電性連接的焊墊231位置可 由基板21的第一表面211移到阻隔結構25上表面,此時接合層28的內緣281沒有與阻隔結構25的內緣251對齊,而是向阻隔結構25的外緣252移動空出部分阻隔結構25的上緣253,供放置焊墊231,於此實施例中,阻隔結構25內部布置有導電結構(未繪示)使得焊墊231可以與內部電路或外部電路(未繪示)電性連接。對於多晶片封裝結構,容置區域35內有多個對應的焊墊231,根據不同的結構設計,全部的焊墊231可以選擇性放置在基板21的第一表面211上或阻隔結構25的上緣253,或是部分放置在基板21的第一表面211上而部分放置在阻隔結構25的上緣253。 In FIG. 7, the position of the bonding pad 231 electrically connected to the optical element chip 22 can be The first surface 211 of the substrate 21 is moved to the upper surface of the barrier structure 25. At this time, the inner edge 281 of the bonding layer 28 is not aligned with the inner edge 251 of the barrier structure 25, but is moved toward the outer edge 252 of the barrier structure 25. The upper edge 253 of the barrier structure 25 is used for placing the solder pad 231. In this embodiment, a conductive structure (not shown) is arranged inside the barrier structure 25 so that the pad 231 can be electrically connected to an internal circuit or an external circuit (not shown) Sexual connection. For the multi-chip package structure, there are a plurality of corresponding pads 231 in the accommodating area 35. According to different structural designs, all the pads 231 can be selectively placed on the first surface 211 of the substrate 21 or on the barrier structure 25 The edge 253 may be partially placed on the first surface 211 of the substrate 21 and partially placed on the upper edge 253 of the barrier structure 25.
於圖8中,光學元件封裝結構20可進一步包含至少一個被動元件51,被動元件51設置在阻隔結構25的上緣253上,被封膠體27’包覆而受到保護。於此實施例中,阻隔結構25內部布置有導電結構(未繪示)使得被動元件51可以與內部電路或外部電路(未繪示)電性連接。 In FIG. 8, the optical element packaging structure 20 may further include at least one passive element 51. The passive element 51 is disposed on the upper edge 253 of the barrier structure 25, and is protected by the encapsulant 27 '. In this embodiment, a conductive structure (not shown) is arranged inside the blocking structure 25 so that the passive element 51 can be electrically connected to an internal circuit or an external circuit (not shown).
於圖9中,透光板26’具有階梯狀(step cut)側緣263’,封膠體27’的內緣271’完全覆蓋透光板26’的階梯狀側緣263’,因此增加了封膠體27’與透光板26’在不同方向的接觸面積,提供更緊密的咬合或嵌合效果,使封膠體27’與透光板26’的結合更為牢固,光學元件封裝結構20的可靠性更高。 In FIG. 9, the transparent plate 26 'has a step cut side edge 263', and the inner edge 271 'of the sealant 27' completely covers the stepped side edge 263 'of the transparent plate 26', thus increasing the seal The contact area of the colloid 27 'and the light-transmitting plate 26' in different directions provides a tighter bite or fitting effect, making the combination of the sealing gel 27 'and the light-transmitting plate 26' stronger, and the optical element packaging structure 20 reliable Sexuality is higher.
於圖10中,因為接合層28的外緣282比透光板26的側緣263及阻隔結構25的外緣252內縮(即接合層28內緣281到外緣282的距離小於接合層28內緣281到透光板26側緣263的距離,也小於接合層28內緣281到阻隔結構25外緣252的距離),如前所述可降低透光板26及接合層28接觸面之間的界面應力,提供更緊密的咬 合或嵌合效果,所以在咬合力提升的前提下,可以進一步減少封膠體57的使用量,使封膠體57外緣572突出於阻隔結構25外緣252的部分逐步減少,甚至到兩者是對齊的,因此封膠體57不與基板21接觸,即封膠體57的內緣571接觸並黏附在透光板26的側緣263、透光板26的部分第二表面262(接合層28的外緣282到透光板26的側緣263之間)、接合層28的外緣282、阻隔結構25的部分上緣253(接合層28的外緣282到阻隔結構25的外緣252之間),可縮小基板21的面積並減少了封膠體57的使用量,同時達到封裝結構小型化以及製造成本降低的效果。 In FIG. 10, the outer edge 282 of the bonding layer 28 is retracted from the side edge 263 of the light-transmitting plate 26 and the outer edge 252 of the barrier structure 25 (ie, the distance from the inner edge 281 of the bonding layer 28 to the outer edge 282 is smaller than the bonding layer 28 The distance from the inner edge 281 to the side edge 263 of the light-transmitting plate 26 is also smaller than the distance from the inner edge 281 of the bonding layer 28 to the outer edge 252 of the barrier structure 25), as described above, the contact surface between the light-transmitting plate 26 and the bonding layer 28 can be reduced Interfacial stress, providing a tighter bite With the effect of closing or fitting, on the premise of improving the bite force, the amount of sealant 57 can be further reduced, so that the portion of the outer edge 572 of the sealant 57 protruding from the outer edge 252 of the barrier structure 25 is gradually reduced, or even both The sealant 57 is not in contact with the substrate 21, that is, the inner edge 571 of the sealant 57 is in contact with and adheres to the side edge 263 of the light-transmitting plate 26 and the second surface 262 of the light-transmitting plate 26 (outside of the bonding layer 28) Between the edge 282 and the side edge 263 of the light-transmitting plate 26), the outer edge 282 of the bonding layer 28, and a portion of the upper edge 253 of the barrier structure 25 (between the outer edge 282 of the bonding layer 28 and the outer edge 252 of the barrier structure 25) The area of the substrate 21 can be reduced and the amount of the encapsulant 57 used can be reduced, while achieving the effects of miniaturization of the packaging structure and reduction of manufacturing costs.
圖3~圖10相關實施例中所包含的特點包括通孔位置、光學微結構、封膠體斜面上緣、堆疊晶片、焊墊位置變更、被動元件、透光板階梯狀側緣、小尺寸結構等可單獨或組合應用至圖2之實施例,應注意本案不限於個別圖式所顯示的樣態。 The features included in the related embodiments of FIGS. 3-10 include through-hole locations, optical microstructures, edges of the slanting surface of the encapsulant, stacked wafers, pad position changes, passive components, stepped side edges of the light-transmitting board, and small-sized structures Etc. can be applied to the embodiment of FIG. 2 alone or in combination. It should be noted that this case is not limited to the aspect shown in the individual drawings.
圖11A顯示用於生成本案光學元件封裝結構的基板設計,在已完成通孔、佈線、保護膜(防焊漆)的基板21上方形成阻隔結構25,阻隔結構25會露出將成為容置區域35部分的基板21,以及在容置區域35四周所提供的凹槽65,接著在容置區域35內完成貼附晶片、連接打線、形成接合層、放上透光板等步驟,然後整體塗佈封膠體,封膠體的高度大致上與透光板表面齊平,或是在兩個單元之間有些凹下,再來依據光學元件封裝結構的封裝形式,於基板21的背面形成錫球、接腳、引腳、接墊、接線或電極等(未繪示),最後沿著凹槽65進行切割作業,會得到如圖11B側視圖所示的光學元件封裝結構,基本上整個封裝結構被封膠體27’覆蓋,僅在四角露出部分的阻隔結構25。 FIG. 11A shows the substrate design used to generate the optical element packaging structure of this case. A barrier structure 25 is formed on the substrate 21 that has been completed with through holes, wiring, and a protective film (solder resist). The barrier structure 25 will be exposed and will become the receiving area 35 Part of the substrate 21, and the groove 65 provided around the receiving area 35, then complete the steps of attaching the wafer, connecting the bonding wires, forming the bonding layer, placing the light-transmitting plate, etc. in the receiving area 35, and then coating the whole Encapsulant, the height of the encapsulant is approximately flush with the surface of the light-transmitting board, or it is slightly recessed between the two units, and then according to the packaging form of the optical element packaging structure, a solder ball and a connection are formed on the back of the substrate 21 Feet, pins, pads, wires or electrodes (not shown), and finally cutting along the groove 65, the optical element packaging structure as shown in the side view of FIG. 11B will be obtained, basically the entire packaging structure is sealed The colloid 27 'covers the barrier structure 25 where only the four corners are exposed.
圖12A顯示用於生成本案光學元件封裝結構的另一基板設計,在已完成通孔、佈線、保護膜(防焊漆)的基板21上方形成阻隔結構25,阻隔結構25僅形成在容置區域35周圍,兩個單元之間以間隔66分開,接著在容置區域35內完成貼附晶片、連接打線、形成接合層、放上透光板等步驟,然後整體塗佈封膠體,封膠體的高度大致上與透光板表面齊平,或是在兩個單元之間有些凹下,再來依據光學元件封裝結構的封裝形式,於基板21的背面形成錫球、接腳、引腳、接墊、接線或電極等,最後沿著間隔66進行切割作業,會得到如圖12B側視圖所示的光學元件封裝結構,可看出整個結構被封膠體27’覆蓋。 FIG. 12A shows another substrate design for generating the optical element packaging structure of this case. A barrier structure 25 is formed on the substrate 21 that has been completed with through holes, wiring, and a protective film (solder resist), and the barrier structure 25 is only formed in the receiving area Around 35, the two units are separated by a gap 66, and then the steps of attaching the wafer, connecting the bonding wires, forming the bonding layer, putting the light-transmitting board, etc. are completed in the accommodating area 35, and then the sealing compound is coated on the whole The height is substantially flush with the surface of the light-transmitting board, or it is slightly recessed between the two units. Then, according to the packaging form of the optical element packaging structure, solder balls, pins, pins, and connectors are formed on the back of the substrate 21 The pads, wires, electrodes, etc. are finally cut along the gap 66 to obtain the optical element packaging structure as shown in the side view of FIG. 12B. It can be seen that the entire structure is covered by the encapsulant 27 '.
圖13A顯示用於生成本案光學元件封裝結構的另一基板設計,在已完成通孔、佈線、保護膜(防焊漆)的基板21上方形成阻隔結構25,阻隔結構25會露出將成為容置區域35部分的基板21,接著在容置區域35內完成貼附晶片、連接打線、形成接合層、放上透光板等步驟,然後整體塗佈封膠體,封膠體的高度大致上與透光板表面齊平,或是在兩個單元之間有些凹下,再來依據光學元件封裝結構的封裝形式,於基板21的背面形成錫球、接腳、引腳、接墊、接線或電極等,最後進行切割作業,會得到如圖10所示的光學元件封裝結構,圖13B為其側視圖,封膠體57覆蓋在阻隔結構25上,沒有與基板21接觸,阻隔結構25的外緣252與基板21的側緣213對齊。 FIG. 13A shows another substrate design for generating the optical element packaging structure of the present case. A barrier structure 25 is formed on the substrate 21 that has been completed with through holes, wiring, and a protective film (solder resist). The barrier structure 25 will be exposed and become a housing The substrate 21 in the area 35, then complete the steps of attaching the wafer, connecting the wires, forming the bonding layer, placing the light-transmitting plate in the containing area 35, and then coating the whole sealant, the height of the sealant is roughly the same as that of the light The surface of the board is flush, or there is some depression between the two units, and then according to the packaging form of the optical element packaging structure, solder balls, pins, pins, pads, wires or electrodes are formed on the back of the substrate 21 Finally, the cutting operation will result in the optical element packaging structure as shown in FIG. 10, FIG. 13B is a side view thereof, the sealant 57 covers the barrier structure 25 without contacting the substrate 21, and the outer edge 252 of the barrier structure 25 is The side edges 213 of the substrate 21 are aligned.
應注意圖11A~圖13A所示基板內的單元數量僅為示意之用,並不用於限制本案之範圍,其數量可依實際設計及需求來調整。 It should be noted that the number of units in the substrate shown in FIGS. 11A to 13A is for illustrative purposes only, and is not intended to limit the scope of this case. The number can be adjusted according to actual design and needs.
綜上所述,本案藉由提供內縮之接合層增加封膠體的固定及附著能力,藉以減少封裝材料的使用量並可避免污染透光板,另外藉由阻隔水氣進入的途徑,大幅延緩水氣進入光學元件封裝結構內部,達到提高光學元件封裝結構的耐候性及可靠性並縮小封裝尺寸的功效。 In summary, this case increases the fixation and adhesion of the sealant by providing a shrinking joint layer, thereby reducing the amount of packaging material used and avoiding contamination of the light-transmitting board. In addition, by blocking the entry of moisture, it is greatly delayed Water vapor enters the inside of the optical element packaging structure to achieve the effect of improving the weather resistance and reliability of the optical element packaging structure and reducing the size of the package.
20‧‧‧光學元件封裝結構 20‧‧‧Optical component packaging structure
21‧‧‧基板 21‧‧‧ substrate
22‧‧‧光學元件晶片 22‧‧‧Optical element chip
23‧‧‧打線 23‧‧‧Wire
25‧‧‧阻隔結構 25‧‧‧ Barrier structure
26‧‧‧透光板 26‧‧‧Transparent board
27‧‧‧封膠體 27‧‧‧sealing colloid
28‧‧‧接合層 28‧‧‧Joint layer
31‧‧‧層合膜 31‧‧‧Laminated film
32‧‧‧保護膜 32‧‧‧Protection film
35‧‧‧容置區域 35‧‧‧accommodation area
211、261‧‧‧第一表面 211, 261‧‧‧ First surface
212、262‧‧‧第二表面 212, 262‧‧‧Second surface
213、263‧‧‧側緣 213, 263
221‧‧‧工作表面 221‧‧‧Working surface
231‧‧‧焊墊 231‧‧‧solder pad
251、271、281‧‧‧內緣 251, 271, 281
252、272、282‧‧‧外緣 252, 272, 282
253、273‧‧‧上緣 253, 273‧‧‧ upper edge
D1、D2‧‧‧高度 D1, D2‧‧‧ Height
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??201710067651.6 | 2017-02-07 | ||
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US6603183B1 (en) * | 2001-09-04 | 2003-08-05 | Amkor Technology, Inc. | Quick sealing glass-lidded package |
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