TW201735553A - 使用硬選取硬解碼模式下的解碼器產生軟資訊的方法 - Google Patents

使用硬選取硬解碼模式下的解碼器產生軟資訊的方法 Download PDF

Info

Publication number
TW201735553A
TW201735553A TW106102042A TW106102042A TW201735553A TW 201735553 A TW201735553 A TW 201735553A TW 106102042 A TW106102042 A TW 106102042A TW 106102042 A TW106102042 A TW 106102042A TW 201735553 A TW201735553 A TW 201735553A
Authority
TW
Taiwan
Prior art keywords
decoder
hard
decoding
decoding mode
lookup table
Prior art date
Application number
TW106102042A
Other languages
English (en)
Other versions
TWI663839B (zh
Inventor
楊宗杰
杜建東
Original Assignee
慧榮科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 慧榮科技股份有限公司 filed Critical 慧榮科技股份有限公司
Publication of TW201735553A publication Critical patent/TW201735553A/zh
Application granted granted Critical
Publication of TWI663839B publication Critical patent/TWI663839B/zh

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105Decoding
    • H03M13/1108Hard decision decoding, e.g. bit flipping, modified or weighted bit flipping
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105Decoding
    • H03M13/1111Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105Decoding
    • H03M13/1111Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
    • H03M13/1125Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms using different domains for check node and bit node processing, wherein the different domains include probabilities, likelihood ratios, likelihood differences, log-likelihood ratios or log-likelihood difference pairs
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105Decoding
    • H03M13/1128Judging correct decoding and iterative stopping criteria other than syndrome check and upper limit for decoding iterations
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/3707Adaptive decoding and hybrid decoding, e.g. decoding methods or techniques providing more than one decoding algorithm for one code
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/3707Adaptive decoding and hybrid decoding, e.g. decoding methods or techniques providing more than one decoding algorithm for one code
    • H03M13/3715Adaptation to the number of estimated errors or to the channel state
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/45Soft decoding, i.e. using symbol reliability information

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)

Abstract

一種使用操作於硬選取硬解碼模式下的一第一解碼器來針對操作於一硬選取軟解碼模式下的一第二解碼器產生軟資訊的方法,包含有:產生一查找表,其中該查找表將失敗校驗節點的數量鍊結至對數相似比值;於該第一解碼器的第一次迭代中,輸入失敗校驗節點的一數量至該查找表以產生一對數相似比值;以及將輸入失敗校驗節點的該數量至該查找表所產生的該對數相似比值輸出至該第二解碼器。

Description

使用硬選取硬解碼模式下的解碼器產生軟資訊的方法
本發明係關於一種用於低密度奇偶校驗(low-density parity check,LDPC)解碼器的位元翻轉演算法,尤指透過在第一解碼器進行硬選取硬解碼期間提供軟資訊給第二解碼器,以降低位元翻轉演算法的迭代次數的方法。
低密度奇偶校驗解碼器係使用具有奇偶位元(parity bit)的線性錯誤校正碼來進行解碼,其中奇偶位元會提供用以驗證接收到的碼字(codeword)的奇偶方程式給解碼器。舉例來說,低密度奇偶校驗可為一具有固定長度的二進位碼,其中所有的符元(symbol)相加會等於零。
在編碼過程中,所有的資料位元會被重複執行並且被傳送至對應的編碼器,其中每個編碼器會產生一奇偶符元(parity symbol)。碼字係由k個訊息位元(information digit)以及r個校驗位元(check digit)所組成。如果碼字總共有n位元,則k = n-r。上述碼字可用一奇偶校驗矩陣來表示,其中該奇偶校驗矩陣具有r列(表示方程式的數量)以及n行(表示位元數),如第1圖所示。這些碼之所以被稱為「低密度」是因為相較於奇偶校驗矩陣中位元0的數量而言,位元1的數量相對的少。在解碼過程中,每次的奇偶校驗皆可視為一奇偶校驗碼,並隨後與其他奇偶校驗碼一起進行交互校驗(cross-check),其中解碼會在校驗節點(check node)進行,而交互校驗會在變數節點(variable node)進行。
LDPC解碼器支持三種模式:硬判定硬解碼(硬選取hard decoding)、軟判定硬解碼(soft decision hard decoding),以及軟判定軟解碼(soft decision hard decoding)。第1圖係為奇偶校驗矩陣H(第1圖的上半部份)以及Tanner Graph(第1圖的下半部份)的示意圖,其中Tanner Graph係為另一種表示碼字的方式,並且可用於解釋當使用一位元翻轉(bit flipping)演算法時,LDPC解碼器的一些關於硬判定軟解碼的操作。
在Tunner Graph中,方形(C1~C4)所表示的校驗節點(check node)代表奇偶位元(parity bit)的數量,且圓形(V1 ~V7 )所表示的變數節點(variable node)係為一碼字中位元的數量。如果一特定方程式與碼符元(code symbol)有關,則對應的校驗節點與變數節點之間會以連線來表示。被估測的消息會沿著這些連線來傳遞,並且於節點上以不同的方式組合。一開始時,變數節點將發送一估測至所有連線上的校驗節點,其中這些連線包含被認為是正確的位元。接著,每個校驗節點會依據對所有其他的連接的估測(connected estimate)來針對每一變數節點進行新的估測,並且將新的估測傳回至變數節點。新的估測係基於:奇偶校驗方程式迫使所有的變數節點連接至一特定校驗節點,以使總和為零。
這些變數節點會接收新的資訊以及使用一多數規則(majority rule)(亦即硬判定),來判斷所傳送的原始位元之值是否正確,若不正確,該原始位元會被翻轉(flipped)。該位元接著會被傳回至該些校驗節點,且上述步驟會被迭代地執行一預定次數,直到符合這些校驗節點的奇偶校驗方程式。若有符合這些奇偶校驗方程式 (亦即校驗節點所計算之值符合接收自變數節點之值),則可啟用提前終止(early termination),這會使得系統在最大迭代次數達到之前就結束解碼程序。
若目前使用的解碼模式無法在達到最大迭代次數之前就完成解碼,則需要切換為另一種解碼模式。基於硬選取硬解碼是最省電的一種模式,切換順序通常是:硬選取硬解碼→ 硬選取軟解碼→軟選取軟解碼,其中後兩個模式需要一些基於置信度傳播演算法而建立的軟資訊。節點所接收到的每一則訊息(message)皆為一條件機率(conditional probability ),即接收到的位元係為0或1。在運行LDPC 解碼器之前就已事先得知的機率稱為後驗機率(a posteriori probability,APP),其可藉由對該解碼器進行一定次數的迭代來得知。因此,當從一硬選取硬解碼架構切換至一硬選取軟解碼架構時,該LDPC解碼器必須先執行一定次數的迭代來取得所需的後驗機率。
本發明的一目的在於,當自一第一解碼架構切換至一第二解碼架構時,使用一位元翻轉演算法來減少迭代的次數。
本發明的一實施例揭示一種使用操作於硬選取硬解碼(hard decision hard decoding)模式下的一第一解碼器來針對操作於一硬選取軟解碼(hard decision soft decoding)模式下的一第二解碼器產生軟資訊的方法,包含有:產生一查找表,其中該查找表將失敗校驗節點(failed check node)的數量鍊結(link)至對數相似比值(log-likelihood ratio,LLR);於該第一解碼器的第一次迭代中,輸入失敗校驗節點的一數量至該查找表以產生一對數相似比值;以及 將輸入失敗校驗節點的該數量至該查找表所產生的該對數相似比值輸出至該第二解碼器。
如以上相關技術所示,軟資訊用以表示變數節點的碼字的可信賴程度。舉例來說,軟資訊可為一對數相似比值(log-likelihood ratio,LLR),其被硬選取軟解碼以及軟選取軟解碼中的變數節點所使用。對數相似比值係由後驗機率來決定,並且關聯於有多少個校驗節點是失敗的(亦即變數節點的碼字的可信程度)以及系統中錯誤位元的數量。表 1以及表 2列舉了失敗校驗節點、錯誤位元以及對數相似比值之間的關係。
表 1 – 後驗機率
表 2 –對數相似比值
其中上述對數相似比值係依據以下方程式計算:
LLR­_i = Max LLR * ((column_weight  + 1 – i)/column_weight + 1)
在上述方程式中, i 代表失敗校驗節點的數量。透過使用表 1以及表 2,可據以產生一查找表 (look-up table),其中所述查找表直接地將失敗校驗節點的數量鍊結(link)於該些對數相似比值 ,且所述查找表可如表 3所示:
表 3
因此,即使當LDPC 解碼器正操作於硬選取硬解碼模式,仍可藉由使用所述查找表來產生軟資訊。
在本發明的一實施例中,在硬選取硬解碼模式中使用一位元翻轉演算法的一第一解碼器會藉由決定失敗校驗節點的數量並且將此資訊輸入至所述查找表以輸出一對數相似比值,以於第一次迭代中產生多個對數相似比值。該第一解碼器接著會將該些對數相似比值傳給操作於硬選取軟解碼模式的一N2 解碼器。
因此,在位元翻轉解碼器的第一次迭代中,資訊也將被提供給軟解碼以及硬解碼使用。   以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。
H‧‧‧奇偶校驗矩陣
C1~C4‧‧‧校驗節點
V1~V7‧‧‧變數節點
第1圖係為根據先前技術的用於進行低密度奇偶校驗解碼的一奇偶校驗矩陣以及Tanner Graph的示意圖。
H‧‧‧奇偶校驗矩陣
C1~C4‧‧‧校驗節點
V1~V7‧‧‧變數節點

Claims (3)

  1. 一種使用操作於硬選取硬解碼(hard decision hard decoding)模式下的一第一解碼器來針對操作於一硬選取軟解碼(hard decision soft decoding)模式下的一第二解碼器產生軟資訊的方法,包含有: 產生一查找表,其中該查找表將失敗校驗節點(failed check node)的數量鍊結(link)至對數相似比值(log-likelihood ratio,LLR); 於該第一解碼器的第一次迭代中,輸入失敗校驗節點的一數量至該查找表以產生一對數相似比值;以及 將輸入失敗校驗節點的該數量至該查找表所產生的該對數相似比值輸出至該第二解碼器。
  2. 如請求項1所述的方法,其中該第一解碼器以及該第二解碼器皆使用一位元翻轉(bit flipping)演算法來進行解碼。
  3. 如請求項1所述的方法,其中該查找表係透過以下方程式產生: LLR­_i = Max LLR * ((column_weight  + 1 – i)/column_weight + 1) 其中i 代表失敗校驗節點的數量。
TW106102042A 2016-03-30 2017-01-20 使用硬選取硬解碼模式下的解碼器產生軟資訊的方法 TWI663839B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/086,006 US10164656B2 (en) 2016-03-30 2016-03-30 Bit flipping algorithm for providing soft information during hard decision hard decoding
US15/086,006 2016-03-30

Publications (2)

Publication Number Publication Date
TW201735553A true TW201735553A (zh) 2017-10-01
TWI663839B TWI663839B (zh) 2019-06-21

Family

ID=59961994

Family Applications (2)

Application Number Title Priority Date Filing Date
TW108116362A TWI710220B (zh) 2016-03-30 2017-01-20 使用硬選取硬解碼模式下的解碼器產生軟資訊的方法
TW106102042A TWI663839B (zh) 2016-03-30 2017-01-20 使用硬選取硬解碼模式下的解碼器產生軟資訊的方法

Family Applications Before (1)

Application Number Title Priority Date Filing Date
TW108116362A TWI710220B (zh) 2016-03-30 2017-01-20 使用硬選取硬解碼模式下的解碼器產生軟資訊的方法

Country Status (3)

Country Link
US (2) US10164656B2 (zh)
CN (2) CN107276594B (zh)
TW (2) TWI710220B (zh)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10340951B2 (en) * 2017-09-13 2019-07-02 Toshiba Memory Corporation Soft decision LDPC decoder with improved LLR from neighboring bits
US10491244B2 (en) * 2017-11-14 2019-11-26 Nyquist Semiconductor Limited Systems and methods for decoding error correcting codes
US10511326B2 (en) * 2017-11-14 2019-12-17 Nyquist Semiconductor Limited Systems and methods for decoding error correcting codes
US11005503B2 (en) 2018-03-16 2021-05-11 SK Hynix Inc. Memory system with hybrid decoding scheme and method of operating such memory system
CN110275796B (zh) * 2018-03-16 2023-08-08 爱思开海力士有限公司 具有混合解码方案的存储器系统及其操作方法
US10884858B2 (en) 2018-03-16 2021-01-05 SK Hynix Inc. LDPC decoding device, memory system including the same and method thereof
CN108650029B (zh) * 2018-05-16 2020-07-31 清华大学 一种适用于量子安全直接通信的纠错编译码方法
CN108762977A (zh) * 2018-05-30 2018-11-06 郑州云海信息技术有限公司 一种固态盘中纠错算法的优化方法及系统
US10715182B2 (en) * 2018-07-27 2020-07-14 Innogrit Technologies Co., Ltd. Systems and methods for decoding error correcting codes with self-generated LLR
US10872013B2 (en) 2019-03-15 2020-12-22 Toshiba Memory Corporation Non volatile memory controller device and method for adjustment
US11086716B2 (en) * 2019-07-24 2021-08-10 Microchip Technology Inc. Memory controller and method for decoding memory devices with early hard-decode exit
JP2021044750A (ja) * 2019-09-12 2021-03-18 キオクシア株式会社 メモリシステム
CN113131947B (zh) * 2019-12-30 2023-11-10 华为技术有限公司 译码方法、译码器和译码装置
CN111541517B (zh) * 2020-04-17 2022-03-25 北京交通大学 一种列表极化码传播译码方法
CN111865335B (zh) * 2020-09-24 2021-01-22 浙江三维通信科技有限公司 一种分组纠错码的译码方法、装置、存储介质和电子装置
CN112422135B (zh) * 2020-11-27 2024-04-16 中国计量大学 基于子矩阵校验的scan-bf提前翻转译码器
DE112022001547T5 (de) 2021-06-01 2024-01-11 Microchip Technology Inc. Speicheradressenschutz
US11843393B2 (en) 2021-09-28 2023-12-12 Microchip Technology Inc. Method and apparatus for decoding with trapped-block management

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7783952B2 (en) * 2006-09-08 2010-08-24 Motorola, Inc. Method and apparatus for decoding data
CN100517981C (zh) * 2007-01-05 2009-07-22 东南大学 低密度奇偶校验码的并行加权比特翻转解码方法
US8051363B1 (en) * 2007-01-16 2011-11-01 Marvell International Ltd. Absorb decode algorithm for 10GBase-T LDPC decoder
US7978793B2 (en) * 2008-02-06 2011-07-12 Freescale Semiconductor, Inc. Method for generating soft decision signal from hard decision signal in a receiver system
CN101903890B (zh) * 2009-03-05 2015-05-20 Lsi公司 用于迭代解码器的改进的turbo均衡方法
US8429498B1 (en) * 2009-03-25 2013-04-23 Apple Inc. Dual ECC decoder
US8341502B2 (en) * 2010-02-28 2012-12-25 Densbits Technologies Ltd. System and method for multi-dimensional decoding
KR101751497B1 (ko) 2010-06-11 2017-06-27 삼성전자주식회사 행렬 네트워크 코딩을 사용하는 장치 및 방법
US8458555B2 (en) * 2010-06-30 2013-06-04 Lsi Corporation Breaking trapping sets using targeted bit adjustment
US8467438B2 (en) * 2010-08-02 2013-06-18 Bassel F. Beidas System and method for iterative nonlinear compensation for intermodulation distortion in multicarrier communication systems
CN101902302B (zh) * 2010-08-17 2012-11-07 北京邮电大学 针对分组码的复杂度固定的联合列表检测译码方法
JP2012244305A (ja) * 2011-05-17 2012-12-10 Toshiba Corp メモリコントローラ、半導体メモリ装置、および復号方法
US8707123B2 (en) * 2011-12-30 2014-04-22 Lsi Corporation Variable barrel shifter
CN103199874B (zh) * 2012-01-05 2017-02-15 国民技术股份有限公司 一种低密度奇偶校验码译码方法
US20130332790A1 (en) * 2012-06-07 2013-12-12 Lsi Corporation LDPC Decision Driven Equalizer Adaptation
US8719682B2 (en) * 2012-06-15 2014-05-06 Lsi Corporation Adaptive calibration of noise predictive finite impulse response filter
US9612903B2 (en) * 2012-10-11 2017-04-04 Micron Technology, Inc. Updating reliability data with a variable node and check nodes
US9048870B2 (en) * 2012-11-19 2015-06-02 Lsi Corporation Low density parity check decoder with flexible saturation
US9021332B2 (en) * 2012-12-11 2015-04-28 Seagate Technology Llc Flash memory read error recovery with soft-decision decode
US9235467B2 (en) * 2013-03-15 2016-01-12 Pmc-Sierra Us, Inc. System and method with reference voltage partitioning for low density parity check decoding
US9235488B2 (en) * 2013-03-15 2016-01-12 Pmc-Sierra Us, Inc. System and method for random noise generation
US9252817B2 (en) * 2014-01-10 2016-02-02 SanDisk Technologies, Inc. Dynamic log-likelihood ratio mapping for error correcting code decoding
US10298263B2 (en) * 2014-02-18 2019-05-21 Seagate Technology Llc Refresh, run, aggregate decoder recovery
US9317365B2 (en) * 2014-03-06 2016-04-19 Seagate Technology Llc Soft decoding of polar codes
US20160027521A1 (en) * 2014-07-22 2016-01-28 NXGN Data, Inc. Method of flash channel calibration with multiple luts for adaptive multiple-read
CN104464822B (zh) * 2014-11-21 2016-04-20 湖南大学 一种基于闪存错误区间的ldpc纠错编码方法

Also Published As

Publication number Publication date
TWI710220B (zh) 2020-11-11
CN111628785A (zh) 2020-09-04
TWI663839B (zh) 2019-06-21
US20190089374A1 (en) 2019-03-21
US10630316B2 (en) 2020-04-21
CN111628785B (zh) 2023-03-28
CN107276594B (zh) 2020-07-17
US10164656B2 (en) 2018-12-25
TW201933796A (zh) 2019-08-16
US20170288699A1 (en) 2017-10-05
CN107276594A (zh) 2017-10-20

Similar Documents

Publication Publication Date Title
TWI663839B (zh) 使用硬選取硬解碼模式下的解碼器產生軟資訊的方法
KR101330132B1 (ko) 랩터 코드의 디코딩
Sarkis et al. Increasing the speed of polar list decoders
Ercan et al. On error-correction performance and implementation of polar code list decoders for 5G
TWI624153B (zh) 在硬決策軟解碼期間決定何時結束位元翻轉演算法的方法
US11177834B2 (en) Communication method and apparatus using polar codes
Cui et al. An improved gradient descent bit-flipping decoder for LDPC codes
Xiong et al. Symbol-based successive cancellation list decoder for polar codes
Jayasooriya et al. Analysis and design of Raptor codes using a multi-edge framework
KR101657912B1 (ko) 비이진 저밀도 패리티 검사 코드의 복호화 방법
TWI641233B (zh) 用於對低密度奇偶校驗資料進行解碼以對碼字進行解碼的方法以及解碼器
Heloir et al. Stochastic chase decoder for reed-solomon codes
CN112104379B (zh) 一种基于关键集的极化码置信度传播动态翻转译码方法
Saber et al. Design of generalized concatenated codes based on polar codes with very short outer codes
KR101484066B1 (ko) 엘디피시 부호의 디코딩 방법
Badar et al. Implementation of combinational logic for polar decoder
Xia et al. High throughput polar decoding using two-staged adaptive successive cancellation list decoding
JP2009290657A (ja) 誤り訂正装置
KR20170075200A (ko) 저밀도 패리티 검사 코드를 이용한 부호화 및 복호화 장치, 이를 위한 방법 및 이 방법이 기록된 컴퓨터로 판독 가능한 기록 매체
Kang The Advanced Decoding Schemes for Low-density Parity-check Codes
Xu et al. Novel Construction and Decoding of Polar Product Codes with SPC Codes
TW201714083A (zh) 以再編碼方案用於糾錯碼解碼的提前終止方法
Cronie et al. Decoding algorithms for binary Raptor codes over nonbinary channels
WO2021061058A1 (en) Noise and cyclic redundancy check aided list decoding of error correcting codes
Rybin The error-correcting capabilities of low-complexity decoded H-LDPC code as irregular LDPC code