CN107276594A - 使用硬选取硬译码模式下的译码器产生软信息的方法 - Google Patents

使用硬选取硬译码模式下的译码器产生软信息的方法 Download PDF

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CN107276594A
CN107276594A CN201710067945.9A CN201710067945A CN107276594A CN 107276594 A CN107276594 A CN 107276594A CN 201710067945 A CN201710067945 A CN 201710067945A CN 107276594 A CN107276594 A CN 107276594A
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杨宗杰
杜建东
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    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1108—Hard decision decoding, e.g. bit flipping, modified or weighted bit flipping
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
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    • H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
    • H—ELECTRICITY
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    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
    • H03M13/1125—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms using different domains for check node and bit node processing, wherein the different domains include probabilities, likelihood ratios, likelihood differences, log-likelihood ratios or log-likelihood difference pairs
    • H—ELECTRICITY
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    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1128—Judging correct decoding and iterative stopping criteria other than syndrome check and upper limit for decoding iterations
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    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/3707—Adaptive decoding and hybrid decoding, e.g. decoding methods or techniques providing more than one decoding algorithm for one code
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/3707—Adaptive decoding and hybrid decoding, e.g. decoding methods or techniques providing more than one decoding algorithm for one code
    • H03M13/3715—Adaptation to the number of estimated errors or to the channel state
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/45—Soft decoding, i.e. using symbol reliability information

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Abstract

本发明公开了一种使用操作于硬选取硬译码模式下的一第一译码器来针对操作于一硬选取软译码模式下的一第二译码器产生软信息的方法，包括有：产生一查找表，其中所述查找表将失败校验节点的数量炼结至对数相似比值；于所述第一译码器的第一次迭代中，输入失败校验节点的一数量至所述查找表以产生一对数相似比值；以及将输入失败校验节点的所述数量至所述查找表所产生的所述对数相似比值输出至所述第二译码器。本发明的有益之处在于，当自一第一解码架构切换至一第二解码架构时，能通过位翻转算法来减少迭代的次数。

Description

使用硬选取硬译码模式下的译码器产生软信息的方法
技术领域
本发明涉及一种用于低密度奇偶校验(low-density parity check，LDPC)译码器的位翻转算法，尤其涉及一种通过在第一译码器进行硬选取硬译码期间提供软信息给第二译码器以降低位翻转算法的迭代次数的方法。
背景技术
低密度奇偶校验译码器是使用具有奇偶位(parity bit)的线性错误校正码来进行译码，其中奇偶位会提供用于验证接收到的码字(codeword)的奇偶方程式给译码器。举例来说，低密度奇偶校验可为一具有固定长度的二进制代码，其中所有的符元(symbol)相加会等于零。
在编码过程中，所有的数据位会被重复执行并且被传送至对应的编码器，其中每个编码器会产生一奇偶符元(parity symbol)。码字是由k个信息位(information digit)以及r个校验位(check digit)所组成。如果码字总共有n位，则k＝n-r。上述码字可用一奇偶校验矩阵来表示，其中所述奇偶校验矩阵具有r列(表示方程式的数量)以及n行(表示位数)，如图1所示。这些码之所以被称为「低密度」是因为相较于奇偶校验矩阵中位0的数量而言，位1的数量相对的少。在解码过程中，每次的奇偶校验都可视为一奇偶校验码，并随后与其他奇偶校验码一起进行交互校验(cross-check)，其中译码会在校验节点(check node)进行，而交互校验会在变量节点(variable node)进行。
LDPC译码器支持三种模式：硬判定硬解码(硬选取hard decoding)、软判定硬解码(soft decision hard decoding)，以及软判定软解码(soft decision hard decoding)。图1是奇偶校验矩阵H(图1的上半部份)以及Tanner Graph(图1的下半部份)的示意图，其中Tanner Graph是另一种表示码字的方式，并且可用于解释当使用一位翻转(bit flipping)算法时，LDPC译码器的一些涉及硬判定软解码的操作。
在Tunner Graph中，方形(C1～C4)所表示的校验节点(check node)代表奇偶位(parity bit)的数量，且圆形(V1～V7)所表示的变量节点(variable node)是一码字中位的数量。如果一特定方程式与码符元(code symbol)有关，则对应的校验节点与变量节点之间会以联机来表示。被估测的消息会沿着这些联机来传递，并且于节点上以不同的方式组合。一开始时，变量节点将发送一估测至所有联机上的校验节点，其中这些联机包括被认为是正确的位。接着，每个校验节点会依据对所有其他的连接的估测(connected estimate)来针对每一变数节点进行新的估测，并且将新的估测传回至变量节点。新的估测是基于：奇偶校验方程式迫使所有的变量节点连接至一特定校验节点，以使总和为零。
这些变量节点会接收新的信息以及使用一多数规则(majority rule)(也就是硬判定)，来判断所传送的原始位的值是否正确，若不正确，所述原始位会被翻转(flipped)。所述位接着会被传回至所述校验节点，且上述步骤会被迭代地执行一预定次数，直到符合这些校验节点的奇偶校验方程式。若有符合这些奇偶校验方程式(也就是校验节点所计算的值符合接收自变量节点的值)，则可启用提前终止(early termination)，这会使得系统在最大迭代次数达到之前就结束译码程序。
若目前使用的译码模式无法在达到最大迭代次数之前就完成译码，则需要切换为另一种译码模式。基于硬选取硬解码是最省电的一种模式，切换顺序通常是：硬选取硬解码→硬选取软解码→软选取软译码，其中后两个模式需要一些基于置信度传播算法而建立的软信息。节点所接收到的每一则信息(message)都是一条件机率(conditionalprobability)，即接收到的位是0或1。在运行LDPC译码器之前就已事先得知的机率称为后验机率(a posteriori probability，APP)，其可通过对所述译码器进行一定次数的迭代来得知。因此，当从一硬选取硬译码架构切换至一硬选取软译码架构时，所述LDPC译码器必须先执行一定次数的迭代来取得所需的后验机率。
发明内容
本发明的一目的在于，当自一第一解码架构切换至一第二译码架构时，使用一位翻转算法来减少迭代的次数。
本发明的一实施例公开一种使用操作于硬选取硬译码(hard decision harddecoding)模式下的一第一译码器来针对操作于一硬选取软译码(hard decision softdecoding)模式下的一第二译码器产生软信息的方法，包括有：产生一查找表，其中所述查找表将失败校验节点(failed check node)的数量炼结(link)至对数相似比值(log-likelihood ratio，LLR)；于所述第一译码器的第一次迭代中，输入失败校验节点的一数量至所述查找表以产生一对数相似比值；以及将输入失败校验节点的所述数量至所述查找表所产生的所述对数相似比值输出至所述第二译码器。
附图说明
图1是根据现有技术的用于进行低密度奇偶校验译码的一奇偶校验矩阵以及Tanner Graph的示意图。
其中，附图标记说明如下：
H 奇偶校验矩阵
C1～C4 校验节点
V1～V7 变数节点
具体实施方式
如以上相关技术所示，软信息用于表示变量节点的码字的可信赖程度。举例来说，软信息可为一对数相似比值(log-likelihood ratio，LLR)，其被硬选取软译码以及软选取软译码中的变量节点所使用。对数相似比值是由后验机率来决定，并且关联于有多少个校验节点是失败的(也就是变量节点的码字的可信程度)以及系统中错误位的数量。表1以及表2列举了失败校验节点、错误位以及对数相似比值之间的关系。
表1–后验机率
表2–对数相似比值
其中上述对数相似比值是依据以下方程序计算：
LLR-_i＝Max LLR*((column_weight+1–i)/column_weight+1)
在上述方程式中，i代表失败校验节点的数量。通过使用表1以及表2，可据此产生一查找表(look-up table)，其中所述查找表直接地将失败校验节点的数量炼结(link)于所述对数相似比值，且所述查找表可如表3所示：
表3
失败校验节点 对数相似比值
0 63
1 53
2 42
3 31
4 21
5 10
因此，即使当LDPC译码器正操作于硬选取硬译码模式，仍可通过使用所述查找表来产生软信息。
在本发明的一实施例中，在硬选取硬译码模式中使用一位翻转算法的一第一译码器会通过决定失败校验节点的数量并且将此信息输入至所述查找表以输出一对数相似比值，以于第一次迭代中产生多个对数相似比值。所述第一译码器接着会将所述对数相似比值传给操作于硬选取软译码模式的一N2译码器。
因此，在位翻转译码器的第一次迭代中，信息也将被提供给软译码以及硬译码使用。
以上所述仅为本发明的优选实施例而已，并不用于限制本发明，对于本领域的技术人员来说，本发明可以有各种更改和变化。凡在本发明的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。

Claims (3)

1.一种使用操作于硬选取硬译码模式下的一第一译码器来针对操作于一硬选取软译码模式下的一第二译码器产生软信息的方法，包括有:
产生一查找表，其中所述查找表将失败校验节点的数量炼结至对数相似比值；
于所述第一译码器的第一次迭代中，输入失败校验节点的一数量至所述查找表以产生一对数相似比值；以及
将输入失败校验节点的所述数量至所述查找表所产生的所述对数相似比值输出至所述第二译码器。
2.如权利要求1所述的方法，其中所述第一译码器以及所述第二译码器都使用一位翻转算法来进行译码。
3.如权利要求1所述的方法，其中所述查找表是通过以下方程序产生：
LLR-_i＝Max LLR*((column_weight+1–i)/column_weight+1)
其中i代表失败校验节点的数量。
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