TW201640624A - Film packaging substrate, chip on film package and packaging method thereof - Google Patents

Film packaging substrate, chip on film package and packaging method thereof Download PDF

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Publication number
TW201640624A
TW201640624A TW104115191A TW104115191A TW201640624A TW 201640624 A TW201640624 A TW 201640624A TW 104115191 A TW104115191 A TW 104115191A TW 104115191 A TW104115191 A TW 104115191A TW 201640624 A TW201640624 A TW 201640624A
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Taiwan
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flexible substrate
flip chip
wafer
wires
film
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TW104115191A
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Chinese (zh)
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TWI567880B (en
Inventor
陳崇龍
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南茂科技股份有限公司
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Priority to TW104115191A priority Critical patent/TWI567880B/en
Priority to CN201510454015.XA priority patent/CN106158763B/en
Publication of TW201640624A publication Critical patent/TW201640624A/en
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Publication of TWI567880B publication Critical patent/TWI567880B/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector

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  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)

Abstract

A film packaging substrate includes a flexible base and a plurality of leads. The flexible base has a first surface with a chip bonding area disposed thereon. The leads are configured on the first surface, and each of the leads has an inner lead extending into the chip bonding area. The flexible base has a plurality of roulette perforations encircling a tear-off area. A chip on film (COF) package and a manufacturing method thereof use the foregoing film packaging substrate to enhance the heat dissipation effect of the COF package without changing the thickness of the COF package.

Description

薄膜封裝基板、薄膜覆晶封裝體以及薄膜覆晶封裝方法 Thin film packaging substrate, thin film flip chip package and film flip chip packaging method

本發明係關於一種薄膜封裝基板、使用此薄膜封裝基板的薄膜覆晶封裝結構及薄膜覆晶封裝方法,並且特別地,本發明係關於一種可增加散熱效果的薄膜封裝基板、使用此薄膜封裝基板的薄膜覆晶封裝結構及薄膜覆晶封裝方法。 The present invention relates to a thin film package substrate, a thin film flip chip package structure and a film flip chip package method using the same, and in particular, the present invention relates to a thin film package substrate capable of increasing heat dissipation effect, using the film package substrate The film flip chip package structure and the film flip chip packaging method.

薄膜覆晶(Chip On Film,COF)封裝結構乃是一種將晶片封裝於可撓性基板或是軟性基板的技術,一般常用於液晶顯示器中的驅動IC的封裝之用。 The chip on-film (COF) package structure is a technology for packaging a chip on a flexible substrate or a flexible substrate, and is generally used for packaging a driver IC in a liquid crystal display.

請參閱圖一,圖一係繪示先前技術之薄膜覆晶封裝體1的示意圖。如圖一所示,薄膜覆晶封裝體1包含可撓性基板10、導線12、防銲層14、晶片16及封裝膠體18,其中導線12設置在可撓性基板10的一表面上,並局部被防銲層14所覆蓋,晶片16設置在此表面預設之晶片接合區中並與導線12電性連接,封裝膠體18填充於晶片16與可撓性基板10之間以固定並保護晶片16及晶片16與導線12的連接處。 Referring to FIG. 1 , FIG. 1 is a schematic diagram showing a prior art thin film flip chip package 1 . As shown in FIG. 1 , the film flip chip package 1 includes a flexible substrate 10 , a wire 12 , a solder resist layer 14 , a wafer 16 , and an encapsulant 18 , wherein the wires 12 are disposed on a surface of the flexible substrate 10 , and Partially covered by the solder resist layer 14, the wafer 16 is disposed in the predetermined wafer bonding region of the surface and electrically connected to the wire 12, and the encapsulant 18 is filled between the wafer 16 and the flexible substrate 10 to fix and protect the wafer. 16 and the junction of the wafer 16 and the wire 12.

於先前技術中,當薄膜覆晶封裝體1連接至其他電路結構而運作時晶片16會產生熱量。隨著積體電路微小化,晶片16功能向 上提升的同時也會產生更多的熱量,若這些熱量無法有效地從晶片16或薄膜覆晶封裝體1消散,將會造成晶片16或薄膜覆晶封裝體1的效能降低,更甚者,有可能使晶片16或薄膜覆晶封裝體1損壞。因此,薄膜覆晶封裝體1需增設散熱機制來幫助散熱。 In the prior art, the wafer 16 generates heat when the film flip chip package 1 is connected to other circuit structures for operation. With the miniaturization of the integrated circuit, the function of the wafer 16 The upper lift also generates more heat. If the heat cannot be effectively dissipated from the wafer 16 or the thin film flip chip 1, the performance of the wafer 16 or the thin film flip chip 1 will be reduced, and moreover, It is possible to damage the wafer 16 or the film flip chip package 1. Therefore, the film flip chip package 1 needs to be provided with a heat dissipation mechanism to help dissipate heat.

因此,先前技術之薄膜覆晶封裝體1上通常會透過貼附金屬材質的散熱片或者是塗佈散熱膠來幫助散熱,例如,於圖一中,薄膜覆晶封裝體1的晶片16上方及/或可撓性基板10下方設置有散熱層S。散熱層S可透過傳導的方式吸收晶片16運作時產生的熱量,並將熱量發散至周圍空氣中,以幫助薄膜覆晶封裝體1進行散熱。 Therefore, the prior art thin film flip chip package 1 is usually provided with a heat sink attached to a metal material or a heat dissipating adhesive to help dissipate heat. For example, in FIG. 1, the wafer flip chip package 1 is over the wafer 16 and Or a heat dissipation layer S is provided under the flexible substrate 10. The heat dissipation layer S can absorb the heat generated by the operation of the wafer 16 in a conductive manner and dissipate the heat into the surrounding air to help the film flip chip package 1 to dissipate heat.

然而,散熱層S不論是設置於晶片16上方或者於可撓性基板10下方,都會增加薄膜覆晶封裝體1的厚度。目前各種電子產品趨向小型化、輕量化,因此其內部電路或各種模組的空間設計相形重要,先前技術的散熱層S會增加薄膜覆晶封裝體1的厚度,令薄膜覆晶封裝體1對電子產品的小型化將產生不利的影響。另一方面,散熱層S也會使薄膜覆晶封裝體1的可撓性降低,增加製程或組裝上的困難度。 However, whether the heat dissipation layer S is disposed above the wafer 16 or under the flexible substrate 10 increases the thickness of the thin film flip chip package 1. At present, various electronic products tend to be miniaturized and lightweight, so the space design of the internal circuit or various modules is important. The heat dissipation layer S of the prior art increases the thickness of the film flip chip package 1 and makes the film flip chip package 1 pair. The miniaturization of electronic products will have an adverse impact. On the other hand, the heat dissipation layer S also lowers the flexibility of the film flip chip package 1 and increases the difficulty in the process or assembly.

基於上述問題,有必要研發一種能有效幫助薄膜覆晶封裝體進行散熱且不增加薄膜覆晶封裝體厚度的結構或方法,以符合現今的電子產品小型化與輕量化的需求。 Based on the above problems, it is necessary to develop a structure or method that can effectively help the thin film flip chip package to dissipate heat without increasing the thickness of the film flip chip package, in order to meet the demand for miniaturization and light weight of today's electronic products.

本發明的一範疇在於提供一種可幫助散熱的薄膜封裝基板。根據一具體實施例,本發明之薄膜封裝基板包含可撓性基材以及多條導線。可撓性基材具有第一表面,且第一表面上具有晶片接合 區。多條導線設置於第一表面上,並且各導線具有內引腳延伸至晶片接合區內。可撓性基材具有多個騎縫孔位於晶片接合區之垂直投影範圍內,並圍繞出一個移除區域。 One aspect of the present invention is to provide a thin film package substrate that can help dissipate heat. According to a specific embodiment, the thin film encapsulation substrate of the present invention comprises a flexible substrate and a plurality of wires. The flexible substrate has a first surface and has a wafer bond on the first surface Area. A plurality of wires are disposed on the first surface, and each of the wires has an inner lead extending into the wafer bonding region. The flexible substrate has a plurality of seating holes located within a vertical projection range of the wafer bonding area and surrounding a removed area.

本發明之另一範疇在於提供一種薄膜覆晶封裝體,具有良好的散熱效果且不額外增加厚度。根據一具體實施例,本發明之薄膜覆晶封裝體包含可撓性基材、多條導線、晶片及封裝膠體。可撓性基材具有第一表面,且第一表面上具有晶片接合區,可撓性基材於晶片接合區中形成穿透孔,且可撓性基材於穿透孔的側壁上具有殘留結構。多條導線設置於第一表面上,並且各導線具有內引腳延伸至晶片接合區內。晶片設置於晶片接合區中,並與導線的內引腳電性連接。封裝膠體填充於晶片與可撓性基材之間,而穿透孔暴露出部分的封裝膠體。 Another aspect of the present invention is to provide a thin film flip chip package which has a good heat dissipation effect without additionally increasing the thickness. According to a specific embodiment, the film flip chip package of the present invention comprises a flexible substrate, a plurality of wires, a wafer, and an encapsulant. The flexible substrate has a first surface, and the first surface has a wafer bonding region, the flexible substrate forms a through hole in the wafer bonding region, and the flexible substrate has a residue on the sidewall of the through hole structure. A plurality of wires are disposed on the first surface, and each of the wires has an inner lead extending into the wafer bonding region. The wafer is disposed in the wafer bonding region and electrically connected to the inner leads of the wires. The encapsulant is filled between the wafer and the flexible substrate, and the through hole exposes a portion of the encapsulant.

本發明之另一範疇在於提供薄膜覆晶封裝方法,可幫助薄膜覆晶封裝體進行散熱且不增加薄膜覆晶封裝體的厚度。根據一具體實施例,本發明之薄膜覆晶封裝方法包含下列步驟:準備具有可撓性基材及多條導線的薄膜封裝基板,其中可撓性基材具有第一表面,第一表面上具有晶片接合區,導線設置於第一表面上,各導線具有一內引腳延伸至晶片接合區內,且可撓性基材具有多個騎縫孔位於晶片接合區之垂直投影範圍內並圍繞出移除區域;設置晶片於晶片接合區中,並使晶片電性連接各導線的內引腳;形成封裝膠體於晶片及可撓性基材之間;以及沿騎縫孔去除可撓性基材的移除區域,使可撓性基材形成穿透孔暴露出部分封裝膠體。 Another aspect of the present invention is to provide a film flip chip packaging method that can help the film flip chip package to dissipate heat without increasing the thickness of the film flip chip package. According to a specific embodiment, the film flip chip packaging method of the present invention comprises the steps of: preparing a thin film package substrate having a flexible substrate and a plurality of wires, wherein the flexible substrate has a first surface having a first surface a wafer bonding region, the wires are disposed on the first surface, each of the wires has an inner lead extending into the wafer bonding region, and the flexible substrate has a plurality of riding holes located in a vertical projection range of the wafer bonding region and surrounding the exiting Dividing the wafer in the wafer bonding region and electrically connecting the wafer to the inner leads of the respective wires; forming an encapsulant between the wafer and the flexible substrate; and removing the flexible substrate from the saddle hole In addition to the area, the flexible substrate is formed into a through hole to expose a portion of the encapsulant.

關於本發明之優點與精神可以藉由以下的發明詳述以及所附圖式得到進一步的了解。 The advantages and spirit of the present invention will be further understood from the following detailed description of the invention.

1‧‧‧薄膜覆晶封裝體 1‧‧‧film flip chip package

10‧‧‧可撓性基板 10‧‧‧Flexible substrate

12‧‧‧導線 12‧‧‧ wire

14‧‧‧防銲層 14‧‧‧ solder mask

16‧‧‧晶片 16‧‧‧ wafer

18‧‧‧封裝膠體 18‧‧‧Package colloid

S‧‧‧散熱層 S‧‧‧heat layer

2、5‧‧‧薄膜封裝基板 2, 5‧‧‧ film package substrate

20、30、50‧‧‧可撓性基材 20, 30, 50‧‧‧Flexible substrates

52‧‧‧導線 52‧‧‧Wire

22、32、24、34、54‧‧‧防銲層 22, 32, 24, 34, 54‧‧‧ solder mask

200a、300a、500a‧‧‧第一表面 200a, 300a, 500a‧‧‧ first surface

200b、300b、500b‧‧‧第二表面 200b, 300b, 500b‧‧‧ second surface

202、302、502‧‧‧晶片接合區 202, 302, 502‧‧‧ wafer bonding area

204、504‧‧‧騎縫孔 204, 504‧‧‧ Riding holes

206、506‧‧‧移除區域 206, 506‧‧‧Removed area

3、3’‧‧‧薄膜覆晶封裝體 3, 3'‧‧‧ film flip chip package

36、6‧‧‧晶片 36, 6‧‧‧ wafer

360、60‧‧‧凸塊 360, 60‧‧ ‧ bumps

38、7‧‧‧封裝膠體 38, 7‧‧‧Package colloid

304、508‧‧‧充透孔 304, 508‧‧‧ hole

308、509‧‧‧殘留結構 308, 509‧‧‧Residual structure

40、8‧‧‧散熱件 40, 8‧‧ ‧ heat sink

T1、T2‧‧‧厚度 T1, T2‧‧‧ thickness

圖一係繪示先前技術之薄膜覆晶封裝體的示意圖。 FIG. 1 is a schematic view showing a prior art thin film flip chip package.

圖二A係繪示根據本發明之一具體實施例之薄膜封裝基板的仰視圖。 2A is a bottom plan view of a thin film package substrate in accordance with an embodiment of the present invention.

圖二B係繪示根據圖二A之薄膜封裝基板的剖面圖。 Figure 2B is a cross-sectional view showing the thin film package substrate according to Figure 2A.

圖三A係繪示根據本發明之一具體實施例之薄膜覆晶封裝體的剖面圖。 Figure 3A is a cross-sectional view showing a film flip chip package in accordance with an embodiment of the present invention.

圖三B係繪示圖三A之薄膜覆晶封裝體的仰視圖。 FIG. 3B is a bottom view of the film flip chip package of FIG. 3A.

圖四係繪示根據本發明之另一具體實施例之薄膜覆晶封裝體的剖面圖。 4 is a cross-sectional view showing a thin film flip chip package according to another embodiment of the present invention.

圖五A至圖五E係繪示根據本發明之另一具體實施例之薄膜覆晶封裝方法的各步驟的結構示意圖。 FIG. 5A to FIG. 5E are structural diagrams showing the steps of a method of film flip chip packaging according to another embodiment of the present invention.

請參閱圖二A及圖二B,圖二A係繪示根據本發明之一具體實施例之薄膜封裝基板2的仰視圖,圖二B係繪示根據圖二A之薄膜封裝基板2的剖面圖。如圖二A及圖二B所示,本發明之薄膜封裝基板2包含可撓性基材20、多條導線22及防銲層24,其中導線22及防銲層24設置在可撓性基材20之上。 Referring to FIG. 2A and FIG. 2B, FIG. 2A is a bottom view of a thin film package substrate 2 according to an embodiment of the present invention, and FIG. 2B is a cross section of the thin film package substrate 2 according to FIG. Figure. As shown in FIG. 2A and FIG. 2B, the thin film package substrate 2 of the present invention comprises a flexible substrate 20, a plurality of wires 22 and a solder resist layer 24, wherein the wires 22 and the solder resist 24 are disposed on the flexible base. Above the material 20.

可撓性基材20具有相對的第一表面200a與第二表面200b,而第一表面200a上預設有晶片接合區202。多條導線22分別設置 在第一表面200a上,並且各導線22分別具有內引腳延伸至晶片接合區202中。防銲層24局部覆蓋導線22並暴露出晶片接合區202,一般而言,晶片接合區202之範圍即是由防銲層24的一開口所界定。於晶片接合區202的垂直投影範圍內,可撓性基材20還包含多個騎縫孔204。騎縫孔204於晶片接合區202的垂直投影範圍中環繞出移除區域206,而導線22的各內引腳可位於移除區域206之外。各個騎縫孔204之間係以一間距接續間隔排列而圍繞出移除區域206。於本具體實施例中,各個騎縫孔204為貫穿第二表面200b的盲孔,也就是各個騎縫孔204未完全貫穿可撓性基材20,使得可撓性基材20在接近第一表面200a處保留了一厚度T1未被騎縫孔204貫通,而此保留的厚度T1可約介於可撓性基材20的厚度T2的1/6至1/3之間。然而,騎縫孔204之形式並不限定於本具體實施例之型態,其可為完全貫穿可撓性基材20的貫通孔,或是貫穿第一表面200a的盲孔。 The flexible substrate 20 has opposing first and second surfaces 200a, 200b, and the first surface 200a is pre-formed with a wafer land 202. Multiple wires 22 are separately set On the first surface 200a, and each of the wires 22 has an inner lead extending into the wafer bonding region 202, respectively. The solder mask layer 24 partially covers the wires 22 and exposes the die bond region 202. Generally, the range of the die bond regions 202 is defined by an opening of the solder resist layer 24. Within the vertical projection range of the wafer bond area 202, the flexible substrate 20 also includes a plurality of bayonet holes 204. The saddle hole 204 surrounds the removal region 206 in the vertical projection range of the wafer bond region 202, and the inner pins of the wire 22 may be located outside the removal region 206. Each of the riding holes 204 is arranged at a spaced apart interval to surround the removal region 206. In the present embodiment, each of the riding holes 204 is a blind hole penetrating the second surface 200b, that is, each of the riding holes 204 does not completely penetrate the flexible substrate 20, so that the flexible substrate 20 is close to the first surface 200a. A thickness T1 is left unpenetrated by the piercing hole 204, and the remaining thickness T1 may be between about 1/6 and 1/3 of the thickness T2 of the flexible substrate 20. However, the form of the riding hole 204 is not limited to the embodiment of the present embodiment, and may be a through hole that completely penetrates the flexible substrate 20 or a blind hole that penetrates the first surface 200a.

於本具體實施例中,騎縫孔204所圍繞出之移除區域206為矩形,但在實務中,也可為圓形、橢圓形或其他適合的形狀。另一方面,騎縫孔204的形狀實務中也可包含圓形、橢圓形或矩形等不同形狀,而不限定於本具體實施例之橢圓形。 In the present embodiment, the removal region 206 surrounded by the burr hole 204 is rectangular, but in practice, it may be circular, elliptical or other suitable shape. On the other hand, the shape of the riding hole 204 may also include different shapes such as a circle, an ellipse or a rectangle, and is not limited to the elliptical shape of the specific embodiment.

上述薄膜封裝基板2可用於薄膜覆晶封裝體上,令薄膜覆晶封裝體具有良好的散熱效果,同時不會增加薄膜覆晶封裝體的厚度。請一併參閱圖三A及圖三B,圖三A係繪示根據本發明之一具體實施例之薄膜覆晶封裝體3的剖面圖,圖三B係繪示圖三A之薄膜覆晶封裝體3的仰視圖。如圖三A所示,薄膜覆晶封裝體3包含可撓性基材30、 多條導線32、防銲層34、晶片36以及封裝膠體38,其中多條導線32、防銲層34、晶片36以及封裝膠體38分別設置於可撓性基材30之上。 The thin film package substrate 2 can be used on the film flip chip package, so that the film flip chip package has a good heat dissipation effect without increasing the thickness of the film flip chip package. Referring to FIG. 3A and FIG. 3B together, FIG. 3A is a cross-sectional view of a thin film flip chip package 3 according to an embodiment of the present invention, and FIG. 3B is a thin film flip chip of FIG. A bottom view of the package 3. As shown in FIG. 3A, the film flip chip package 3 includes a flexible substrate 30, A plurality of wires 32, a solder resist layer 34, a wafer 36, and an encapsulant 38 are disposed, wherein the plurality of wires 32, the solder resist layer 34, the wafer 36, and the encapsulant 38 are disposed on the flexible substrate 30, respectively.

於本具體實施例中,可撓性基材30具有第一表面300a以及相對於第一表面300a之第二表面300b,第一表面300a上設有晶片接合區302,且可撓性基材30在晶片接合區302內形成穿透孔304。多條導線32設置在可撓性基材30的第一表面300a上,且各導線32具有內引腳延伸至晶片接合區302內。防銲層34局部覆蓋導線32並暴露出晶片接合區302。晶片36設置於晶片接合區302中,並可例如透過多個凸塊360分別與多條導線32的內引腳電性連接。各導線32之內引腳可位於穿透孔304之外,且各導線32具有相對於內引腳之外引腳,於實務中可用來電性連接外部電路結構,進而能使晶片36與外部電路結構互相溝通。封裝膠體38填充於晶片36與可撓性基材30的第一表面300a之間,用以固定並保護晶片36及導線32之間的連接。穿透孔304貫穿可撓性基材30並暴露出部分的封裝膠體38,如圖三B所示。 In the present embodiment, the flexible substrate 30 has a first surface 300a and a second surface 300b opposite to the first surface 300a. The first surface 300a is provided with a wafer bonding region 302, and the flexible substrate 30 is provided. A through hole 304 is formed in the wafer bonding region 302. A plurality of wires 32 are disposed on the first surface 300a of the flexible substrate 30, and each of the wires 32 has an inner lead extending into the wafer bonding region 302. The solder mask layer 34 partially covers the wires 32 and exposes the wafer land 302. The wafers 36 are disposed in the wafer bonding region 302 and can be electrically connected to the inner leads of the plurality of wires 32, for example, through the plurality of bumps 360. The inner pins of each of the wires 32 may be located outside the through hole 304, and each of the wires 32 has a pin other than the inner pin. In practice, the external circuit structure may be electrically connected to enable the chip 36 and the external circuit. Structure communicates with each other. The encapsulant 38 is filled between the wafer 36 and the first surface 300a of the flexible substrate 30 for securing and protecting the connection between the wafer 36 and the wires 32. The through hole 304 penetrates the flexible substrate 30 and exposes a portion of the encapsulant 38 as shown in FIG. 3B.

於本具體實施例中,可撓性基材30於穿透孔304的側壁上具有殘留結構308,此殘留結構308係由撕除原本位於穿透孔304內的部分可撓性基材30而殘留形成。詳言之,可撓性基材30在晶片接合區302的垂直投影範圍內原本形成多個騎縫孔以圍繞出移除區域,如同前述之具體實施例所示,而當晶片36以及封裝膠體38皆設置於可撓性基材30後,再沿騎縫孔撕除如前述具體實施例之移除區域的可撓性基材30,進而形成穿透孔304。由於穿透孔304是由沿騎縫孔撕除可撓性基材30的方式形成,故可撓性基材30在穿透孔304的側壁上會留下殘留結 構308。殘留結構308於本具體實施例中為規則排列的凹凸結構,但根據不同可撓性基材的材料特性差異、騎縫孔的形式或者是撕除的工具及方法不同,實務中殘留結構308的形狀可能為齒狀、波浪狀或其他形狀。 In the present embodiment, the flexible substrate 30 has a residual structure 308 on the sidewall of the through hole 304. The residual structure 308 is formed by tearing off a portion of the flexible substrate 30 originally located in the through hole 304. Residual formation. In particular, the flexible substrate 30 is originally formed with a plurality of seating holes in the vertical projection range of the wafer bonding region 302 to surround the removed regions, as shown in the foregoing embodiments, while the wafer 36 and the encapsulant 38 are included. After being disposed on the flexible substrate 30, the flexible substrate 30 as in the removal region of the foregoing embodiment is removed along the burr hole to form the penetration hole 304. Since the penetration hole 304 is formed by tearing the flexible substrate 30 along the saddle hole, the flexible substrate 30 leaves a residual knot on the side wall of the penetration hole 304. Structure 308. The residual structure 308 is a regularly arranged relief structure in this embodiment, but the shape of the residual structure 308 in practice differs depending on the material properties of the different flexible substrates, the form of the snap holes, or the tools and methods of tearing. May be toothed, wavy or other shapes.

穿透孔304位於晶片接合區302中,並暴露出部分的封裝膠體38,故晶片36運作時所產生的熱量可傳導至封裝膠體38,接著藉由穿透孔304接觸空氣而消散至空氣中,因此,穿透孔304可幫助薄膜覆晶封裝體3進行散熱,同時不會增加薄膜覆晶封裝體3的厚度或影響到薄膜覆晶封裝體3的可撓性。 The through hole 304 is located in the wafer bonding region 302 and exposes a portion of the encapsulant 38. Therefore, the heat generated by the operation of the wafer 36 can be conducted to the encapsulant 38, and then dissipated into the air by the penetration hole 304 contacting the air. Therefore, the through hole 304 can help the film flip chip package 3 to dissipate heat without increasing the thickness of the film flip chip package 3 or affecting the flexibility of the film flip chip package 3.

請參閱圖四,圖四係繪示根據本發明之另一具體實施例之薄膜覆晶封裝體3’的剖面圖。如圖四所示,本具體實施例與上一具體實施例之薄膜覆晶封裝體3不同處,在於本具體實施例之薄膜覆晶封裝體3’進一步包含了散熱件40。散熱件40設置在穿透孔304之中並接觸封裝膠體38,因此也不會增加薄膜覆晶封裝體3’的厚度。散熱件40可自封裝膠體38吸收熱量並將熱量傳導消散至空氣中。散熱件40於實務中可為散熱膠,由於散熱膠一般為彈性材質,故散熱件40不會影響到薄膜覆晶封裝體3’的可撓性。 Referring to Figure 4, there is shown a cross-sectional view of a thin film flip chip package 3' according to another embodiment of the present invention. As shown in FIG. 4, the present embodiment differs from the thin film flip chip package 3 of the previous embodiment in that the film flip chip package 3' of the specific embodiment further includes a heat sink 40. The heat sink 40 is disposed in the penetration hole 304 and contacts the encapsulant 38, and thus does not increase the thickness of the film flip chip 3'. The heat sink 40 can absorb heat from the encapsulant 38 and dissipate heat to the air. The heat dissipating member 40 can be a heat dissipating glue in practice. Since the heat dissipating rubber is generally an elastic material, the heat dissipating member 40 does not affect the flexibility of the film flip chip package 3'.

請參閱圖五A至圖五E,圖五A至圖五E係繪示根據本發明之另一具體實施例之薄膜覆晶封裝方法的各步驟的結構示意圖。如圖五A所示,準備薄膜封裝基板5,其中薄膜封裝基板5包含可撓性基材50、多條導線52以及防銲層54。可撓性基材50具有相對的第一表面500a與第二表面500b,而第一表面500a上具有晶片接合區502。各導線52分 別設置在第一表面500a上,且具有內引腳延伸至晶片接合區502內。防銲層54局部覆蓋導線52並暴露出晶片接合區502。可撓性基材50在晶片接合區502的垂直投影範圍內具有多個騎縫孔504,多個騎縫孔504在晶片接合區502的垂直投影範圍中圍繞出移除區域506。而導線52的內引腳可位於移除區域506之外。各個騎縫孔504之間以一間距接續間隔排列而圍繞出移除區域506。於本具體實施例中,各個騎縫孔504為貫穿第二表面500b的盲孔,使得可撓性基材50在接近第一表面500a處保留了一厚度T1未被騎縫孔504貫通,而此保留的厚度T1可約介於可撓性基材50的厚度T2的1/6至1/3之間。然而,騎縫孔504之形式並不限定於本具體實施例之型態,其可為完全貫穿可撓性基材50的貫通孔,或是貫穿第一表面500a的盲孔。騎縫孔504於實務中可為圓形、橢圓形、矩形或其他適合的形狀,同樣地,移除區域506也可為矩形、圓形、橢圓形或其他適合的形狀。 Referring to FIG. 5A to FIG. 5E, FIG. 5A to FIG. 5E are schematic structural diagrams showing steps of a film flip chip packaging method according to another embodiment of the present invention. As shown in FIG. 5A, a thin film package substrate 5 is prepared, wherein the thin film package substrate 5 includes a flexible substrate 50, a plurality of wires 52, and a solder resist layer 54. The flexible substrate 50 has opposing first and second surfaces 500a, 500b, and the first surface 500a has a wafer land 502 thereon. 52 points for each wire It is not disposed on the first surface 500a and has an inner lead extending into the wafer bonding region 502. Solder mask layer 54 partially covers wire 52 and exposes wafer bond region 502. The flexible substrate 50 has a plurality of seating apertures 504 in a vertical projection range of the wafer bonding region 502 that surrounds the removal region 506 in a vertical projection range of the wafer bonding region 502. The inner pins of the wires 52 can be located outside of the removal region 506. Each of the riding holes 504 is arranged at a spaced apart interval to surround the removal region 506. In the present embodiment, each of the riding holes 504 is a blind hole penetrating the second surface 500b such that the flexible substrate 50 retains a thickness T1 near the first surface 500a without being penetrated by the riding hole 504, and this retention is retained. The thickness T1 may be between about 1/6 and 1/3 of the thickness T2 of the flexible substrate 50. However, the form of the riding hole 504 is not limited to the embodiment of the present embodiment, and may be a through hole that completely penetrates the flexible substrate 50 or a blind hole that penetrates the first surface 500a. The burrowing aperture 504 can be circular, elliptical, rectangular or other suitable shape in practice. Likewise, the removal region 506 can also be rectangular, circular, elliptical or other suitable shape.

接著,如圖五B所示,設置晶片6於可撓性基材50的晶片接合區502內,晶片6藉由凸塊60與導線52之內引腳互相電性連接。接著如圖五C所示,在晶片6及可撓性基材50之間形成封裝膠體7。 Next, as shown in FIG. 5B, the wafer 6 is disposed in the wafer bonding region 502 of the flexible substrate 50. The wafer 6 is electrically connected to the inner leads of the wires 52 by the bumps 60. Next, as shown in FIG. 5C, an encapsulant 7 is formed between the wafer 6 and the flexible substrate 50.

如圖五D所示,沿著前述的騎縫孔504去除可撓性基材50的移除區域506,使可撓性基材50於晶片接合區502內形成穿透孔508,而穿透孔508暴露出部分的封裝膠體7。上述去除移除區域506的步驟,於實務中可以撕除的方式來進行。由於移除區域506是以騎縫孔504接續間隔排列而界定出,因此撕除移除區域506後可撓性基材50在穿透孔508的側壁處會具有殘留結構509,且此殘留結構509為由仰視視角看上 去為規則排列的凹凸結構(如圖三B所示)。根據騎縫孔504的形狀及間距大小,殘留結構509的形狀可為齒狀結構、波浪狀結構或其他形狀。 As shown in FIG. 5D, the removed region 506 of the flexible substrate 50 is removed along the aforementioned burr hole 504, so that the flexible substrate 50 forms a through hole 508 in the wafer bonding region 502, and the through hole 508 exposes a portion of the encapsulant 7 . The step of removing the removal region 506 described above can be performed in a manner that can be torn off in practice. Since the removal regions 506 are defined by successive spacing of the bayonet apertures 504, the flexible substrate 50 will have a residual structure 509 at the sidewalls of the penetration apertures 508 after the removal of the removal regions 506, and this residual structure 509 For the perspective of looking up Go to the irregular structure of the regular arrangement (as shown in Figure 3B). The shape of the residual structure 509 may be a toothed structure, a wavy structure, or other shape depending on the shape and spacing of the burrowing holes 504.

根據本具體實施例之方法所製作出的薄膜覆晶封裝體,其可撓性基材上相對於晶片的位置具有穿透孔,使封裝膠體接觸空氣的面積增大以幫助晶片散熱。於幫助散熱的同時,穿透孔不會增加薄膜覆晶封裝體的厚度,也不會影響到薄膜覆晶封裝體的可撓性。本具體實施例之薄膜封裝基板先在可撓性基材上形成騎縫孔的方法,可預先定位移除區域,在形成薄膜覆晶封裝體後仍可僅藉由簡單的撕除動作撕去移除區域以形成穿透孔,製程簡單且不會損傷薄膜覆晶封裝體。相較之下,先前技術之未具有騎縫孔之薄膜封裝基板,必須經過如雷射或蝕刻等製程方能於可撓性基材上形成穿透孔,其製程較為複雜且可能會破壞薄膜覆晶封裝體中的其他元件,例如封裝膠體、晶片、凸塊或導線的內引腳等。 The film flip chip package produced according to the method of the embodiment has a through hole on the flexible substrate relative to the position of the wafer, so that the area of the package gel contacting the air is increased to help dissipate heat of the wafer. While helping to dissipate heat, the penetration holes do not increase the thickness of the film flip chip and do not affect the flexibility of the film flip chip. The method for forming a saddle hole on the flexible substrate by the film encapsulating substrate of the embodiment can pre-position the removal region, and can be removed only by a simple tearing action after forming the film flip chip package. In addition to the regions to form the through holes, the process is simple and does not damage the thin film flip chip package. In contrast, the prior art thin film package substrate without a burr hole must be subjected to a process such as laser or etching to form a through hole on the flexible substrate, which is complicated in process and may damage the film cover. Other components in the crystal package, such as package pins, wafers, bumps or internal pins of wires.

此外,請參閱圖五E,於穿透孔508中可進一步形成散熱件8,使散熱件8接觸封裝膠體7。薄膜覆晶封裝體的晶片6運作時所產生的熱量傳導至封裝膠體7,再進一步傳導至散熱件8,最後由散熱件8消散至空氣中。散熱件8於實務中可為散熱膠,故散熱件8於幫助薄膜覆晶封裝體散熱的同時,並不會增加薄膜覆晶封裝體的厚度,也不會影響薄膜覆晶封裝體的可撓性。 In addition, referring to FIG. 5E, the heat sink 8 may be further formed in the penetration hole 508 to contact the heat sink 8 to the encapsulant 7. The heat generated by the operation of the wafer 6 of the film flip chip package is conducted to the encapsulant 7 and further to the heat sink 8 and finally dissipated into the air by the heat sink 8. The heat dissipating member 8 can be a heat dissipating glue in practice, so that the heat dissipating member 8 helps the film flip chip package to dissipate heat, and does not increase the thickness of the film flip chip package, nor does it affect the flexibility of the film flip chip package. Sex.

綜上所述,本發明之薄膜封裝基板具有多個騎縫孔於可撓性基材上圍繞出移除區域。應用本發明之薄膜封裝基板的薄膜覆晶封裝方法,可製作出具有良好散熱效果,同時不增加厚度且不影響可 撓性的薄膜覆晶封裝體,符合現今的電子產品小型化與輕量化的需求。 In summary, the thin film encapsulation substrate of the present invention has a plurality of saddle holes surrounding the removal region on the flexible substrate. The film flip-chip encapsulation method of the thin film encapsulation substrate of the invention can produce a good heat dissipation effect without increasing the thickness and without affecting The flexible film flip chip package meets the needs of today's electronic products for miniaturization and weight reduction.

藉由以上較佳具體實施例之詳述,係希望能更加清楚描述本發明之特徵與精神,而並非以上述所揭露的較佳具體實施例來對本發明之範疇加以限制。相反地,其目的是希望能涵蓋各種改變及具相等性的安排於本發明所欲申請之專利範圍的範疇內。 The features and spirit of the present invention will be more apparent from the detailed description of the preferred embodiments. On the contrary, the intention is to cover various modifications and equivalents within the scope of the invention as claimed.

2‧‧‧薄膜封裝基板 2‧‧‧Film package substrate

20‧‧‧可撓性基材 20‧‧‧Flexible substrate

22‧‧‧導線 22‧‧‧Wire

24‧‧‧防銲層 24‧‧‧ solder mask

200b‧‧‧第二表面 200b‧‧‧ second surface

202‧‧‧晶片接合區 202‧‧‧ wafer junction area

204‧‧‧騎縫孔 204‧‧‧Sitting holes

206‧‧‧移除區域 206‧‧‧Remove area

Claims (17)

一種薄膜封裝基板,包含:一可撓性基材,具有相對之一第一表面與一第二表面,該第一表面上具有一晶片接合區;以及多條導線,設置於該可撓性基材之該第一表面上,各該導線具有一內引腳,各該內引腳延伸至該晶片接合區內;其中該可撓性基材具有多個騎縫孔,該等騎縫孔位於該晶片接合區之垂直投影範圍內且圍繞出一移除區域。 A thin film package substrate comprising: a flexible substrate having a first surface and a second surface, the first surface having a wafer bonding region; and a plurality of wires disposed on the flexible substrate On the first surface of the material, each of the wires has an inner lead, each of the inner leads extending into the wafer bonding region; wherein the flexible substrate has a plurality of riding holes, and the riding holes are located on the wafer A vertical projection range of the land is located and surrounds a removed area. 如申請專利範圍第1項所述之薄膜封裝基板,其中該等導線之該等內引腳位於該移除區域之外。 The thin film package substrate of claim 1, wherein the inner leads of the wires are located outside the removal region. 如申請專利範圍第1項所述之薄膜封裝基板,其中該等騎縫孔包含貫穿該第二表面的盲孔。 The film package substrate of claim 1, wherein the piercing holes comprise blind holes extending through the second surface. 如申請專利範圍第1項所述之薄膜封裝基板,其中該等騎縫孔的形狀包含圓形、橢圓形或矩形。 The film package substrate of claim 1, wherein the shape of the socket holes comprises a circle, an ellipse or a rectangle. 一種薄膜覆晶封裝體,包含:一可撓性基材,具有一第一表面,該第一表面上具有一晶片接合區,該可撓性基材於該晶片接合區內形成一穿透孔,且該可撓性基材於該穿透孔之側壁上具有一殘留結構;多條導線,設置於該可撓性基材之該第一表面上,各該導線具有一內引腳,各該內引腳延伸至該晶片接合區內;一晶片,設置於該晶片接合區內並與該等導線之該等內引腳電性連接;以及一封裝膠體,填充於該晶片與該可撓性基材之間,且該穿透孔暴露出部分該封裝膠體。 A film flip chip package comprising: a flexible substrate having a first surface having a wafer bonding region, the flexible substrate forming a through hole in the wafer bonding region And the flexible substrate has a residual structure on the sidewall of the through hole; a plurality of wires are disposed on the first surface of the flexible substrate, each of the wires has an inner lead, each of the wires The inner lead extends into the die bond region; a wafer is disposed in the die bond region and electrically connected to the inner leads of the wires; and an encapsulant filled on the wafer and the flexible Between the substrates, and the penetration holes expose a portion of the encapsulant. 如申請專利範圍第5項所述之薄膜覆晶封裝體,進一步包含一散熱件,設置於該穿透孔中並接觸該封裝膠體。 The film flip chip package of claim 5, further comprising a heat dissipating member disposed in the through hole and contacting the encapsulant. 如申請專利範圍第5項所述之薄膜覆晶封裝體,其中該等導線之該 等內引腳位於該穿透孔之外。 The film flip chip package of claim 5, wherein the wires are The inner pin is located outside the through hole. 如申請專利範圍第5項所述之薄膜覆晶封裝體,其中該殘留結構係由撕除該穿透孔內的該可撓性基材而殘留形成。 The film flip chip package of claim 5, wherein the residual structure is formed by tearing off the flexible substrate in the through hole. 如申請專利範圍第5項所述之薄膜覆晶封裝體,其中該殘留結構為規則排列的凹凸結構。 The film flip chip package according to claim 5, wherein the residual structure is a regularly arranged uneven structure. 一種薄膜覆晶封裝方法,包含下列步驟:準備一薄膜封裝基板,其中該薄膜封裝基板具有一可撓性基材及多條導線,該可撓性基材具有相對之一第一表面與一第二表面,該第一表面上具有一晶片接合區,該等導線設置於該可撓性基材之該第一表面上,各該導線具有一內引腳,各該內引腳延伸至該晶片接合區內,該可撓性基材具有多個騎縫孔,該等騎縫孔位於該晶片接合區之垂直投影範圍內且圍繞出一移除區域;設置一晶片於該可撓性基材之該晶片接合區內,並使該晶片與該等導線之該等內引腳電性連接;形成一封裝膠體於該晶片與該可撓性基材之間;以及沿該等騎縫孔去除該可撓性基材之該移除區域,使該可撓性基材形成一穿透孔暴露出部分該封裝膠體。 A film flip chip packaging method comprising the steps of: preparing a film package substrate, wherein the film package substrate has a flexible substrate and a plurality of wires, the flexible substrate having a first surface and a first surface a second surface having a wafer bonding region disposed on the first surface of the flexible substrate, each of the wires having an inner lead, each of the inner leads extending to the wafer In the joint region, the flexible substrate has a plurality of seating holes located in a vertical projection range of the wafer bonding region and surrounding a removal region; and a wafer is disposed on the flexible substrate a wafer bonding region, and electrically connecting the wafer to the inner leads of the wires; forming an encapsulant between the wafer and the flexible substrate; and removing the flexible along the riding holes The removed region of the substrate causes the flexible substrate to form a through hole to expose a portion of the encapsulant. 如申請專利範圍第10項所述之薄膜覆晶封裝方法,進一步包含下列步驟:形成一散熱件於該穿透孔中以接觸該封裝膠體。 The film flip chip packaging method of claim 10, further comprising the step of: forming a heat sink in the through hole to contact the encapsulant. 如申請專利範圍第10項所述之薄膜覆晶封裝方法,其中該等導線之該等內引腳位於該移除區域之外。 The film flip chip packaging method of claim 10, wherein the inner leads of the wires are outside the removal region. 如申請專利範圍第10項所述之薄膜覆晶封裝方法,其中該等騎縫孔包含貫穿該第二表面的盲孔。 The film flip chip packaging method of claim 10, wherein the piercing holes comprise blind holes penetrating the second surface. 如申請專利範圍第10項所述之薄膜覆晶封裝方法,其中去除該可撓性基材之該移除區域的方式包含撕除。 The film flip chip packaging method of claim 10, wherein the removal of the removed region of the flexible substrate comprises tearing. 如申請專利範圍第10項所述之薄膜覆晶封裝方法,其中該等騎縫孔的形狀包含圓形、橢圓形或矩形。 The film flip chip packaging method of claim 10, wherein the shape of the piercing holes comprises a circle, an ellipse or a rectangle. 如申請專利範圍第10項所述之薄膜覆晶封裝方法,其中該可撓性基材於該穿透孔之側壁上具有一殘留結構。 The film flip chip packaging method of claim 10, wherein the flexible substrate has a residual structure on a sidewall of the through hole. 如申請專利範圍第16項所述之薄膜覆晶封裝方法,其中該殘留結構為規則排列的凹凸結構。 The film flip chip packaging method according to claim 16, wherein the residual structure is a regularly arranged uneven structure.
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