TW201631763A - 接觸包覆結構 - Google Patents

接觸包覆結構 Download PDF

Info

Publication number
TW201631763A
TW201631763A TW104133913A TW104133913A TW201631763A TW 201631763 A TW201631763 A TW 201631763A TW 104133913 A TW104133913 A TW 104133913A TW 104133913 A TW104133913 A TW 104133913A TW 201631763 A TW201631763 A TW 201631763A
Authority
TW
Taiwan
Prior art keywords
semiconductor device
contact
gate
fin
semiconductor
Prior art date
Application number
TW104133913A
Other languages
English (en)
Chinese (zh)
Inventor
傑佛瑞 亨豪 徐
史坦利 昇澈 宋
佛雷迪米爾 馬卡奧桑
穆斯塔法 貝達歐格魯
包鈞勁
約翰 建宏 朱
楊岱
舟非 葉
Original Assignee
高通公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 高通公司 filed Critical 高通公司
Publication of TW201631763A publication Critical patent/TW201631763A/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6735—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes having gates fully surrounding the channels, e.g. gate-all-around
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/43—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 1D charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H10D30/6219—Fin field-effect transistors [FinFET] characterised by the source or drain electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H10D62/118—Nanostructure semiconductor bodies
    • H10D62/119—Nanowire, nanosheet or nanotube semiconductor bodies
    • H10D62/121—Nanowire, nanosheet or nanotube semiconductor bodies oriented parallel to substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H10D62/151—Source or drain regions of field-effect devices of IGFETs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0193—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices the components including FinFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/853—Complementary IGFETs, e.g. CMOS comprising FinFETs

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Nanotechnology (AREA)
TW104133913A 2014-11-24 2015-10-15 接觸包覆結構 TW201631763A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201462083714P 2014-11-24 2014-11-24
US14/673,485 US9953979B2 (en) 2014-11-24 2015-03-30 Contact wrap around structure

Publications (1)

Publication Number Publication Date
TW201631763A true TW201631763A (zh) 2016-09-01

Family

ID=56010980

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104133913A TW201631763A (zh) 2014-11-24 2015-10-15 接觸包覆結構

Country Status (9)

Country Link
US (1) US9953979B2 (enExample)
EP (1) EP3224868B1 (enExample)
JP (1) JP6659686B2 (enExample)
KR (1) KR20170086517A (enExample)
CN (1) CN107112284B (enExample)
BR (1) BR112017010750B1 (enExample)
SG (1) SG11201702858QA (enExample)
TW (1) TW201631763A (enExample)
WO (1) WO2016085570A1 (enExample)

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9443769B2 (en) * 2014-04-21 2016-09-13 Taiwan Semiconductor Manufacturing Company, Ltd. Wrap-around contact
US9721896B2 (en) * 2015-09-11 2017-08-01 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnection structure, fabricating method thereof, and semiconductor device using the same
US10573749B2 (en) * 2016-02-25 2020-02-25 Taiwan Semiconductor Manufacturing Co., Ltd. Fin-type field effect transistor structure and manufacturing method thereof
TWI697096B (zh) * 2016-06-14 2020-06-21 聯華電子股份有限公司 半導體元件及其製作方法
US9620611B1 (en) 2016-06-17 2017-04-11 Acorn Technology, Inc. MIS contact structure with metal oxide conductor
US10134905B2 (en) * 2016-06-30 2018-11-20 International Business Machines Corporation Semiconductor device including wrap around contact, and method of forming the semiconductor device
CN109314137B (zh) * 2016-07-02 2023-06-02 太浩研究有限公司 带有释放的源极和漏极的半导体装置
CN107887262B (zh) * 2016-09-30 2020-01-14 中芯国际集成电路制造(北京)有限公司 半导体装置及其制造方法
US9773781B1 (en) * 2016-11-03 2017-09-26 Globalfoundries Inc. Resistor and capacitor disposed directly upon a SAC cap of a gate structure of a semiconductor structure
WO2018094205A1 (en) 2016-11-18 2018-05-24 Acorn Technologies, Inc. Nanowire transistor with source and drain induced by electrical contacts with negative schottky barrier height
US11437516B2 (en) 2016-11-28 2022-09-06 Taiwan Semiconductor Manufacturing Co., Ltd. Mechanisms for growing epitaxy structure of finFET device
US20180212029A1 (en) * 2017-01-20 2018-07-26 Qualcomm Incorporated Semiconductor devices employing reduced area conformal contacts to reduce parasitic capacitance, and related methods
US10084094B1 (en) 2017-03-17 2018-09-25 International Business Machines Corporation Wrapped source/drain contacts with enhanced area
US10685884B2 (en) 2017-07-31 2020-06-16 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device including a Fin-FET and method of manufacturing the same
DE112017007835T5 (de) 2017-09-26 2020-05-07 Intel Corporation Bildung von kristallinen source-/drain-kontakten an halbleitervorrichtungen
EP3480842A1 (en) 2017-11-02 2019-05-08 IMEC vzw Method for forming source/drain contacts
US10586853B2 (en) 2017-11-27 2020-03-10 International Business Machines Corporation Non-planar field effect transistor devices with wrap-around source/drain contacts
CN109994418A (zh) * 2017-12-29 2019-07-09 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
US11227799B2 (en) * 2018-04-05 2022-01-18 Intel Corporation Wrap-around contact structures for semiconductor fins
US10367077B1 (en) 2018-04-27 2019-07-30 International Business Machines Corporation Wrap around contact using sacrificial mandrel
TWI845516B (zh) * 2018-06-22 2024-06-21 日商東京威力科創股份有限公司 奈米線裝置的形成方法
US10586872B2 (en) 2018-07-03 2020-03-10 International Business Machines Corporation Formation of wrap-around-contact to reduce contact resistivity
US11114566B2 (en) * 2018-07-12 2021-09-07 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method of manufacturing the same
US10483361B1 (en) 2018-08-29 2019-11-19 International Business Machines Corporation Wrap-around-contact structure for top source/drain in vertical FETs
US10665590B2 (en) * 2018-10-16 2020-05-26 Globalfoundries Inc. Wrap-around contact surrounding epitaxial regions of integrated circuit structures and method of forming same
US11527640B2 (en) 2019-01-03 2022-12-13 Intel Corporation Wrap-around contact structures for semiconductor nanowires and nanoribbons
US11677026B2 (en) 2019-03-04 2023-06-13 International Business Machines Corporation Transistor having wrap-around source/drain contacts
US10734490B1 (en) 2019-03-22 2020-08-04 International Business Machines Corporation Bipolar junction transistor (BJT) with 3D wrap around emitter
US20200350412A1 (en) * 2019-05-01 2020-11-05 Intel Corporation Thin film transistors having alloying source or drain metals
US11658245B2 (en) * 2019-10-29 2023-05-23 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method of manufacturing
US11211452B1 (en) 2020-06-30 2021-12-28 International Business Machines Corporation Transistor having stacked source/drain regions with formation assistance regions and multi-region wrap-around source/drain contacts
US11521894B2 (en) 2020-07-18 2022-12-06 International Business Machines Corporation Partial wrap around top contact
US11424367B2 (en) 2020-12-16 2022-08-23 International Business Machines Corporation Wrap-around contacts including localized metal silicide
JP7464554B2 (ja) 2021-03-12 2024-04-09 株式会社東芝 高周波トランジスタ
US20220392840A1 (en) * 2021-06-04 2022-12-08 Intel Corporation Conductive via structures for gate contact or trench contact
US20230114507A1 (en) * 2021-10-12 2023-04-13 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method
US12439631B2 (en) 2021-11-22 2025-10-07 International Business Machines Corporation Non-self-aligned wrap-around contact in a tight gate pitched transistor
US12432968B2 (en) 2021-12-01 2025-09-30 International Business Machines Corporation Nanowire source/drain formation for nanosheet device
US20250359133A1 (en) * 2022-06-22 2025-11-20 Sony Semiconductor Solutions Corporation Semiconductor device and electronic apparatus

Family Cites Families (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7105894B2 (en) 2003-02-27 2006-09-12 Taiwan Semiconductor Manufacturing Co., Ltd. Contacts to semiconductor fin devices
US7612416B2 (en) 2003-10-09 2009-11-03 Nec Corporation Semiconductor device having a conductive portion below an interlayer insulating film and method for producing the same
WO2005091374A1 (ja) * 2004-03-19 2005-09-29 Nec Corporation 半導体装置及びその製造方法
US7282766B2 (en) 2005-01-17 2007-10-16 Fujitsu Limited Fin-type semiconductor device with low contact resistance
JP4718908B2 (ja) * 2005-06-14 2011-07-06 株式会社東芝 半導体装置および半導体装置の製造方法
US7667271B2 (en) 2007-04-27 2010-02-23 Taiwan Semiconductor Manufacturing Company, Ltd. Fin field-effect transistors
JP5172264B2 (ja) * 2007-10-01 2013-03-27 株式会社東芝 半導体装置
US20110147840A1 (en) 2009-12-23 2011-06-23 Cea Stephen M Wrap-around contacts for finfet and tri-gate devices
US8310013B2 (en) * 2010-02-11 2012-11-13 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabricating a FinFET device
US8796759B2 (en) * 2010-07-15 2014-08-05 Taiwan Semiconductor Manufacturing Company, Ltd. Fin-like field effect transistor (FinFET) device and method of manufacturing same
KR101779031B1 (ko) 2011-12-19 2017-09-18 인텔 코포레이션 수직 트랜지스터와 그 제조방법, 및 고전압 트랜지스터
US9006069B2 (en) * 2011-12-19 2015-04-14 Intel Corporation Pulsed laser anneal process for transistors with partial melt of a raised source-drain
CN112563315A (zh) * 2011-12-23 2021-03-26 索尼公司 半导体器件和集成电路结构
KR20170121335A (ko) 2011-12-30 2017-11-01 인텔 코포레이션 반도체 구조물
KR101876793B1 (ko) * 2012-02-27 2018-07-11 삼성전자주식회사 전계효과 트랜지스터 및 그 제조 방법
US8766319B2 (en) 2012-04-26 2014-07-01 United Microelectronics Corp. Semiconductor device with ultra thin silicide layer
US10535735B2 (en) 2012-06-29 2020-01-14 Intel Corporation Contact resistance reduced P-MOS transistors employing Ge-rich contact layer
US9136383B2 (en) 2012-08-09 2015-09-15 Taiwan Semiconductor Manufacturing Company, Ltd. Contact structure of semiconductor device
US20140054646A1 (en) 2012-08-24 2014-02-27 Taiwan Semiconductor Manufacturing Company, Ltd. Apparatus and Method for Multiple Gate Transistors
US8703556B2 (en) * 2012-08-30 2014-04-22 Taiwan Semiconductor Manufacturing Company, Ltd. Method of making a FinFET device
US9105490B2 (en) 2012-09-27 2015-08-11 Taiwan Semiconductor Manufacturing Company, Ltd. Contact structure of semiconductor device
US8772109B2 (en) 2012-10-24 2014-07-08 Taiwan Semiconductor Manufacturing Company, Ltd. Apparatus and method for forming semiconductor contacts
CN103915372B (zh) 2013-01-08 2016-08-31 中芯国际集成电路制造(上海)有限公司 半导体器件的形成方法
KR102049774B1 (ko) 2013-01-24 2019-11-28 삼성전자 주식회사 반도체 장치 및 그 제조 방법
KR20140106270A (ko) * 2013-02-26 2014-09-03 삼성전자주식회사 집적 회로 장치 및 그 제조 방법
US9117842B2 (en) 2013-03-13 2015-08-25 Globalfoundries Inc. Methods of forming contacts to source/drain regions of FinFET devices
US20140264634A1 (en) * 2013-03-14 2014-09-18 Intermolecular, Inc. Finfet for rf and analog integrated circuits
US9219133B2 (en) * 2013-05-30 2015-12-22 Stmicroelectronics, Inc. Method of making a semiconductor device using spacers for source/drain confinement
EP3902016A1 (en) * 2014-03-27 2021-10-27 Intel Corporation Confined epitaxial regions for semiconductor devices and methods of fabricating semiconductor devices having confined epitaxial regions
US10199502B2 (en) * 2014-08-15 2019-02-05 Taiwan Semiconductor Manufacturing Company, Ltd. Structure of S/D contact and method of making same

Also Published As

Publication number Publication date
BR112017010750B1 (pt) 2023-02-28
BR112017010750A2 (en) 2018-01-09
US9953979B2 (en) 2018-04-24
JP6659686B2 (ja) 2020-03-04
EP3224868B1 (en) 2025-10-29
JP2017535958A (ja) 2017-11-30
WO2016085570A1 (en) 2016-06-02
CN107112284A (zh) 2017-08-29
KR20170086517A (ko) 2017-07-26
US20160148936A1 (en) 2016-05-26
EP3224868A1 (en) 2017-10-04
SG11201702858QA (en) 2017-06-29
CN107112284B (zh) 2021-02-23

Similar Documents

Publication Publication Date Title
TW201631763A (zh) 接觸包覆結構
US9824936B2 (en) Adjacent device isolation
US9496181B2 (en) Sub-fin device isolation
US20160035891A1 (en) Stress in n-channel field effect transistors
US20200035674A1 (en) Gate cut last processing with self-aligned spacer
US20190027576A1 (en) Composite channel metal-oxide-semiconductor field effect transistor (mosfet)
US10354955B2 (en) Graphene as interlayer dielectric
US10665678B2 (en) Transistor with fluorinated graphene spacer
US20200185384A1 (en) Horizontal gate-all-around (gaa) field effect transistor (fet) for complementary metal oxide semiconductor (cmos) integration
US10636789B2 (en) Transistor with low resistivity carbon alloy
US20250072105A1 (en) Vertical structure-based field effect transistor (fet) input/output device integration
US20250133772A1 (en) Bottom channel trench isolated gate all around (gaa) field effect transistor (fet)
US20240243131A1 (en) N/p-independently strained post-replacement metal gate (rmg) gate cut for performance enhanced finfet
HK1240397A1 (en) Contact wrap around structure
HK1240397B (zh) 触点环绕结构