TW201625414A - Metal substrate with plating - Google Patents

Metal substrate with plating Download PDF

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TW201625414A
TW201625414A TW104142239A TW104142239A TW201625414A TW 201625414 A TW201625414 A TW 201625414A TW 104142239 A TW104142239 A TW 104142239A TW 104142239 A TW104142239 A TW 104142239A TW 201625414 A TW201625414 A TW 201625414A
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plating layer
metal substrate
layer
alloy
group
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TW104142239A
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Chinese (zh)
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TWI593548B (en
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Ryo Fukuchi
Kenta Tsujie
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Jx Nippon Mining & Metals Corp
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00Layered products comprising a layer of metal
    • B32B15/01Layered products comprising a layer of metal all layers being exclusively metallic
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00Layered products comprising a layer of metal
    • B32B15/04Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material
    • B32B15/08Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material of synthetic resin
    • B32B15/082Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material of synthetic resin comprising vinyl resins; comprising acrylic resins
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00Layered products comprising a layer of metal
    • B32B15/20Layered products comprising a layer of metal comprising aluminium or copper
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/14Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers
    • B32B37/15Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers with at least one layer being manufactured and immediately laminated before reaching its stable state, e.g. in which a layer is extruded and laminated while in semi-molten state
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2250/00Layers arrangement
    • B32B2250/022 layers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00Electrical equipment
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00Electrical equipment
    • B32B2457/08PCBs, i.e. printed circuit boards

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Laminated Bodies (AREA)
  • Manufacturing & Machinery (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)

Abstract

The present invention provides a metal substrate with excellent solder adhesion and the weather resistance even if a substrate that contains elements having higher reactivity with oxygen at the room temperature is used. The metal substrate with plating according to the present invention is a metal substrate with plating, in which a coating in a group consisting of alloy coating layers of at least two elements selected from Co coating and a group consisting of Co, Ni and Mo, is formed on a portion or all of the surface of the metal substrate, and a total attachment amount of the Co, Ni and Mo in the coating is more than 500 [mu]g/dm2, and the metal substrate comprises at least one element selected from a group consisting of Ti, Si, Mg, P, Sn, Zn, Cr, Zr, V, W, Na, Ca, Ba, Cs, Mn, K, Ga, B, Nb, Ce, Be, Nd, Sc, Hf, Ho, Lu, Yb, Dy, Er, Pr, Y, Li, Gd, Pu, In, Fe, La, Th, Ta, U, Sm, Tb, Sr, Tm and Al.

Description

附鍍敷之金屬基材 Plated metal substrate

本發明涉及一種附鍍敷之金屬基材。另外,本發明涉及一種包括附鍍敷之金屬基材或使用其之附載體金屬箔、連接器、端子、積層板、遮罩帶、遮罩材、印刷配線板、金屬加工構件、電子、電氣機器、及印刷配線板之製造方法。 The invention relates to a plated metal substrate. Further, the present invention relates to a metal substrate including a plated metal or a carrier metal foil, a connector, a terminal, a laminate, a masking tape, a masking material, a printed wiring board, a metal working member, an electronic device, and a metal foil. Machines and methods of manufacturing printed wiring boards.

廣泛應用於電子、電氣機器之印製電路板通常藉由如下方式製造:經由接著劑、或者不使用接著劑,在高溫高壓下將金屬箔接著於合成樹脂板或合成樹脂膜等絕緣基材而製造覆金屬積層板,其後,經過蝕刻步驟而在金屬箔側形成金屬配線,藉此製成印刷配線板,在印刷配線板之金屬配線上藉由焊接而搭載各種電子零件。 Printed circuit boards widely used in electronic and electrical machines are usually manufactured by adhering a metal foil to an insulating substrate such as a synthetic resin sheet or a synthetic resin film under high temperature and high pressure via an adhesive or without using an adhesive. After the metal-clad laminate is produced, a metal wiring is formed on the metal foil side by an etching step to form a printed wiring board, and various electronic components are mounted on the metal wiring of the printed wiring board by soldering.

以往已知有以提高金屬箔之蝕刻特性而形成線寬均勻性較高之電路為目的,而在蝕刻面側形成蝕刻速率慢於銅之金屬或合金層之技術(專利文獻1)。根據專利文獻1,藉由在蝕刻面側形成蝕刻速率慢於銅之金屬或合金層,而對銅箔之厚度方向之蝕刻速度進行控制,藉此可形成沒有塌邊之電路寬度均勻之電路。另外,在專利文獻1中揭示有如下情況:作為蝕刻速率慢於銅之金屬或合金層,例示有鈷、鎳或這些之合金層,且其厚度可設為100~10000μg/dm2A technique for forming a circuit having a high uniformity of line width by improving the etching characteristics of a metal foil has been known, and a technique in which an etching rate is slower than a metal or alloy layer of copper is formed on the side of the etching surface (Patent Document 1). According to Patent Document 1, the etching rate in the thickness direction of the copper foil is controlled by forming a metal or alloy layer having a slower etching rate on the etching surface side, whereby a circuit having a uniform circuit width without sag can be formed. Further, Patent Document 1 discloses a case where cobalt or nickel or an alloy layer thereof is exemplified as a metal or an alloy layer having an etching rate slower than copper, and the thickness thereof can be set to 100 to 10000 μg/dm 2 .

[現有技術文獻] [Prior Art Literature]

[專利文獻] [Patent Literature]

[專利文獻1]日本特開2002-176242號公報 [Patent Document 1] Japanese Patent Laid-Open Publication No. 2002-176242

然而,在專利文獻1中,雖已經考慮到製作印製電路板時之銅箔之蝕刻性,但未進行任何關於在印製電路板中搭載電子零件時所使用之焊料與金屬配線之密接強度之研究。尤其是銅箔因焊料密接性優異故而不會成為問題,但在設為含有常溫下與氧之反應性較高之元素之金屬基材之情況下,針對無法確保焊料密接性之問題未提出任何解決方案。另外,也考慮在印刷配線板以外之用途中還要求蝕刻性及焊接性兩者,但在專利文獻1中僅考慮印製電路板。另外,在考慮到金屬基材之作為導電材料之實用性之情況下,關於耐候性之研究也重要,但未發現這樣之研究。因此,本發明之課題之一在於提供一種儘管使用含有常溫下與氧之反應性較高之元素之金屬基材,但焊料密接性及耐候性仍優異之金屬基材。 However, in Patent Document 1, although the etching property of the copper foil at the time of producing a printed circuit board has been considered, the adhesion strength between the solder and the metal wiring used when the electronic component is mounted on the printed circuit board is not performed. Research. In particular, the copper foil is not problematic because it has excellent solder adhesion, but when it is a metal substrate containing an element having high reactivity with oxygen at normal temperature, no problem has been proposed for the problem of ensuring solder adhesion. solution. In addition, it is also considered that both etching property and solderability are required for applications other than printed wiring boards, but Patent Document 1 only considers a printed circuit board. Further, in consideration of the practicality of the metal substrate as a conductive material, research on weather resistance is also important, but such research has not been found. Therefore, one of the problems of the present invention is to provide a metal substrate excellent in solder adhesion and weather resistance, although a metal substrate containing an element having high reactivity with oxygen at normal temperature is used.

本發明者為了解決上述課題而反復進行努力研究,結果發現,藉由將選自由Co鍍層、以及含有選自由Co、Ni及Mo所組成之群中之2種以上之元素之合金鍍層所組成之群中之鍍層以該鍍層中之Co、Ni及Mo之合計附著量成為500μg/dm2以上之方式形成在金屬基材表面,而焊料密接性及耐候性明顯提高。本發明是基於該見解而完成者。 In order to solve the above problems, the inventors of the present invention have conducted intensive studies and found that an alloy plating layer selected from a Co plating layer and two or more elements selected from the group consisting of Co, Ni, and Mo is used. The plating layer in the group is formed on the surface of the metal substrate so that the total amount of adhesion of Co, Ni, and Mo in the plating layer is 500 μg/dm 2 or more, and solder adhesion and weather resistance are remarkably improved. The present invention has been completed based on this finding.

本發明在一個態樣是一種附鍍敷之金屬基材,其是在金屬基材之一部分或全部之表面上形成了選自由Co鍍層、以及含有選自由Co、Ni及Mo所組成之群中之2種以上之元素之合金鍍層所組成之群中之鍍層之附鍍敷之金屬基材,且該鍍層中之Co、Ni及Mo之合計附著量為500μg/dm2以上,且 金屬基材含有選自由Ti、Si、Mg、P、Sn、Zn、Cr、Zr、V、W、Na、Ca、Ba、Cs、Mn、K、Ga、B、Nb、Ce、Be、Nd、Sc、Hf、Ho、Lu、Yb、Dy、Er、Pr、Y、Li、Gd、Pu、In、Fe、La、Th、Ta、U、Sm、Tb、Sr、Tm及Al所組成之群中之1種或2種以上之元素。 The present invention is, in one aspect, a plated metal substrate formed on a portion or all of a surface of a metal substrate selected from the group consisting of a Co plating layer and a group selected from the group consisting of Co, Ni, and Mo. a metal substrate to which a plating layer of a plating layer composed of an alloy plating layer of two or more elements is applied, and a total adhesion amount of Co, Ni, and Mo in the plating layer is 500 μg/dm 2 or more, and the metal substrate Containing from the group consisting of Ti, Si, Mg, P, Sn, Zn, Cr, Zr, V, W, Na, Ca, Ba, Cs, Mn, K, Ga, B, Nb, Ce, Be, Nd, Sc, Hf One of a group consisting of Ho, Lu, Yb, Dy, Er, Pr, Y, Li, Gd, Pu, In, Fe, La, Th, Ta, U, Sm, Tb, Sr, Tm, and Al Or more than two elements.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層中之Co、Ni及Mo之合計附著量為700μg/dm2以上。 In one embodiment of the plated metal substrate of the present invention, the total adhesion amount of Co, Ni, and Mo in the plating layer is 700 μg/dm 2 or more.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層中之Co、Ni及Mo之合計附著量為1000μg/dm2以上。 In one embodiment of the metal substrate to be plated according to the present invention, the total adhesion amount of Co, Ni, and Mo in the plating layer is 1000 μg/dm 2 or more.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層中之Co、Ni及Mo之合計附著量為2000μg/dm2以上。 In one embodiment of the metal substrate to be plated according to the present invention, the total adhesion amount of Co, Ni, and Mo in the plating layer is 2000 μg/dm 2 or more.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層中之Co、Ni及Mo之合計附著量為3000μg/dm2以上。 In one embodiment of the plated metal substrate of the present invention, the total adhesion amount of Co, Ni, and Mo in the plating layer is 3000 μg/dm 2 or more.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層中之Co、Ni及Mo之合計附著量為5000μg/dm2以上。 In one embodiment of the metal substrate to be plated according to the present invention, the total adhesion amount of Co, Ni, and Mo in the plating layer is 5000 μg/dm 2 or more.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層中之Co、Ni及Mo之合計附著量為7000μg/dm2以上。 In one embodiment of the plated metal substrate of the present invention, the total adhesion amount of Co, Ni, and Mo in the plating layer is 7000 μg/dm 2 or more.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層中之Co、Ni及Mo之合計附著量為180000μg/dm2以下。 In one embodiment of the metal substrate to be plated according to the present invention, the total adhesion amount of Co, Ni, and Mo in the plating layer is 180,000 μg/dm 2 or less.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層中,相對於Co、Ni及Mo之合計附著量之Ni及Mo之合計附著量(以下也稱為「Ni+Mo比率(%)」)以質量比計為80%以下。 In one embodiment of the plated metal substrate of the present invention, the total amount of adhesion of Ni and Mo to the total amount of adhesion of Co, Ni, and Mo in the plating layer (hereinafter also referred to as "Ni+Mo ratio" (%)") is 80% or less by mass ratio.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層中,相對於Co、Ni及Mo之合計附著量之Ni及Mo之合計附著量(以下也稱為「Ni+Mo比率(%)」)以質量比計為60%以下。 In one embodiment of the plated metal substrate of the present invention, the total amount of adhesion of Ni and Mo to the total amount of adhesion of Co, Ni, and Mo in the plating layer (hereinafter also referred to as "Ni+Mo ratio" (%)") is 60% or less by mass ratio.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層中,相對於Co、Ni及Mo之合計附著量之Ni及Mo之合計附著量(以下也稱為「Ni+Mo比率(%)」)以質量比計為50%以下。 In one embodiment of the plated metal substrate of the present invention, the total amount of adhesion of Ni and Mo to the total amount of adhesion of Co, Ni, and Mo in the plating layer (hereinafter also referred to as "Ni+Mo ratio" (%)") is 50% or less by mass ratio.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層中,相對於Co、Ni及Mo之合計附著量之Ni及Mo之合計附著量(以下也稱為「Ni+Mo比率(%)」)以質量比計為10%以上。 In one embodiment of the plated metal substrate of the present invention, the total amount of adhesion of Ni and Mo to the total amount of adhesion of Co, Ni, and Mo in the plating layer (hereinafter also referred to as "Ni+Mo ratio" (%)") is 10% or more by mass ratio.

在本發明之附鍍敷之金屬基材之一個實施形態中,在上述鍍層與上述金屬基材之間形成了基底層及/或粗化處理層。 In one embodiment of the plated metal substrate of the present invention, a base layer and/or a roughened layer is formed between the plating layer and the metal substrate.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層選自由Co-Ni合金鍍層、Co-Mo合金鍍層、Ni-Mo合金鍍層及Co-Ni-Mo合金鍍層所組成之群中。 In one embodiment of the plated metal substrate of the present invention, the plating layer is selected from the group consisting of a Co-Ni alloy plating layer, a Co-Mo alloy plating layer, a Ni-Mo alloy plating layer, and a Co-Ni-Mo alloy plating layer. in.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層含有選自由Cu、As、Ag、Au、Pd、Pt、Bi、Os、Rh、Tl、Sb、Pb、Hg、Ir、Cd、Ru、Re、Tc及Gd所組成之群中之1種或2種以上之元素。 In one embodiment of the plated metal substrate of the present invention, the plating layer contains a layer selected from the group consisting of Cu, As, Ag, Au, Pd, Pt, Bi, Os, Rh, Tl, Sb, Pb, Hg, Ir, One or more elements of the group consisting of Cd, Ru, Re, Tc, and Gd.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層含有合計0~2000μg/dm2之選自由Cu、As、Ag、Au、Pd、Pt、Bi、Os、Rh、Tl、Sb、Pb、Hg、Ir、Cd、Ru、Re、Tc及Gd所組成之群中之1種或2種以上之元素。 In one embodiment of the plated metal substrate of the present invention, the plating layer contains a total of 0 to 2000 μg/dm 2 selected from the group consisting of Cu, As, Ag, Au, Pd, Pt, Bi, Os, Rh, Tl, One or two or more elements of the group consisting of Sb, Pb, Hg, Ir, Cd, Ru, Re, Tc, and Gd.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層含有合計0~1000μg/dm2之選自由Cu、As、Ag、Au、Pd、Pt、Bi、Os、Rh、Tl、Sb、Pb、Hg、Ir、Cd、Ru、Re、Tc及Gd所組成之群中之1種或2種以上之元素。 In one embodiment of the plated metal substrate of the present invention, the plating layer contains a total of 0 to 1000 μg/dm 2 selected from the group consisting of Cu, As, Ag, Au, Pd, Pt, Bi, Os, Rh, Tl, One or two or more elements of the group consisting of Sb, Pb, Hg, Ir, Cd, Ru, Re, Tc, and Gd.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層含有合計0~500μg/dm2之選自由Cu、As、Ag、Au、Pd、Pt、Bi、Os、Rh、Tl、Sb、Pb、Hg、Ir、Cd、Ru、Re、Tc及Gd所組成之群中之1種或2種以上之元素。 In one embodiment of the plated metal substrate of the present invention, the plating layer contains a total of 0 to 500 μg/dm 2 selected from the group consisting of Cu, As, Ag, Au, Pd, Pt, Bi, Os, Rh, Tl, One or two or more elements of the group consisting of Sb, Pb, Hg, Ir, Cd, Ru, Re, Tc, and Gd.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層含有選自由Cu、As、Ag、Au、Pd及Pt所組成之群中之1種或2種以上之元素。 In one embodiment of the plated metal substrate of the present invention, the plating layer contains one or more elements selected from the group consisting of Cu, As, Ag, Au, Pd, and Pt.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層含有合計0~2000μg/dm2之選自由Cu、As、Ag、Au、Pd及Pt所組成之群中之1種或2種以上之元素。 In one embodiment of the plated metal substrate of the present invention, the plating layer contains a total of 0 to 2000 μg/dm 2 selected from the group consisting of Cu, As, Ag, Au, Pd, and Pt or Two or more elements.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層含有合計0~1000μg/dm2之選自由Cu、As、Ag、Au、Pd及Pt所組成之群中之1種或2種以上之元素。 In one embodiment of the plated metal substrate of the present invention, the plating layer contains a total of 0 to 1000 μg/dm 2 selected from the group consisting of Cu, As, Ag, Au, Pd, and Pt or Two or more elements.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述鍍層 含有合計0~500μg/dm2之選自由Cu、As、Ag、Au、Pd及Pt所組成之群中之1種或2種以上之元素。 In one embodiment of the plated metal substrate of the present invention, the plating layer contains a total of 0 to 500 μg/dm 2 selected from the group consisting of Cu, As, Ag, Au, Pd, and Pt or Two or more elements.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述金屬基材是由銅合金、鋁、鋁合金、鐵、鐵合金、不銹鋼、鎳合金、鈦、鈦合金、金合金、銀合金、鉑族合金、鉻、鉻合金、鎂、鎂合金、鎢、鎢合金、鉬合金、鉛合金、鉭、鉭合金、鋯、鋯合金、錫、錫合金、銦、銦合金、鋅、或鋅合金所形成。 In one embodiment of the plated metal substrate of the present invention, the metal substrate is made of a copper alloy, aluminum, aluminum alloy, iron, iron alloy, stainless steel, nickel alloy, titanium, titanium alloy, gold alloy, silver alloy. , platinum group alloys, chromium, chromium alloys, magnesium, magnesium alloys, tungsten, tungsten alloys, molybdenum alloys, lead alloys, niobium, tantalum alloys, zirconium, zirconium alloys, tin, tin alloys, indium, indium alloys, zinc, or zinc The alloy is formed.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述金屬基材是由銅合金、鋁、鋁合金、鐵、鐵合金、不銹鋼、鎳合金、鈦、鈦合金、鋅、或鋅合金所形成。 In one embodiment of the plated metal substrate of the present invention, the metal substrate is made of a copper alloy, aluminum, aluminum alloy, iron, iron alloy, stainless steel, nickel alloy, titanium, titanium alloy, zinc, or zinc alloy. Formed.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述金屬基材是由鈦銅、磷青銅、卡遜合金(Corson alloy)、紅黃銅、黃銅、鋅白銅或其他銅合金所形成。 In one embodiment of the plated metal substrate of the present invention, the metal substrate is made of titanium copper, phosphor bronze, Corson alloy, red brass, brass, zinc white copper or other copper alloy. Formed.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述金屬基材為金屬條、金屬板、或金屬箔之形態。 In one embodiment of the metal substrate to be plated according to the present invention, the metal substrate is in the form of a metal strip, a metal plate, or a metal foil.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述金屬基材為壓延銅合金箔或電解銅合金箔。 In one embodiment of the plated metal substrate of the present invention, the metal substrate is a rolled copper alloy foil or an electrolytic copper alloy foil.

在本發明之附鍍敷之金屬基材之一個實施形態中,在上述鍍層之表面具有樹脂層。 In one embodiment of the plated metal substrate of the present invention, a resin layer is provided on the surface of the plating layer.

在本發明之附鍍敷之金屬基材之一個實施形態中,上述金屬基材具有兩個主表面,在其一面或兩面具有上述鍍層。 In one embodiment of the plated metal substrate of the present invention, the metal substrate has two major surfaces, and the plating layer is provided on one or both sides thereof.

本發明在又一個態樣是一種附載體金屬箔,其是在載體之一 面或兩面依序具有中間層、極薄金屬層之附載體金屬箔,且上述極薄金屬層為本發明之附鍍敷之金屬基材。 In yet another aspect of the invention, a metal foil with a carrier is one of the carriers The surface or both sides have a carrier metal foil with an intermediate layer and an extremely thin metal layer, and the extremely thin metal layer is a metal substrate to which the invention is applied.

在本發明之附載體金屬箔之一個實施形態中,在上述載體之一面依序具有上述中間層、上述極薄金屬層,在上述載體之另一面具有粗化處理層。 In one embodiment of the metal foil with a carrier of the present invention, the intermediate layer and the ultra-thin metal layer are sequentially provided on one surface of the carrier, and the roughened layer is provided on the other surface of the carrier.

在本發明之附載體金屬箔之一個實施形態中,附鍍敷之金屬基材之金屬基材為銅合金製。 In one embodiment of the metal foil with a carrier of the present invention, the metal substrate to which the plated metal substrate is attached is made of a copper alloy.

本發明在又一個態樣是一種連接器,其具備本發明之附鍍敷之金屬基材。 In still another aspect of the invention, a connector is provided with the plated metal substrate of the present invention.

本發明在又一個態樣是一種端子,其具備本發明之附鍍敷之金屬基材。 In still another aspect of the invention, a terminal is provided with the plated metal substrate of the present invention.

本發明在又一個態樣是一種積層板,其是將本發明之附鍍敷之金屬基材或本發明之附載體金屬箔與樹脂基板進行積層而製造。 In still another aspect of the invention, a laminated board is produced by laminating a metal substrate to be plated of the invention or a metal foil with a carrier of the invention and a resin substrate.

本發明在又一個態樣是一種遮罩帶或遮罩材,其具備本發明之積層板。 Still another aspect of the invention is a masking tape or masking material comprising the laminated board of the present invention.

本發明在又一個態樣是一種印刷配線板,其具備本發明之積層板。 Still another aspect of the present invention is a printed wiring board comprising the laminated board of the present invention.

本發明在又一個態樣是一種金屬加工構件,其具備本發明之附鍍敷之金屬基材或本發明之附載體金屬箔。 Still another aspect of the present invention is a metal working member comprising the plated metal substrate of the present invention or the metal foil with a carrier of the present invention.

本發明在又一個態樣是一種電子、電氣機器,其具備本發明之附鍍敷之金屬基材或本發明之附載體金屬箔。 Still another aspect of the present invention is an electronic or electrical machine comprising the plated metal substrate of the present invention or the metal foil with a carrier of the present invention.

本發明在又一個態樣是一種印刷配線板之製造方法,其包括 如下步驟:準備本發明之附載體金屬箔與絕緣基板之步驟;將上述附載體金屬箔與絕緣基板進行積層之步驟;在將上述附載體金屬箔與絕緣基板積層後,經過將上述附載體金屬箔之載體剝離之步驟而形成覆金屬積層板,其後,藉由半加成法、減成法、部分加成法或改良半加成法中之任一種方法而形成電路之步驟。 In still another aspect of the invention, a method of manufacturing a printed wiring board includes a step of preparing a metal foil with an insulating substrate and an insulating substrate of the present invention; a step of laminating the metal foil with a carrier and an insulating substrate; and laminating the metal foil with the insulating substrate after the carrier is laminated The step of stripping the carrier of the foil forms a metal-clad laminate, and thereafter, the step of forming the circuit is performed by any one of a semi-additive method, a subtractive method, a partial addition method, or a modified semi-additive method.

本發明在又一個態樣是一種印刷配線板之製造方法,其包括如下步驟:在本發明之附載體金屬箔之上述極薄金屬層側表面或上述載體側表面形成電路之步驟;以掩埋上述電路之方式,在上述附載體金屬箔之上述極薄金屬層側表面或上述載體側表面形成樹脂層之步驟;在上述樹脂層上形成電路之步驟;在上述樹脂層上形成電路後,將上述載體或上述極薄金屬層剝離之步驟;及將上述載體或上述極薄金屬層剝離後,將上述極薄金屬層或上述載體去除,藉此使形成在上述極薄金屬層側表面或上述載體側表面之掩埋在上述樹脂層中之電路露出之步驟。 In still another aspect of the invention, a method of manufacturing a printed wiring board, comprising the steps of: forming a circuit on the side surface of the ultra-thin metal layer or the side surface of the carrier on the metal foil of the carrier of the present invention; a step of forming a resin layer on the side surface of the ultra-thin metal layer or the side of the carrier side of the metal foil with a carrier; a step of forming a circuit on the resin layer; and forming a circuit on the resin layer, a step of peeling off the carrier or the above-mentioned ultra-thin metal layer; and after peeling off the carrier or the ultra-thin metal layer, removing the ultra-thin metal layer or the carrier, thereby forming the surface of the ultra-thin metal layer or the carrier The step of burying the side surface of the circuit in the above resin layer is exposed.

本發明在又一個態樣是一種接合體,其是本發明之附鍍敷之金屬基材或附載體金屬箔與焊料之接合體。 In still another aspect of the invention, a bonded body is a bonded metal substrate of the present invention or a bonded metal foil and solder joint.

在本發明之接合體之一個實施形態中,在焊料與金屬基材之 接合界面存在含有Sn及Co之熱擴散層。 In one embodiment of the bonded body of the present invention, in solder and metal substrate A thermal diffusion layer containing Sn and Co exists in the bonding interface.

本發明在又一個態樣是一種附鍍敷之金屬基材或附載體金屬箔與導電性構件之連接方法,其包括如下步驟:藉由蝕刻而對本發明之附鍍敷之金屬基材或附載體金屬箔進行形狀加工之步驟;與藉由焊接將所獲得之附鍍敷之金屬基材之形狀加工品的具有鍍層之部位與導電性構件進行接合之步驟。 In still another aspect, the present invention provides a method of attaching a plated metal substrate or a carrier-attached metal foil to a conductive member, comprising the steps of: etching a metal substrate or attached to the present invention by etching a step of shape-working the carrier metal foil; and a step of bonding the portion having the plating layer of the obtained shaped metal substrate to the conductive member by welding.

本發明在又一個態樣是一種電子零件,其具備本發明之附鍍敷之金屬基材或附載體金屬箔。 Still another aspect of the present invention is an electronic component comprising the plated metal substrate of the present invention or a metal foil with a carrier.

本發明在又一個態樣是一種自動對焦模組,其具備本發明之附鍍敷之金屬基材或附載體金屬箔作為彈簧材。 Still another aspect of the present invention is an autofocus module comprising the plated metal substrate of the present invention or a metal foil with a carrier as a spring material.

本發明在又一個態樣是一種自動對焦相機模組,其是具備透鏡、將該透鏡向光軸方向之初期位置進行彈性施力之本發明之附鍍敷之金屬基材製之彈簧構件或附載體金屬箔製之彈簧構件、及產生對抗該彈簧構件之作用力之電磁力而可使上述透鏡向光軸方向驅動之電磁驅動手段之自動對焦相機模組,且上述電磁驅動手段包括線圈,彈簧構件是在具有上述鍍層之部位藉由焊接而與線圈接合。 According to still another aspect of the present invention, an autofocus camera module is a spring member made of a metal substrate with a plated surface and elastically biased at an initial position in the optical axis direction of the lens or a spring member with a carrier metal foil and an autofocus camera module that generates an electromagnetic driving means for driving the lens in the optical axis direction against an electromagnetic force acting against the force of the spring member, and the electromagnetic driving means includes a coil. The spring member is joined to the coil by welding at a portion having the plating layer.

[發明之效果] [Effects of the Invention]

本發明之附鍍敷之金屬基材儘管使用原本焊料密接性不足之金屬基材,但焊料密接性仍優異。因此,也適合藉由焊接而與各種導電性構件連接。另外,根據本發明之附鍍敷之金屬基材,可具有已得到改善之耐候性,因此也適合在高溫多濕等苛刻環境下之應用。藉由使鍍層含有Co,而適合包含藉由蝕刻進行電路形成之步驟之形狀加工,活用這樣之特 性,本發明之附鍍敷之金屬基材可優選用於藉由蝕刻進行電路形成,其後藉由焊接與電子零件進行連接而使用之用途、例如用作印製電路板用之導電材料。另外,可優選用作開關、連接器(尤其是無需苛刻之彎曲加工性之叉型之FPC連接器)、自動對焦相機模組、插座、端子、繼電器等電子零件之材料。 The metal substrate to which the plating of the present invention is excellent in solder adhesion is used although a metal substrate having insufficient solder adhesion is used. Therefore, it is also suitable to be connected to various conductive members by soldering. Further, the plated metal substrate according to the present invention can have improved weather resistance, and is therefore suitable for use in harsh environments such as high temperature and high humidity. By making the plating layer contain Co, it is suitable for the shape processing including the step of circuit formation by etching, and utilizing such a special The plated metal substrate of the present invention can be preferably used for circuit formation by etching, and then used for connection by soldering with electronic parts, for example, as a conductive material for printed circuit boards. In addition, it can be preferably used as a material for electronic components such as switches, connectors (especially FPC connectors for forks that do not require severe bending workability), autofocus camera modules, sockets, terminals, relays, and the like.

[金屬基材] [Metal substrate]

作為本發明中所使用之金屬基材,含有選自由Ti、Si、Mg、P、Sn、Zn、Cr、Zr、V、Na、Ca、Ba、Cs、Mn、K、Ga、B、Nb、Ce、Be、Nd、Sc、Hf、Ho、Lu、Yb、Dy、Er、Pr、Y、Li、Gd、Pu、In、Fe、La、Th、Ta、U、Sm、Tb、Sr、Tm及Al所組成之群中之1種或2種以上之元素。這些元素是常溫下與氧之反應性較高之元素,且是抑制金屬基材之焊料密接性之元素。具體而言,這些元素之在氧化物之埃林漢姆圖(Ellingham diagram)(例如,參照「社團法人日本鐵鋼協會、“第3版 鐵鋼手冊 第I卷 基礎”、1983年、丸善股份有限公司」)中之固體之氧化物之標準生成自由能量△G°在溫度300K下為-500kJ/mol O2以下。 The metal substrate used in the present invention contains a material selected from the group consisting of Ti, Si, Mg, P, Sn, Zn, Cr, Zr, V, Na, Ca, Ba, Cs, Mn, K, Ga, B, Nb, Ce, Be, Nd, Sc, Hf, Ho, Lu, Yb, Dy, Er, Pr, Y, Li, Gd, Pu, In, Fe, La, Th, Ta, U, Sm, Tb, Sr, Tm and One or two or more elements of the group consisting of Al. These elements are elements which have high reactivity with oxygen at normal temperature, and are elements which suppress the solder adhesion of a metal substrate. Specifically, these elements are in the Ellingham diagram of oxides (for example, refer to "Japan Iron and Steel Association, "The 3rd Edition of the Iron and Steel Handbook, Volume I Foundation", 1983, Maruzen Stock The standard production free energy ΔG° of the solid oxide in the company ") is -500 kJ/mol O 2 or less at a temperature of 300 K.

在本發明中所使用之金屬基材中,就顯著地發揮本發明之效果之觀點而言,優選含有合計0.0001質量%以上之上述與氧之反應性較高之元素,更優選含有0.005質量%以上之上述與氧之反應性較高之元素,進而更優選含有0.007質量%以上之上述與氧之反應性較高之元素,進而更優選含有0.01質量%以上之上述與氧之反應性較高之元素,進而更優選含有0.02質量%以上之上述與氧之反應性較高之元素。另外,本發明中所使用之金屬基材也可構成材料整體為上述與氧之反應性較高之元素,但為了使金屬基 材與氧之反應性降低,使焊料密接性更為提高,優選含有合計100質量%以下之上述與氧之反應性較高之元素,優選含有小於100質量%之上述與氧之反應性較高之元素,更優選含有99質量%以下之上述與氧之反應性較高之元素,進而更優選含有95質量%以下之上述與氧之反應性較高之元素,進而更優選含有90質量%以下之上述與氧之反應性較高之元素,進而更優選含有85質量%以下之上述與氧之反應性較高之元素,進而更優選含有50質量%以下之上述與氧之反應性較高之元素,進而更優選含有40質量%以下之上述與氧之反應性較高之元素,進而更優選含有30質量%以下之上述與氧之反應性較高之元素,進而更優選含有20質量%以下之上述與氧之反應性較高之元素,進而更優選含有10質量%以下之上述與氧之反應性較高之元素。 In the metal base material to be used in the present invention, it is preferable that the above-mentioned effects of the present invention are contained in an amount of 0.0001% by mass or more, and the above-mentioned element having a high reactivity with oxygen is contained, and it is more preferable to contain 0.005 mass%. Further, the above-mentioned element having high reactivity with oxygen is more preferably contained in an amount of 0.007% by mass or more of the element having high reactivity with oxygen, and more preferably 0.01% by mass or more of the above-mentioned reactivity with oxygen. Further, it is more preferable that the element further contains 0.02% by mass or more of the above-mentioned element having high reactivity with oxygen. Further, the metal substrate used in the present invention may be an element having a high reactivity with oxygen as described above, but in order to make the metal base The reactivity of the material with oxygen is lowered, and the solder adhesion is further improved. It is preferable that the above-mentioned element having a high reactivity with oxygen is contained in a total amount of 100% by mass or less, and preferably less than 100% by mass of the above-mentioned reactivity with oxygen is high. It is more preferable that the element having a high reactivity with oxygen is contained in an amount of 99% by mass or less, and more preferably 95% by mass or less of the element having high reactivity with oxygen, and more preferably 90% by mass or less. Further, the element having high reactivity with oxygen is more preferably contained in an amount of 85% by mass or less of the element having high reactivity with oxygen, and more preferably 50% by mass or less of the above-mentioned reactivity with oxygen. Further, it is more preferable that the element further contains 40% by mass or less of the element having high reactivity with oxygen, and more preferably contains 30% by mass or less of the element having high reactivity with oxygen, and more preferably 20% by mass or less. Further, the element having high reactivity with oxygen is more preferably contained in an amount of 10% by mass or less of the above-mentioned element having high reactivity with oxygen.

作為本發明中可使用之金屬基材之例,可列舉:銅合金、鋁、鋁合金、鐵、鐵合金、不銹鋼、鎳合金、鈦、鈦合金、金合金、銀合金、鉑族合金、鉻、鉻合金、鎂、鎂合金、鎢、鎢合金、鉬合金、鉛合金、鉭、鉭合金、鋯、鋯合金、錫、錫合金、銦、銦合金、鋅、或鋅合金等,進而也可使用公知之金屬材料。另外,也可使用JIS標準或CDA等所規範之金屬材料。另外,金屬基材也可為金屬條、金屬板、或金屬箔之形態。 Examples of the metal substrate usable in the present invention include copper alloy, aluminum, aluminum alloy, iron, iron alloy, stainless steel, nickel alloy, titanium, titanium alloy, gold alloy, silver alloy, platinum group alloy, chromium, and the like. Chromium alloy, magnesium, magnesium alloy, tungsten, tungsten alloy, molybdenum alloy, lead alloy, niobium, tantalum alloy, zirconium, zirconium alloy, tin, tin alloy, indium, indium alloy, zinc, or zinc alloy, etc., and thus can also be used Known metal materials. In addition, a metal material such as a JIS standard or a CDA may be used. Further, the metal substrate may be in the form of a metal strip, a metal plate, or a metal foil.

在使用銅合金箔作為金屬箔之情況下,可為電解銅合金箔及壓延銅合金箔中之任一種。另外,該銅合金箔也可為適合製作電子零件之銅合金箔,該電子零件是使銅合金箔與樹脂基板接著而製作積層體,藉由蝕刻進行去除,藉此形成電路而成。關於該銅合金箔之厚度,也沒有特別限制,例如可適當調節為適合不同用途之厚度而使用。例如,可設為1~5000 μm左右或2~1000μm左右,尤其是在用於形成電路之情況下,厚度為35μm以下,作為遮罩帶用,為18μm以下之較薄銅合金箔,因此在用作電子、電氣機器內部之連接器或遮罩材、外罩、彈簧等之情況下,也可應用於70~1000μm之較厚材料,上限之厚度並沒有特別規定。 When a copper alloy foil is used as the metal foil, it may be any of an electrolytic copper alloy foil and a rolled copper alloy foil. In addition, the copper alloy foil may be a copper alloy foil suitable for producing an electronic component in which a copper alloy foil and a resin substrate are bonded to each other to form a laminate, which is removed by etching to form a circuit. The thickness of the copper alloy foil is not particularly limited, and for example, it can be appropriately adjusted to a thickness suitable for different uses. For example, it can be set to 1~5000 About μm or about 2 to 1000 μm, especially when used to form a circuit, the thickness is 35 μm or less, and as a mask tape, it is a thin copper alloy foil of 18 μm or less. Therefore, it is used as an electronic or electrical machine. In the case of a connector or a cover material, a cover, a spring, etc., it can also be applied to a thick material of 70 to 1000 μm, and the thickness of the upper limit is not particularly specified.

作為銅合金,也可設為含有合計0.001~4.0質量%之Sn、Cr、Fe、In、P、Si、Ti、Zn、B、Mn及Zr中之1種或2種以上之銅合金。此外,也可含有其他元素,上述其他元素包括Ag、Au、Co、Ni、Te等與氧之反應性較低之元素。 The copper alloy may be a copper alloy containing one or more of Sn, Cr, Fe, In, P, Si, Ti, Zn, B, Mn, and Zr in a total amount of 0.001 to 4.0% by mass. Further, other elements may be contained, and the other elements include elements having low reactivity with oxygen such as Ag, Au, Co, Ni, and Te.

作為銅合金,進而可列舉:鈦銅、磷青銅、卡遜合金、紅黃銅、黃銅、鋅白銅、其他銅合金等。另外,作為銅合金,還可將JIS H 3100~JIS H3510、JIS H 5120、JIS H 5121、JIS C 2520~JIS C 2801、JIS E 2101~JIS E 2102所規範之銅或銅合金用於本發明。此外,只要在本說明書中沒有特別說明,那麼為了表示金屬標準而列舉之JIS標準意指2001年度版之JIS標準。 Examples of the copper alloy include titanium copper, phosphor bronze, Carson alloy, red brass, brass, zinc white copper, and other copper alloys. Further, as the copper alloy, copper or copper alloys specified in JIS H 3100 to JIS H3510, JIS H 5120, JIS H 5121, JIS C 2520 to JIS C 2801, and JIS E 2101 to JIS E 2102 can be used in the present invention. . Further, as long as it is not specifically described in the present specification, the JIS standard listed for indicating the metal standard means the JIS standard of the 2001 edition.

關於鈦銅,典型而言,具有如下組成:含有0.5~5.0質量%之Ti,剩餘部分由銅及不可避免之雜質構成。鈦銅還可進而含有合計2.0質量%以下之Fe、Co、V、Nb、Mo、B、Ni、P、Zr、Mn、Zn、Si、Mg及Cr中之1種或2種以上。 The titanium copper is typically composed of a composition containing 0.5 to 5.0% by mass of Ti and the balance being composed of copper and unavoidable impurities. The titanium copper may further contain one or more of Fe, Co, V, Nb, Mo, B, Ni, P, Zr, Mn, Zn, Si, Mg, and Cr in a total amount of 2.0% by mass or less.

關於磷青銅,典型而言,所謂磷青銅是指以銅為主成分且含有Sn及質量少於Sn的P之銅合金。作為一例,磷青銅具有如下組成:含有3.5~11質量%之Sn、0.03~0.35質量%之P,剩餘部分由銅及不可避免之雜質構成。磷青銅還可含有合計1.0質量%以下之Ni、Zn等元素。 Regarding phosphor bronze, typically, phosphor bronze refers to a copper alloy containing copper as a main component and containing Sn and P having a mass less than Sn. As an example, phosphor bronze has a composition containing 3.5 to 11% by mass of Sn, 0.03 to 0.35% by mass of P, and the balance being composed of copper and unavoidable impurities. The phosphor bronze may further contain an element such as Ni or Zn in a total amount of 1.0% by mass or less.

關於卡遜合金,典型而言,是指除Si以外還添加有與Si形成化合物之元素(例如,Ni、Co及Cr中之任意1種以上),且在母相中以第二相粒子之形式析出之銅合金。作為一例,卡遜合金具有如下組成:含有1.0~5.0質量%之Ni、0.2~1.6質量%之Si,剩餘部分由銅及不可避免之雜質構成。作為另一個例,卡遜合金具有如下組成:含有1.0~5.0質量%之Ni、0.2~1.6質量%之Si、0.03~0.5質量%之Cr,剩餘部分由銅及不可避免之雜質構成。作為又一個例,卡遜合金具有如下組成:含有1.0~5.0質量%之Ni、0.2~1.6質量%之Si、0.1~3.5質量%之Co,剩餘部分由銅及不可避免之雜質構成。作為又一個例,卡遜合金具有如下組成:含有1.0~5.0質量%之Ni、0.2~1.6質量%之Si、0.1~3.5質量%之Co、0.03~0.5質量%之Cr,剩餘部分由銅及不可避免之雜質構成。作為又一個例,卡遜合金具有如下組成:含有0.2~1.6質量%之Si、0.1~3.5質量%之Co,剩餘部分由銅及不可避免之雜質構成。還可向卡遜合金隨意地添加其他元素(例如,Mg、Sn、B、Ti、Mn、Ag、P、Zn、As、Sb、Be、Zr、Al及Fe)。這些其他元素通常添加至總計4.0質量%左右為止。例如,作為又一個例,卡遜合金具有如下組成:含有1.0~5.0質量%之Ni、0.2~1.6質量%之Si、0.01~2.0質量%之Sn、0.01~2.0質量%之Zn,剩餘部分由銅及不可避免之雜質構成。 The Carson alloy is typically added with an element (for example, any one of Ni, Co, and Cr) which forms a compound with Si in addition to Si, and a second phase particle in the parent phase. A copper alloy precipitated in the form. As an example, the Carson alloy has a composition containing 1.0 to 5.0% by mass of Ni, 0.2 to 1.6% by mass of Si, and the balance being composed of copper and unavoidable impurities. As another example, the Carson alloy has a composition containing 1.0 to 5.0% by mass of Ni, 0.2 to 1.6% by mass of Si, 0.03 to 0.5% by mass of Cr, and the balance being composed of copper and unavoidable impurities. As still another example, the Carson alloy has a composition containing 1.0 to 5.0% by mass of Ni, 0.2 to 1.6% by mass of Si, and 0.1 to 3.5% by mass of Co, and the balance being composed of copper and unavoidable impurities. As still another example, the Carson alloy has the following composition: 1.0 to 5.0% by mass of Ni, 0.2 to 1.6% by mass of Si, 0.1 to 3.5% by mass of Co, 0.03 to 0.5% by mass of Cr, and the balance being copper and Inevitable impurities constitute. As still another example, the Carson alloy has a composition containing 0.2 to 1.6% by mass of Si, 0.1 to 3.5% by mass of Co, and the balance being composed of copper and unavoidable impurities. Other elements (for example, Mg, Sn, B, Ti, Mn, Ag, P, Zn, As, Sb, Be, Zr, Al, and Fe) may be optionally added to the Carson alloy. These other elements are usually added to a total of about 4.0% by mass. For example, as another example, the Carson alloy has a composition of 1.0 to 5.0% by mass of Ni, 0.2 to 1.6% by mass of Si, 0.01 to 2.0% by mass of Sn, and 0.01 to 2.0% by mass of Zn, and the remainder is Copper and inevitable impurities.

在本發明中,所謂紅黃銅,是指銅與鋅之合金,且含有1~20質量%之鋅、更優選含有1~10質量%之鋅之銅合金。另外,紅黃銅還可含有0.1~1.0質量%之錫。 In the present invention, the term "red brass" means an alloy of copper and zinc, and contains 1 to 20% by mass of zinc, more preferably 1 to 10% by mass of zinc. In addition, the red brass may also contain 0.1 to 1.0% by mass of tin.

在本發明中,所謂黃銅,是指銅與鋅之合金,且尤其是含有20質量%以上之鋅之銅合金。鋅之上限沒有特別限定,但為60質量%以下, 優選45質量%以下、或40質量%以下。 In the present invention, the term "brass" means an alloy of copper and zinc, and particularly a copper alloy containing 20% by mass or more of zinc. The upper limit of zinc is not particularly limited, but is 60% by mass or less. It is preferably 45 mass% or less or 40 mass% or less.

在本發明中,所謂鋅白銅,是指以銅為主成分,含有60質量%至75質量%之銅、8.5質量%至19.5質量%之鎳、10質量%至30質量%之鋅之銅合金。 In the present invention, zinc white copper refers to a copper alloy containing copper as a main component and containing 60% by mass to 75% by mass of copper, 8.5% by mass to 19.5% by mass of nickel, and 10% by mass to 30% by mass of zinc. .

在本發明中,所謂其他銅合金,是指含有合計8.0質量%以下之Zn、Sn、Mg、Fe、Si、P、Mn、Zr、Cr及Ti中之1種或2種以上,且隨意地含有20質量%以下之其他元素,或隨意地含有10質量%以下之其他元素,剩餘部分由不可避免之雜質與銅之銅合金構成。此外,其他元素沒有特別限制,也可為Ni、Co等與氧之反應性較低之元素。 In the present invention, the other copper alloys include one or more of Zn, Sn, Mg, Fe, Si, P, Mn, Zr, Cr, and Ti in a total amount of 8.0% by mass or less, and optionally It contains 20% by mass or less of other elements, or optionally contains 10% by mass or less of other elements, and the remainder is composed of unavoidable impurities and copper copper alloy. Further, the other elements are not particularly limited, and may be an element having low reactivity with oxygen such as Ni or Co.

作為鋁及鋁合金,例如可使用含有40質量%以上之Al、或含有80質量%以上之Al、或含有99質量%以上之Al之鋁及鋁合金。例如,可使用JIS H 4000~JIS H 4180、JIS H 5202、JIS H 5303或JIS Z 3232~JIS Z 3263所規範之鋁及鋁合金。例如可使用JIS H 4000所規範之鋁之合金編號1085、1080、1070、1050、1100、1200、1N00、1N30所代表之Al:99.00質量%以上之鋁或鋁合金等。 As the aluminum and the aluminum alloy, for example, 40% by mass or more of Al or 80% by mass or more of Al or 99% by mass or more of Al and aluminum can be used. For example, aluminum and aluminum alloys specified in JIS H 4000 to JIS H 4180, JIS H 5202, JIS H 5303 or JIS Z 3232 to JIS Z 3263 can be used. For example, aluminum or aluminum alloy represented by Al: 99.00% by mass or more represented by aluminum alloy numbers 1085, 1080, 1070, 1050, 1100, 1200, 1N00, and 1N30 specified by JIS H 4000 can be used.

作為鎳合金,例如可使用含有40質量%以上之Ni、或含有80質量%以上之Ni、或含有99.0質量%以上之Ni之鎳合金。例如,以含有上述之與氧之反應性較高之元素為條件,可使用JIS H 4541~JIS H 4554、JIS H 5701或JIS G 7604~JIS G 7605、JIS C 2531所規範之鎳合金。另外,例如可使用JIS H4551所記載之合金編號NW2200、NW2201所代表之Ni:99.0質量%以上之鎳合金。 As the nickel alloy, for example, a nickel alloy containing 40% by mass or more of Ni or 80% by mass or more of Ni or 99.0% by mass or more of Ni can be used. For example, a nickel alloy specified in JIS H 4541 to JIS H 4554, JIS H 5701, JIS G 7604 to JIS G 7605, and JIS C 2531 can be used as long as the element having high reactivity with oxygen is contained. Further, for example, a nickel alloy represented by Alloy No. NW2200 described in JIS H4551 and Ni: 99.0% by mass or more represented by NW2201 can be used.

作為鐵及鐵合金,例如可使用不銹鋼、軟鋼、碳鋼、鐵鎳合 金、鋼等。例如可使用JIS G 3101~JIS G 7603、JIS C 2502~JIS C 8380、JIS A 5504~JIS A 6514或JIS E 1101~JIS E 5402-1所記載之鐵或鐵合金。不銹鋼可使用SUS 301、SUS 304、SUS 310、SUS 316、SUS 430、SUS 631(均為JIS標準)等。軟鋼可使用碳為0.15質量%以下之軟鋼,可使用JIS G3141所記載之軟鋼等。鐵鎳合金含有35~85質量%之Ni,剩餘部分由Fe及不可避免之雜質構成,具體而言,可使用JIS C2531所記載之鐵鎳合金等。 As iron and iron alloys, for example, stainless steel, mild steel, carbon steel, iron-nickel alloy can be used. Gold, steel, etc. For example, iron or an iron alloy described in JIS G 3101 to JIS G 7603, JIS C 2502 to JIS C 8380, JIS A 5504 to JIS A 6514, or JIS E 1101 to JIS E 5402-1 can be used. As the stainless steel, SUS 301, SUS 304, SUS 310, SUS 316, SUS 430, and SUS 631 (all JIS standards) can be used. As the mild steel, soft steel having a carbon content of 0.15% by mass or less can be used, and mild steel described in JIS G3141 can be used. The iron-nickel alloy contains 35 to 85% by mass of Ni, and the remainder is composed of Fe and unavoidable impurities. Specifically, an iron-nickel alloy described in JIS C2531 or the like can be used.

作為鋅及鋅合金,例如可使用含有40質量%以上之Zn、或含有80質量%以上之Zn、或含有99.0質量%以上之Zn之鋅及鋅合金。例如,可使用JIS H 2107~JIS H 5301所記載之鋅或鋅合金。 As the zinc and the zinc alloy, for example, zinc or a zinc alloy containing 40% by mass or more of Zn or 80% by mass or more of Zn or 99.0% by mass or more of Zn can be used. For example, zinc or a zinc alloy described in JIS H 2107 to JIS H 5301 can be used.

作為鉛合金,以含有上述之與氧之反應性較高之元素為條件,例如可使用含有40質量%以上之Pb、或含有80質量%以上之Pb、或含有99.0質量%以上之Pb之鉛合金。例如可使用JIS H 4301~JIS H 4312、或JIS H 5601所規範之鉛或鉛合金。 As a lead alloy, it is possible to use, for example, Pb containing 40% by mass or more, Pb containing 80% by mass or more, or Pb containing 99.0% by mass or more, as a condition of containing the above-mentioned element having high reactivity with oxygen. alloy. For example, lead or lead alloys as specified in JIS H 4301 to JIS H 4312 or JIS H 5601 can be used.

作為鎂及鎂合金,例如可使用含有40質量%以上之Mg、或含有80質量%以上之Mg、或含有99.0質量%以上之Mg之鎂及鎂合金。例如可使用JIS H 4201~JIS H 4204、JIS H 5203~JIS H 5303、JIS H 6125所規範之鎂及鎂合金。 As the magnesium and the magnesium alloy, for example, Mg or a magnesium alloy containing 40% by mass or more of Mg or 80% by mass or more of Mg or 99.0% by mass or more of Mg may be used. For example, magnesium and magnesium alloys specified in JIS H 4201 to JIS H 4204, JIS H 5203 to JIS H 5303, and JIS H 6125 can be used.

作為鎢及鎢合金,例如可使用含有40質量%以上之W、或含有80質量%以上之W、或含有99.0質量%以上之W之鎢及鎢合金。例如可使用JIS H 4463所規範之鎢及鎢合金。 As the tungsten and the tungsten alloy, for example, 40% by mass or more of W or 80% by mass or more of W or 99.0% by mass or more of W and tungsten and a tungsten alloy can be used. For example, tungsten and tungsten alloys as specified in JIS H 4463 can be used.

作為鉬合金,以含有上述之與氧之反應性較高之元素為條件,例如可使用含有40質量%以上之Mo、或含有80質量%以上之Mo、或 含有99.0質量%以上之Mo之鉬合金。 The molybdenum alloy may contain, for example, 40% by mass or more of Mo or 80% by mass or more of Mo, or an element having a high reactivity with oxygen as described above. A molybdenum alloy containing 99.0% by mass or more of Mo.

作為鈦及鈦合金,例如可使用含有40質量%以上之Ti、或含有80質量%以上之Ti、或含有99.0質量%以上之Ti之鈦及鈦合金。例如可使用JIS H 4600~JIS H 4675、JIS H 5801所規範之鈦及鈦合金。 For the titanium and the titanium alloy, for example, Ti containing 40% by mass or more, Ti containing 80% by mass or more, or Ti containing 99.0% by mass or more of Ti and a titanium alloy can be used. For example, titanium and titanium alloys as specified in JIS H 4600 to JIS H 4675 and JIS H 5801 can be used.

作為鉭及鉭合金,例如可使用含有40質量%以上之Ta、或含有80質量%以上之Ta、或含有99.0質量%以上之Ta之鉭及鉭合金。例如可使用JIS H 4701所規範之鉭及鉭合金。 For the tantalum and niobium alloy, for example, Ta containing 40% by mass or more, Ta containing 80% by mass or more, or Ta containing 99.0% by mass or more of Ta and a niobium alloy can be used. For example, niobium and tantalum alloys as specified in JIS H 4701 can be used.

作為鋯及鋯合金,例如可使用含有40質量%以上之Zr、或含有80質量%以上之Zr、或含有99.0質量%以上之Zr之鋯及鋯合金。例如可使用JIS H 4751所規範之鋯及鋯合金。 As the zirconium and zirconium alloy, for example, Zr containing 40% by mass or more, Zr containing 80% by mass or more, or Zr containing 99.0% by mass or more of Zr and a zirconium alloy can be used. For example, zirconium and zirconium alloys as specified in JIS H 4751 can be used.

作為錫及錫合金,例如可使用含有40質量%以上之Sn、或含有80質量%以上之Sn、或含有99.0質量%以上之Sn之錫及錫合金。例如可使用JIS H 5401所規範之錫及錫合金。 As the tin and the tin alloy, for example, tin or a tin alloy containing 40% by mass or more of Sn or 80% by mass or more of Sn or 99.0% by mass or more of Sn can be used. For example, tin and tin alloys as specified in JIS H 5401 can be used.

作為銦及銦合金,例如可使用含有40質量%以上之In、或含有80質量%以上之In、或含有99.0質量%以上之In之銦及銦合金。 As the indium and the indium alloy, for example, 40% by mass or more of In, 80% by mass or more of In, or 99.0% by mass or more of In and Indium alloys can be used.

作為鉻及鉻合金,例如可使用含有40質量%以上之Cr、或含有80質量%以上之Cr、或含有99.0質量%以上之Cr之鉻及鉻合金。 As the chromium and the chromium alloy, for example, 40% by mass or more of Cr or 80% by mass or more of Cr or 99.0% by mass or more of Cr and chromium alloys can be used.

作為銀合金,以含有上述之與氧之反應性較高之元素為條件,例如可使用含有40質量%以上之Ag、含有80質量%以上之Ag、或含有99.0質量%以上之Ag之銀合金。 The silver alloy may be a silver alloy containing 40% by mass or more of Ag, 80% by mass or more of Ag, or 99.0% by mass or more of Ag, as long as the element having a high reactivity with oxygen is used. .

作為金合金,以含有上述之與氧之反應性較高之元素為條件,例如可使用含有40質量%以上之Au、含有80質量%以上之Au、或含 有99.0質量%以上之Au之金合金。 The gold alloy may contain, for example, 40% by mass or more of Au, 80% by mass or more of Au, or the like, as long as it contains the above-mentioned element having high reactivity with oxygen. There is a gold alloy of Au of 99.0% by mass or more.

所謂鉑族,是釕、銠、鈀、鋨、銥、鉑之總稱。作為鉑族合金,以含有上述之與氧之反應性較高之元素為條件,例如可使用將選自Pt、Os、Ru、Pd、Ir及Rh之元素群中之至少1種以上之元素含有40質量%以上、或含有80質量%以上、或含有99.0質量%以上之鉑族合金。 The so-called platinum group is a general term for ruthenium, rhodium, palladium, osmium, iridium and platinum. As the platinum group alloy, for example, an element having a high reactivity with oxygen can be used. For example, at least one element selected from the group consisting of Pt, Os, Ru, Pd, Ir, and Rh can be used. 40% by mass or more, or 80% by mass or more, or 99.0% by mass or more of a platinum group alloy.

作為本發明中所使用之金屬基材之形狀,沒有特別限制,可加工為最終之電子零件之形狀,也可為局部完成了加壓加工之狀態。也可不進行形狀加工而為板或箔之形態。儘管要顧及在形狀加工前進行鍍敷之「預鍍敷」之情況下,在加壓加工後殘留鍍敷未處理部分,及在形狀加工後進行鍍敷之「後鍍敷」之情況下,可對表面整體進行鍍敷處理之情況,但只要在與應鍍敷之部分保持均衡之情況下適當決定在哪一個形狀加工階段進行表面處理即可。 The shape of the metal substrate used in the present invention is not particularly limited, and it can be processed into the shape of the final electronic component, or the state in which the press working is partially completed. It may be in the form of a plate or a foil without performing shape processing. In the case of "pre-plating" in which plating is performed before the shape processing, in the case where the untreated portion of the plating remains after the press working, and the "post-plating" of the plating after the shape processing is performed, Although the entire surface may be subjected to a plating treatment, it is only necessary to appropriately determine the surface treatment stage in which the surface treatment is performed while maintaining the balance with the portion to be plated.

[鍍層] [plating]

本發明之附鍍敷之金屬基材在一個實施形態中,在金屬基材表面具有選自由Co鍍層、以及含有選自由Co、Ni及Mo所組成之群中之2種以上之元素之合金鍍層所組成之群中之鍍層。含有選自由Co、Ni及Mo所組成之群中之2種以上之元素之合金鍍層,在典型之實施形態中選自由Co-Ni合金鍍層、Co-Mo合金鍍層、Ni-Mo合金鍍層及Co-Ni-Mo合金鍍層所組成之群中。 In one embodiment, the plated metal substrate of the present invention has an alloy plating layer selected from a Co plating layer and an element containing two or more elements selected from the group consisting of Co, Ni, and Mo on the surface of the metal substrate. The coating in the group formed. An alloy plating layer containing two or more elements selected from the group consisting of Co, Ni, and Mo, and in a typical embodiment, is selected from the group consisting of a Co-Ni alloy plating layer, a Co-Mo alloy plating layer, a Ni-Mo alloy plating layer, and Co. - a group consisting of Ni-Mo alloy coatings.

該鍍層中之Co、Ni及Mo之合計附著量為500μg/dm2以上,藉此金屬基材與焊料之密接強度及耐候性提高。另外,藉由在鍍層中含有Co,還可獲得蝕刻性之提高效果。雖並非意圖藉由理論而限定本發明,但 推測Ni、Co及Mo由於與氧之反應性較低而難以形成氧化物,另外,在焊接時與作為構成焊料之主成分之Sn容易相互熱擴散,故而明顯表現出焊料之密接強度或耐候性之提高效果。 The total adhesion amount of Co, Ni, and Mo in the plating layer is 500 μg/dm 2 or more, whereby the adhesion strength and weather resistance between the metal substrate and the solder are improved. Further, by containing Co in the plating layer, an effect of improving etching properties can be obtained. Although it is not intended to limit the present invention by theory, it is presumed that Ni, Co, and Mo have low reactivity with oxygen, and it is difficult to form an oxide. Further, Sn, which is a main component of the solder, is easily thermally diffused at the time of soldering. Therefore, the effect of improving the adhesion strength or weather resistance of the solder is apparent.

上述鍍層中之Co、Ni及Mo之合計附著量優選700μg/dm2以上,優選1000μg/dm2以上,優選2000μg/dm2以上,優選3000μg/dm2以上,優選5000μg/dm2以上,更優選7000μg/dm2以上,進而更優選8000μg/dm2以上。另一方面,即便過度增加Co、Ni及Mo之合計附著量,仍存在成本變高而且效果飽和之傾向。另外,還對蝕刻性有不良影響。因此,就確保優異之蝕刻性之觀點而言,Co、Ni及Mo之合計附著量優選90000μg/dm2以下,更優選55000μg/dm2以下。 The above coating layer of Co, Ni and Mo, the total deposition amount is preferably 700μg / dm 2 or more, preferably 1000μg / dm 2 or more, preferably 2000μg / dm 2 or more, preferably 3000μg / dm 2 or more, preferably 5000μg / dm 2 or more, more preferably 7000 μg/dm 2 or more, and more preferably 8000 μg/dm 2 or more. On the other hand, even if the total adhesion amount of Co, Ni, and Mo is excessively increased, there is a tendency that the cost becomes high and the effect is saturated. In addition, it also has an adverse effect on the etching property. Therefore, from the viewpoint of ensuring excellent etching properties, the total adhesion amount of Co, Ni, and Mo is preferably 90,000 μg/dm 2 or less, and more preferably 55,000 μg/dm 2 or less.

就除確保優異之焊料密接性及耐候性外,還確保蝕刻性之觀點而言,優選Co比率較高,即Ni及Mo之合計比率較低之情況,具體而言,優選將鍍層中之相對於Co、Ni及Mo之合計附著量之Ni及Mo之合計附著量(以下也稱為「Ni+Mo比率(%)」)設為80質量%以下,更優選設為60質量%以下,進而更優選設為50質量%以下。其中,如果Ni+Mo比率(%)過低,那麼對耐候性有不良影響,另外,Co是高價之金屬,因此如果設為Co之單獨鍍層,那麼成本變高。因此,如果綜合考慮焊料密接性、耐候性、蝕刻性及經濟性,那麼鍍層中之Ni+Mo比率(%)優選設為超過0質量%,更優選設為1質量%以上,進而更優選設為2質量%以上,進而更優選設為10質量%以上,進而更優選設為20質量%以上。 In addition to ensuring excellent solder adhesion and weather resistance, it is preferable that the Co ratio is high, that is, the total ratio of Ni and Mo is low, and specifically, it is preferable to compare the plating layers. The total adhesion amount of Ni and Mo (hereinafter also referred to as "Ni + Mo ratio (%)") in the total adhesion amount of Co, Ni, and Mo is 80% by mass or less, and more preferably 60% by mass or less. More preferably, it is 50 mass % or less. Among them, if the Ni+Mo ratio (%) is too low, the weather resistance is adversely affected, and Co is a high-priced metal. Therefore, if it is a separate plating layer of Co, the cost becomes high. Therefore, the Ni+Mo ratio (%) in the plating layer is preferably more than 0% by mass, more preferably 1% by mass or more, and still more preferably, in consideration of solder adhesion, weather resistance, etching property, and economy. It is 2% by mass or more, more preferably 10% by mass or more, and still more preferably 20% by mass or more.

根據以上之解說,如果提及鍍層中之各元素之附著量,那麼Co之附著量就確保蝕刻性之觀點而言,優選180μg/dm2以上,更優選250 μg/dm2以上,更優選360μg/dm2以上,更優選720μg/dm2以上,更優選1080μg/dm2以上,進而更優選1800μg/dm2以上,進而更優選3000μg/dm2以上,進而更優選4200μg/dm2以上,進而更優選4800μg/dm2以上。另外,Co之附著量就耐候性及經濟性之觀點而言,優選108000μg/dm2以下,更優選54000μg/dm2以下,進而更優選33000μg/dm2以下。 According to the above explanation, if the adhesion amount mentioned elements of the coating, the deposition amount of Co ensures viewpoint of etching resistance, it is preferred 180μg / dm 2 or more, more preferably 250 μg / dm 2 or more, more preferably 360μg A / dm 2, more preferably 720μg / dm 2 or more, more preferably 1080μg / dm 2 or more, still more preferably 1800μg / dm 2 or more, still more preferably 3000 [mu A / dm 2, still more preferably 4200μg / dm 2 or more, and even more It is preferably 4800 μg/dm 2 or more. In addition, the adhesion amount of Co is preferably 108,000 μg/dm 2 or less, more preferably 54000 μg/dm 2 or less, and still more preferably 33,000 μg/dm 2 or less from the viewpoint of weather resistance and economy.

Ni及Mo之合計附著量就確保耐候性之觀點而言,優選超過0μg/dm2,更優選120μg/dm2以上,進而更優選170μg/dm2以上,進而更優選240μg/dm2以上,進而更優選480μg/dm2以上,進而更優選720μg/dm2以上,進而更優選1200μg/dm2以上,進而更優選2000μg/dm2以上,進而更優選3200μg/dm2以上。另外,Ni及Mo之合計附著量就蝕刻性之觀點而言,優選72000μg/dm2以下,更優選36000μg/dm2以下,進而更優選22000μg/dm2以下。Ni與Mo具有類似之性質,但Mo之耐候性更優異,另一方面,Mo之蝕刻性容易變差,因此就耐候性及蝕刻性之平衡性之觀點而言,優選使Ni與Mo並存。例如鍍層中之Ni與Mo之含有比率以質量比計可設為Ni:Mo=10:0~0:10,優選Ni:Mo=9:1~1:9,更優選Ni:Mo=8:2~2:8,進而更優選Ni:Mo=6:4~4:6。 Ni and Mo, the total deposition amount of ensuring the viewpoint of weather resistance, it is preferred over 0μg / dm 2, more preferably 120μg / dm 2 or more, still more preferably 170μg / dm 2 or more, still more preferably 240μg / dm 2 or more, and more preferably 480μg / dm 2 or more, still more preferably 720μg / dm 2 or more, still more preferably 1200μg / dm 2 or more, still more preferably 2000μg / dm 2 or more, still more preferably 3200μg / dm 2 or more. In addition, the total adhesion amount of Ni and Mo is preferably 72,000 μg/dm 2 or less, more preferably 36,000 μg/dm 2 or less, and still more preferably 22,000 μg/dm 2 or less from the viewpoint of etching property. Ni has similar properties to Mo, but Mo is more excellent in weather resistance. On the other hand, Mo etching property is liable to be deteriorated. Therefore, from the viewpoint of balance between weather resistance and etching property, Ni and Mo are preferably coexistent. For example, the content ratio of Ni to Mo in the plating layer may be set to Ni:Mo=10:0 to 0:10, preferably Ni:Mo=9:1 to 1:9, more preferably Ni:Mo=8. 2~2:8, and more preferably Ni:Mo=6:4~4:6.

此外,Co鍍層、Co-Ni合金鍍層、Co-Mo合金鍍層、Ni-Mo合金鍍層及Co-Ni-Mo合金鍍層及Co-Ni合金鍍層可分別含有不可避免之雜質。另外,其他元素也可在不妨礙本發明之目的之範圍內含在鍍層中。因此,在本發明中,所謂Co鍍層是指Co佔50質量%以上之鍍層。典型而言,Co鍍層中之Co濃度為60質量%以上,更典型而言,為80質量%以上,進而更典型而言,為90質量%以上,進而更典型而言,為98質量%以上,也 可設為100質量%。在本發明中,所謂Co-Ni合金鍍層是指Co及Ni之合計濃度佔50質量%以上之鍍層。典型而言,Co-Ni合金鍍層中之Co及Ni之合計濃度為60質量%以上,更典型而言,為80質量%以上,進而更典型而言,為90質量%以上,進而更典型而言,為98質量%以上,也可設為100質量%。在本發明中,所謂Co-Mo合金鍍層是指Co及Mo之合計濃度佔50質量%以上之鍍層。典型而言,Co-Mo合金鍍層中之Co及Mo之合計濃度為60質量%以上,更典型而言,為80質量%以上,進而更典型而言,為90質量%以上,進而更典型而言,為98質量%以上,也可設為100質量%。在本發明中,所謂Ni-Mo合金鍍層是指Ni及Mo之合計濃度佔50質量%以上之鍍層。典型而言,Ni-Mo合金鍍層中之Ni及Mo之合計濃度為60質量%以上,更典型而言,為80質量%以上,進而更典型而言,為90質量%以上,進而更典型而言,為98質量%以上,也可設為100質量%。另外,在本發明中,所謂Co-Ni-Mo合金鍍層是指Co、Ni及Mo之合計濃度佔50質量%以上之鍍層。典型而言,Co-Ni-Mo合金鍍層中之Co、Ni及Mo之合計濃度為60質量%以上,更典型而言,為80質量%以上,進而更典型而言,為90質量%以上,進而更典型而言,為98質量%以上,也可設為100質量%。 Further, the Co plating layer, the Co-Ni alloy plating layer, the Co-Mo alloy plating layer, the Ni-Mo alloy plating layer, the Co-Ni-Mo alloy plating layer, and the Co-Ni alloy plating layer may contain unavoidable impurities, respectively. Further, other elements may be contained in the plating layer within the range not impairing the object of the present invention. Therefore, in the present invention, the Co plating layer means a plating layer in which Co accounts for 50% by mass or more. Typically, the Co concentration in the Co plating layer is 60% by mass or more, more typically 80% by mass or more, and more typically 90% by mass or more, and more typically 98% by mass or more. ,and also It can be set to 100% by mass. In the present invention, the Co-Ni alloy plating layer refers to a plating layer in which the total concentration of Co and Ni accounts for 50% by mass or more. Typically, the total concentration of Co and Ni in the Co—Ni alloy plating layer is 60% by mass or more, more typically 80% by mass or more, and still more typically 90% by mass or more, and more typically In other words, it is 98% by mass or more, and may be 100% by mass. In the present invention, the Co-Mo alloy plating layer refers to a plating layer in which the total concentration of Co and Mo accounts for 50% by mass or more. Typically, the total concentration of Co and Mo in the Co-Mo alloy plating layer is 60% by mass or more, more typically 80% by mass or more, and still more typically 90% by mass or more, and more typically In other words, it is 98% by mass or more, and may be 100% by mass. In the present invention, the Ni-Mo alloy plating layer refers to a plating layer in which the total concentration of Ni and Mo accounts for 50% by mass or more. Typically, the total concentration of Ni and Mo in the Ni-Mo alloy plating layer is 60% by mass or more, more typically 80% by mass or more, and still more typically 90% by mass or more, and more typically In other words, it is 98% by mass or more, and may be 100% by mass. In the present invention, the Co-Ni-Mo alloy plating layer refers to a plating layer in which the total concentration of Co, Ni, and Mo accounts for 50% by mass or more. Typically, the total concentration of Co, Ni, and Mo in the Co-Ni-Mo alloy plating layer is 60% by mass or more, more typically 80% by mass or more, and still more typically 90% by mass or more. More specifically, it is 98% by mass or more, and may be 100% by mass.

作為可含在鍍層中之Co、Ni及Mo以外之元素,可列舉:常溫下與氧之反應性較低之元素、即具有氧化物之埃林漢姆圖(例如,參照「社團法人日本鐵鋼協會、“第3版 鐵鋼手冊 第I卷 基礎”、1983年、丸善股份有限公司」)中之固體之氧化物之標準生成自由能量△G°在溫度300K下為-440kJ/mol O2以上之氧化物之元素。舉例來說,鍍層可含有選自由Cu、As、Ag、Au、Pd、Pt、Bi、Os、Rh、Tl、Sb、Pb、Hg、Ir、Cd、Ru、 Re、Tc及Gd所組成之群中之1種或2種以上之元素。在該情況下,舉例來說,這些元素在鍍層中之附著量可設為合計0~2000μg/dm2,典型而言,可設為0~1000μg/dm2,更典型而言,可設為0~500μg/dm2Examples of the elements other than Co, Ni, and Mo which may be contained in the plating layer include an element having a low reactivity with oxygen at a normal temperature, that is, an Ehringham graph having an oxide (for example, refer to "Japan Corporation" The standard free energy ΔG° of solid oxides in the Steel Association, “The 3rd Edition of the Iron and Steel Handbook Volume I Foundation, 1983, Maruzen Co., Ltd.” is -440kJ/mol O 2 at a temperature of 300K. The above elements of the oxide. For example, the plating layer may contain a group selected from the group consisting of Cu, As, Ag, Au, Pd, Pt, Bi, Os, Rh, Tl, Sb, Pb, Hg, Ir, Cd, Ru, Re, Tc, and Gd. One or more of the elements. In this case, for example, the adhesion amount of these elements in the plating layer may be set to 0 to 2000 μg/dm 2 in total, and typically may be set to 0 to 1000 μg/dm 2 , and more typically, it may be set to 0~500μg/dm 2 .

典型而言,上述鍍層可含有選自由Cu、As、Ag、Au、Pd及Pt所組成之群中之1種或2種以上之元素。在該情況下,舉例來說,這些元素在鍍層中之附著量可設為合計0~2000μg/dm2,典型而言,可設為0~1000μg/dm2,更典型而言,可設為0~500μg/dm2Typically, the plating layer may contain one or more elements selected from the group consisting of Cu, As, Ag, Au, Pd, and Pt. In this case, for example, the adhesion amount of these elements in the plating layer may be set to 0 to 2000 μg/dm 2 in total, and typically may be set to 0 to 1000 μg/dm 2 , and more typically, it may be set to 0 ~ 500μg / dm 2.

上述鍍層也可形成在金屬基材之一部分或全部上。另外,也可在金屬基材之主表面之一面或兩面形成鍍層。在本發明之附鍍敷之金屬基材之一個實施形態中,也可將金屬基材以箔之形態提供,並在金屬箔之一面或兩個主表面形成上述鍍層。鍍層例如可藉由電鍍、無電鍍敷及浸漬鍍敷之類之濕式鍍敷等而獲得。就成本之觀點而言,優選電鍍。 The above plating layer may also be formed on part or all of the metal substrate. Further, a plating layer may be formed on one or both sides of the main surface of the metal substrate. In one embodiment of the plated metal substrate of the present invention, the metal substrate may be provided in the form of a foil, and the plating layer may be formed on one surface or both main surfaces of the metal foil. The plating layer can be obtained, for example, by wet plating such as electroplating, electroless plating, or immersion plating. From the viewpoint of cost, electroplating is preferred.

在金屬基材與上述鍍層之間,只要不妨礙鍍Co、或含有選自由Co、Ni及Mo所組成之群中之2種以上之元素之合金鍍敷之功能,那麼還可設置基底層。作為基底層,沒有限定,可列舉:由Cu鍍層、Sn鍍層、Ni鍍層、Cu-Zn鍍層、Zn-Ni鍍層、Cu-Co-Ni鍍層、Cu-Co鍍層、Cu-Ni鍍層、Ni-W鍍層、Ni-W-Sn鍍層、Cu-As鍍層、Cu-W鍍層、Cu-W-As鍍層、貴金屬(Au、Ag、鉑族元素)鍍層、鉻酸鹽處理層、矽烷偶合劑處理層等所構成之基底層。 A base layer may be provided between the metal substrate and the plating layer as long as it does not interfere with the plating of Co or an alloy plating function of two or more elements selected from the group consisting of Co, Ni, and Mo. The base layer is not limited, and examples thereof include a Cu plating layer, a Sn plating layer, a Ni plating layer, a Cu-Zn plating layer, a Zn-Ni plating layer, a Cu-Co-Ni plating layer, a Cu-Co plating layer, a Cu-Ni plating layer, and a Ni-W layer. Plating, Ni-W-Sn plating, Cu-As plating, Cu-W plating, Cu-W-As plating, precious metal (Au, Ag, platinum group element) plating, chromate treatment layer, decane coupling agent treatment layer, etc. The base layer formed.

在金屬基材與上述鍍層之間還可設置粗化處理層,還可實施利用蝕刻、研磨等之無光澤化加工、利用平滑鍍敷等之光澤化加工。藉由這些加工,可容易地調整加工之光澤度。在光澤度較低之情況下,存在如 下優選效果:作為整體成為不透明之色調,而表現出沉穩氣氛。另外,在光澤度較高之情況下,存在如下優選效果:作為整體光輝、鮮豔且給觀察者帶來清爽之印象。 A roughening treatment layer may be provided between the metal substrate and the plating layer, and a matte finish by etching or polishing or a glossing process by smooth plating or the like may be performed. By these processes, the gloss of the process can be easily adjusted. In the case of low gloss, there are The following preferred effect: as a whole, it becomes an opaque color tone, and exhibits a calm atmosphere. Further, in the case where the gloss is high, there is a preferable effect that the whole is brilliant, bright, and gives the viewer an impression of refreshing.

在上述鍍層上之最表層,為了提高防銹效果,在不會對焊料密接性造成不良影響之範圍內,還可進而形成由鉻層或鉻酸鹽處理層、及/或矽烷偶合劑處理層所構成之防銹處理層。此外,在鉻酸鹽處理層是在通常所使用之鉻酸鹽處理條件下形成之情況下,由於厚度極薄,故而不會對焊料密接性造成不良影響。 In the outermost layer on the plating layer, in order to improve the rust preventing effect, a layer treated with a chromium layer or a chromate layer and/or a decane coupling agent may be further formed within a range that does not adversely affect solder adhesion. The rust-preventing treatment layer is formed. Further, in the case where the chromate-treated layer is formed under the chromate treatment conditions which are generally used, since the thickness is extremely thin, the solder adhesion is not adversely affected.

可將本發明之附鍍敷之金屬基材之鍍層側或與鍍層相反側貼合於樹脂基板而製造遮罩帶或遮罩材等積層體。另外,如果需要,那麼可進而對該附鍍敷之金屬基材進行加工而形成電路,藉此製造印刷配線板等。作為樹脂基板,例如對於剛性PWB用途,可使用紙基材酚樹脂、紙基材環氧樹脂、合成纖維布基材環氧樹脂、玻璃布-紙複合基材環氧樹脂、玻璃布-玻璃無紡布複合基材環氧樹脂及玻璃布基材環氧樹脂等,作為FPC用途或膠帶用途,可使用聚酯膜或聚醯亞胺膜、液晶聚合物(ICP)膜、PET膜等。此外,在本發明中,「印刷配線板」也包括安裝有零件之印刷配線板及印刷電路板及印刷基板。另外,可將2個以上本發明之印刷配線板連接,而製造連接有2個以上印刷配線板之印刷配線板,另外,也可將至少1個本發明之印刷配線板、與另一個本發明之印刷配線板或不屬於本發明之印刷配線板之印刷配線板進行連接,可使用這種印刷配線板而製造電子、電氣機器。此外,在本發明中,「銅電路」也包括銅配線。 The layered side of the plated metal substrate of the present invention or the side opposite to the plated layer can be bonded to the resin substrate to produce a laminate such as a mask tape or a mask. Further, if necessary, the plated metal substrate can be further processed to form an electric circuit, thereby producing a printed wiring board or the like. As the resin substrate, for example, for rigid PWB use, paper substrate phenol resin, paper substrate epoxy resin, synthetic fiber cloth substrate epoxy resin, glass cloth-paper composite substrate epoxy resin, glass cloth-glass can be used. A woven composite base material epoxy resin, a glass cloth base material epoxy resin, etc., as a FPC use or a tape use, a polyester film, a polyimine film, a liquid crystal polymer (ICP) film, a PET film, etc. can be used. Further, in the present invention, the "printed wiring board" also includes a printed wiring board on which components are mounted, a printed circuit board, and a printed circuit board. Further, two or more printed wiring boards of the present invention may be connected to each other to manufacture a printed wiring board in which two or more printed wiring boards are connected, and at least one printed wiring board of the present invention and another inventive invention may be used. The printed wiring board or the printed wiring board not belonging to the printed wiring board of the present invention is connected, and an electronic or electrical device can be manufactured using the printed wiring board. Further, in the present invention, the "copper circuit" also includes copper wiring.

另外,本發明之附鍍敷之金屬基材可用於散熱板、構造板、遮罩材、 遮罩板、補強材料、外罩、外殼、殼體、箱體等而製作散熱板等金屬加工構件。即,附鍍敷之金屬基材是包含散熱板、構造板、遮罩材、遮罩板、補強材料、外罩、外殼、殼體、箱體之概念。另外,將本發明之附鍍敷之金屬基材用於該散熱板、構造板、遮罩材、遮罩板、補強材料、外罩、外殼、殼體、箱體等而製作金屬加工構件,可將該金屬加工構件用於電子、電氣機器。 In addition, the plated metal substrate of the present invention can be used for a heat dissipation plate, a structural plate, a mask material, A metal working member such as a heat sink is produced by a mask, a reinforcing material, a cover, an outer casing, a casing, a casing, and the like. That is, the metal substrate to be plated is a concept including a heat dissipation plate, a structural plate, a masking material, a masking plate, a reinforcing material, a cover, an outer casing, a casing, and a casing. In addition, the metal substrate coated with the present invention is used for the heat dissipating plate, the structural plate, the masking material, the masking plate, the reinforcing material, the outer cover, the outer casing, the casing, the casing, and the like to form a metal working member. This metal working member is used for an electronic or electrical machine.

本發明之附鍍敷之金屬基材在如以上之用途中,可尤其優選用於實施如下步驟之情況:藉由蝕刻而對附鍍敷之金屬基材實施形狀加工,在具有鍍層之部位藉由焊接而將形狀加工品與導電性構件進行接合。因此,本發明在一個態樣提供一種本發明之附鍍敷之金屬基材或附載體金屬箔與焊料之接合體。在本發明之接合體之一個實施形態中,在焊料與金屬基材或附載體金屬箔之接合界面存在含有Sn-Co之熱擴散層。熱擴散層可藉由如下方式形成:金屬基材表面之鍍層中所含有之Co與焊料中所含有之Sn藉由焊接時之熱而相互擴散。雖並非意圖藉由理論而限定本發明,但可認為藉由該熱擴散層,與焊料之密接性提高。 The plated metal substrate of the present invention, in the above applications, can be particularly preferably used in the case of performing a shape processing on a metal substrate to be plated by etching, and borrowing a portion having a plating layer by etching The shaped product and the conductive member are joined by welding. Accordingly, the present invention provides, in one aspect, a bonded metal substrate of the present invention or a bonded metal foil and solder joint. In one embodiment of the joined body of the present invention, a thermal diffusion layer containing Sn-Co is present at a joint interface between the solder and the metal substrate or the metal foil with a carrier. The heat diffusion layer can be formed by dispersing Co contained in the plating layer on the surface of the metal substrate and Sn contained in the solder by mutual heat during soldering. Although the present invention is not intended to be limited by theory, it is considered that the adhesion to solder is improved by the thermal diffusion layer.

[附載體金屬箔] [with carrier metal foil]

作為本發明之另一個實施形態之附載體金屬箔是在載體之一面、或兩面依序具有中間層、極薄金屬層。並且,可使用上述之附鍍敷之金屬基材作為上述極薄金屬層。在該情況下,考慮在之後之電路形成中進行蝕刻,進而進行焊接之情況,鍍層優選在金屬基材之至少供焊接之表面形成。供焊接之表面可根據電路形成製程而變動。供焊接之表面可成為極薄金屬層之與中間層對向之表面側,也可成為極薄金屬層之與中間層對向之表面相 反側之表面,也可成為上述兩個表面。 The metal foil with a carrier according to another embodiment of the present invention has an intermediate layer or an extremely thin metal layer on one side or both sides of the carrier. Further, the above-mentioned plated metal substrate can be used as the above-mentioned extremely thin metal layer. In this case, in the case where etching is performed in the subsequent circuit formation and further welding is performed, the plating layer is preferably formed on at least the surface to be welded of the metal substrate. The surface to be welded may vary depending on the circuit forming process. The surface to be welded may be the surface side of the very thin metal layer opposite to the intermediate layer, or may be the surface of the very thin metal layer opposite to the intermediate layer. The surface on the opposite side can also be the above two surfaces.

<載體> <carrier>

關於可用於本發明之載體,典型而言,為金屬箔或樹脂膜,例如以銅箔、銅合金箔、鎳箔、鎳合金箔、鐵箔、鐵合金箔、不銹鋼箔、鋁箔、鋁合金箔、絕緣樹脂膜(例如聚醯亞胺膜、液晶聚合物(LCP)膜、聚對苯二甲酸乙二酯(PET)膜、聚醯胺膜、聚酯膜、氟樹脂膜等)之形態提供。 The carrier which can be used in the present invention is typically a metal foil or a resin film such as a copper foil, a copper alloy foil, a nickel foil, a nickel alloy foil, an iron foil, a ferroalloy foil, a stainless steel foil, an aluminum foil, an aluminum alloy foil, An insulating resin film (for example, a polyimide film, a liquid crystal polymer (LCP) film, a polyethylene terephthalate (PET) film, a polyamide film, a polyester film, a fluororesin film, or the like) is provided.

作為可用於本發明之載體,優選使用銅箔。其原因在於:銅箔之導電率較高,因此變得容易形成其後之中間層、極薄金屬層。載體典型而言,以壓延銅箔或電解銅箔之形態提供。通常而言,電解銅箔是使銅自硫酸銅鍍浴在鈦或不銹鋼之轉筒上電解析出而製造,壓延銅箔是反復進行利用壓延輥之塑性加工與熱處理而製造。作為銅箔之材料,除精銅或無氧銅等高純度之銅以外,例如也可使用加入了Sn之銅、加入了Ag之銅、添加有Cr、Zr或Mg等之銅合金、添加有Ni及Si等之卡遜系銅合金之類之銅合金。 As the carrier which can be used in the present invention, copper foil is preferably used. The reason for this is that the copper foil has a high electrical conductivity, so that it becomes easy to form an intermediate layer and an extremely thin metal layer thereafter. The carrier is typically provided in the form of a rolled copper foil or an electrolytic copper foil. Generally, the electrolytic copper foil is produced by electrolyzing copper from a copper sulfate or a stainless steel drum, and the rolled copper foil is repeatedly produced by plastic working and heat treatment using a calender roll. As a material of the copper foil, in addition to high-purity copper such as refined copper or oxygen-free copper, for example, copper to which Sn is added, copper to which Ag is added, copper alloy to which Cr, Zr or Mg is added, or the like may be added. Copper alloy such as Nixon and other Cason copper alloys.

關於可用於本發明之載體之厚度,也沒有特別限制,只要適當調整為在發揮作為載體之作用之方面上合適之厚度即可,例如可設為5μm以上。但是,如果過厚,那麼生產成本變高,因此通常優選設為35μm以下。因此,關於載體之厚度,典型而言,為12~70μm,更典型而言,為18~35μm。 The thickness of the carrier which can be used in the present invention is not particularly limited, and may be appropriately adjusted to a thickness suitable for the purpose of the carrier, and may be, for example, 5 μm or more. However, if it is too thick, the production cost becomes high, and therefore it is usually preferably 35 μm or less. Therefore, the thickness of the carrier is typically 12 to 70 μm, and more typically 18 to 35 μm.

另外,載體可使用藉由以下方法所製作之電解銅箔。 Further, as the carrier, an electrolytic copper foil produced by the following method can be used.

<電解液組成> <electrolyte composition>

銅:90~110g/L Copper: 90~110g/L

硫酸:90~110g/L Sulfuric acid: 90~110g/L

氯:50~100ppm Chlorine: 50~100ppm

調平劑1(雙(三磺丙基)二硫化物):10~30ppm Leveling agent 1 (bis(trisulphonyl) disulfide): 10~30ppm

調平劑2(胺化合物):10~30ppm Leveling agent 2 (amine compound): 10~30ppm

上述之胺化合物可使用以下化學式之胺化合物。 As the above amine compound, an amine compound of the following chemical formula can be used.

(上述化學式中,R1及R2為選自由羥烷基、醚基、芳基、芳香族取代烷基、不飽和烴基、烷基所組成之群中之基團)。 (In the above chemical formula, R 1 and R 2 are a group selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group).

<製造條件> <Manufacturing conditions>

電流密度:70~100A/dm2 Current density: 70~100A/dm 2

電解液溫度:50~60℃ Electrolyte temperature: 50~60°C

電解液線速:3~5m/sec Electrolyte line speed: 3~5m/sec

電解時間:0.5~10分鐘(根據析出之銅厚、電流密度而進行調整) Electrolysis time: 0.5 to 10 minutes (adjusted according to copper thickness and current density)

此外,也可在載體之與設置極薄金屬層之側之表面相反側之表面設置粗化處理層。可使用公知之方法設置該粗化處理層,也可藉由上述之粗化處理設置該粗化處理層。在載體之與設置極薄金屬層之側之表面相反側之表面設置粗化處理層之情況具有如下優點:將載體自具有該粗化處理層之 表面側積層於樹脂基板等支撐體上時,載體與樹脂基板變得難以剝離。 Further, a roughened layer may be provided on the surface of the carrier opposite to the surface on the side where the ultra-thin metal layer is provided. The roughening treatment layer may be provided by a known method, or the roughening treatment layer may be provided by the above-described roughening treatment. The case where the roughened layer is provided on the surface of the carrier opposite to the surface on the side where the ultra-thin metal layer is provided has the advantage that the carrier is self-having the roughened layer. When the surface side is laminated on a support such as a resin substrate, the carrier and the resin substrate are less likely to be peeled off.

<中間層> <intermediate layer>

在載體上設置中間層。也可於載體與中間層之間設置其他層。在本發明中使用之中間層只要為如下構成,那麼沒有特別限定,即在附載體金屬箔向絕緣基板積層之步驟前極薄金屬層難以自載體剝離,另一方面,在向絕緣基板積層之步驟後極薄金屬層變得可自載體剝離。例如,本發明之附載體金屬箔之中間層也可含有選自由Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn、這些之合金、這些之水合物、這些之氧化物、有機物所組成之群中之1種或2種以上。另外,中間層也可為多層。 An intermediate layer is provided on the carrier. Other layers may also be provided between the carrier and the intermediate layer. The intermediate layer used in the present invention is not particularly limited as long as the intermediate metal layer is deposited on the insulating substrate before the step of laminating the carrier metal foil, and it is difficult to peel off from the carrier. After the step, the extremely thin metal layer becomes peelable from the carrier. For example, the intermediate layer of the metal foil with a carrier of the present invention may also contain a compound selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, Zn, these, hydrates thereof, and the like. One or more of a group consisting of an oxide and an organic substance. In addition, the intermediate layer may also be a plurality of layers.

另外,例如,中間層可藉由如下方式構成:自載體側形成包含選自由Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn所構成之元素群中之1種元素之單一金屬層、或包含選自由Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn所構成之元素群中之1種或2種以上之元素之合金層,在其上形成包含選自由Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn所構成之元素群中之1種或2種以上之元素之水合物或氧化物、或者有機物之層。 Further, for example, the intermediate layer may be configured by forming one of the element groups selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn from the carrier side. a single metal layer of an element or an alloy layer containing one or more elements selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn, a hydrate or an oxide containing one or more elements selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn, Or a layer of organic matter.

另外,例如,中間層可藉由如下方式構成:自載體側形成包含選自由Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn所構成之元素群中之1種元素之單一金屬層、或含有選自由Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn所構成之元素群中之1種或2種以上之元素之合金層,在其上形成含有選自由Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn所構成之元素群中之1種元素之單一金屬層、或含有選自由Cr、Ni、Co、Fe、Mo、Ti、W、P、Cu、Al、Zn所構成之元素群中之1種或2種以上之元素之合金層。 Further, for example, the intermediate layer may be configured by forming one of the element groups selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn from the carrier side. a single metal layer of an element or an alloy layer containing one or more elements selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn, Forming thereon a single metal layer containing one element selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, Zn, or containing a material selected from the group consisting of Cr and Ni An alloy layer of one or more of the element groups consisting of Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn.

另外,中間層可使用公知之有機物作為上述有機物,另外,優選使用含氮有機化合物、含硫有機化合物及羧酸中之任意1種或2種以上。例如,作為具體之含氮有機化合物,優選使用作為具有取代基之三唑化合物之1,2,3-苯并三唑、羧基苯并三唑、N',N'-雙(苯并三唑基甲基)脲、1H-1,2,4-三唑及3-氨基-1H-1,2,4-三唑等。 In addition, as the organic substance, a known organic substance can be used as the intermediate layer, and any one or two or more of a nitrogen-containing organic compound, a sulfur-containing organic compound, and a carboxylic acid are preferably used. For example, as a specific nitrogen-containing organic compound, it is preferred to use 1,2,3-benzotriazole, carboxybenzotriazole, N', N'-bis(benzotriazole) as a triazole compound having a substituent. Methyl)urea, 1H-1,2,4-triazole and 3-amino-1H-1,2,4-triazole, and the like.

含硫有機化合物優選使用巰基苯并噻唑、2-巰基苯并噻唑鈉、三聚硫氰酸及2-苯并咪唑硫醇等。 As the sulfur-containing organic compound, mercaptobenzothiazole, sodium 2-mercaptobenzothiazole, trimeric thiocyanate, 2-benzimidazolethiol or the like is preferably used.

作為羧酸,特別優選使用單羧酸,其中,優選使用油酸、亞麻油酸及次亞麻油酸等。 As the carboxylic acid, a monocarboxylic acid is particularly preferably used, and among them, oleic acid, linoleic acid, linoleic acid or the like is preferably used.

另外,例如中間層可在載體上依序積層鎳層、鎳-磷合金層或鎳-鈷合金層、及含鉻層而構成。鎳與銅之接著力高於鉻與銅之接著力,因此在剝離極薄金屬層時,變得在極薄金屬層與含鉻層之界面上進行剝離。另外,對於中間層之鎳而言,期待其有防止銅成分自載體向極薄金屬層擴散之阻隔效果。中間層中之鎳之附著量優選100μg/dm2以上且40000μg/dm2以下,更優選100μg/dm2以上且4000μg/dm2以下,更優選100μg/dm2以上且2500μg/dm2以下,更優選100μg/dm2以上且小於1000μg/dm2,中間層中之鉻之附著量優選5μg/dm2以上且100μg/dm2以下。在僅在單面設置中間層之情況下,優選在載體之相反面設置Ni鍍層等防銹層。上述中間層之鉻層可藉由鍍鉻或鉻酸鹽處理而設置。 Further, for example, the intermediate layer may be formed by sequentially laminating a nickel layer, a nickel-phosphorus alloy layer or a nickel-cobalt alloy layer, and a chromium-containing layer on the carrier. The adhesion between nickel and copper is higher than the adhesion between chromium and copper, so that when the ultra-thin metal layer is peeled off, peeling occurs at the interface between the extremely thin metal layer and the chromium-containing layer. Further, for the nickel of the intermediate layer, it is expected to have a barrier effect of preventing the copper component from diffusing from the carrier to the extremely thin metal layer. Adhesion amount of the intermediate layer of nickel, preferably 100μg / dm 2 or more and 40000μg / 2 or less dm, more preferably 100μg / dm 2 or more and 4000μg / 2 or less dm, more preferably 100μg / dm 2 or more and 2500μg / 2 or less dm, more It is preferably 100 μg/dm 2 or more and less than 1000 μg/dm 2 , and the adhesion amount of chromium in the intermediate layer is preferably 5 μg/dm 2 or more and 100 μg/dm 2 or less. In the case where the intermediate layer is provided only on one side, it is preferable to provide a rustproof layer such as a Ni plating layer on the opposite side of the carrier. The chromium layer of the above intermediate layer can be provided by chrome plating or chromate treatment.

如果中間層之厚度變得過大,那麼有用以形成中間層之成本增加之情況,因此中間層之厚度優選1~1000nm,優選1~500nm,優選2~200nm,優選2~100nm,更優選3~60nm。此外,中間層也可設置在載體之兩面上。 If the thickness of the intermediate layer becomes too large, the cost of forming the intermediate layer is increased. Therefore, the thickness of the intermediate layer is preferably from 1 to 1000 nm, preferably from 1 to 500 nm, preferably from 2 to 200 nm, preferably from 2 to 100 nm, more preferably from 3 to 3. 60nm. Furthermore, the intermediate layer can also be arranged on both sides of the carrier.

<極薄金屬層> <very thin metal layer>

在中間層上可設置極薄金屬層、即本發明之附鍍敷之金屬基材。也可在中間層與極薄金屬層之間設置其他層。極薄金屬層之厚度沒有特別限制,但通常比載體薄,例如為35μm以下,另外例如為12μm以下。典型而言,為0.5~12μm,更典型而言,為1.5~5μm。另外,也可在中間層上設置極薄金屬層前,為減少極薄金屬層之針孔而進行利用銅-磷合金等之預鍍敷。在預鍍敷中,可列舉焦磷酸銅鍍敷液等。此外,極薄金屬層也可設置在載體之兩面上。極薄金屬層可為包含銅合金、鋁、鋁合金、鐵、鐵合金、鎳合金、金合金、銀合金、鉑族合金、鉻、鉻合金、鎂、鎂合金、鎢、鎢合金、鉬合金、鉛合金、鉭、鉭合金、錫、錫合金、銦、銦合金、鋅、或鋅合金等金屬之極薄金屬層,或者也可為由上述金屬所構成之極薄金屬層,進而也可使用公知之金屬材料作為極薄金屬層。另外,也可使用JIS標準或CDA等所規範之金屬材料作為極薄金屬層。此外,優選使用極薄銅合金層作為極薄金屬層。其原因在於:極薄銅合金層之導電率較高,而適合電路等用途。 An extremely thin metal layer, i.e., a plated metal substrate of the present invention, may be disposed on the intermediate layer. Other layers may also be provided between the intermediate layer and the very thin metal layer. The thickness of the ultra-thin metal layer is not particularly limited, but is usually thinner than the carrier, for example, 35 μm or less, and is, for example, 12 μm or less. Typically, it is from 0.5 to 12 μm, and more typically from 1.5 to 5 μm. Further, before the ultra-thin metal layer is provided on the intermediate layer, pre-plating using a copper-phosphorus alloy or the like may be performed to reduce pinholes of the ultra-thin metal layer. In the pre-plating, a copper pyrophosphate plating solution or the like can be mentioned. In addition, very thin metal layers can also be provided on both sides of the carrier. The ultra-thin metal layer may be composed of a copper alloy, aluminum, aluminum alloy, iron, iron alloy, nickel alloy, gold alloy, silver alloy, platinum group alloy, chromium, chromium alloy, magnesium, magnesium alloy, tungsten, tungsten alloy, molybdenum alloy, An extremely thin metal layer of a metal such as a lead alloy, tantalum, niobium alloy, tin, tin alloy, indium, indium alloy, zinc, or zinc alloy, or an extremely thin metal layer composed of the above metal, and further may be used A known metal material is used as an extremely thin metal layer. Further, a metal material specified by JIS standard or CDA or the like can also be used as the extremely thin metal layer. Further, it is preferable to use an extremely thin copper alloy layer as an extremely thin metal layer. The reason is that the extremely thin copper alloy layer has a high electrical conductivity and is suitable for circuits and the like.

另外,本發明之極薄金屬層可藉由在下述條件下形成電鍍金屬層後,在其上設置上述之鍍層而製造,也可藉由在中間層上設置上述之鍍層,在其上在下述條件下形成電鍍金屬層而製造。 Further, the ultra-thin metal layer of the present invention can be produced by forming the electroplated metal layer under the following conditions, and then providing the above-mentioned plating layer thereon, or by providing the above-mentioned plating layer on the intermediate layer, on which the following is It is produced by forming a plated metal layer under the conditions.

.電解液組成 . Electrolyte composition

銅濃度:80~130g/L Copper concentration: 80~130g/L

選自由Ti、Si、Mg、P、Sn、Zn、Cr、W、Zr、V、Na、Ca、Ba、Cs、Mn、K、Ga、B、Nb、Ce、Be、Nd、Sc、Hf、Ho、Lu、Yb、Dy、Er、Pr、 Y、Li、Gd、Pu、In、Fe、La、Th、Ta、U、Sm、Tb、Sr、Tm及Al所組成之群中之1種或2種以上之元素之各元素濃度:0.001~30g/L Select Ti, Si, Mg, P, Sn, Zn, Cr, W, Zr, V, Na, Ca, Ba, Cs, Mn, K, Ga, B, Nb, Ce, Be, Nd, Sc, Hf, Ho, Lu, Yb, Dy, Er, Pr, The concentration of each element of one or more elements of the group consisting of Y, Li, Gd, Pu, In, Fe, La, Th, Ta, U, Sm, Tb, Sr, Tm, and Al: 0.001~ 30g/L

硫酸濃度:80~120g/L Sulfuric acid concentration: 80~120g/L

氯化物離子濃度:30~100ppm Chloride ion concentration: 30~100ppm

另外,也可視需要使用調平劑或光澤劑等。 In addition, a leveling agent or a glossing agent may be used as needed.

.製造條件 . Manufacturing conditions

電流密度:70~100A/dm2 Current density: 70~100A/dm 2

電解液溫度:50~80℃ Electrolyte temperature: 50~80°C

電解液線速:1.5~5m/sec Electrolyte line speed: 1.5~5m/sec

電解時間:0.5~10分鐘(根據析出之厚度、電流密度進行調整) Electrolysis time: 0.5 to 10 minutes (adjusted according to thickness and current density of precipitation)

[鍍層上之樹脂層] [Resin layer on plating]

在本發明之附鍍敷之金屬基材之鍍層表面也可包括樹脂層。上述樹脂層也可為絕緣樹脂層。此外,在本發明之附鍍敷之金屬基材中,所謂「鍍層表面」是指在鍍層上進行過用以設置粗化處理層、耐熱層、防銹層、耐候性層等之表面處理之情況下,進行該表面處理後之附鍍敷之金屬基材之表面。另外,在附鍍敷之金屬基材為附載體金屬箔之極薄金屬層之情況下,所謂「鍍層表面」是指在進行過用以設置粗化處理層、耐熱層、防銹層、耐候性層等之表面處理之情況下,進行該表面處理後之極薄金屬層之表面。此外,上述樹脂層優選使用具有透光性之樹脂,更優選使用透光性較高之樹脂,更優選使用透明之樹脂。 The surface of the plating of the plated metal substrate of the present invention may also include a resin layer. The above resin layer may also be an insulating resin layer. Further, in the metal substrate to which the plating of the present invention is applied, the term "plating surface" means that the surface of the plating layer is subjected to surface treatment for providing a roughened layer, a heat-resistant layer, a rustproof layer, a weather resistant layer or the like. In this case, the surface of the plated metal substrate after the surface treatment is performed. In addition, in the case where the metal substrate to which the plating is applied is an extremely thin metal layer with a carrier metal foil, the term "plating surface" means that the roughening layer, the heat-resistant layer, the rust-proof layer, and the weathering are provided. In the case of surface treatment such as a layer, the surface of the extremely thin metal layer after the surface treatment is performed. Further, as the resin layer, a resin having light transmissivity is preferably used, and a resin having high light transmittance is more preferably used, and a transparent resin is more preferably used.

上述樹脂層可為接著劑,也可為接著用之半硬化狀態(B階段狀態)之絕緣樹脂層。所謂半硬化狀態(B階段狀態)包含如下狀態:即 便用手指接觸其表面也無粘著感,而可重疊該絕緣樹脂層進行保管,且如果進而受到加熱處理,那麼產生硬化反應。 The resin layer may be an adhesive or an insulating resin layer in a semi-hardened state (B-stage state) to be used next. The semi-hardened state (B-stage state) includes the following state: When the surface is in contact with the finger, there is no stickiness, and the insulating resin layer can be stacked for storage, and if it is further subjected to heat treatment, a hardening reaction occurs.

上述樹脂層可為接著用樹脂,即接著劑,也可為接著用之半硬化狀態(B階段狀態)之絕緣樹脂層。所謂半硬化狀態(B階段狀態)包含如下狀態:即便用手指接觸其表面也無粘著感,而可重疊該絕緣樹脂層進行保管,且如果進而受到加熱處理,那麼產生硬化反應。 The resin layer may be a resin for subsequent use, that is, an adhesive, or an insulating resin layer in a semi-hardened state (B-stage state) to be used next. The semi-hardened state (B-stage state) includes a state in which there is no stickiness even when the surface is touched by a finger, and the insulating resin layer can be stacked and stored, and if it is further subjected to heat treatment, a hardening reaction occurs.

另外,上述樹脂層可含有熱硬化性樹脂,也可為熱塑性樹脂。另外,上述樹脂層也可含有熱塑性樹脂。上述樹脂層可含有公知之樹脂、樹脂硬化劑、化合物、硬化促進劑、介電質、反應觸媒、交聯劑、聚合物、預浸體、骨架材等。另外,上述樹脂層例如也可使用國際公開編號WO2008/004399號、國際公開編號WO2008/053878、國際公開編號WO2009/084533、日本特開平11-5828號、日本特開平11-140281號、日本專利第3184485號、國際公開編號WO97/02728、日本專利第3676375號、日本特開2000-43188號、日本專利第3612594號、日本特開2002-179772號、日本特開2002-359444號、日本特開2003-304068號、日本專利第3992225、日本特開2003-249739號、日本專利第4136509號、日本特開2004-82687號、日本專利第4025177號、日本特開2004-349654號、日本專利第4286060號、日本特開2005-262506號、日本專利第4570070號、日本特開2005-53218號、日本專利第3949676號、日本專利第4178415號、國際公開編號WO2004/005588、日本特開2006-257153號、日本特開2007-326923號、日本特開2008-111169號、日本專利第5024930號、國際公開編號WO2006/028207、日本專利第4828427號、日本特開2009-67029號、國際公 開編號WO2006/134868、日本專利第5046927號、日本特開2009-173017號、國際公開編號WO2007/105635、日本專利第5180815號、國際公開編號WO2008/114858、國際公開編號WO2009/008471、日本特開2011-14727號、國際公開編號WO2009/001850、國際公開編號WO2009/145179、國際公開編號WO2011/068157、日本特開2013-19056號所記載之物質(樹脂、樹脂硬化劑、化合物、硬化促進劑、介電質、反應觸媒、交聯劑、聚合物、預浸體、骨架材等)及/或樹脂層之形成方法、形成裝置而形成。 Further, the resin layer may contain a thermosetting resin or a thermoplastic resin. Further, the above resin layer may contain a thermoplastic resin. The resin layer may contain a known resin, a resin curing agent, a compound, a curing accelerator, a dielectric, a reaction catalyst, a crosslinking agent, a polymer, a prepreg, a skeleton, and the like. In addition, as the above-mentioned resin layer, for example, International Publication No. WO2008/004399, International Publication No. WO2008/053878, International Publication No. WO2009/084533, Japanese Patent Laid-Open No. Hei No. 11-5828, Japanese Patent Laid-Open No. Hei 11-140281, Japanese Patent No. No. 3,184,485, International Publication No. WO97/02728, Japanese Patent No. 3676375, Japanese Patent Laid-Open No. 2000-43188, Japanese Patent No. 3612594, Japanese Patent Laid-Open No. 2002-179772, Japanese Patent Laid-Open No. 2002-359444, Japanese Patent Laid-Open No. 2003 -304068, Japanese Patent No. 3992225, Japanese Patent Laid-Open No. 2003-249739, Japanese Patent No. 4136509, Japanese Patent Laid-Open No. 2004-82687, Japanese Patent No. 4025177, Japanese Patent Laid-Open No. 2004-349654, Japanese Patent No. 4286060 Japanese Patent Laid-Open No. 2005-262506, Japanese Patent No. 4570070, Japanese Patent Laid-Open No. 2005-53218, Japanese Patent No. 3949676, Japanese Patent No. 4178415, International Publication No. WO2004/005588, Japanese Patent Publication No. 2006-257153, Japanese Patent Laid-Open No. 2007-326923, Japanese Patent Laid-Open No. 2008-111169, Japanese Patent No. 5024930, International Publication No. WO2006/028207, Japanese Patent No. 4828427, and Japanese Special Publication 2009-6 No. 7029, International Japanese Patent No. WO2006/134868, Japanese Patent No. 5046927, Japanese Patent Laid-Open No. 2009-173017, International Publication No. WO2007/105635, Japanese Patent No. 5180815, International Publication No. WO2008/114858, International Publication No. WO2009/008471, Japanese Patent Laid-Open Substances (resin, resin hardener, compound, hardening accelerator, etc.) described in No. 2011-14727, International Publication No. WO2009/001850, International Publication No. WO2009/145179, International Publication No. WO2011/068157, and Japanese Patent Publication No. 2013-19056 It is formed by a method of forming a dielectric material, a reaction catalyst, a crosslinking agent, a polymer, a prepreg, a skeleton, or the like, and/or a resin layer.

另外,上述樹脂層之種類沒有特別限定,例如可列舉含有選自環氧樹脂、聚醯亞胺樹脂、多官能性氰酸酯化合物、馬來醯亞胺化合物、聚馬來醯亞胺化合物、馬來醯亞胺系樹脂、芳香族馬來醯亞胺樹脂、聚乙烯醇縮乙醛樹脂、氨基甲酸酯樹脂、聚醚碸(也稱為polyethersulphone、polyethersulphone)、聚醚碸(也稱為polyethersulphone、polyethersulphone)樹脂、芳香族聚醯胺樹脂、芳香族聚醯胺樹脂聚合物、橡膠性樹脂、聚胺、芳香族聚胺、聚醯胺醯亞胺樹脂、橡膠改性環氧樹脂、苯氧基樹脂、羧基改性丙烯腈-丁二烯樹脂、聚苯醚、雙馬來醯亞胺三樹脂、熱硬化性聚苯醚樹脂、氰酸酯系樹脂、羧酸酐、多元羧酸酐、具有可交聯之官能基之線狀聚合物、聚苯醚樹脂、2,2-雙(4-氰酸酯基苯基)丙烷、含磷酚化合物、環烷酸錳、2,2-雙(4-縮水甘油基苯基)丙烷、聚苯醚-氰酸酯系樹脂、矽氧烷改性聚醯胺醯亞胺樹脂、氰基酯樹脂、膦腈系樹脂、橡膠改性聚醯胺醯亞胺樹脂、異戊二烯、氫化型聚丁二烯、聚乙烯丁醛、苯氧基、高分子環氧基、芳香族聚醯胺、氟樹脂、雙酚、嵌段共聚合聚醯亞胺樹脂及氰基酯樹脂之群中之1種或2種以上之樹脂作為優選之上述樹脂層之種類。 Further, the type of the resin layer is not particularly limited, and examples thereof include an epoxy resin, a polyimide resin, a polyfunctional cyanate compound, a maleimide compound, and a polymaleimide compound. Maleic imine resin, aromatic maleimide resin, polyvinyl acetal resin, urethane resin, polyether oxime (also known as polyethersulphone, polyethersulphone), polyether oxime (also known as polyether oxime) Polyethersulphone, polyethersulphone) resin, aromatic polyamide resin, aromatic polyamide resin polymer, rubber resin, polyamine, aromatic polyamine, polyamidimide resin, rubber modified epoxy resin, benzene Oxygen resin, carboxyl modified acrylonitrile-butadiene resin, polyphenylene ether, bismaleimide III Resin, thermosetting polyphenylene ether resin, cyanate resin, carboxylic anhydride, polycarboxylic acid anhydride, linear polymer having crosslinkable functional groups, polyphenylene ether resin, 2,2-bis(4-cyanide) Acid ester phenyl) propane, phosphorus phenol compound, manganese naphthenate, 2,2-bis(4-glycidylphenyl)propane, polyphenylene ether-cyanate resin, decane modified poly Amidoxime resin, cyanoester resin, phosphazene resin, rubber modified polyamidoximine resin, isoprene, hydrogenated polybutadiene, polyvinyl butyral, phenoxy, high One or two or more resins selected from the group consisting of a molecular epoxy group, an aromatic polyamine, a fluororesin, a bisphenol, a block copolymerized polyimide resin, and a cyanoester resin are preferred as the above resin layer. kind.

另外,上述環氧樹脂是分子內具有2個以上環氧基之樹脂,只要為可用於電氣電子材料用途之環氧樹脂,則可使用,沒有特別問題。 另外,上述環氧樹脂優選使用分子內具有2個以上縮水甘油基之化合物而環氧化而成之環氧樹脂。另外,可使用選自雙酚A型環氧樹脂、雙酚F型環氧樹脂、雙酚S型環氧樹脂、雙酚AD型環氧樹脂、酚醛清漆型環氧樹脂、甲酚酚醛清漆型環氧樹脂、脂環式環氧樹脂、溴化(brominated)環氧樹脂、酚系酚醛清漆型環氧樹脂、萘型環氧樹脂、溴化雙酚A型環氧樹脂、鄰甲酚酚醛清漆型環氧樹脂、橡膠改性雙酚A型環氧樹脂、縮水甘油胺型環氧樹脂、三縮水甘油基異氰尿酸酯、N,N-二縮水甘油基苯胺等縮水甘油胺化合物、四氫鄰苯二甲酸二縮水甘油酯等縮水甘油酯化合物、含磷環氧樹脂、聯苯型環氧樹脂、聯苯酚醛清漆型環氧樹脂、三羥基苯基甲烷型環氧樹脂、四苯基乙烷型環氧樹脂之群中之1種或混合2種以上而使用,或者可使用上述環氧樹脂之氫化物或鹵化物。 Further, the epoxy resin is a resin having two or more epoxy groups in the molecule, and can be used as long as it is an epoxy resin which can be used for electrical and electronic materials, and has no particular problem. Further, the epoxy resin is preferably an epoxy resin obtained by epoxidizing a compound having two or more glycidyl groups in the molecule. In addition, a bisphenol A type epoxy resin, a bisphenol F type epoxy resin, a bisphenol S type epoxy resin, a bisphenol AD type epoxy resin, a novolak type epoxy resin, and a cresol novolac type may be used. Epoxy resin, alicyclic epoxy resin, brominated epoxy resin, phenolic novolak epoxy resin, naphthalene epoxy resin, brominated bisphenol A epoxy resin, o-cresol novolac Epoxy resin, rubber modified bisphenol A epoxy resin, glycidylamine epoxy resin, triglycidyl isocyanurate, N, N-diglycidylamine and other glycidylamine compounds, four a glycidyl ester compound such as hydrogen phthalic acid diglycidyl ester, a phosphorus-containing epoxy resin, a biphenyl type epoxy resin, a biphenol novolak type epoxy resin, a trishydroxyphenylmethane type epoxy resin, a tetraphenyl group One type of the group of the ethane type epoxy resins may be used in combination of two or more kinds, or a hydride or a halide of the above epoxy resin may be used.

可使用公知之含有磷之環氧樹脂作為上述含磷環氧樹脂。另外,上述含磷環氧樹脂例如優選為如下環氧樹脂,該環氧樹脂是以源自分子內具有2個以上環氧基之9,10-二氫-9-氧雜-10-磷雜菲-10-氧化物之衍生物之形態獲得。 A well-known phosphorus-containing epoxy resin can be used as the above phosphorus-containing epoxy resin. Further, the phosphorus-containing epoxy resin is preferably, for example, an epoxy resin derived from 9,10-dihydro-9-oxa-10-phosphonium having two or more epoxy groups in the molecule. The form of the derivative of phenanthrene-10-oxide is obtained.

(樹脂層含有介電質(介電質填料)之情況) (When the resin layer contains a dielectric (dielectric filler))

上述樹脂層還可包含介電質(介電質填料)。 The above resin layer may further contain a dielectric (dielectric filler).

在上述任一種樹脂層或樹脂組成物中含有介電質(介電質填料)之情況下,可用於形成電容層之用途,而使電容器電路之電容增大。對於該介電質(介電質填料)而言,使用BaTiO3、SrTiO3、Pb(Zr-Ti)O3(通稱PZT)、 PbLaTiO3.PbLaZrO(通稱PLZT)、SrBi2Ta2O9(通稱SBT)等具有鈣鈦礦結構之複合氧化物之介電質粉。 When any of the above resin layers or resin compositions contains a dielectric (dielectric filler), it can be used for forming a capacitor layer, and the capacitance of the capacitor circuit is increased. For the dielectric (dielectric filler), BaTiO 3 , SrTiO 3 , Pb(Zr-Ti)O 3 (commonly known as PZT), and PbLaTiO 3 are used . A dielectric powder of a composite oxide having a perovskite structure such as PbLaZrO (commonly known as PLZT) or SrBi 2 Ta 2 O 9 (commonly known as SBT).

介電質(介電質填料)也可為粉狀。在介電質(介電質填料)為粉狀之情況下,關於該介電質(介電質填料)之粉體特性,優選粒徑為0.01μm~3.0μm、優選0.02μm~2.0μm之範圍。此外,藉由掃描式電子顯微鏡(SEM)對介電質拍攝照片,在該照片上之介電質之粒子上畫直線之情況下,以將介電質之粒子橫切之直線之長度最長之部分之介電質之粒子之長度設為該介電質之粒徑。並且,將測定視野中之介電質之粒子之直徑之平均值設為介電質之粒徑。 The dielectric (dielectric filler) can also be in powder form. In the case where the dielectric (dielectric filler) is in a powder form, the powder characteristics of the dielectric (dielectric filler) are preferably from 0.01 μm to 3.0 μm, preferably from 0.02 μm to 2.0 μm. range. In addition, when a photo is taken on a dielectric by a scanning electron microscope (SEM), and a straight line is drawn on the dielectric particles on the photo, the length of the straight line that crosses the dielectric particles is the longest. The length of a portion of the dielectric particles is set to the particle size of the dielectric. Further, the average value of the diameters of the particles of the dielectric in the measurement field of view is defined as the particle diameter of the dielectric.

使上述樹脂層所含有之樹脂及/或樹脂組成物及/或化合物溶解於例如甲基乙基酮(MEK)、環戊酮、二甲基甲醯胺、二甲基乙醯胺、N-甲基吡咯啶酮、甲苯、甲醇、乙醇、丙二醇單甲醚、二甲基甲醯胺、二甲基乙醯胺、環己酮、乙基賽路蘇、N-甲基-2-吡咯啶酮、N,N-二甲基乙醯胺、N,N-二甲基甲醯胺等溶劑中而製成樹脂液(樹脂清漆),例如藉由輥式塗布法等,將該樹脂液塗布在上述附鍍敷之金屬基材之粗化處理表面上,其次視需要進行加熱乾燥,去除溶劑而製成B階段狀態。在乾燥中,例如只要使用熱風乾燥爐即可,乾燥溫度只要為100~250℃,優選130~200℃即可。也可使用溶劑,使上述樹脂層之組成物溶解,而製成樹脂固形物成分為3wt%~70wt%、優選3wt%~60wt%、優選10wt%~40wt%、更優選25wt%~40wt%之樹脂液。另外,就環境之觀點而言,在現階段最優選使用甲基乙基酮與環戊酮之混合溶劑而進行溶解。此外,溶劑優選使用沸點為50℃~200℃之範圍之溶劑。 The resin and/or resin composition and/or compound contained in the above resin layer is dissolved in, for example, methyl ethyl ketone (MEK), cyclopentanone, dimethylformamide, dimethylacetamide, N- Methylpyrrolidone, toluene, methanol, ethanol, propylene glycol monomethyl ether, dimethylformamide, dimethylacetamide, cyclohexanone, ethyl stilbene, N-methyl-2-pyrrolidine A resin liquid (resin varnish) is prepared in a solvent such as ketone, N,N-dimethylacetamide or N,N-dimethylformamide, and the resin liquid is applied, for example, by a roll coating method or the like. On the surface of the roughened surface of the above-mentioned plated metal substrate, it is necessary to heat-dry and then remove the solvent to form a B-stage state. In the drying, for example, a hot air drying oven may be used, and the drying temperature may be 100 to 250 ° C, preferably 130 to 200 ° C. The solvent may be used to dissolve the composition of the above resin layer to form a resin solid content of from 3 wt% to 70 wt%, preferably from 3 wt% to 60 wt%, preferably from 10 wt% to 40 wt%, more preferably from 25 wt% to 40 wt%. Resin solution. Further, from the viewpoint of the environment, it is most preferable to use a mixed solvent of methyl ethyl ketone and cyclopentanone to dissolve at this stage. Further, as the solvent, a solvent having a boiling point of from 50 ° C to 200 ° C is preferably used.

另外,上述樹脂層優選為依據MIL標準中之MIL-P-13949G進行測定時之樹脂流動量處於5%~35%之範圍內之半硬化樹脂膜。 Further, the resin layer is preferably a semi-cured resin film having a resin flow amount in the range of 5% to 35% when measured in accordance with MIL-P-13949G in the MIL standard.

在本案說明書中,所謂樹脂流動量,是依據MIL標準中之MIL-P-13949G,自包括厚度55μm樹脂層之附鍍敷之金屬基材取4片10cm見方試樣,將該4片試樣以重疊之狀態(積層體)在加壓溫度171℃、加壓壓力14kgf/cm2、加壓時間10分鐘之條件進行貼合,對此時之樹脂流出重量進行測定,並基於數1,根據所獲得之結果而算出之值。 In the present specification, the resin flow amount is based on MIL-P-13949G in the MIL standard, and four 10 cm square samples are taken from a plated metal substrate including a resin layer having a thickness of 55 μm. The state of the overlap (the layered body) is bonded at a pressurization temperature of 171 ° C, a pressurization pressure of 14 kgf / cm 2 , and a pressurization time of 10 minutes, and the resin outflow weight is measured at this time, and based on the number 1, according to The value calculated from the obtained result.

上述包括樹脂層之附鍍敷之金屬基材是以如下態樣使用:將該樹脂層重疊於基材後,對整體進行熱壓接而使該樹脂層熱硬化,其次在附鍍敷之金屬基材為附載體金屬箔之極薄金屬層之情況下,將載體剝離而使極薄金屬層露出(當然露出之是該極薄金屬層之中間層側之表面),而自附鍍敷之金屬基材之與經粗化處理之側相反側之表面形成特定之配線圖案。 The above-mentioned metal substrate including the plating of the resin layer is used in such a manner that after the resin layer is superposed on the substrate, the entire resin layer is thermocompression bonded to thermally cure the resin layer, and secondly, the metal plated with the plating is applied. In the case where the substrate is an extremely thin metal layer with a carrier metal foil, the carrier is peeled off to expose the extremely thin metal layer (of course, the surface of the intermediate layer side of the extremely thin metal layer is exposed), and the plating is self-attached. A surface of the metal substrate opposite to the side of the roughened side forms a specific wiring pattern.

如果使用該具備樹脂層之附鍍敷之金屬基材,那麼可以減少製造多層印刷配線基板時預浸體材之使用片數。而且,可以使樹脂層之厚度為如可確保層間絕緣之厚度,或者即便完全不使用預浸體材也可以製造覆金屬積層板。另外,此時,也可以在基材之表面底塗絕緣樹脂而進一步改善表面之平滑性。 When the metal substrate with the plating of the resin layer is used, the number of sheets of the prepreg used when manufacturing the multilayer printed wiring board can be reduced. Further, the thickness of the resin layer can be made such that the thickness of the interlayer insulation can be ensured, or the metal-clad laminate can be produced even if the prepreg material is not used at all. Further, at this time, the surface of the substrate may be coated with an insulating resin to further improve the smoothness of the surface.

此外,在不使用預浸體材之情況下,具有如下優點:節省預 浸體材之材料成本,另外,積層步驟也變得簡單,因此在經濟上變得有利,而且,以僅預浸體材之厚度製造之多層印刷配線基板之厚度變薄,而可以製造1層之厚度為100μm以下之極薄之多層印刷配線基板。 In addition, without using a prepreg, it has the following advantages: saving pre- In addition, since the material cost of the immersion material is also simple, it is economically advantageous, and the thickness of the multilayer printed wiring board manufactured by only the thickness of the prepreg material is thinned, and one layer can be manufactured. An extremely thin multilayer printed wiring board having a thickness of 100 μm or less.

該樹脂層之厚度優選0.1~120μm。 The thickness of the resin layer is preferably 0.1 to 120 μm.

如果樹脂層之厚度變得薄於0.1μm,那麼有如下情況:接著力下降,在不經由預浸體材而將包括該樹脂層之附鍍敷之金屬基材積層於包括內層材之基材時,變得難以確保與內層材之電路之間之層間絕緣。另一方面,如果使樹脂層之厚度厚於120μm,那麼有如下情況:變得難以用1次塗布步驟形成目標厚度之樹脂層,而耗費多餘之材料費與步驟數,因此在經濟上變得不利。 If the thickness of the resin layer becomes thinner than 0.1 μm, there is a case where the force is lowered, and the plated metal substrate including the resin layer is laminated on the base including the inner layer without passing through the prepreg. In the case of a material, it becomes difficult to ensure interlayer insulation between the circuit and the inner layer. On the other hand, if the thickness of the resin layer is made thicker than 120 μm, it becomes difficult to form a resin layer of a target thickness by one coating step, which consumes an extra material cost and a number of steps, and thus becomes economically unfavorable.

此外,將包括樹脂層之附鍍敷之金屬基材用於製造極薄之多層印刷配線板之情況下,為了使多層印刷配線板之厚度變小,優選將上述樹脂層之厚度設為0.1μm~5μm、更優選0.5μm~5μm、更優選1μm~5μm。 Further, in the case where a metal substrate with a plating layer including a resin layer is used for producing an extremely thin multilayer printed wiring board, in order to make the thickness of the multilayer printed wiring board small, it is preferable to set the thickness of the above resin layer to 0.1 μm. ~5 μm, more preferably 0.5 μm to 5 μm, still more preferably 1 μm to 5 μm.

在以下表示幾個使用本發明之附載體銅箔之印刷配線板之製造步驟之例子。 An example of the manufacturing steps of several printed wiring boards using the copper foil with a carrier of the present invention is shown below.

在本發明之印刷配線板之製造方法之一個實施形態中,包括如下步驟:準備本發明之附載體金屬箔與絕緣基板之步驟、將上述附載體金屬箔與絕緣基板進行積層之步驟、及將上述附載體金屬箔與絕緣基板以極薄金屬層側與絕緣基板對向之方式進行積層後,經過剝離上述附載體金屬箔之載體之步驟形成覆金屬積層板,其後,藉由半加成法、改良半加成法、部分加成法及減成法中之任一種方法而形成電路之步驟。絕緣基板也可以設為加入了內層電路之絕緣基板。 An embodiment of the method for producing a printed wiring board according to the present invention includes the steps of: preparing a metal foil with a carrier of the present invention and an insulating substrate, and stacking the metal foil with the insulating substrate; and The carrier-attached metal foil and the insulating substrate are laminated such that the ultra-thin metal layer side faces the insulating substrate, and then the metal-clad laminate is formed by peeling off the carrier with the carrier-attached metal foil, and thereafter, by semi-additive The steps of forming a circuit by any one of a method, a modified semi-additive method, a partial addition method, and a subtractive method. The insulating substrate may also be an insulating substrate to which an inner layer circuit is added.

在本發明中,所謂半加成法是指在絕緣基板或金屬箔籽晶層上進行較薄之無電鍍敷,形成圖案後,使用電鍍及蝕刻而形成導體圖案之方法。 In the present invention, the semi-additive method refers to a method in which a thin electroless plating is performed on an insulating substrate or a metal foil seed layer, and a pattern is formed, and a conductor pattern is formed by plating and etching.

因此,在使用半加成法之本發明之印刷配線板之製造方法之一個實施形態中,包括如下步驟:準備本發明之附載體金屬箔與絕緣基板之步驟;將上述附載體金屬箔與絕緣基板進行積層之步驟;積層上述附載體金屬箔與絕緣基板後,將上述附載體金屬箔之載體剝離之步驟;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,將剝離上述載體而露出之極薄金屬層全部去除之步驟;在由於藉由蝕刻將上述極薄金屬層去除而露出之上述樹脂設置通孔或/及盲孔之步驟;針對含有上述通孔或/及盲孔之區域進行除膠渣處理之步驟;針對含有上述樹脂及上述通孔或/及盲孔之區域設置無電鍍層之步驟;在上述無電鍍層上設置鍍敷阻劑之步驟;對上述鍍敷阻劑進行曝光,其後將形成電路之區域之鍍敷阻劑去除之步驟;在去除了上述鍍敷阻劑之上述形成電路之區域設置電鍍層之步驟;將上述鍍敷阻劑去除之步驟;及藉由快速蝕刻等,將存在於上述形成電路之區域以外之區域之無電鍍層去除之步驟。 Therefore, in an embodiment of the method for producing a printed wiring board of the present invention using a semi-additive method, the method comprises the steps of: preparing a metal foil with a carrier of the present invention and an insulating substrate; and insulating the metal foil with the carrier a step of laminating the substrate; and laminating the carrier-attached metal foil and the insulating substrate, and then peeling off the carrier with the carrier metal foil; and peeling off the carrier by etching or plasma etching using an acid or the like a step of completely removing the extremely thin metal layer; a step of providing a through hole or/and a blind hole in the resin exposed by removing the extremely thin metal layer by etching; for the region containing the through hole or/and the blind hole a step of removing the desmear; a step of providing an electroless plating layer for the region containing the resin and the through holes or/and the blind holes; a step of providing a plating resist on the electroless plating layer; and the plating resist Exposing, followed by a step of removing the plating resist in the region where the circuit is formed; and providing a plating layer in the region where the above-mentioned plating resist is removed Step; and removing the plating resist of the step; and the like by flash etching, present in the step of removing the non-plating area other than the area of the circuit is formed.

在使用半加成法之本發明之印刷配線板之製造方法之另一個實施形態中,包含如下步驟:準備本發明之附載體金屬箔與絕緣基板之步驟;將上述附載體金屬箔與絕緣基板進行積層之步驟;積層上述附載體金屬箔與絕緣基板後,將上述附載體金屬箔之載體剝離之步驟;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,將剝離上述載體而露出之極薄金屬層 全部去除之步驟;針對由於藉由蝕刻將上述極薄金屬層去除而露出之上述樹脂之表面,設置無電鍍層之步驟;在上述無電鍍層上設置鍍敷阻劑之步驟;對上述鍍敷阻劑進行曝光,其後將形成電路之區域之鍍敷阻劑去除之步驟;在去除了上述鍍敷阻劑之上述形成電路之區域設置電鍍層之步驟;將上述鍍敷阻劑去除之步驟;及藉由快速蝕刻等,將存在於上述形成電路之區域以外之區域之無電鍍層及極薄金屬層去除之步驟。 In another embodiment of the method for producing a printed wiring board of the present invention using a semi-additive method, the method comprises the steps of: preparing a metal foil with a carrier of the present invention and an insulating substrate; and the metal foil and the insulating substrate with the carrier a step of laminating; laminating the carrier-attached metal foil and the insulating substrate, and then peeling off the carrier of the carrier-attached metal foil; and peeling off the carrier by etching or plasma etching using an acid or the like Very thin metal layer a step of completely removing; a step of providing an electroless plating layer on a surface of the resin exposed by removing the ultra-thin metal layer by etching; a step of providing a plating resist on the electroless plating layer; and plating the plating a step of exposing the resist, and thereafter removing a plating resist in a region where the circuit is formed; a step of disposing a plating layer in the region where the plating resist is removed to form the circuit; and removing the plating resist And a step of removing the electroless plating layer and the extremely thin metal layer existing in the region outside the region where the circuit is formed by rapid etching or the like.

在本發明中,所謂改良半加成法是指在絕緣層上積層金屬箔,藉由鍍敷阻劑保護非電路形成部,藉由電鍍進行電路形成部之鍍銅增厚後,去除抗蝕劑,藉由(快速)蝕刻去除上述電路形成部以外之金屬箔,藉此在絕緣層上形成電路之方法。 In the present invention, the modified semi-additive method refers to laminating a metal foil on an insulating layer, protecting a non-circuit forming portion by a plating resist, and performing copper plating thickening of the circuit forming portion by electroplating to remove the resist. A method of forming a circuit on an insulating layer by (fast) etching to remove a metal foil other than the above-described circuit forming portion.

因此,在使用改良半加成法之本發明之印刷配線板之製造方法之一個實施形態中,包含如下步驟:準備本發明之附載體金屬箔與絕緣基板之步驟;將上述附載體金屬箔與絕緣基板進行積層之步驟;積層上述附載體金屬箔與絕緣基板後,將上述附載體金屬箔之載體剝離之步驟;在將上述載體剝離而露出之極薄金屬層與絕緣基板設置通孔或/及盲孔之步驟;針對含有上述通孔或/及盲孔之區域進行除膠渣處理之步驟;針對含有上述通孔或/及盲孔之區域設置無電鍍層之步驟;在將上述載體剝離而露出之極薄金屬層表面設置鍍敷阻劑之步驟;設置上述鍍敷阻劑後,藉由電鍍形成電路之步驟;將上述鍍敷阻劑去除之步驟;及藉由快速蝕刻,將由於去除上述鍍敷阻劑而露出之極薄金屬層去除之步驟。 Therefore, in one embodiment of the method for producing a printed wiring board of the present invention using the modified semi-additive method, the method comprises the steps of: preparing the metal foil with a carrier of the present invention and an insulating substrate; and the metal foil with the carrier a step of laminating the insulating substrate; and laminating the carrier-attached metal foil and the insulating substrate, and then removing the carrier of the carrier-attached metal foil; and providing a through-hole in the ultra-thin metal layer and the insulating substrate exposed by peeling the carrier; And a step of blinding the hole; performing a desmear treatment step on the region containing the through hole or/and the blind hole; and providing an electroless plating layer for the region including the through hole or/and the blind hole; peeling off the carrier And the step of providing a plating resist on the surface of the exposed ultra-thin metal layer; the step of forming a circuit by electroplating after the plating resist is disposed; the step of removing the plating resist; and by rapid etching, The step of removing the above-mentioned plating resist to expose the extremely thin metal layer.

另外,在上述樹脂層上形成電路之步驟也可為如下步驟:在上述樹脂層上自極薄金屬層側貼合另一片附載體金屬箔,使用貼合在上述 樹脂層上之附載體金屬箔而形成上述電路。另外,貼合在上述樹脂層上之另一片附載體金屬箔也可為本發明之附載體金屬箔。另外,在上述樹脂層上形成電路之步驟也可藉由半加成法、減成法、部分加成法或改良半加成法中之任一種方法而進行。另外,在上述表面形成電路之附載體金屬箔也可在該附載體金屬箔之載體之表面具有基板或樹脂層。 Further, the step of forming a circuit on the resin layer may be a step of laminating another piece of metal foil with a carrier on the resin layer from the side of the ultra-thin metal layer, and bonding is used The above circuit is formed by attaching a carrier metal foil to the resin layer. Further, another sheet of the carrier-attached metal foil bonded to the above resin layer may be the metal foil with a carrier of the present invention. Further, the step of forming a circuit on the above resin layer can also be carried out by any one of a semi-additive method, a subtractive method, a partial addition method or a modified semi-additive method. Further, the carrier-attached metal foil on the surface forming circuit may have a substrate or a resin layer on the surface of the carrier of the carrier-attached metal foil.

在使用改良半加成法之本發明之印刷配線板之製造方法之另一個實施形態中,包含如下步驟:準備本發明之附載體金屬箔與絕緣基板之步驟;將上述附載體金屬箔與絕緣基板進行積層之步驟;積層上述附載體金屬箔與絕緣基板後,將上述附載體金屬箔之載體剝離之步驟;在將上述載體剝離而露出之極薄金屬層上設置鍍敷阻劑之步驟;對上述鍍敷阻劑進行曝光,其後將形成電路之區域之鍍敷阻劑去除之步驟;在去除了上述鍍敷阻劑之上述形成電路之區域設置電鍍層之步驟;將上述鍍敷阻劑去除之步驟;藉由快速蝕刻等,將存在於上述形成電路之區域以外之區域之無電鍍層及極薄金屬層去除之步驟。 In another embodiment of the method for producing a printed wiring board of the present invention using a modified semi-additive method, the method comprises the steps of: preparing a metal foil with a carrier of the present invention and an insulating substrate; and insulating the metal foil with the carrier a step of laminating the substrate; a step of laminating the carrier-attached metal foil and the insulating substrate, and then removing the carrier with the carrier metal foil; and a step of providing a plating resist on the extremely thin metal layer exposed by peeling the carrier; a step of exposing the plating resist, and thereafter forming a plating resist in a region where the circuit is formed; and a step of disposing a plating layer in the region where the plating resist is removed; forming the plating Step of removing the agent; removing the electroless plating layer and the ultra-thin metal layer existing in the region outside the region where the circuit is formed by rapid etching or the like.

在本發明中,所謂部分加成法是指向設有導體層之基板、視需要穿鑿有通孔或導通孔用之孔之基板上賦予觸媒核,進行蝕刻而形成導體電路,視需要設置阻焊劑或鍍敷阻劑後,藉由無電鍍敷處理,而在上述導體電路上,對通孔或導通孔等進行增厚,藉此製造印刷配線板之方法。 In the present invention, the partial addition method is to apply a catalyst core to a substrate on which a conductor layer is provided, and a hole for a through hole or a via hole is required to be etched to form a conductor circuit, and a resistor is formed as needed. After the flux or the plating resist is applied, a method of manufacturing a printed wiring board by thickening a via hole or a via hole on the conductor circuit by electroless plating is used.

因此,在使用部分加成法之本發明之印刷配線板之製造方法之一個實施形態中,包含如下步驟:準備本發明之附載體金屬箔與絕緣基板之步驟;將上述附載體金屬箔與絕緣基板進行積層之步驟;積層上述附載體金屬箔與絕緣基板後,將上述附載體金屬箔之載體剝離之步驟;在剝 離上述載體而露出之極薄金屬層與絕緣基板設置通孔或/及盲孔之步驟;針對含有上述通孔或/及盲孔之區域進行除膠渣處理之步驟;向含有上述通孔或/及盲孔之區域賦予觸媒核之步驟;在剝離上述載體而露出之極薄金屬層表面設置蝕刻阻劑之步驟;對上述蝕刻阻劑進行曝光,而形成電路圖案之步驟;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,將上述極薄金屬層及上述觸媒核去除而形成電路之步驟;將上述蝕刻阻劑去除之步驟;在藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,將上述極薄金屬層及上述觸媒核去除而露出之上述絕緣基板表面設置阻焊劑或鍍敷阻劑之步驟;及在未設置有上述阻焊劑或鍍敷阻劑之區域設置無電鍍層之步驟。 Therefore, in an embodiment of the method of manufacturing a printed wiring board of the present invention using a partial addition method, the method comprises the steps of: preparing a metal foil with a carrier of the present invention and an insulating substrate; and insulating the metal foil with the carrier a step of laminating the substrate; and laminating the carrier-attached metal foil and the insulating substrate, and then peeling off the carrier with the carrier metal foil; a step of providing a through hole or/and a blind hole in an extremely thin metal layer and an insulating substrate exposed from the carrier; a step of performing desmear treatment on a region including the through hole or/and the blind hole; and including the through hole or And a step of imparting a catalyst core to the region of the blind hole; a step of providing an etching resist on the surface of the extremely thin metal layer exposed by peeling off the carrier; and exposing the etching resist to form a circuit pattern; a method of etching an extremely thin metal layer and the catalyst core to form a circuit by etching or plasma etching of an acid or the like; a step of removing the etching resist; etching by etching an acid using an acid or the like a method of providing a solder resist or a plating resist on a surface of the insulating substrate exposed by removing the ultra-thin metal layer and the catalyst core by a method such as plasma; and an area in which the solder resist or plating resist is not provided Set the steps for the electroless plating.

在本發明中,所謂減成法是指藉由蝕刻等,將覆銅積層板上之銅箔之不要部分有選擇地去除而形成導體圖案之方法。 In the present invention, the subtractive method refers to a method of forming a conductor pattern by selectively removing unnecessary portions of the copper foil on the copper clad laminate by etching or the like.

因此,在使用減成法之本發明之印刷配線板之製造方法之另一個實施形態中,包含如下步驟:準備本發明之附載體金屬箔與絕緣基板之步驟;將上述附載體金屬箔與絕緣基板進行積層之步驟;積層上述附載體金屬箔與絕緣基板後,將上述附載體金屬箔之載體剝離之步驟;在剝離上述載體而露出之極薄金屬層與絕緣基板設置通孔或/及盲孔之步驟;針對含有上述通孔或/及盲孔之區域進行除膠渣處理之步驟;針對含有上述通孔或/及盲孔之區域設置無電鍍層之步驟;在上述無電鍍層之表面設置電鍍層之步驟;在上述電鍍層或/及上述極薄金屬層之表面設置蝕刻阻劑之步驟;對上述蝕刻阻劑進行曝光,而形成電路圖案之步驟;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,將上述極薄金屬層及上述無電鍍層及上述電鍍層去除,而形成電路之步驟;及將上述蝕刻阻劑去除之步驟。 Therefore, in another embodiment of the method for producing a printed wiring board of the present invention using the subtractive method, the method comprises the steps of: preparing the metal foil with a carrier of the present invention and an insulating substrate; and insulating the metal foil with the carrier a step of laminating the substrate; laminating the carrier with the carrier metal foil after laminating the carrier metal foil and the insulating substrate; and providing a through hole or/and a blind hole in the extremely thin metal layer and the insulating substrate exposed by peeling off the carrier a step of performing a desmear treatment on a region containing the above-mentioned through hole or/and a blind hole; a step of providing an electroless plating layer in a region containing the above-mentioned through hole or/and a blind hole; on the surface of the above electroless plating layer a step of providing a plating layer; a step of providing an etching resist on the surface of the plating layer or/and the ultra-thin metal layer; a step of exposing the etching resist to form a circuit pattern; and etching the solution by using an acid or the like Etching or plasma etching, removing the ultra-thin metal layer and the electroless plating layer and the plating layer to form a circuit; and etching the same The step of removing the resist.

在使用減成法之本發明之印刷配線板之製造方法之另一個實施形態中,包含如下步驟:準備本發明之附載體金屬箔與絕緣基板之步驟;將上述附載體金屬箔與絕緣基板進行積層之步驟;積層上述附載體金屬箔與絕緣基板後,將上述附載體金屬箔之載體剝離之步驟;在剝離上述載體而露出之極薄金屬層與絕緣基板設置通孔或/及盲孔之步驟;針對含有上述通孔或/及盲孔之區域進行除膠渣處理之步驟;針對含有上述通孔或/及盲孔之區域設置無電鍍層之步驟;在上述無電電鍍鍍層之表面形成遮罩之步驟;在未形成遮罩之上述無電鍍層之表面設置電鍍層之步驟;在上述電鍍層或/及上述極薄金屬層之表面設置蝕刻阻劑之步驟;對上述蝕刻阻劑進行曝光,而形成電路圖案之步驟;藉由使用酸等腐蝕溶液之蝕刻或電漿等方法,將上述極薄金屬層及上述無電鍍層去除,而形成電路之步驟;及將上述蝕刻阻劑去除之步驟。 In another embodiment of the method for producing a printed wiring board of the present invention using the subtractive method, the method comprises the steps of: preparing a metal foil with a carrier of the present invention and an insulating substrate; and performing the metal foil with the carrier and the insulating substrate a step of laminating; after laminating the carrier-attached metal foil and the insulating substrate, the step of peeling off the carrier with the carrier metal foil; and providing a through hole or/and a blind hole in the extremely thin metal layer and the insulating substrate exposed by peeling off the carrier a step of performing desmear treatment on a region containing the above-mentioned through holes or/and blind vias; a step of providing an electroless plating layer on a region containing the above-mentioned through holes or/and blind via holes; forming a mask on the surface of the above electroless plating plating layer a step of providing a plating layer on a surface of the electroless plating layer on which the mask is not formed; a step of providing an etching resist on the surface of the plating layer or/and the ultra-thin metal layer; and exposing the etching resist a step of forming a circuit pattern; the ultra-thin metal layer and the electroless plating layer are removed by etching or plasma etching using an acid or the like And forming a circuit; and removing the etching resist.

設置通孔或/及盲孔之步驟、及其後之除膠渣步驟也可不進行。 The step of providing a through hole or/and a blind hole, and the subsequent desmear step may not be performed.

此處,對使用本發明之附載體金屬箔之印刷配線板之製造方法之具體例詳細地進行說明。此外,在此處,以具有形成了粗化處理層之極薄金屬層之附載體金屬箔為例進行說明,但並不限於其,使用具有未形成粗化處理層之極薄金屬層之附載體金屬箔,也可同樣地進行下述之印刷配線板之製造方法。 Here, a specific example of a method of manufacturing a printed wiring board using the metal foil with a carrier of the present invention will be described in detail. Further, here, a carrier-attached metal foil having an extremely thin metal layer in which a roughened layer is formed is exemplified, but not limited thereto, and an ultrathin metal layer having no roughened layer is used. In the carrier metal foil, the following method for producing a printed wiring board can be similarly performed.

首先,準備具有在表面形成了粗化處理層之極薄金屬層之附載體金屬箔(第1層)。 First, a carrier-attached metal foil (first layer) having an extremely thin metal layer having a roughened layer formed on its surface is prepared.

其次,在極薄金屬層之粗化處理層上塗布抗蝕劑,進行曝光、顯影, 而將抗蝕劑蝕刻為特定形狀。 Next, a resist is applied on the roughened layer of the extremely thin metal layer to perform exposure and development. The resist is etched into a specific shape.

其次,形成電路用之鍍層後,將抗蝕劑去除,藉此形成特定形狀之電路鍍層。 Next, after the plating for the circuit is formed, the resist is removed, thereby forming a circuit plating of a specific shape.

其次,以覆蓋電路鍍層之方式(掩埋電路鍍層之方式)在極薄金屬層上設置掩埋樹脂而積層樹脂層,其次,使另一片附載體金屬箔(第2層)自極薄金屬層側接著。 Next, a resin layer is laminated on the ultra-thin metal layer to cover the circuit plating layer (the method of burying the circuit plating layer), and secondly, the other carrier-attached metal foil (the second layer) is next to the ultra-thin metal layer. .

其次,自第2層之附載體金屬箔剝離載體。 Next, the carrier is peeled off from the carrier metal foil of the second layer.

其次,在樹脂層之特定位置進行雷射開孔,使電路鍍層露出而形成盲孔。 Next, a laser opening is performed at a specific position of the resin layer to expose the circuit plating layer to form a blind hole.

其次,向盲孔埋入銅而形成導孔填充物。 Next, copper is buried in the blind hole to form a via filler.

其次,在導孔填充物上如上述般形成電路鍍層。 Next, a circuit plating layer is formed on the via filler as described above.

其次,自第1層之附載體金屬箔剝離載體。 Next, the carrier was peeled off from the carrier metal foil of the first layer.

其次,藉由快速蝕刻將兩個表面之極薄金屬層去除,而使樹脂層內之電路鍍層之表面露出。 Next, the extremely thin metal layers of the two surfaces are removed by rapid etching to expose the surface of the circuit plating layer in the resin layer.

其次,在樹脂層內之電路鍍層上形成凸塊,在該焊料上形成銅支柱。以上述方式製作使用本發明之附載體金屬箔之印刷配線板。 Next, a bump is formed on the circuit plating layer in the resin layer, and a copper pillar is formed on the solder. A printed wiring board using the metal foil with a carrier of the present invention was produced in the above manner.

上述另一片附載體金屬箔(第2層)可使用本發明之附載體金屬箔,也可使用以往之附載體金屬箔,進而也可使用通常之金屬箔。另外,可在上述第2層之電路上進而形成1層或多層之電路,也可藉由半加成法、減成法、部分加成法或改良半加成法中之任一種方法進行這些之電路形成。 The above-mentioned another metal foil with a carrier (second layer) may be a metal foil with a carrier of the present invention, or a conventional metal foil with a carrier may be used, and a usual metal foil may be used. Further, one or more circuits may be further formed on the circuit of the second layer, or may be performed by any one of a semi-additive method, a subtractive method, a partial addition method, or a modified semi-additive method. The circuit is formed.

此外,埋入樹脂(RESIN)可使用公知之樹脂、預浸體。例 如可使用BT(雙馬來醯亞胺三)樹脂或作為含浸有BT樹脂之玻璃布之預浸體、味之素精細化學股份有限公司製造之ABF膜或ABF。另外,上述埋入樹脂(RESIN)可使用本說明書所記載之樹脂層及/或樹脂及/或預浸體。 Further, a well-known resin or prepreg can be used as the embedded resin (RESIN). For example, BT (Bismaleimide III) can be used. A resin or a prepreg impregnated with a glass cloth impregnated with a BT resin, ABF film or ABF manufactured by Ajinomoto Fine Chemical Co., Ltd. Further, as the above-mentioned embedded resin (RESIN), the resin layer and/or the resin and/or the prepreg described in the present specification can be used.

另外,上述第一層所使用之附載體金屬箔也可在該附載體金屬箔之表面具有基板或樹脂層。藉由具有該基板或樹脂層,而支撐第一層所使用之附載體金屬箔,從而褶皺變得難以產生,因此有生產性提高之優點。此外,對上述基板或樹脂層而言,只要為發揮支撐上述第一層所使用之附載體金屬箔之效果之基板或樹脂層,那麼可使用全部之基板或樹脂層。例如可使用本申請案說明書所記載之載體、預浸體、樹脂層或公知之載體、預浸體、樹脂層、金屬板、金屬箔、無機化合物之板、無機化合物之箔、有機化合物之板、有機化合物之箔作為上述基板或樹脂層。 Further, the carrier-attached metal foil used in the first layer may have a substrate or a resin layer on the surface of the carrier-attached metal foil. By having the substrate or the resin layer and supporting the carrier-attached metal foil used for the first layer, wrinkles are less likely to occur, and there is an advantage in that productivity is improved. Further, the substrate or the resin layer may be any substrate or resin layer as long as it functions as a substrate or a resin layer that supports the effect of the carrier-attached metal foil used for the first layer. For example, a carrier, a prepreg, a resin layer, or a known carrier, a prepreg, a resin layer, a metal plate, a metal foil, a plate of an inorganic compound, a foil of an inorganic compound, or a plate of an organic compound can be used as described in the specification of the present application. A foil of an organic compound is used as the above substrate or resin layer.

可將本發明之附鍍敷之金屬基材自鍍層側貼合在樹脂基板而製造積層體。樹脂基板只要為具有可應用於印刷配線板等之特性之樹脂基板,那麼不受特別限制,例如對於剛性PWB用途,可使用紙基材酚樹脂、紙基材環氧樹脂、合成纖維布基材環氧樹脂、氟樹脂含浸布、玻璃布-紙複合基材環氧樹脂、玻璃布-玻璃無紡布複合基材環氧樹脂及玻璃布基材環氧樹脂等,對於柔性印刷基板(FPC)用途,可使用聚酯膜或聚醯亞胺膜、液晶聚合物(LCP)膜、氟樹脂及氟樹脂-聚醯亞胺複合材等。此外,液晶聚合物(LCP)由於介電損失較小,故而高頻電路用途之印刷配線板優選使用液晶聚合物(LCP)膜。 The metal substrate to which the plating of the present invention is applied can be bonded to the resin substrate from the side of the plating layer to produce a laminate. The resin substrate is not particularly limited as long as it has a property applicable to a printed wiring board or the like. For example, for rigid PWB use, a paper substrate phenol resin, a paper substrate epoxy resin, a synthetic fiber cloth substrate can be used. Epoxy resin, fluororesin impregnated cloth, glass cloth-paper composite substrate epoxy resin, glass cloth-glass non-woven composite substrate epoxy resin and glass cloth substrate epoxy resin, etc., for flexible printed circuit board (FPC) For the purpose, a polyester film or a polyimide film, a liquid crystal polymer (LCP) film, a fluororesin, and a fluororesin-polyimine composite material can be used. Further, since the liquid crystal polymer (LCP) has a small dielectric loss, it is preferable to use a liquid crystal polymer (LCP) film for a printed wiring board for high-frequency circuit use.

關於貼合之方法,在剛性PWB用途之情況下,準備使樹脂含浸於玻璃布等基材中,使樹脂硬化至半硬化狀態而成之預浸體。可藉由 將銅箔重疊於預浸體並進行加熱加壓而進行。在FPC之情況下,經由接著劑、或不使用接著劑在高溫高壓下將液晶聚合物或聚醯亞胺膜等基材積層接著於銅箔、或者將聚醯亞胺前驅物進行塗布、乾燥、硬化等,藉此可製造積層板。 In the case of the rigid PWB application, the method of bonding is prepared by impregnating a resin with a base material such as a glass cloth to cure the resin to a semi-hardened state. By The copper foil is superposed on the prepreg and heated and pressurized. In the case of FPC, a substrate such as a liquid crystal polymer or a polyimide film is laminated under high temperature and high pressure via an adhesive or without an adhesive, followed by coating or drying the polyimide film or the polyimide precursor. , hardening, etc., whereby a laminate can be produced.

本發明之積層體可用於各種印刷配線板(PWB),沒有特別限制,例如就導體圖案之層數之觀點而言,可應用於單面PWB、兩面PWB、多層PWB(3層以上),就絕緣基板材料之種類之觀點而言,可應用於剛性PWB、柔性PWB(FPC)、剛性-彈性PWB。 The laminate of the present invention can be used for various printed wiring boards (PWB), and is not particularly limited. For example, from the viewpoint of the number of layers of the conductor pattern, it can be applied to one-sided PWB, two-sided PWB, and multi-layer PWB (three or more layers). From the viewpoint of the kind of the insulating substrate material, it can be applied to rigid PWB, flexible PWB (FPC), and rigid-elastic PWB.

最後,對將本發明之附鍍敷之金屬基材應用於自動對焦模組用之彈簧材之情況進行說明。在典型之自動對焦模組中,包括:透鏡、將該透鏡向光軸方向之初期位置進行彈性施力之本發明之附鍍敷之金屬基材製或本發明之附載體金屬箔製之彈簧構件、及產生對抗該彈簧構件之作用力之電磁力而可上述透鏡向光軸方向驅動之電磁驅動手段。關於上述電磁驅動手段,可例示性地包括:U字形圓筒形狀之磁軛、被收容在磁軛之內周壁之內側之線圈、一面圍繞線圈一面被收容在磁軛之外周壁之內側之磁鐵。彈簧構件可在具有上述鍍層之部位藉由焊接而與線圈(典型而言,線圈之導線)進行接合。自動對焦模組之構造本身在日本特開2014-102294號公報或日本特開2014-084514號公報等中為公知,因此詳細之說明省略。 Finally, the case where the metal substrate to which the plating of the present invention is applied is applied to a spring material for an autofocus module will be described. A typical autofocus module includes a lens, a plated metal substrate of the present invention that elastically biases the lens toward an initial position in the optical axis direction, or a spring made of the carrier-attached metal foil of the present invention. The member and an electromagnetic driving means for generating an electromagnetic force against the urging force of the spring member to drive the lens in the optical axis direction. The electromagnetic driving means may include, for example, a U-shaped cylindrical yoke, a coil housed inside the inner peripheral wall of the yoke, and a magnet that is housed inside the peripheral wall of the yoke while being surrounded by the coil. . The spring member can be joined to the coil (typically, the wire of the coil) by welding at a portion having the plating layer described above. The structure of the autofocus module is known in the Japanese Patent Publication No. 2014-102294, and the Japanese Patent Publication No. 2014-084514, and the like.

[實施例] [Examples]

以下,表示本發明之實施例,但這些實施例是為了更良好地理解本發明及其優點而呈現之實施例,而並非意圖限定本發明。 In the following, the embodiments of the present invention are shown, but the embodiments are presented to better understand the present invention and its advantages, and are not intended to limit the invention.

準備由具有表2所記載之各材料組成及厚度之金屬箔構成 之金屬基材。對金屬箔之表面進行脫脂及酸洗而淨化後,根據表2所記載之Ni、Co及Mo之各附著條件,藉由使用硫酸酸性鍍浴(pH值:2~3.5、液溫:40~60℃、電流密度:2~10A/dm2)之電鍍,對該金屬箔之整面進行鍍Co、Co-Ni合金鍍敷、Co-Mo合金鍍敷、Ni-Mo合金鍍敷或Co-Ni-Mo合金鍍敷,而製造發明例、參考例及比較例之附鍍敷之金屬箔。鍍敷液中之Ni、Mo及Co之離子濃度視Ni+Mo比率(%)設為表1所記載之條件。其他元素之離子濃度視附著量設為表1所記載之條件。附著量可藉由庫侖量進行控制。在減少附著量之情況下,只要使庫侖量變小即可。在增加附著量之情況下,只要使庫侖量變大即可。例如在將Co、Ni及Mo之合計附著量設為3000μg/dm2之情況下,可將庫侖量設為5~20As/dm2左右,在將Co、Ni及Mo之合計附著量設為14000μg/dm2時,可將庫侖量設為45~80As/dm2左右,在將Co、Ni及Mo之合計附著量設為180000μg/dm2時,可將庫侖量設為700~900As/dm2左右。在欲增加Mo附著量之情況下,只要使鍍敷液中之Mo濃度變高即可。在欲增加Co附著量之情況下,只要使鍍敷液中之Co濃度變高即可。在欲增加Ni附著量之情況下,只要使鍍敷液中之Ni濃度變高即可。 A metal substrate composed of a metal foil having the composition and thickness of each material described in Table 2 was prepared. After degreasing and pickling the surface of the metal foil and purifying it, according to the adhesion conditions of Ni, Co and Mo described in Table 2, an acidic acid plating bath (pH: 2 to 3.5, liquid temperature: 40~) is used. 60 ° C, current density: 2 ~ 10A / dm 2 ) plating, the entire surface of the metal foil is coated with Co, Co-Ni alloy plating, Co-Mo alloy plating, Ni-Mo alloy plating or Co- The Ni-Mo alloy was plated to produce a plated metal foil of the inventive examples, reference examples and comparative examples. The ion concentration of Ni, Mo, and Co in the plating solution was set to the conditions described in Table 1 depending on the Ni+Mo ratio (%). The ion concentration of the other elements was set as the conditions described in Table 1 depending on the amount of adhesion. The amount of adhesion can be controlled by the amount of coulomb. In the case of reducing the amount of adhesion, it is only necessary to make the amount of coulomb smaller. In the case of increasing the amount of adhesion, it is only necessary to increase the amount of coulomb. For example, when the total deposited mass of Co, Ni and Mo, the set 3000μg / dm 2, the amount of coulombs can be set to 5 ~ 20As / dm about 2, the total deposition amount of Co, Ni, and Mo in the set of 14000μg When /dm 2 is used, the coulomb amount can be set to about 45 to 80 As/dm 2 , and when the total adhesion amount of Co, Ni, and Mo is set to 180,000 μg/dm 2 , the coulomb amount can be set to 700 to 900 As/dm 2 . about. When it is desired to increase the amount of adhesion of Mo, the concentration of Mo in the plating solution may be increased. When it is desired to increase the amount of Co adhesion, the Co concentration in the plating solution may be increased. When it is desired to increase the amount of Ni deposited, the Ni concentration in the plating solution may be increased.

另外,關於試驗編號90~93,使用極薄金屬層使用有金屬基材之附載體金屬箔。附載體金屬箔是以下述方式進行製造。試驗編號90、91之載體是使用JX日礦日石金屬股份有限公司製造之電解銅箔JTC箔(厚度18μm),試驗編號92、93之載體是使用JX日礦日石金屬股份有限公司製造之壓延銅箔精銅(厚度18μm、JIS H3100合金編號C1100)。然後,以表2所記載之順序,在上述電解銅箔之S面(光澤面)側、或壓延銅箔之表面形成各層。 Further, regarding test Nos. 90 to 93, a metal foil with a metal substrate was used as the ultra-thin metal layer. The carrier-attached metal foil is produced in the following manner. The carrier of test Nos. 90 and 91 was an electrolytic copper foil JTC foil (thickness 18 μm) manufactured by JX Nippon Mining & Metal Co., Ltd., and the carrier of test No. 92 and 93 was manufactured by JX Nippon Mining & Metal Co., Ltd. Calendered copper foil copper (thickness 18 μm, JIS H3100 alloy number C1100). Then, in the order described in Table 2, each layer was formed on the S surface (glossy side) side of the electrodeposited copper foil or on the surface of the rolled copper foil.

試驗編號90~93之中間層是以下述方式形成。 The intermediate layers of Test Nos. 90 to 93 were formed in the following manner.

.試驗編號90 . Test No. 90

<中間層> <intermediate layer>

(1)Ni層(鍍Ni) (1) Ni layer (Ni plating)

針對載體,在以下條件下在輥對輥型之連續鍍敷線上進行電鍍,藉此形成4000μg/dm2之附著量之Ni層。將具體之鍍敷條件記載於以下。 With respect to the carrier, electroplating was performed on a continuous roll line of a roll-to-roll type under the following conditions, thereby forming an adhesion layer of Ni of 4000 μg/dm 2 . The specific plating conditions are described below.

硫酸鎳:270~280g/L Nickel sulfate: 270~280g/L

氯化鎳:35~45g/L Nickel chloride: 35~45g/L

乙酸鎳:10~20g/L Nickel acetate: 10~20g/L

硼酸:30~40g/L Boric acid: 30~40g/L

光澤劑:糖精、丁炔二醇等 Gloss agent: saccharin, butynediol, etc.

十二烷基硫酸鈉:55~75ppm Sodium lauryl sulfate: 55~75ppm

pH值:4~6 pH: 4~6

浴溫:55~65℃ Bath temperature: 55~65°C

電流密度:10A/dm2 Current density: 10A/dm 2

(2)Cr層(電解鉻酸鹽處理) (2) Cr layer (electrolytic chromate treatment)

其次,對(1)中所形成之Ni層表面進行水洗及酸洗後,繼而藉由在以下條件下在輥對輥型之連續鍍敷線上進行電解鉻酸鹽處理,而使11μg/dm2之附著量之Cr層附著在Ni層上。 Next, the surface of the Ni layer formed in (1) was washed with water and pickled, and then subjected to electrolytic chromate treatment on a continuous roll line of a roll-to-roll type under the following conditions to obtain 11 μg/dm 2 . The adhesion amount of the Cr layer adheres to the Ni layer.

重鉻酸鉀1~10g/L Potassium dichromate 1~10g/L

pH值:7~10 pH: 7~10

液溫:40~60℃ Liquid temperature: 40~60°C

電流密度:2A/dm2 Current density: 2A/dm 2

.試驗編號91 . Test No. 91

<中間層> <intermediate layer>

(1)Ni-Mo層(鎳鉬合金鍍敷) (1) Ni-Mo layer (nickel-molybdenum alloy plating)

針對載體,在以下條件下在輥對輥型之連續鍍敷線上進行電鍍,藉此形成3000μg/dm2之附著量之Ni-Mo層。將具體之鍍敷條件記載於以下。 With respect to the carrier, electroplating was performed on a continuous roll line of a roll-to-roll type under the following conditions, thereby forming a Ni-Mo layer having an adhesion amount of 3000 μg/dm 2 . The specific plating conditions are described below.

(液組成)硫酸Ni六水合物:50g/dm3、鉬酸鈉二水合物:60g/dm3、檸檬酸鈉:90g/dm3 (liquid composition) sulfuric acid Ni hexahydrate: 50 g/dm 3 , sodium molybdate dihydrate: 60 g/dm 3 , sodium citrate: 90 g/dm 3

(液溫)30℃ (liquid temperature) 30 ° C

(電流密度)1~4A/dm2 (current density) 1~4A/dm 2

(通電時間)3~25秒 (Power-on time) 3~25 seconds

.試驗編號92 . Test No. 92

<中間層> <intermediate layer>

(1)Ni層(鍍Ni) (1) Ni layer (Ni plating)

在與試驗編號90相同之條件下形成Ni層。 The Ni layer was formed under the same conditions as in Test No. 90.

(2)有機物層(有機物層形成處理) (2) Organic layer (organic layer formation treatment)

其次,對(1)中所形成之Ni層表面進行水洗及酸洗後,繼而在下述條件下,將含有濃度1~30g/L之羧基苯并三唑(CBTA)之液溫40℃且pH值5之水溶液向Ni層表面進行20~120秒噴霧洗滌,藉此形成有機物層。 Next, after washing the surface of the Ni layer formed in (1) with water and pickling, the liquid temperature of the carboxybenzotriazole (CBTA) having a concentration of 1 to 30 g/L is then 40 ° C and pH under the following conditions. The aqueous solution of value 5 was spray-washed to the surface of the Ni layer for 20 to 120 seconds, thereby forming an organic layer.

.試驗編號93 . Test No. 93

<中間層> <intermediate layer>

(1)Co-Mo層(鈷鉬合金鍍敷) (1) Co-Mo layer (cobalt-molybdenum alloy plating)

針對載體,在以下條件下在輥對輥型之連續鍍敷線上進行電鍍,藉此形成4000μg/dm2之附著量之Co-Mo層。將具體之鍍敷條件記載於以下。 With respect to the carrier, electroplating was performed on a continuous roll line of a roll-to-roll type under the following conditions, thereby forming a Co-Mo layer of an adhesion amount of 4000 μg/dm 2 . The specific plating conditions are described below.

(液組成)硫酸Co:50g/dm3、鉬酸鈉二水合物:60g/dm3、檸檬酸鈉:90g/dm3 (liquid composition) sulfuric acid Co: 50 g/dm 3 , sodium molybdate dihydrate: 60 g/dm 3 , sodium citrate: 90 g/dm 3

(液溫)30℃ (liquid temperature) 30 ° C

(電流密度)1~4A/dm2 (current density) 1~4A/dm 2

(通電時間)3~25秒 (Power-on time) 3~25 seconds

(2)有機物層(有機物層形成處理) (2) Organic layer (organic layer formation treatment)

其次,對(1)中所形成之Co-Mo層表面進行水洗及酸洗後,繼而在以下條件下,將含有濃度1~30g/L之羥基苯并三唑(CBTA)之液溫40℃且pH值5之水溶液向Ni層表面進行20~120秒噴霧洗滌,藉此形成有機物層。 Next, after washing the surface of the Co-Mo layer formed in (1) with water and pickling, the liquid temperature of the hydroxybenzotriazole (CBTA) having a concentration of 1 to 30 g/L is then 40 ° C under the following conditions. The aqueous solution of pH 5 was spray-washed to the surface of the Ni layer for 20 to 120 seconds, thereby forming an organic layer.

另外,作為極薄金屬層之金屬箔是在以下條件下以成為表2所記載之基材厚度之方式形成在中間層上或鍍層上。 Further, the metal foil as the ultra-thin metal layer was formed on the intermediate layer or on the plating layer so as to have the thickness of the substrate described in Table 2 under the following conditions.

<金屬箔> <metal foil>

銅濃度:90~110g/L Copper concentration: 90~110g/L

錫濃度:1~30g/L Tin concentration: 1~30g/L

硫酸濃度:90~110g/L Sulfuric acid concentration: 90~110g/L

氯化物離子濃度:50~90ppm Chloride ion concentration: 50~90ppm

電解液溫度:50~80℃ Electrolyte temperature: 50~80°C

電流密度:100A/dm2 Current density: 100A/dm 2

電解液線速:1.5~5m/sec Electrolyte line speed: 1.5~5m/sec

(1)Ni、Co、Mo及其他元素之附著量(μg/dm2) (1) Adhesion of Ni, Co, Mo and other elements (μg/dm 2 )

關於所獲得之附鍍敷之金屬箔(試驗樣品)之鍍層中之Ni、Co、Mo及其他元素各自之附著量(μg/dm2),是利用濃度20質量%之硝酸使試驗樣品溶解,使用SII公司製造之ICP發射光譜分析裝置(型號:SPS3100),藉由ICP發射光譜分析法而進行測定。此外,在試驗樣品難以溶解於濃度20質量%之硝酸之情況下,只要可藉由硝酸與鹽酸之混合液(硝酸濃度:20質量%;鹽酸濃度:12質量%)或可使試驗樣品溶解之其他酸水溶液等液體使試驗樣品溶解即可。另外,根據所測得之Ni、Co及Mo之附著量算出鍍層中之Ni+Mo比率(%)。此處,Ni+Mo比率(%)之定義如下式上述。 The adhesion amount (μg/dm 2 ) of each of Ni, Co, Mo, and other elements in the plating layer of the obtained metal foil (test sample) obtained by the plating was obtained by dissolving the test sample with nitric acid having a concentration of 20% by mass. The measurement was carried out by ICP emission spectrometry using an ICP emission spectrometer (Model: SPS3100) manufactured by SII Corporation. Further, in the case where the test sample is difficult to be dissolved in nitric acid having a concentration of 20% by mass, the test sample may be dissolved by a mixture of nitric acid and hydrochloric acid (nitric acid concentration: 20% by mass; hydrochloric acid concentration: 12% by mass). A liquid such as another acid aqueous solution may dissolve the test sample. Further, the Ni+Mo ratio (%) in the plating layer was calculated from the measured adhesion amounts of Ni, Co, and Mo. Here, the Ni+Mo ratio (%) is defined as follows.

Ni+Mo比率(%)={Ni及Mo之合計附著量(μg/dm2)/(Ni、Co及Mo之合計附著量(μg/dm2))}×100 Ni + Mo ratio (%) = {Total deposition amount of Ni and Mo (μg / dm 2 ) / (Total deposition amount of Ni, Co, and Mo (μg / dm 2 ))} × 100

(2)蝕刻直線性 (2) etching linearity

使用37質量%、波美度40°之氯化鐵水溶液,對各試驗樣品進行蝕刻,分別形成線與間隙(L/S)為100μm/200μm之長度150mm之直線電路、及線與間隙(L/S)為75μm/75μm之長度150mm之直線電路。使用掃描式電子顯微鏡(日立製造,S-4700)對電路進行觀察,並以下述基準進行評價。 Each test sample was etched using an aqueous solution of 37% by mass and a Baume 40 ° aqueous solution to form a linear circuit having a line and gap (L/S) of 100 μm/200 μm and a length of 150 mm, and a line and a gap (L). /S) is a linear circuit with a length of 150 mm of 75 μm/75 μm. The circuit was observed using a scanning electron microscope (manufactured by Hitachi, Ltd., S-4700), and evaluated according to the following criteria.

×:彎曲範圍比電路長度之50%長 ×: The bending range is longer than 50% of the length of the circuit

△:彎曲範圍為電路長度之超過25%~50% △: The bending range is more than 25% to 50% of the length of the circuit.

○:彎曲範圍為電路長度之超過15%~25% ○: The bending range is more than 15% to 25% of the circuit length.

○○:彎曲範圍為電路長度之超過5%~15% ○○: The bending range is more than 5%~15% of the circuit length

◎:彎曲範圍比電路長度之0%長且為5%以下 ◎: The bending range is longer than 0% of the length of the circuit and is 5% or less.

◎◎:彎曲範圍0%。沒有彎曲(直線狀) ◎ ◎: The bending range is 0%. No bending (straight line)

此處,所謂彎曲,是指藉由SEM以500倍自上表面對電路拍攝照片,在沿著將該照片中之長度186μm之電路之隅部彼此連結之長度方向畫二條直線(粗細度1.9μm)之情況下,電路之脊線距各直線之中心線5μm以上之部位。測定結果是由對4處拍攝照片時之平均值表示。 Here, the term "bending" refers to taking a picture from the upper surface by the SEM at 500 times, and drawing two straight lines along the length direction connecting the crotch portions of the circuit having a length of 186 μm in the photo (thickness: 1.9 μm) In the case of the circuit, the ridge line of the circuit is 5 μm or more from the center line of each straight line. The measurement result is represented by the average value when photographs were taken at 4 places.

(3)焊料密接強度試驗 (3) Solder adhesion strength test

首先,自各試驗樣品之一表面側藉由濕式蝕刻而使箔厚變薄至0.03mm。此時,相反面以鍍層不會剝離之方式以膠帶進行遮蔽。然後,將所獲得之厚度變薄後之試驗樣品之鍍層側(未形成鍍層之試驗樣品為任意表面)與純銅箔(JX日礦日石金屬公司製造之C1100、箔厚0.035mm)經由千住金屬工業股份有限公司製造之無鉛焊料(ESC M705、添加有樹脂附著物(助焊劑)之焊料、Sn(剩餘部分)-3.0質量%Ag-0.5質量%Cu)進行接合,使用日本愛光股份有限公司製造之精密負荷測定器(MODEL-1605NL),以100mm/min之速度進行180°剝離試驗,藉此測定各試驗樣品之密接強度。樣品箔設為寬度15mm、長度200mm之短條狀,純銅箔設為寬度20mm、長度200mm之短條狀,將接合溫度設為245℃±5℃,將中央部30mm×15mm之面積接合在長度方向上。此外,關於純銅箔之厚度,如果接近供評價之樣品箔之 厚度,那麼沒有問題,但優選0.02mm~0.05mm,在本實施例中使用0.035mm之純銅箔。此外,在附載體金屬箔之實驗例中,將載體自附載體金屬箔剝離後進行上述之焊料密接強度試驗。另外,在附載體金屬箔之金屬箔之厚度小於0.03mm之試驗編號92及93之情況下,在金屬箔上進行鍍Cu而使厚度增加,將金屬箔之厚度與鍍Cu之厚度之合計厚度設為0.03mm後,自附載體金屬箔剝離載體,其後進行上述之試驗。 First, the foil thickness was thinned to 0.03 mm by wet etching from the surface side of one of the test samples. At this time, the opposite surface is shielded by a tape so that the plating layer does not peel off. Then, the plating side of the test sample obtained by thinning the obtained thickness (the test sample in which the plating layer is not formed is an arbitrary surface) and the pure copper foil (C1100 manufactured by JX Nippon Mining & Metal Co., Ltd., foil thickness 0.035 mm) via the living metal Lead-free solder manufactured by Industrial Co., Ltd. (ESC M705, solder with added resin deposit (flux), Sn (remaining part) - 3.0% by mass of Ag-0.5% by mass of Cu), joined by Japan Aiko Co., Ltd. The precision load measuring device (MODEL-1605NL) was subjected to a 180° peeling test at a speed of 100 mm/min, thereby measuring the adhesion strength of each test sample. The sample foil was formed into a short strip having a width of 15 mm and a length of 200 mm. The pure copper foil was a strip having a width of 20 mm and a length of 200 mm, and the joining temperature was 245 ° C ± 5 ° C, and the area of the center portion of 30 mm × 15 mm was joined to the length. In the direction. In addition, regarding the thickness of pure copper foil, if it is close to the sample foil for evaluation The thickness is then not problematic, but is preferably 0.02 mm to 0.05 mm, and 0.035 mm of pure copper foil is used in this embodiment. Further, in the experimental example of the metal foil with a carrier, the carrier was adhered to the metal foil of the carrier, and the solder adhesion strength test described above was carried out. Further, in the case of test numbers 92 and 93 in which the thickness of the metal foil with the carrier metal foil is less than 0.03 mm, Cu is plated on the metal foil to increase the thickness, and the thickness of the metal foil and the thickness of the Cu plating are combined. After setting to 0.03 mm, the carrier was peeled off from the carrier metal foil, and the above test was carried out.

(4)耐候性試驗 (4) Weather resistance test

對將各試驗樣品在溫度85℃、相對濕度85%之恒溫恒濕器(愛斯佩克股份有限公司(型號:PL-2E))內保持100小時或200小時時之變色程度進行調查。關於變色程度,是在拍攝照片後,重疊透明之樹脂膜,以黑色之標記塗抹變色之部分後,藉由影像處理軟體進行白黑二值化,並藉由影像處理軟體求出變色部分之面積。將使所獲得之面積除以觀察視野整體之面積而獲得之值為100倍所得之值設為變色部分之面積率(%)。 The degree of discoloration of each test sample at a constant temperature and humidity device (ESPEC Co., Ltd. (model: PL-2E)) having a temperature of 85 ° C and a relative humidity of 85% was maintained for 100 hours or 200 hours. Regarding the degree of discoloration, after the photograph is taken, the transparent resin film is overlapped, and the discolored portion is applied with the black mark, and the black and white binarization is performed by the image processing software, and the area of the discolored portion is obtained by the image processing software. . The value obtained by dividing the obtained area by the area of the entire observation field of view is 100 times the value obtained as the area ratio (%) of the discolored portion.

將鍍層附著量之試驗結果示於表2,將蝕刻性、焊料密接性及耐候性之試驗結果示於表3。根據表3可知,在實施例中原本焊料密接性或耐候性較差之金屬基材藉由形成本發明之鍍層而獲得得到改善之焊料密接性及耐候性。進而可知,在適當控制了Ni+Co+Mo之合計附著量及Ni+Mo比率(%)之實施例(No.1、2、2-2~2-6、3~12、15、18~20、22~27、30、32~36、38~44、46、48、49、78~81、86、88~97)中,也獲得較高之蝕刻性。另一方面,在比較例中,雖存在表現出優異之蝕刻性之金屬基材,但沒有兼顧有焊料密接性及耐候性之金屬基材。 The test results of the plating adhesion amount are shown in Table 2, and the test results of etching property, solder adhesion, and weather resistance are shown in Table 3. As can be seen from Table 3, in the examples, the metal substrate having poor solder adhesion or weather resistance was excellent in solder adhesion and weather resistance by forming the plating layer of the present invention. Further, examples in which the total adhesion amount of Ni + Co + Mo and the Ni + Mo ratio (%) were appropriately controlled (No. 1, 2, 2-2 to 2-6, 3 to 12, 15, 18) In 20, 22~27, 30, 32~36, 38~44, 46, 48, 49, 78~81, 86, 88~97), a higher etching property is also obtained. On the other hand, in the comparative example, there is a metal substrate which exhibits excellent etching properties, but there is no metal substrate which has both solder adhesion and weather resistance.

Claims (53)

一種附鍍敷之金屬基材,其在金屬基材之一部分或全部之表面上形成有選自由Co鍍層、以及含有選自由Co、Ni及Mo所組成之群中之2種以上之元素之合金鍍層所組成之群中之鍍層,該鍍層中之Co、Ni及Mo之合計附著量為500μg/dm2以上,金屬基材含有選自由Ti、Si、Mg、P、Sn、Zn、Cr、Zr、V、W、Na、Ca、Ba、Cs、Mn、K、Ga、B、Nb、Ce、Be、Nd、Sc、Hf、Ho、Lu、Yb、Dy、Er、Pr、Y、Li、Gd、Pu、In、Fe、La、Th、Ta、U、Sm、Tb、Sr、Tm及Al所組成之群中之1種或2種以上之元素。 A plated metal substrate having an alloy selected from a Co plating layer and an element containing two or more elements selected from the group consisting of Co, Ni, and Mo, on a part or all of a surface of a metal substrate. a plating layer in a group of plating layers, wherein a total adhesion amount of Co, Ni, and Mo in the plating layer is 500 μg/dm 2 or more, and the metal substrate contains a material selected from the group consisting of Ti, Si, Mg, P, Sn, Zn, Cr, and Zr. , V, W, Na, Ca, Ba, Cs, Mn, K, Ga, B, Nb, Ce, Be, Nd, Sc, Hf, Ho, Lu, Yb, Dy, Er, Pr, Y, Li, Gd One or two or more elements selected from the group consisting of Pu, In, Fe, La, Th, Ta, U, Sm, Tb, Sr, Tm, and Al. 如申請專利範圍第1項之附鍍敷之金屬基材,其中,上述鍍層中之Co、Ni及Mo之合計附著量為700μg/dm2以上。 The metal substrate to be plated according to the first aspect of the invention, wherein the total adhesion amount of Co, Ni, and Mo in the plating layer is 700 μg/dm 2 or more. 如申請專利範圍第1項之附鍍敷之金屬基材,其中,上述鍍層中之Co、Ni及Mo之合計附著量為1000μg/dm2以上。 The metal substrate to which the plating of the first aspect of the invention is applied, wherein the total adhesion amount of Co, Ni, and Mo in the plating layer is 1000 μg/dm 2 or more. 如申請專利範圍第1項之附鍍敷之金屬基材,其中,上述鍍層中之Co、Ni及Mo之合計附著量為2000μg/dm2以上。 The metal substrate to be plated according to the first aspect of the invention, wherein the total adhesion amount of Co, Ni, and Mo in the plating layer is 2000 μg/dm 2 or more. 如申請專利範圍第1項之附鍍敷之金屬基材,其中,上述鍍層中之Co、Ni及Mo之合計附著量為3000μg/dm2以上。 The metal substrate to which the plating of the first aspect of the invention is applied, wherein the total adhesion amount of Co, Ni, and Mo in the plating layer is 3000 μg/dm 2 or more. 如申請專利範圍第1項之附鍍敷之金屬基材,其中,上述鍍層中之Co、Ni及Mo之合計附著量為5000μg/dm2以上。 The metal substrate to which the plating of the first aspect of the invention is applied, wherein the total adhesion amount of Co, Ni, and Mo in the plating layer is 5000 μg/dm 2 or more. 如申請專利範圍第1項之附鍍敷之金屬基材,其中,上述鍍層中之Co、Ni及Mo之合計附著量為7000μg/dm2以上。 The metal substrate to which the plating of the first aspect of the invention is applied, wherein the total adhesion amount of Co, Ni, and Mo in the plating layer is 7000 μg/dm 2 or more. 如申請專利範圍第1項之附鍍敷之金屬基材,其中,上述鍍層中之 Co、Ni及Mo之合計附著量為180000μg/dm2以下。 The metal substrate to be plated according to the first aspect of the invention, wherein the total adhesion amount of Co, Ni, and Mo in the plating layer is 180,000 μg/dm 2 or less. 如申請專利範圍第1至8項中任一項之附鍍敷之金屬基材,其中,在上述鍍層中,相對於Co、Ni及Mo之合計附著量之Ni及Mo之合計附著量(以下也稱為「Ni+Mo比率(%)」)以質量比計為80%以下。 The metal substrate to be plated according to any one of the first to eighth aspects of the present invention, wherein the total amount of adhesion of Ni and Mo to the total amount of Co, Ni, and Mo adhered to the plating layer (hereinafter, Also referred to as "Ni+Mo ratio (%)"), the mass ratio is 80% or less. 如申請專利範圍第1至8項中任一項之附鍍敷之金屬基材,其中,在上述鍍層中,相對於Co、Ni及Mo之合計附著量之Ni及Mo之合計附著量(以下也稱為「Ni+Mo比率(%)」)以質量比計為60%以下。 The metal substrate to be plated according to any one of the first to eighth aspects of the present invention, wherein the total amount of adhesion of Ni and Mo to the total amount of Co, Ni, and Mo adhered to the plating layer (hereinafter, Also referred to as "Ni+Mo ratio (%)"), the mass ratio is 60% or less. 如申請專利範圍第1至8項中任一項之附鍍敷之金屬基材,其中,在上述鍍層中,相對於Co、Ni及Mo之合計附著量之Ni及Mo之合計附著量(以下也稱為「Ni+Mo比率(%)」)以質量比計為50%以下。 The metal substrate to be plated according to any one of the first to eighth aspects of the present invention, wherein the total amount of adhesion of Ni and Mo to the total amount of Co, Ni, and Mo adhered to the plating layer (hereinafter, Also referred to as "Ni+Mo ratio (%)"), the mass ratio is 50% or less. 如申請專利範圍第1至8項中任一項之附鍍敷之金屬基材,其中,在上述鍍層中,相對於Co、Ni及Mo之合計附著量之Ni及Mo之合計附著量(以下也稱為「Ni+Mo比率(%)」)以質量比計為10%以上。 The metal substrate to be plated according to any one of the first to eighth aspects of the present invention, wherein the total amount of adhesion of Ni and Mo to the total amount of Co, Ni, and Mo adhered to the plating layer (hereinafter, Also referred to as "Ni+Mo ratio (%)"), the mass ratio is 10% or more. 如申請專利範圍第9項之附鍍敷之金屬基材,其中,在上述鍍層中,相對於Co、Ni及Mo之合計附著量之Ni及Mo之合計附著量(以下也稱為「Ni+Mo比率(%)」)以質量比計為10%以上。 The metal substrate to be plated according to the ninth aspect of the invention, wherein the total amount of adhesion of Ni and Mo to the total amount of adhesion of Co, Ni, and Mo in the plating layer (hereinafter also referred to as "Ni+" The Mo ratio (%)") is 10% or more in terms of mass ratio. 如申請專利範圍第1至8項中任一項之附鍍敷之金屬基材,其中,在上述鍍層與上述金屬基材之間形成有基底層及/或粗化處理層。 The plated metal substrate according to any one of claims 1 to 8, wherein a base layer and/or a roughened layer is formed between the plating layer and the metal substrate. 如申請專利範圍第13項之附鍍敷之金屬基材,其中,在上述鍍層與上述金屬基材之間形成有基底層及/或粗化處理層。 The metal substrate to which the plating of claim 13 is applied, wherein a base layer and/or a roughened layer is formed between the plating layer and the metal substrate. 如申請專利範圍第1至8項中任一項之附鍍敷之金屬基材,其中,上述鍍層選自由Co-Ni合金鍍層、Co-Mo合金鍍層、Ni-Mo合金鍍層及 Co-Ni-Mo合金鍍層所組成之群中。 The plated metal substrate according to any one of claims 1 to 8, wherein the plating layer is selected from the group consisting of a Co-Ni alloy plating layer, a Co-Mo alloy plating layer, a Ni-Mo alloy plating layer, and A group consisting of Co-Ni-Mo alloy coatings. 如申請專利範圍第15項之附鍍敷之金屬基材,其中,上述鍍層選自由Co-Ni合金鍍層、Co-Mo合金鍍層、Ni-Mo合金鍍層及Co-Ni-Mo合金鍍層所組成之群中。 The metal substrate for plating according to claim 15 , wherein the plating layer is selected from the group consisting of a Co-Ni alloy plating layer, a Co-Mo alloy plating layer, a Ni-Mo alloy plating layer, and a Co-Ni-Mo alloy plating layer. In the group. 如申請專利範圍第1至8項中任一項之附鍍敷之金屬基材,其中,上述鍍層含有選自由Cu、As、Ag、Au、Pd、Pt、Bi、Os、Rh、Tl、Sb、Pb、Hg、Ir、Cd、Ru、Re、Tc及Gd所組成之群中之1種或2種以上之元素。 The plated metal substrate according to any one of claims 1 to 8, wherein the plating layer is selected from the group consisting of Cu, As, Ag, Au, Pd, Pt, Bi, Os, Rh, Tl, Sb. One or two or more elements of the group consisting of Pb, Hg, Ir, Cd, Ru, Re, Tc, and Gd. 如申請專利範圍第17項之附鍍敷之金屬基材,其中,上述鍍層含有選自由Cu、As、Ag、Au、Pd、Pt、Bi、Os、Rh、Tl、Sb、Pb、Hg、Ir、Cd、Ru、Re、Tc及Gd所組成之群中之1種或2種以上之元素。 The coated metal substrate according to claim 17, wherein the plating layer is selected from the group consisting of Cu, As, Ag, Au, Pd, Pt, Bi, Os, Rh, Tl, Sb, Pb, Hg, Ir One or more elements of the group consisting of Cd, Ru, Re, Tc, and Gd. 如申請專利範圍第18項之附鍍敷之金屬基材,其中,上述鍍層含有合計0~2000μg/dm2之選自由Cu、As、Ag、Au、Pd、Pt、Bi、Os、Rh、Tl、Sb、Pb、Hg、Ir、Cd、Ru、Re、Tc及Gd所組成之群中之1種或2種以上之元素。 The coated metal substrate according to claim 18, wherein the plating layer contains a total of 0 to 2000 μg/dm 2 selected from the group consisting of Cu, As, Ag, Au, Pd, Pt, Bi, Os, Rh, Tl. One or two or more elements selected from the group consisting of Sb, Pb, Hg, Ir, Cd, Ru, Re, Tc, and Gd. 如申請專利範圍第19項之附鍍敷之金屬基材,其中,上述鍍層含有合計0~2000μg/dm2之選自由Cu、As、Ag、Au、Pd、Pt、Bi、Os、Rh、Tl、Sb、Pb、Hg、Ir、Cd、Ru、Re、Tc及Gd所組成之群中之1種或2種以上之元素。 The coated metal substrate according to claim 19, wherein the plating layer contains a total of 0 to 2000 μg/dm 2 selected from the group consisting of Cu, As, Ag, Au, Pd, Pt, Bi, Os, Rh, Tl. One or two or more elements selected from the group consisting of Sb, Pb, Hg, Ir, Cd, Ru, Re, Tc, and Gd. 如申請專利範圍第18之附鍍敷之金屬基材,其中,上述鍍層含有合計0~1000μg/dm2之選自由Cu、As、Ag、Au、Pd、Pt、Bi、Os、Rh、Tl、Sb、Pb、Hg、Ir、Cd、Ru、Re、Tc及Gd所組成之群中之1種或2種以上之元素。 The metal substrate for plating according to claim 18, wherein the plating layer contains a total of 0 to 1000 μg/dm 2 selected from the group consisting of Cu, As, Ag, Au, Pd, Pt, Bi, Os, Rh, Tl, One or two or more elements of the group consisting of Sb, Pb, Hg, Ir, Cd, Ru, Re, Tc, and Gd. 如申請專利範圍第18項之附鍍敷之金屬基材,其中,上述鍍層含有合計0~500μg/dm2之選自由Cu、As、Ag、Au、Pd、Pt、Bi、Os、Rh、Tl、Sb、Pb、Hg、Ir、Cd、Ru、Re、Tc及Gd所組成之群中之1種或2種以上之元素。 The metal substrate for plating according to claim 18, wherein the plating layer contains a total of 0 to 500 μg/dm 2 selected from the group consisting of Cu, As, Ag, Au, Pd, Pt, Bi, Os, Rh, and Tl. One or two or more elements selected from the group consisting of Sb, Pb, Hg, Ir, Cd, Ru, Re, Tc, and Gd. 如申請專利範圍第1至8項中任一項之附鍍敷之金屬基材,其中,上述鍍層含有選自由Cu、As、Ag、Au、Pd及Pt所組成之群中之1種或2種以上之元素。 The plated metal substrate according to any one of claims 1 to 8, wherein the plating layer contains one or two selected from the group consisting of Cu, As, Ag, Au, Pd, and Pt. Kind of above elements. 如申請專利範圍第24項之附鍍敷之金屬基材,其中,上述鍍層含有合計0~2000μg/dm2之選自由Cu、As、Ag、Au、Pd及Pt所組成之群中之1種或2種以上之元素。 The metal substrate to be plated according to claim 24, wherein the plating layer contains a total of 0 to 2000 μg/dm 2 selected from the group consisting of Cu, As, Ag, Au, Pd, and Pt. Or more than two elements. 如申請專利範圍第24項之附鍍敷之金屬基材,其中,上述鍍層含有合計0~1000μg/dm2之選自由Cu、As、Ag、Au、Pd及Pt所組成之群中之1種或2種以上之元素。 The metal substrate to be plated according to claim 24, wherein the plating layer contains a total of 0 to 1000 μg/dm 2 selected from the group consisting of Cu, As, Ag, Au, Pd, and Pt. Or more than two elements. 如申請專利範圍第24項之附鍍敷之金屬基材,其中,上述鍍層含有合計0~500μg/dm2之選自由Cu、As、Ag、Au、Pd及Pt所組成之群中之1種或2種以上之元素。 The scope of the appended patent application 24 of the plated deposition of the metal substrate, wherein the coating layer contains one of the group consisting of total 0 ~ 500μg / dm selected from the group consisting of Cu 2, As, Ag, Au, Pd and Pt of Or more than two elements. 一種附鍍敷之金屬基材,其在金屬基材之一部分或全部之表面上形成有選自由Co鍍層、以及含有選自由Co、Ni及Mo所組成之群中之2種以上之元素之合金鍍層所組成之群中之鍍層,且該鍍層中之Co、Ni及Mo之合計附著量為500μg/dm2以上,金屬基材是含有選自由Ti、Si、Mg、P、Sn、Zn、Cr、Zr、V、W、Na、Ca、Ba、Cs、Mn、K、Ga、B、Nb、Ce、Be、Nd、Sc、Hf、Ho、Lu、Yb、 Dy、Er、Pr、Y、Li、Gd、Pu、In、Fe、La、Th、Ta、U、Sm、Tb、Sr、Tm及Al所組成之群中之1種或2種以上之元素之附鍍敷之金屬基材,且滿足以下(1)~(21)中之一個或兩個以上之項目:(1):上述鍍層中之Co、Ni及Mo之合計附著量為700μg/dm2以上;(2):上述鍍層中之Co、Ni及Mo之合計附著量為1000μg/dm2以上;(3):上述鍍層中之Co、Ni及Mo之合計附著量為2000μg/dm2以上;(4):上述鍍層中之Co、Ni及Mo之合計附著量為3000μg/dm2以上;(5):上述鍍層中之Co、Ni及Mo之合計附著量為5000μg/dm2以上;(6):上述鍍層中之Co、Ni及Mo之合計附著量為7000μg/dm2以上;(7):上述鍍層中之Co、Ni及Mo之合計附著量為180000μg/dm2以下;(8):上述鍍層中,相對於Co、Ni及Mo之合計附著量之Ni及Mo之合計附著量(以下也稱為「Ni+Mo比率(%)」)以質量比計為80%以下;(9):上述鍍層中,相對於Co、Ni及Mo之合計附著量之Ni及Mo之合計附著量(以下也稱為「Ni+Mo比率(%)」)以質量比計為60%以下;(10):上述鍍層中,相對於Co、Ni及Mo之合計附著量之Ni及Mo之合計附著量(以下也稱為「Ni+Mo比率(%)」)以質量比計為50%以下;(11):上述鍍層中,相對於Co、Ni及Mo之合計附著量之Ni及Mo之合計附著量(以下也稱為「Ni+Mo比率(%)」)以質量比計為10%以上;(12):在上述鍍層與上述金屬基材之間形成有基底層及/或粗化處理層;(13):上述鍍層為選自由Co-Ni合金鍍層、Co-Mo合金鍍層、Ni-Mo 合金鍍層及Co-Ni-Mo合金鍍層所組成之群中之鍍層;(14):上述鍍層含有選自由Cu、As、Ag、Au、Pd、Pt、Bi、Os、Rh、Tl、Sb、Pb、Hg、Ir、Cd、Ru、Re、Tc及Gd所組成之群中之1種或2種以上之元素;(15):上述鍍層含有合計0~2000μg/dm2之選自由Cu、As、Ag、Au、Pd、Pt、Bi、Os、Rh、Tl、Sb、Pb、Hg、Ir、Cd、Ru、Re、Tc及Gd所組成之群中之1種或2種以上之元素;(16):上述鍍層含有合計0~1000μg/dm2之選自由Cu、As、Ag、Au、Pd、Pt、Bi、Os、Rh、Tl、Sb、Pb、Hg、Ir、Cd、Ru、Re、Tc及Gd所組成之群中之1種或2種以上之元素;(17):上述鍍層含有合計0~500μg/dm2之選自由Cu、As、Ag、Au、Pd、Pt、Bi、Os、Rh、Tl、Sb、Pb、Hg、Ir、Cd、Ru、Re、Tc及Gd所組成之群中之1種或2種以上之元素;(18):上述鍍層含有選自由Cu、As、Ag、Au、Pd及Pt所組成之群中之1種或2種以上之元素;(19):上述鍍層含有合計0~2000μg/dm2之選自由Cu、As、Ag、Au、Pd及Pt所組成之群中之1種或2種以上之元素;(20):上述鍍層含有合計0~1000μg/dm2之選自由Cu、As、Ag、Au、Pd及Pt所組成之群中之1種或2種以上之元素;(21):上述鍍層含有合計0~500μg/dm2之選自由Cu、As、Ag、Au、Pd及Pt所組成之群中之1種或2種以上之元素。 A plated metal substrate having an alloy selected from a Co plating layer and an element containing two or more elements selected from the group consisting of Co, Ni, and Mo, on a part or all of a surface of a metal substrate. a plating layer in a group consisting of plating layers, wherein a total adhesion amount of Co, Ni, and Mo in the plating layer is 500 μg/dm 2 or more, and the metal substrate contains a material selected from the group consisting of Ti, Si, Mg, P, Sn, Zn, and Cr. , Zr, V, W, Na, Ca, Ba, Cs, Mn, K, Ga, B, Nb, Ce, Be, Nd, Sc, Hf, Ho, Lu, Yb, Dy, Er, Pr, Y, Li a plated metal substrate of one or more of the group consisting of Gd, Pu, In, Fe, La, Th, Ta, U, Sm, Tb, Sr, Tm, and Al, and One or more of the following items (1) to (21) are satisfied: (1): the total adhesion amount of Co, Ni, and Mo in the plating layer is 700 μg/dm 2 or more; (2): in the above plating layer The total adhesion amount of Co, Ni, and Mo is 1000 μg/dm 2 or more; (3): the total adhesion amount of Co, Ni, and Mo in the plating layer is 2000 μg/dm 2 or more; (4): Co in the plating layer The total adhesion amount of Ni and Mo is 3000 μg/dm 2 or more; (5) The total adhesion amount of Co, Ni, and Mo in the plating layer is 5000 μg/dm 2 or more; (6): the total adhesion amount of Co, Ni, and Mo in the plating layer is 7000 μg/dm 2 or more; (7): The total adhesion amount of Co, Ni, and Mo in the plating layer is 180000 μg/dm 2 or less; (8): the total amount of adhesion of Ni and Mo to the total amount of adhesion of Co, Ni, and Mo in the plating layer (hereinafter also The "Ni+Mo ratio (%)" is 80% or less by mass ratio; (9): the total amount of adhesion of Ni and Mo to the total amount of adhesion of Co, Ni, and Mo in the plating layer (hereinafter) Also referred to as "Ni+Mo ratio (%)"), the mass ratio is 60% or less; (10): the total amount of adhesion of Ni and Mo relative to the total amount of adhesion of Co, Ni, and Mo in the plating layer ( The following is also referred to as "Ni+Mo ratio (%)"), which is 50% or less by mass ratio; (11): total adhesion amount of Ni and Mo with respect to the total amount of adhesion of Co, Ni, and Mo in the above-mentioned plating layer (hereinafter also referred to as "Ni+Mo ratio (%)") is 10% or more by mass ratio; (12): a base layer and/or a roughened layer is formed between the plating layer and the metal substrate; (13): The above plating layer is selected from Co-Ni a plating layer in a group consisting of a plating layer, a Co-Mo alloy plating layer, a Ni-Mo alloy plating layer, and a Co-Ni-Mo alloy plating layer; (14): the plating layer is selected from the group consisting of Cu, As, Ag, Au, Pd, Pt, One or more elements of the group consisting of Bi, Os, Rh, Tl, Sb, Pb, Hg, Ir, Cd, Ru, Re, Tc, and Gd; (15): The above plating layer contains a total of 0~ 2000 μg/dm 2 is selected from the group consisting of Cu, As, Ag, Au, Pd, Pt, Bi, Os, Rh, Tl, Sb, Pb, Hg, Ir, Cd, Ru, Re, Tc and Gd. One or two or more elements; (16): the plating layer contains a total of 0 to 1000 μg/dm 2 selected from the group consisting of Cu, As, Ag, Au, Pd, Pt, Bi, Os, Rh, Tl, Sb, Pb, One or more elements of the group consisting of Hg, Ir, Cd, Ru, Re, Tc, and Gd; (17): The plating layer contains a total of 0 to 500 μg/dm 2 selected from Cu, As, Ag One or more elements of the group consisting of Au, Pd, Pt, Bi, Os, Rh, Tl, Sb, Pb, Hg, Ir, Cd, Ru, Re, Tc, and Gd; (18) The plating layer contains one or more elements selected from the group consisting of Cu, As, Ag, Au, Pd, and Pt; (19): Layer containing a group consisting of total 0 ~ 2000μg / dm selected from the group consisting of Cu 2 of, As, Ag, Au, Pd and Pt of one or two or more kinds of elements; (20): the coating layer comprises in total 0 ~ 1000μg / The dm 2 is one or more selected from the group consisting of Cu, As, Ag, Au, Pd, and Pt; (21): the plating layer contains a total of 0 to 500 μg/dm 2 selected from Cu, One or more elements of the group consisting of As, Ag, Au, Pd, and Pt. 如申請專利範圍第1至8、28項中任一項之附鍍敷之金屬基材,其 中,上述金屬基材是由銅合金、鋁、鋁合金、鐵、鐵合金、不銹鋼、鎳合金、鈦、鈦合金、金合金、銀合金、鉑族合金、鉻、鉻合金、鎂、鎂合金、鎢、鎢合金、鉬合金、鉛合金、鉭、鉭合金、鋯、鋯合金、錫、錫合金、銦、銦合金、鋅、或鋅合金所形成。 A coated metal substrate according to any one of claims 1 to 8 and 28, wherein The metal substrate is made of a copper alloy, aluminum, aluminum alloy, iron, iron alloy, stainless steel, nickel alloy, titanium, titanium alloy, gold alloy, silver alloy, platinum group alloy, chromium, chromium alloy, magnesium, magnesium alloy, Tungsten, tungsten alloy, molybdenum alloy, lead alloy, niobium, tantalum alloy, zirconium, zirconium alloy, tin, tin alloy, indium, indium alloy, zinc, or zinc alloy. 如申請專利範圍第29項之附鍍敷之金屬基材,其中,上述金屬基材是由銅合金、鋁、鋁合金、鐵、鐵合金、不銹鋼、鎳合金、鈦、鈦合金、鋅、或鋅合金所形成。 The coated metal substrate according to claim 29, wherein the metal substrate is made of copper alloy, aluminum, aluminum alloy, iron, iron alloy, stainless steel, nickel alloy, titanium, titanium alloy, zinc, or zinc. The alloy is formed. 如申請專利範圍第29項之附鍍敷之金屬基材,其中,上述金屬基材是由鈦銅、磷青銅、卡遜合金、紅黃銅、黃銅、鋅白銅或其他銅合金所形成。 A metal substrate for plating according to claim 29, wherein the metal substrate is formed of titanium copper, phosphor bronze, Carson alloy, red brass, brass, zinc white copper or other copper alloy. 如申請專利範圍第1至8、28項中任一項之附鍍敷之金屬基材,其中,上述金屬基材為金屬條、金屬板、或金屬箔之形態。 The metal substrate to be plated according to any one of claims 1 to 8, wherein the metal substrate is in the form of a metal strip, a metal plate, or a metal foil. 如申請專利範圍第1至8、28項中任一項之附鍍敷之金屬基材,其中,上述金屬基材為壓延銅合金箔或電解銅合金箔。 The metal substrate to be plated according to any one of claims 1 to 8, wherein the metal substrate is a rolled copper alloy foil or an electrolytic copper alloy foil. 如申請專利範圍第1至8、28項中任一項之附鍍敷之金屬基材,其中,在上述鍍層之表面具有樹脂層。 The plated metal substrate according to any one of claims 1 to 8, wherein the surface of the plating layer has a resin layer. 如申請專利範圍第1至8、28項中任一項之附鍍敷之金屬基材,其中,上述金屬基材具有兩個主表面,在其一面或兩面具有上述鍍層。 The plated metal substrate according to any one of claims 1 to 8, wherein the metal substrate has two main surfaces and has the plating layer on one or both sides thereof. 一種附載體金屬箔,其在載體之一面或兩面依序具有中間層、極薄金屬層,上述極薄金屬層為申請專利範圍第1至35項中任一項之附鍍敷之金屬基材。 A metal foil with a carrier having an intermediate layer or an extremely thin metal layer on one or both sides of the carrier, and the extremely thin metal layer is a plated metal substrate according to any one of claims 1 to 35. . 如申請專利範圍第36項之附載體金屬箔,其中,在上述載體之一面 依序具有上述中間層、上述極薄金屬層,在上述載體之另一面具有粗化處理層。 A metal foil with a carrier as claimed in claim 36, wherein one of the above carriers The intermediate layer and the ultra-thin metal layer are sequentially provided, and the roughened layer is provided on the other surface of the carrier. 如申請專利範圍第36或37項之附載體金屬箔,其中,附鍍敷之金屬基材之金屬基材為銅合金製。 The carrier metal foil of claim 36 or 37, wherein the metal substrate to which the plated metal substrate is attached is made of a copper alloy. 一種連接器,其具備申請專利範圍第1至35項中任一項之附鍍敷之金屬基材或申請專利範圍第36至38項中任一項之附載體金屬箔。 A connector, which is provided with a plated metal substrate according to any one of claims 1 to 35, or a carrier-attached metal foil according to any one of claims 36 to 38. 一種端子,其具備申請專利範圍第1至35項中任一項之附鍍敷之金屬基材或申請專利範圍第36至38項中任一項之附載體金屬箔。 A terminal, which is provided with a plated metal substrate according to any one of claims 1 to 35, or a carrier-attached metal foil according to any one of claims 36 to 38. 一種積層板,其是將申請專利範圍第1至35項中任一項之附鍍敷之金屬基材或申請專利範圍第36至38項中任一項之附載體金屬箔與樹脂基板進行積層而製造。 A laminated board which laminates a metal substrate to be plated according to any one of claims 1 to 35 or a metal foil with a carrier of any one of claims 36 to 38 and a resin substrate. And manufacturing. 一種遮罩帶或遮罩材,其具備申請專利範圍第41項之積層板。 A masking tape or masking material having a laminate of claim 41. 一種印刷配線板,其具備申請專利範圍第41項之積層板。 A printed wiring board having a laminate of the 41st patent application. 一種金屬加工構件,其具備申請專利範圍第1至35項中任一項之附鍍敷之金屬基材或申請專利範圍第36至38項中任一項之附載體金屬箔。 A metal working member, which is provided with a metal substrate for plating according to any one of claims 1 to 35, or a metal foil with a carrier according to any one of claims 36 to 38. 一種電子、電氣機器,其具備申請專利範圍第1至35項中任一項之附鍍敷之金屬基材或申請專利範圍第36至38項中任一項之附載體金屬箔。 An electronic or electrical machine comprising the metal substrate with a plating of any one of claims 1 to 35, or the metal foil with a carrier of any one of claims 36 to 38. 一種印刷配線板之製造方法,其包括如下步驟:準備申請專利範圍第36至38項中任一項之附載體金屬箔與絕緣基板之步驟;將上述附載體金屬箔與絕緣基板進行積層之步驟;及在將上述附載體金屬箔與絕緣基板積層後,經過將上述附載體金屬箔 之載體剝離之步驟而形成覆金屬積層板,其後,藉由半加成法、減成法、部分加成法或改良半加成法中之任一種方法而形成電路之步驟。 A manufacturing method of a printed wiring board, comprising the steps of: preparing a carrier-attached metal foil and an insulating substrate according to any one of claims 36 to 38; and laminating the carrier-attached metal foil and the insulating substrate And after laminating the above-mentioned carrier metal foil and the insulating substrate, passing the above-mentioned carrier metal foil The step of stripping the carrier forms a metal-clad laminate, and thereafter, the step of forming the circuit is performed by any one of a semi-additive method, a subtractive method, a partial addition method, or a modified semi-additive method. 一種印刷配線板之製造方法,其包括如下步驟:在申請專利範圍第36至38項中任一項之附載體金屬箔之上述極薄金屬層側表面或上述載體側表面形成電路之步驟;以掩埋上述電路之方式在上述附載體金屬箔之上述極薄金屬層側表面或上述載體側表面形成樹脂層之步驟;在上述樹脂層上形成電路之步驟;在上述樹脂層上形成電路後,將上述載體或上述極薄金屬層剝離之步驟;及將上述載體或上述極薄金屬層剝離後,將上述極薄金屬層或上述載體去除,藉此使形成在上述極薄金屬層側表面或上述載體側表面之掩埋在上述樹脂層中之電路露出之步驟。 A manufacturing method of a printed wiring board, comprising the steps of: forming a circuit on the side surface of the above-mentioned ultra-thin metal layer or the side surface of the carrier side of the metal foil with a carrier of any one of claims 36 to 38; a step of forming a resin layer on the side surface of the ultra-thin metal layer or the side of the carrier side of the metal foil with a carrier; a step of forming a circuit on the resin layer; and forming a circuit on the resin layer, a step of peeling off the carrier or the ultra-thin metal layer; and after removing the carrier or the ultra-thin metal layer, removing the ultra-thin metal layer or the carrier, thereby forming the surface of the ultra-thin metal layer or the above The step of burying the circuit on the side surface of the carrier exposed in the above resin layer. 一種接合體,其是申請專利範圍第1至35項中任一項之附鍍敷之金屬基材或申請專利範圍第36至38項中任一項之附載體金屬箔與焊料的接合體。 A bonded body which is a bonded metal substrate of any one of claims 1 to 35, or a bonded metal foil and solder joint of any one of claims 36 to 38. 如申請專利範圍第48項之接合體,其中,在焊料與金屬基材或附載體金屬箔之接合界面存在含有Sn及Co之熱擴散層。 The bonded body according to claim 48, wherein a heat diffusion layer containing Sn and Co is present at a joint interface between the solder and the metal substrate or the metal foil with a carrier. 一種附鍍敷之金屬基材或附載體金屬箔與導電性構件之連接方法,其包括如下步驟:藉由蝕刻而對申請專利範圍第1至35項中任一項之附鍍敷之金屬基材或申請專利範圍第36至38項中任一項之附載體金屬箔進行形 狀加工之步驟;與藉由焊接將所獲得之附鍍敷之金屬基材之形狀加工品的具有鍍層之部位與導電性構件進行接合之步驟。 A method of joining a plated metal substrate or a metal foil with a carrier and a conductive member, comprising the steps of: plating the metal base of any one of claims 1 to 35 by etching Or a metal foil with a carrier of any one of claims 36 to 38 a step of processing, and a step of bonding the portion having the plating layer of the obtained shaped metal substrate to the conductive member by welding. 一種電子零件,其具備申請專利範圍第1至35項中任一項之附鍍敷之金屬基材或申請專利範圍第36至38項中任一項之附載體金屬箔。 An electronic component comprising the plated metal substrate of any one of claims 1 to 35, or the carrier-attached metal foil of any one of claims 36 to 38. 一種自動對焦模組,其具備申請專利範圍第1至35中任一項之附鍍敷之金屬基材或申請專利範圍第36至38項中任一項之附載體金屬箔作為彈簧材。 An auto-focusing module, which is provided with a metal substrate for plating according to any one of claims 1 to 35, or a metal foil with a carrier of any one of claims 36 to 38 as a spring material. 一種自動對焦相機模組,其具備透鏡;將該透鏡向光軸方向之初期位置進行彈性施力之申請專利範圍第1至35項中任一項之附鍍敷之金屬基材製之彈簧構件或申請專利範圍第36至38項中任一項之附載體金屬箔製之彈簧構件;及產生對抗該彈簧構件之作用力之電磁力而可使上述透鏡向光軸方向驅動之電磁驅動手段,上述電磁驅動手段具備線圈,彈簧構件是在具有上述鍍層之部位藉由焊接而與線圈接合。 An autofocus camera module comprising: a lens; a spring member made of a plated metal substrate according to any one of claims 1 to 35, wherein the lens is elastically biased at an initial position in the optical axis direction; Or a spring member made of a carrier metal foil according to any one of claims 36 to 38; and an electromagnetic driving means for generating an electromagnetic force against the force of the spring member to drive the lens in the optical axis direction, The electromagnetic driving means includes a coil, and the spring member is joined to the coil by welding at a portion having the plating layer.
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