JP5346054B2 - Copper foil for printed wiring board and laminated board using the same - Google Patents

Description

  The present invention relates to a copper foil for a printed wiring board and a laminated board using the same, and more particularly to a copper foil for a flexible printed wiring board and a laminated board using the same.

  Printed wiring boards have made great progress over the last half century and are now used in almost all electronic devices. In recent years, with the increasing needs for miniaturization and higher performance of electronic equipment, higher density mounting of components and higher frequency of signals have progressed. Response is required.

  A printed wiring board is made by bonding an insulating substrate to a copper foil, or depositing a Ni alloy or the like on the insulating substrate and then forming a copper layer by electroplating to form a copper-clad laminate, and then etching the copper foil or copper layer surface. In general, it is manufactured through a process of forming a conductor pattern. For this reason, the copper foil or copper layer for printed wiring boards is required to have adhesion and etching properties with an insulating substrate.

  The adhesiveness here means that the formed circuit does not peel from the insulating substrate. For this reason, the roughening process which forms an unevenness | corrugation in the adhesion surface side with the resin of copper foil or a copper layer, and processes, such as Ni plating and chromate, are further performed as needed. Alternatively, from the viewpoint of the skin effect and the like, a method of directly performing a chromate treatment or the like on a copper foil without performing a roughening treatment is also known (Patent Document 1).

  Etchability means that no metal derived from the surface treatment remains in the insulating portion between the circuits, and that the circuit tailing is small. If metal remains in the insulating part between the circuits, a short circuit occurs between the circuits. In the etching for forming the circuit, the circuit is etched from the upper surface to the lower side (insulating substrate side), and the cross section of the circuit becomes a trapezoid. If the difference between the upper and lower bases of the trapezoid (hereinafter referred to as “tailing”) is small, the space between circuits can be narrowed, and a high-density wiring board can be obtained. If the skirting is large, the circuit is short-circuited if the space between the circuits is narrowed, so that a high-density mounting substrate cannot be manufactured.

  Etching proceeds in two directions, the thickness direction and the planar direction of the copper foil or copper layer. Since the etching rate in the plate thickness direction is lower than that in the plane direction, the circuit cross section becomes trapezoidal. For this reason, in order to obtain a circuit with a small footing, the thickness of the copper foil or the copper layer may be reduced to shorten the etching time (Patent Document 2).

  In addition to the copper foil or copper layer, the thickness of the photoresist also affects the etching time. Usually, for FPC applications, a dry film resist having a thickness of 3 μm or more is used. If the resist is thick, the etching solution is not sufficiently supplied to the opening, and the etching proceeds in the plane direction rather than the thickness direction of the copper foil or the copper layer, so that a circuit having a sufficient width cannot be formed. Therefore, when forming a thin line circuit, a liquid resist is widely used. Since the thickness of the liquid resist is about 1 μm, the etching solution is more sufficiently supplied to the opening than when a dry film resist is used.

  In addition, there is a method of forming a metal having a slower etching rate than copper or an alloy layer thereof on the etching surface side of the copper foil in order to reduce the bottoming (Patent Documents 3 and 4). These candidate metals are Ni, Co and the like. A layer of several tens of nanometers formed by adhering a large amount of these to the etching surface of the copper foil or copper layer suppresses the lateral etching at the top of the circuit and forms a circuit with a small tail.

  As the circuit pitch of the printed circuit board becomes finer, the circuit interval also becomes smaller, so the circuit tailing must be small. According to Non-Patent Document 1, the circuit width (L, the unit is μm) and the circuit interval (S, the unit is μm) tend to decrease year by year, and the flexible printed wiring board has L / S = 25 / in 2012. It will reach 25. In order to cope with the fine pitch of the wiring circuit, the thickness of the copper foil must be reduced in order to reduce the bottom of the circuit. However, since the handling at the time of manufacture becomes difficult when the thickness of the copper foil is reduced, it is said that the limit of the wiring pattern that can be handled by the electrolytic copper foil or the rolled copper foil is L / S = 25/25. Even if a metal layer such as Ni or Co is formed on the etched surface of the copper foil, it is expected that it is difficult to cope with such a circuit pattern.

  A method of imparting conductivity by depositing a nickel alloy or the like on a resin film such as polyimide by sputtering and then performing copper plating (metalizing method) is suitable for forming a fine wiring pattern. Since this method can easily change the thickness of the copper layer formed by plating, it is a material suitable for the fine pitch of the wiring circuit. However, since it takes time to form the copper layer, there is a problem that the manufacturing cost is high.

JP 2006-222185 A JP 2000-269619 A JP-A-6-81172 JP 2002-176242 A

2009 Japan Packaging Technology Roadmap Printed Wiring Board

  In the method of forming a circuit from copper foil (subtractive method), in the conventional thickness, the etching in the planar direction proceeds until the etching in the thickness direction of the copper foil is completed, and the circuit having a cross-sectional shape with a large tailing is only used. Can't get. Since the current concentrates on the upper surface of the circuit with a narrow width, heat is generated and there is a possibility of disconnection in some cases. In addition, it is expected that it will be difficult to mount an IC chip.

  In order to reduce the bottom of the circuit cross section, the thickness of the copper foil may be reduced and the etching time may be shortened. However, the thinner the copper foil, the more difficult it is to handle in the CCL manufacturing process, which adversely affects product yield. Further, when the copper layer is thin as in Patent Document 2, the cross-sectional area of the circuit is reduced, so that there is a possibility that a necessary amount of conductivity cannot be ensured.

  The technique of providing a Ni, Co layer or the like on the etched surface of the copper foil may not be able to cope with the narrow pitch of circuit patterns that are expected to advance in the future. In the prior art, these metals need to be attached in large amounts. Since these metal layers have ferromagnetism, they may adversely affect electronic devices. Therefore, it is necessary to remove these layers by soft etching after circuit formation etching and resist removal, which increases the number of manufacturing steps.

  Further, unlike the case where a dry film resist is thermocompression bonded to the etching surface of the copper foil or the copper layer to obtain physical adhesion, the liquid resist is applied to the etching surface by spin coating or a method equivalent thereto. In general, since a liquid resist is assumed to be in close contact with copper, the compatibility with the surface treatment applied to the etched surface is not always good, and the resist may be easily peeled off. In the case of using a liquid resist, the etching surface is roughened by pretreatment, and physical adhesion is often secured.

  Then, this invention makes it a subject to provide the copper foil for printed wiring boards which can manufacture the circuit of the cross-sectional shape with small tailing suitable for fine pitch formation with favorable manufacturing efficiency, and a laminated board using the same. To do.

  Conventionally, in order to form a fine pitch circuit by a subtractive method, it has been necessary to reduce the thickness of the copper foil. In addition, in order to form a circuit having a cross-sectional shape with a small skirt, it is necessary to deposit a large amount of ferromagnetic Ni or Co on the etched surface of the copper foil to form a layer having a thickness of several tens of nm. On the other hand, as a result of intensive studies, the present inventors have found that when a small amount of noble metal is attached to the etched surface of the copper foil, the bottom of the formed circuit is reduced. As a result, even if the copper foil is not thin, it is possible to form a circuit with a small trailing edge, and thus a high-density mounting substrate can be formed. Further, by covering the noble metal with a dissimilar metal, the adhesion with the liquid resist is ensured, thereby making it possible to omit the pretreatment step that has been conventionally performed and to stably form a fine wiring pattern. It was.

The present invention completed on the basis of the above knowledge is, in one aspect, a copper foil for a printed wiring board provided with a copper foil base material and a coating layer covering at least a part of the surface of the copper foil base material. The layer is laminated in order from the surface of the copper foil base material, the first layer made of at least one of Pt, Pd, and Au, and one or more of Ni, Co, Sn, Zn, Cu, and Cr In the coating layer, Au is 200 to 2000 μg / dm ² , Pt is 200 to 2000 μg / dm ² , Pd is 120 to 1200 μg / dm ² , Ni is 5 to 1500 μg / dm ² , Co 5 to 1500 μg / dm ² , Sn 5 to 1200 μg / dm ² , Zn 5 to 1200 μg / dm ² , Cu 5 to 1500 μg / dm ² , Cr 5 to 80 μg / dm ² Present in the coating layer The atomic concentration (%) of any one or more of Pt, Pd, and Au in the depth direction (x: unit nm) obtained from the depth direction analysis from the surface by XPS having a thickness of 3 to 25 nm Is the atomic concentration of one or more metals of f (x), Ni, Co, Sn, Zn, Cu and Cr, and g (x), and f (x), g (x ) Are the copper foils for printed wiring boards satisfying G ≦ F, f (F) ≧ 1%, and g (G) ≧ 1%, where f (F) and g (G) are the first maximum values. .

  In one embodiment of the copper foil for printed wiring board according to the present invention, f (F) ≧ 5% and g (G) ≧ 5% are satisfied.

In another embodiment of the copper foil for printed wiring boards according to the present invention, Au is 400~1000μg / dm ^2, Pt is the 400~1050μg / dm ^2, Pd present in a coverage of 240~600μg / dm ² .

  In still another embodiment of the copper foil for printed wiring board according to the present invention, at least one of Ni, Co, Sn, Zn, Cu and Cr is made of Ni alloy, and the Ni alloy is Ni. In any of -V, Ni-Sn, Ni-Cu, Ni-Zn, Ni-Mn, and Ni-Cu-Zn, g (x) is the atomic concentration of Ni.

In yet another embodiment of the copper foil for printed wiring boards according to the present invention, Ni alloy, Ni-V alloy coating amount is made of Ni of 5~1500μg / dm ² and 5~500μg / dm ² and V, coverages Ni-Sn alloy consisting 5~1500μg / dm ² of Ni and 5~500μg / dm ² of Sn, Ni-Cu alloy coating amount containing Ni of 5~1500μg / dm ^2, the amount of coating 5 1500μg / dm Ni-Zn alloy consisting of ² of Ni and 5~500μg / dm ² of Zn, Ni-Mn alloy coating amount is made of Ni and 5~500μg / dm ² of Mn 5~1500μg / dm ^2, the coating It is a Ni—Zn—Cu alloy containing 5 to 1000 μg / dm ² of Ni and 5 to 500 μg / dm ² of Zn.

  In yet another embodiment of the copper foil for printed wiring board according to the present invention, a rust preventive treatment layer composed of a chromium layer or a chromate layer and / or a silane treatment layer is formed on the outermost layer.

  In another aspect, the present invention provides a process for preparing a rolled copper foil or an electrolytic copper foil composed of the copper foil of the present invention, and a laminate of the copper foil and the resin substrate with the coating layer of the copper foil as an etching surface. And forming a copper circuit by etching the laminate using a ferric chloride aqueous solution or a cupric chloride aqueous solution and removing unnecessary portions of copper. It is.

  In yet another aspect, the present invention is a laminate of the copper foil of the present invention and a resin substrate.

  In still another aspect, the present invention is a laminate including a copper layer and a resin substrate, the laminate including the coating layer of the present invention that covers at least a part of the surface of the copper layer.

  In one embodiment of the laminate according to the present invention, the resin substrate is a polyimide substrate.

  In yet another aspect, the present invention is a printed wiring board made from the laminate of the present invention.

  ADVANTAGE OF THE INVENTION According to this invention, the copper foil for printed wiring boards which can manufacture the circuit of the cross-sectional shape with small tailing suitable for fine pitch production with favorable manufacturing efficiency, and a laminated board using the same can be provided.

It is an example (TEM image) of the coating layer formed in the island shape on a copper foil base material. It is an example (TEM image) of the coating layer formed in the island shape on a copper foil base material. It is the outline | summary of the calculation method of the etching factor (EF) using the surface photograph of a part of circuit pattern, the schematic diagram of the cross section of the width direction of the circuit pattern in the said part, and this schematic diagram. It is a photograph which shows the healthy part (part which the resist and copper base material have not peeled). It is a photograph which shows an abnormal part (part from which a resist and a copper base material have partly peeled). It is a depth profile by XPS after the sputtering of Example 28.

(Copper foil base material)
Although there is no restriction | limiting in particular in the form of the copper foil base material which can be used for this invention, Typically, it can use with the form of rolled copper foil or electrolytic copper foil. In general, the electrolytic copper foil is produced by electrolytic deposition of copper from a copper sulfate plating bath onto a drum of titanium or stainless steel, and the rolled copper foil is produced by repeating plastic working and heat treatment with a rolling roll. Rolled copper foil is often used for applications that require flexibility.
In addition to high-purity copper such as tough pitch copper and oxygen-free copper, which are usually used as conductor patterns for printed wiring boards, for example, Sn-containing copper, Ag-containing copper, Cr, Zr or Mg are added as the copper foil base material. It is also possible to use a copper alloy such as a copper alloy, a Corson copper alloy to which Ni, Si and the like are added. In addition, when the term “copper foil” is used alone in this specification, a copper alloy foil is also included.

  There is no restriction | limiting in particular also about the thickness of the copper foil base material which can be used for this invention, What is necessary is just to adjust to the thickness suitable for printed wiring boards suitably. For example, it can be set to about 5 to 100 μm. However, for the purpose of forming a fine pattern, it is 30 μm or less, preferably 20 μm or less, and typically about 5 to 20 μm.

  Although the copper foil base material used for this invention is not specifically limited, For example, you may use what does not perform a roughening process. Conventionally, the surface is generally roughened by special plating with irregularities on the order of μm, and the physical anchor effect provides adhesion to the resin. A smooth foil is considered to have good characteristics, and a roughened foil may work in a disadvantageous direction. Moreover, since the roughening process process is abbreviate | omitted if it does not perform a roughening process, there exists an effect of economical efficiency and productivity improvement.

(1) Structure of coating layer The coating layer is formed in at least one part of the surface on the opposite side (circuit formation plan side) of the copper foil base material with the insulating substrate. The coating layer is composed of a layer made of at least one of Pt, Pd, and Au and a layer made of one or more metals other than the above three, which are sequentially laminated from the surface of the copper foil base material. Examples of the metal other than Pt, Pd, and Au include one or more of Ni, Co, Sn, Zn, Cu, and Cr. In addition, as a metal other than Pt, Pd, and Au, Ni alloys such as Ni—V, Ni—Sn, Ni—Cu, Ni—Zn, Ni—Mn, and Ni—Cu—Zn may be used. In this way, when a small amount of noble metal is attached to the etched surface of the copper foil, the bottom of the formed circuit is reduced. As a result, even if the copper foil is not thin, it is possible to form a circuit with a small trailing edge, and thus a high-density mounting substrate can be formed. Further, by covering the noble metal with a dissimilar metal, adhesion with the liquid resist is ensured, whereby a pre-treatment process that has been conventionally performed can be omitted, and a fine wiring pattern can be stably formed. The thickness of the coating layer is 3 to 25 nm, preferably 5 to 15 nm. When the thickness of the coating layer is less than 3 nm, resist stripping resistance deteriorates, and when it exceeds 25 nm, the initial etching property deteriorates.

As a method of forming a coating layer on a copper foil base material, there is a method of forming a coating layer by performing sputtering in plasma while transporting the copper foil base material by a continuous transport method such as a reel-to-reel method. In such a method, when the metal particles that have reached the surface of the copper foil substrate by sputtering can be diffused for a short time on the surface, and the amount of metal particles attached is small, the formed layer becomes an island shape, which is small. Adversely affects etching properties. For this reason, when the coating layer is formed in an island shape, it is preferable that part or all of the noble metal layer has a major axis diameter of 1 nm or more when the cross section is observed with a transmission electron microscope. Here, the “major axis diameter” indicates the longest diameter of the island-shaped portion. For reference, an example (TEM image) of a coating layer formed in an island shape on a copper foil base is shown in FIGS.
Further, the form of the coating is affected by the state of oxidation on the copper foil side and the pretreatment, and if the surface of the copper foil is cleaned, it is coated in “layered” rather than “island”. Furthermore, it is coated in a “layered” manner by increasing the coating amount. Thus, the coating layer of the present invention may be island-shaped or layered.

(2) Identification of coating layer The coating layer can be identified by the presence of each detected peak by performing argon sputtering from the surface layer with a surface analyzer such as XPS or AES and performing chemical analysis in the depth direction.

(3) Atomic concentration on the surface of the coating layer The coating layer according to the present invention is any one of Pt, Pd and Au in the depth direction (x: unit nm) obtained from the depth direction analysis from the surface by XPS. When the atomic concentration (%) is f (x) and the atomic concentration of one or more metals other than the above three is g (x), f (x), g (x ) Satisfying G ≦ F, f (F) ≧ 1%, and g (G) ≧ 1%, respectively, where f (F) and g (G) are the first maximum values. If f (F) is less than 1%, it is difficult to form a rectangular circuit pattern. If g (G) is less than 1%, the adhesion of the etched surface to the resist may be poor. Further, it is preferable that f (F) ≧ 5% and g (G) ≧ 5%. Moreover, when the layer which consists of 1 or more types of metals other than Pt, Pd, and Au is comprised by Ni alloy, g (G) shows the atomic concentration of Ni. The “first maximum value” indicates a maximum value that initially exists when observed from the surface of the coating layer in the depth direction.

(4) Amount of adhesion When the coating layer is composed of Pt, the amount of adhesion of Pt is 200 to 2000 μg / dm ² , and more preferably 400 to 1050 μg / dm ² . When the coating layer is composed of Pd, the adhesion amount of Pd is 120 to 1200 μg / dm ² , and more preferably 240 to 600 μg / dm ² . If the coating layer is composed of Au, the adhesion amount of Au is 200~2000μg / dm ^2, and more preferably 400~1000μg / dm ^2. When the coating amount of Pt of the coating layer is less than 200 μg / dm ² , the coating amount of Pd of the coating layer is less than 120 μg / dm ² , and the coating amount of Au of the coating layer is less than 200 μg / dm ² , the effect is obtained. not enough. On the other hand, when the coating amount of Pt in the coating layer is 2000 μg / dm ² , the coating amount of Pd in the coating layer is 1200 μg / dm ² , and the deposition amount of Au in the coating layer exceeds 2000 μg / dm ² , initial etching properties are obtained. Adversely affect.

Further, when the metal other than Pt, Pd and Au is composed of at least one of Ni, Co, Sn, Zn, Cu and Cr, Ni is 5 to 1500 μg / dm ² , preferably 30 to 1500 μg / dm ² , more preferably 70 to 500 μg / dm ² , or Co 5 to 1500 μg / dm ² , preferably 30 to 1500 μg / dm ² , more preferably 70 to 500 μg / dm ² , or Sn 5 to 1200 μg / Dm ² , preferably 30 to 1200 μg / dm ² , more preferably 60 to 800 μg / dm ² , or Zn 5 to 1200 μg / dm ² , preferably 30 to 1200 μg / dm ² , more preferably 60 to 800 μg / dm ² . ² or Cu is preferred that 5~1500μg / dm ² or Cr, is present at a coverage of 5~80μg / dm ^2, There. The coating amount of Ni in the coating layer is less than 5 μg / dm ² , the coating amount of Co in the coating layer is less than 5 μg / dm ² , the deposition amount of Sn in the coating layer is less than 5 μg / dm ² , and the deposition amount of Zn in the coating layer is 5 [mu] g / dm less than ^2, the adhesion amount is less than 5 [mu] g / dm ² of Cu coating layer, the adhesion amount of Cr in the coating layer is less than 5 [mu] g / dm ^2, respective effects are not sufficient. On the other hand, the Ni adhesion amount of the coating layer is 1500 μg / dm ² , the Co adhesion amount of the coating layer is 1500 μg / dm ² , the Sn adhesion amount of the coating layer is 1200 μg / dm ² , and the Zn adhesion amount of the coating layer is 1200 μg. / Dm ² , if the coating amount of Cu in the coating layer is 1500 μg / dm ² , and if the coating amount of Cr in the coating layer exceeds 80 μg / dm ² , the initial etching properties are adversely affected.

Further, Ni alloy, Ni-V alloy coating amount is made of 5~1500μg / dm ² of Ni and 5~500μg / dm ² and V, the coating amount of 5~1500μg / dm ² Ni and 5~500μg / dm Ni-Sn alloy of ^two of Sn, Ni-Cu alloy coating amount containing Ni of 5~1500μg / dm ^2, the amount of the coating consists of Ni of 5~1500μg / dm ² and 5~500μg / dm ² of Zn Ni-Zn alloy, the amount of the coating consists 5~1500μg / dm ² of Ni and 5~500μg / dm ² of Mn Ni-Mn alloy, Ni coating amount of 5~1000μg / dm ² and 5~500μg / dm ² You may form with the Ni-Zn-Cu alloy containing Zn. If the coating amount of each metal element is less than the above range, the effect is not sufficient. On the other hand, if the coating amount of each metal element exceeds the above range, the initial etching property is adversely affected.

  In addition, a base layer may be provided between the copper foil base material and the coating layer from the viewpoint of heat discoloration resistance as long as the initial etching property is not adversely affected. As the underlayer, nickel, nickel alloy, cobalt, silver, and manganese are preferable. The method for providing the underlayer may be either dry or wet.

  In order to enhance the rust prevention effect, a rust prevention treatment layer composed of a chromium layer or a chromate layer and / or a silane treatment layer can be further formed on the outermost layer on the coating layer. Moreover, in order to suppress the oxidation by heat processing further between the coating layer and copper foil, you may form the base layer which has oxidation resistance.

(Manufacturing method of copper foil)
The copper foil for printed wiring boards according to the present invention can be formed by a sputtering method. That is, at least a part of the surface of the copper foil base material is coated with the coating layer by a sputtering method. Specifically, a layer made of at least one of Pt, Pd, and Au having a lower etching rate than copper on the etching surface side of the copper foil and one or more metals other than the above three by sputtering. A layer consisting of is formed. The coating layer is not limited to the sputtering method, and may be formed by, for example, a wet plating method such as electroplating or electroless plating.

(Printed wiring board manufacturing method)
A printed wiring board (PWB) can be manufactured according to a conventional method using the copper foil according to the present invention. Below, the example of the manufacturing method of a printed wiring board is shown.

  First, a laminated body is manufactured by bonding a copper foil and an insulating substrate. The insulating substrate on which the copper foil is laminated is not particularly limited as long as it has characteristics applicable to a printed wiring board. For example, paper base phenolic resin, paper base epoxy resin, synthetic fiber for rigid PWB Use cloth base epoxy resin, glass cloth / paper composite base epoxy resin, glass cloth / glass non-woven composite base epoxy resin, glass cloth base epoxy resin, etc., use polyester film, polyimide film, etc. for FPC I can do things.

  In the case of the rigid PWB, a prepreg is prepared by impregnating a base material such as a glass cloth with a resin and curing the resin to a semi-cured state. It can be carried out by superposing a copper foil on the prepreg from the opposite surface of the coating layer and heating and pressing.

  In the case of a flexible printed wiring board (FPC), a polyimide film or a polyester film and a copper foil can be bonded using an epoxy or acrylic adhesive (three-layer structure). In addition, as a method without using an adhesive (two-layer structure), a polyimide varnish (polyamic acid varnish), which is a polyimide precursor, is applied to a copper foil and heated to form an imidization or on a polyimide film. There is a laminating method in which a thermoplastic polyimide is applied to the substrate, a copper foil is overlaid thereon, and heated and pressed. In the casting method, it is also effective to apply an anchor coating material such as thermoplastic polyimide in advance before applying the polyimide varnish.

  The laminate according to the present invention can be used for various printed wiring boards (PWB) and is not particularly limited. For example, from the viewpoint of the number of layers of the conductor pattern, the single-sided PWB, double-sided PWB, and multilayer PWB ( It is applicable to rigid PWB, flexible PWB (FPC), and rigid flex PWB from the viewpoint of the type of insulating substrate material. Further, the laminate according to the present invention is not limited to the above-described copper-clad laminate obtained by attaching a copper foil to a resin, and is a metalizing material in which a copper layer is formed on the resin by sputtering or plating. Also good.

A resist is applied to the surface of the coating layer formed on the copper foil of the laminate produced as described above, the pattern is exposed with a mask, and developed to form a resist pattern. At this time, since a layer made of one or more metals other than three types of Pt, Pd, and Au is formed on the surface of the coating layer of the laminate, the adhesion with the liquid resist is improved, There is no need to pre-treat the surface of the coating layer.
Subsequently, the coating layer exposed at the opening of the resist pattern is removed using a reagent. As the reagent, one containing hydrochloric acid, sulfuric acid or nitric acid as a main component is preferably used for reasons such as availability. Since the noble metal layer is very thin, it diffuses moderately with the copper of the copper foil base material due to the thermal history at the time of manufacture, and the copper atoms that have reached the vicinity of the outermost layer by this diffusion are heated in the atmosphere or in the resist drying process. Is oxidized to produce copper oxide. Since the copper oxide in the noble metal / copper alloy layer formed by diffusion is easily dissolved by an acid, the noble metal is removed at the same time. Therefore, even a noble metal layer having corrosion resistance can be easily removed from the exposed portion of the opening of the resist pattern.
Next, the laminate is immersed in an etching solution. At this time, the coating layer containing any one or more of platinum, palladium, and gold that suppresses etching is located near the resist portion on the copper foil, and the etching of the copper foil on the resist side is performed by this coating layer. Etching of the copper circuit pattern proceeds substantially vertically by etching of the copper in a portion away from the coating layer at a speed faster than the speed at which the vicinity is etched. Thus, unnecessary portions of copper can be removed, and then the etching resist can be peeled and removed to expose the circuit pattern.
With respect to the etching solution used for forming the circuit pattern on the laminate, the etching rate of the coating layer is sufficiently smaller than that of copper, so that the etching factor is improved. As the etching solution, a cupric chloride aqueous solution, a ferric chloride aqueous solution, or the like can be used.
In addition, a heat-resistant layer may be formed in advance on the surface of the copper foil base before forming the coating layer.

(Circuit shape on the copper foil surface of the printed wiring board)
As described above, the circuit on the copper foil surface of the printed wiring board formed by etching from the coating layer side is not usually formed with two long side surfaces perpendicular to the insulating substrate. From the surface of the foil downward, that is, toward the resin layer, it is formed so as to spread toward the end (generation of sagging). Thus, the two long side surfaces each have an inclination angle θ with respect to the surface of the insulating substrate. It is important to reduce the circuit pitch as much as possible for miniaturization (fine pitch) of the circuit pattern that is currently required. However, if this inclination angle θ is small, the sagging increases accordingly, The pitch becomes wider. In addition, the inclination angle θ is usually not completely constant in each circuit and circuit. If the variation in the inclination angle θ is large, the circuit quality may be adversely affected. Accordingly, the circuit on the copper foil surface of the printed wiring board formed by etching from the coating layer side has two long side surfaces each having an inclination angle θ of 65 to 90 ° with respect to the insulating substrate surface, In addition, it is desirable that the standard deviation of tan θ in the same circuit is 1.0 or less. The etching factor is preferably 1.5 or more, and more preferably 2.5 or more when the circuit pitch is 50 μm or less.

  EXAMPLES Examples of the present invention will be described below, but these are provided for better understanding of the present invention and are not intended to limit the present invention.

(Example 1: Examples 1 to 79)
(Formation of coating layer on copper foil)
As a copper foil base material of Examples 1 to 79, a rolled copper foil (C1100 made by Nikko Metal) having a thickness of 12 μm was prepared. The surface roughness (Rz) of the rolled copper foil was 0.10 μm.

The thin oxide film adhering to the surface of the copper foil was removed by reverse sputtering, and the following various targets were sputtered with the following apparatus and conditions to form a coating layer. The thickness of the coating layer was changed by adjusting the film formation time. The simple substance of the various metals used for sputtering used the thing of purity 3N.
-Equipment: Batch type sputtering equipment (ULVAC, Model MNS-6000)
・ Achieving vacuum: 1.0 × 10 ⁻⁵ Pa
・ Sputtering pressure: 0.2 Pa
・ Reverse sputtering power: 100W
・ Sputtering power: 50W
-Target: For etching surface Au, Pd, Pt, Ni, Co, Sn, Zn, Cu, Cr (3N)
Ni-7 wt% V, Ni-20 wt% Sn, Ni-25 wt% Zn,
Ni-20 wt% Mn, Ni-50 wt% Cu,
Ni-64wt% Cu-18wt% Zn
・ Target: Ni, Cr (3N) for adhesive surface
Film formation rate: About 0.2 μm of film was formed for each target for a fixed time, the thickness was measured with a three-dimensional measuring device, and the sputtering rate per unit time was calculated.

The thin oxide film previously attached to the surface opposite to the coating layer was removed from the copper foil provided with the coating layer by reverse sputtering, and a Ni layer and a Cr layer were sequentially formed.
A polyimide film with an adhesive (manufactured by Nikkan Kogyo Co., Ltd., CISV1215) was laminated on the copper foil that had been subjected to the surface treatment by the above procedure by a hot press at a pressure of 7 kgf / cm ² and 160 ° C. for 40 minutes.

<Measurement of adhesion amount>
The adhesion amount of Au, Pd, and Pt in the coating layer was measured by atomic absorption spectrometry by dissolving the surface-treated copper foil sample with aqua regia, diluting the solution. For quantification of other elements, the sample was dissolved in a mixed solution of HNO ₃ (2% by weight) and HCl (5% by weight), and the metal concentration in the solution was determined using an ICP emission spectroscopic analyzer (SII Nanotechnology). The amount of metal per unit area (μg / dm ² ) was calculated by quantitative determination using SFC-3100).
Moreover, the analysis value at the time of forming into a film on Ti foil on the same conditions was used for the adhesion amount of Cu and Ni at the time of setting Cu and Cu-Ni alloy as a target.

<Measurement by XPS>
The operating conditions of XPS when creating the depth profile of the coating layer are shown below.
・ Device: XPS measuring device (ULVAC-PHI, Model 5600MC)
・ Achieving vacuum: 3.8 × 10 ⁻⁷ Pa
X-ray: Monochromatic AlKα or non-monochromatic MgKα, X-ray output 300 W, detection area 800 μmφ, angle between sample and detector 45 °
Ion beam: ion species Ar ⁺ , acceleration voltage 3 kV, sweep area 3 mm × 3 mm, sputtering rate 2.0 nm / min (SiO ₂ conversion)

<Measurement by transmission electron microscope (1)>
After coating, the total thickness of the surface treatment layer observed when mapping with characteristic X-rays was measured in the cross section of the coating layer with a transmission electron microscope.
・ Device: STEM (Hitachi, Ltd., model HD-2000 STEM)
・ Acceleration voltage: 200kV
・ Magnification: 2000000 times

<Measurement by transmission electron microscope (2)>
After coating, the island shape or the layered portion in the noble metal layer was observed in the cross section of the coating layer with a transmission electron microscope, and the major axis diameter of the island shaped portion was measured. The measurement length was 1000 nm. Since noble metal particles having an island-like major axis diameter of less than 0.5 nm were difficult to determine due to the resolution of the apparatus, noble metal particles having a major axis diameter of more than 0.5 nm were investigated.
・ Device: STEM (Hitachi, Ltd., model HD-2000 STEM)
・ Acceleration voltage: 200kV
・ Magnification: 100,000 times

(Circuit shape by etching)
The etched surface of the copper foil was degreased with acetone and immersed in sulfuric acid (100 g / L) for 30 seconds to remove the surface contamination and the oxide layer. Next, a liquid resist (manufactured by Tokyo Ohka Kogyo Co., Ltd., OFPR-800LB) was dropped onto the etching surface using a spin coater and dried. The resist thickness after drying was adjusted to 1 μm. Thereafter, 10 circuits were printed by an exposure process, and an etching process for removing unnecessary portions of the copper foil was performed under the following conditions.

<Etching conditions (ferric chloride, cupric chloride)>
Ferric chloride aqueous solution: (FeCl ₃ 3.2 mol / L, HCl 1.0 mol / L)
Cupric chloride aqueous solution: (CuCl ₂ 2.0 mol / L, HCl 2.3 mol / L)
・ Liquid temperature: 50 ° C
・ Spray pressure: 0.25 MPa
(40 μm pitch circuit formation)
・ Resist L / S = 35μm / 5μm
Finished circuit bottom (bottom) or top (top) width: 20 μm
-One that can be confirmed by observing from above the circuit After etching, the resist was peeled off by being immersed in an aqueous NaOH solution (100 g / L) at 45 ° C for 1 minute.

<Etching factor measurement conditions>
The etching factor is the distance of the length of sagging from the intersection of the vertical line from the upper surface of the copper foil and the resin substrate, assuming that the circuit is etched vertically when sagging at the end (when sagging occurs) Is a ratio of a to the thickness b of the copper foil: b / a, and the larger the value, the larger the inclination angle, and the etching residue does not remain and the sagging is small. It means to become. FIG. 3 shows a surface photograph of a part of the circuit pattern, a schematic diagram of a cross section in the width direction of the circuit pattern at the part, and an outline of an etching factor calculation method using the schematic diagram. This a was measured by SEM observation from above the circuit, and the etching factor (EF = b / a) was calculated. By using this etching factor, it is possible to easily determine whether the etching property is good or bad. Furthermore, the inclination angle θ was calculated by calculating the arc tangent using a and the thickness b of the copper foil measured in the above procedure. The measurement range was a circuit length of 600 μm, and an etching factor of 12 points, its standard deviation, and an average value of the inclination angle θ were adopted as a result.

<Resistance peel resistance evaluation>
Here, FIGS. 4 and 5 show photographs from the upper part of the circuit where the resist is not stripped with alkali after etching. Among these, FIG. 4 shows a healthy part (a part where the resist and the copper base material are not peeled), and FIG. 5 shows an abnormal part (a part where the resist and the copper base material are partly peeled). If the resist is in close contact with the base material, the metallic luster can be confirmed through the resist as shown in FIG. 4, and the circuit can be confirmed to be a straight line. On the other hand, if the resist and the substrate are peeled off during etching, the metallic luster cannot be confirmed over the resist as in the portion surrounded by the dotted line in FIG. 5, and this portion is a straight line of the circuit as compared with the healthy portion. The sex is inferior. For this reason, in the resist stripping resistance evaluation in this example, the resist pattern (L / S = 35 μm / 5 μm, 10) in the resist pattern as shown in FIG. A, Δ for 16 to 25 locations, x for 26 or more locations.

(Example 2: Examples 80-82)
Metallizing CCL with a copper layer thickness of 12 μm (Nikko Metal Machinus, copper layer side Ra 0.01 μm, tie coat layer metal adhesion amount Ni 1780 μg / dm ² , Cr 360 μg / dm ² ) Pd, Ni-V alloy by the procedure of Example 1 Was deposited and the etching property was evaluated.

(Example 3: Comparative Example 1)
The circuit was formed and evaluated after producing the laminated body which does not surface-treat on an etching surface in the procedure of Example 1. FIG.

(Example 4: Comparative Examples 2-31)
A circuit was prepared and evaluated in the same procedure as in Example 1.

(Example 5: Comparative Example 32)
A rolled copper foil having a thickness of 12 μm was prepared by roughening the adhesive surface with the insulating substrate and applying Ni plating to the etched surface in accordance with JP-A No. 2002-176242. These were etched by the procedure of Example 1.

(Example 6: Comparative Example 33)
Pd and Ni-V alloy were vapor-deposited on the metalizing CCL by the procedure of Example 2, and the etching property was evaluated.
Each measurement result of Examples 1-6 is shown in Tables 1-8.

<Evaluation>
In each of the examples, the etching factor was large and there was no variation, and a circuit having a cross section close to a rectangular shape could be formed. Moreover, there was little resist peeling in the etching process. Here, FIG. 6 shows a depth profile by XPS after sputtering in Example 28. FIG.
Even in Example 72 in which the copper base material was made of metallizing CCL, a circuit with a small footing could be formed. Moreover, there was little resist peeling in the etching process.
In this example, as described above, a laminated body is formed by a so-called casting method in which a polyimide film with an adhesive is laminated on a copper foil by a hot press. It is clear that this also occurs in the same manner for a laminate produced by applying a thermoplastic polyimide to the substrate and overlaying a copper foil thereon and heating and pressing.

Comparative Examples 1 and 32 did not form a noble metal layer of Au, Pt, or Pd, and Comparative Example 33 had a small amount of noble metal attached and a small etching factor.
In Comparative Examples 2 to 7, the noble metal layer (first layer) was formed, but since the layer of the different kind of metal (second layer) was not formed on the surface, the resist was frequently peeled during the etching process.
In Comparative Examples 8-31, since the coating amount of any metal in the coating layer was not appropriate, the etching factor was small or the resist was peeled off in the etching process.

Claims (11)

A copper foil for a printed wiring board comprising a copper foil substrate and a coating layer covering at least a part of the surface of the copper foil substrate,
The coating layer is a first layer made of at least any one of Pt, Pd, and Au, and any one of Ni, Co, Sn, Zn, Cu, and Cr, which are sequentially laminated from the surface of the copper foil base material. Consists of a second layer composed of a metal of a species or more,
In the coating layer, Au is 200 to 2000 μg / dm ² , Pt is 200 to 2000 μg / dm ² , Pd is 120 to 1200 μg / dm ² , Ni is 5 to 1500 μg / dm ² , and Co is 5 to 1500 μg / dm ^2. Sn is present in a coating amount of 5 to 1200 μg / dm ² , Zn is 5 to 1200 μg / dm ² , Cu is 5 to 1500 μg / dm ² , and Cr is 5 to 80 μg / dm ² ,
The coating layer has a thickness of 3 to 25 nm;
The atomic concentration (%) of at least one of Pt, Pd, and Au in the depth direction (x: unit nm) obtained from the depth direction analysis from the surface by XPS is expressed as f (x), Ni, Co , Sn (Zn) Cu (Cr) is the atomic concentration of one or more metals and g (x), and the first maximum values of f (x) and g (x) in the interval [0, 15] are If f (F) and g (G), then G ≦ F, f (F) ≧ 1%, g (G) ≧ 1%
A copper foil for printed wiring boards that meets the requirements.   The copper foil for printed wiring boards according to claim 1, wherein f (F) ≥5% and g (G) ≥5% are satisfied. The copper foil for printed wiring boards according to claim 1 or 2, wherein Au is present in a coating amount of 400 to 1000 µg / dm ² , Pt is 400 to 1050 µg / dm ² , and Pd is 240 to 600 µg / dm ² .   Any one or more of the metals Ni, Co, Sn, Zn, Cu, and Cr are made of Ni alloy, and the Ni alloy is Ni-V, Ni-Sn, Ni-Cu, Ni-Zn, Ni- The copper foil for printed wiring boards according to any one of claims 1 to 3, wherein g (x) is an atomic concentration of Ni in any of Mn and Ni-Cu-Zn. The Ni alloy, Ni-V alloy coating amount is made of 5~1500μg / dm ² of Ni and 5~500μg / dm ² and V, the coating amount of 5~1500μg / dm ² Ni and 5~500μg / dm ² Ni-Sn alloy consisting of Sn, Ni-Cu alloy coating amount containing Ni of 5~1500μg / dm ^2, the amount of the coating consists of Ni and 5~500μg / dm ² of Zn 5~1500μg / dm ² Ni -Zn alloy, coverages Ni-Mn alloy composed of 5~1500μg / dm ² of Ni and 5~500μg / dm ² of Mn, coverages of 5~1000μg / dm ² of Ni and 5~500μg / dm ² The copper foil for printed wiring boards according to claim 4, which is a Ni-Zn-Cu alloy containing Zn.   The copper foil for printed wiring boards in any one of Claims 1-5 in which the rust prevention process layer comprised by the chromium layer or the chromate layer, and / or the silane treatment layer was formed in the outermost layer.   The process of preparing the rolled copper foil or the electrolytic copper foil comprised with the copper foil in any one of Claims 1-6, and the laminated body of this copper foil and a resin substrate by making the coating layer of the said copper foil into an etching surface Forming an electronic circuit comprising: a step of etching the laminated body using a ferric chloride aqueous solution or a cupric chloride aqueous solution, and removing a unnecessary portion of copper to form a copper circuit. Method.   The laminated body of the copper foil and resin substrate in any one of Claims 1-6.   It is a laminated body of a copper layer and a resin substrate, Comprising: The laminated body provided with the coating layer in any one of Claims 1-6 which coat | covers at least one part of the surface of the said copper layer.   The laminate according to claim 8 or 9, wherein the resin substrate is a polyimide substrate.   The printed wiring board which used the laminated body in any one of Claims 8-10 as a material.