TW201622175A - Semiconductor light emitting device, method of manufacturing semiconductor light emitting device, and method of forming negative electrode - Google Patents

Abstract

The present invention addresses the problem of reducing contact resistance between an n-type gallium nitride compound semiconductor layer and a negative electrode. A semiconductor light emitting element (100) relating to the present invention is provided with: a substrate (1); and a nitride semiconductor layer (20), which is formed on one surface (1a) side of the substrate (1), and which sequentially has, from the one surface (1a) side, an n-type gallium nitride compound semiconductor layer (3), a light emitting layer (4), and a p-type gallium nitride compound semiconductor layer (6). Furthermore, the semiconductor light emitting element (100) is provided with: a positive electrode (8) that is formed on the surface (6a) side of the p-type gallium nitride compound semiconductor layer (6); and a negative electrode (9) that is formed on an exposed surface (3a) of the n-type gallium nitride compound semiconductor layer (3). The negative electrode (9) is configured from a solidification structure having Ni and Al as main components.

Description

Semiconductor light-emitting element, method of manufacturing semiconductor light-emitting element, and method of forming negative electrode

The present invention relates to a semiconductor light-emitting device, a method of manufacturing a semiconductor light-emitting device, and a method of forming a negative electrode, and more particularly to a semiconductor light-emitting device and a semiconductor light-emitting device in which a negative electrode is formed on a surface of an n-type gallium nitride-based compound semiconductor layer. A manufacturing method and a method of forming a negative electrode on the surface of the n-type gallium nitride-based compound semiconductor layer.

Heretofore, a gallium nitride-based compound semiconductor light-emitting device (hereinafter referred to as "semiconductor light-emitting device") has been known as a light-emitting device (for example, Document 1 [Japanese Patent Publication No. 3180871] and Document 2 [Japanese Patent Publication No. 3482955] number]).

In the semiconductor light-emitting device described in the documents 1 and 2, an n-type gallium nitride compound semiconductor layer, an active layer, and a p-type gallium nitride compound semiconductor layer are sequentially laminated on an insulating substrate. Further, the semiconductor light-emitting device is further etched to remove portions of the p-type gallium nitride compound semiconductor layer and the active layer. Thereby, the n-type gallium nitride compound semiconductor layer of the semiconductor light emitting element is exposed.

In the semiconductor light-emitting device, a negative electrode (n electrode) that is in contact with the n-type gallium nitride-based compound semiconductor layer is formed on the surface of the exposed n-type gallium nitride compound semiconductor layer.

In Document 1 and Document 2, when a negative electrode is formed, a multilayer film composed of a laminated film is formed by forming a lowermost Ti film, an Al film, and an uppermost Au film, and then 400 ° C or higher and 1200 ° C. The following is tempered. As described in Document 1, by the above tempering, a preferable ohmic contact between the negative electrode and the n-type gallium nitride-based compound semiconductor layer can be obtained.

Further, in the documents 1 and 2, the tempering tempering temperature is 400 ° C or higher, more preferably 500 ° C or higher, and most preferably 600 ° C or higher.

In the above semiconductor light-emitting device, a forward bias is applied between the positive electrode (p electrode) and the negative electrode (the positive electrode is on the high potential side with respect to the negative electrode), and the current flows from the positive electrode to the negative electrode. The holes and electrons are combined in the active layer to emit light of a specified wavelength.

In Document 3 (International Publication No. 2012/039442), an n-electrode (Ti/Al/Ti/Au) and an n-type Al _x Ga _{1 - x} formed on an n-type Al _x Ga _{1 - x} N layer are exposed. The measurement result of the relationship between the contact resistance of the N layer and the heat treatment temperature. For this relationship, Document 3 shows the results of measurement for four cases in which the AlN molar fraction x of the n-type Al _x Ga _{1 - x} N layer is 0, 0.25, 0.4, and 0.6.

Further, in Document 3, when an ultraviolet light-emitting element having an emission wavelength shorter than 365 nm is described, in order to form an n-electrode with a low contact resistance on an n-type Al _x Ga _{1 - x} N layer, it is necessary to be about 600 ° C or higher. Heat treatment. Further, Document 3 discloses that as the emission wavelength is shorter, that is, the AlN molar fraction x is larger, a higher temperature heat treatment is required.

In the above-described semiconductor light-emitting device, when the emission wavelength is set to 300 nm or less, for the n-type gallium nitride-based compound semiconductor layer, an n-type gallium nitride compound semiconductor having a composition ratio of Al higher than 0.6 is required. Floor.

The inventors of the present invention have found that, on the surface exposed, for example, of the n-type Al _0.7 Ga _0.3 N layer, if the Ti film and the laminated film of the Al film and the Au film are to be formed to obtain an ohmic contact, it is necessary to Tempering at a tempering temperature of 750 ° C or higher.

Further, in the measurement results described in Document 3, when the AlN molar fraction x is 0.6, the contact resistance reaches a minimum 値 when the heat treatment temperature is about 950 °C. The minimum enthalpy of this contact resistance is about 1 × 10 ^{- 2} Ω·cm ² .

However, in the semiconductor light-emitting device, if the tempering temperature is too high, the N of the n-type AlGaN layer is removed, and the n-type AlGaN layer is damaged. For this reason, a negative electrode which can be formed at a lower tempering temperature is required in the semiconductor light emitting element. Further, in the semiconductor light-emitting device, a negative electrode having a smaller contact resistance with the n-type gallium nitride-based compound semiconductor layer is required.

An object of the present invention is to provide a semiconductor light-emitting device, a method for producing a semiconductor light-emitting device, and a method for forming a negative electrode, which have a reduced contact resistance between an n-type gallium nitride-based compound semiconductor layer and a negative electrode.

A semiconductor light-emitting device according to an aspect of the present invention includes a substrate and a nitride semiconductor layer. The nitride semiconductor layer is formed on one surface side of the substrate, and has an n-type gallium nitride compound semiconductor layer and a light-emitting layer in this order from the one surface side. And a p-type gallium nitride compound semiconductor layer. Further, the semiconductor light-emitting device of the present invention includes a positive electrode and a negative electrode; the positive electrode is formed on a surface side of the p-type gallium nitride compound semiconductor layer, and the negative electrode is formed on the n-type gallium nitride compound semiconductor layer The surface exposed. The negative electrode is composed of a solidified structure mainly composed of Ni and Al.

In a method of manufacturing a semiconductor light-emitting device according to an aspect of the present invention, the semiconductor light-emitting device includes: a substrate; a nitride semiconductor layer formed on a first surface side of the substrate, and having n-type nitridation sequentially from the first surface side a gallium-based compound semiconductor layer, a light-emitting layer, and a p-type gallium nitride compound semiconductor layer; a positive electrode formed on a surface side of the p-type gallium nitride compound semiconductor layer; and a negative electrode formed on the n-type gallium nitride The exposed surface of the compound semiconductor layer. Forming the negative electrode on the surface of the n-type gallium nitride compound semiconductor layer on the surface of the n-type gallium nitride compound semiconductor layer to form a multilayer film; the multilayer film is alternately laminated An Al film and a Ni film were laminated on the uppermost Ni film, and an Au film was laminated. Then, in the method for producing a semiconductor light-emitting device of the present invention, tempering is performed at a tempering temperature of 640 ° C or higher and 700 ° C or lower to melt the multilayer film, and slow cooling is performed to form the negative electrode. .

A method for forming a negative electrode according to an aspect of the present invention is to form a multilayer film on the surface of an n-type gallium nitride-based compound semiconductor layer, and then tempering at a tempering temperature of 640 ° C or higher and 700 ° C or lower. The multilayer film is melted and slowly cooled to form a negative electrode; the multilayer film is alternately laminated with an Al film and a Ni film, and an Au film is laminated on the uppermost Ni film.

Each of the drawings described in the following embodiments is a schematic drawing, and the ratio of the size and thickness of each constituent element does not necessarily reflect the actual dimensional ratio. Further, the materials, the numbers, and the like described in the embodiments are merely preferred, and are not limited thereto. Further, various changes may be made to the structure as appropriate without departing from the scope of the invention, and such modifications are also included in the scope of the invention.

(Embodiment) Hereinafter, a semiconductor light emitting element 100 of the present embodiment will be described with reference to Figs.

The semiconductor light emitting device 100 includes a substrate 1 and a nitride semiconductor layer 20 formed on one surface (first surface) 1a side of the substrate 1; the nitride semiconductor layer 20 has n-type from one side (first surface) 1a side in order The gallium nitride-based compound semiconductor layer 3, the light-emitting layer 4, and the p-type gallium nitride-based compound semiconductor layer 6. Further, the semiconductor light emitting element 100 has a positive electrode 8 formed on the surface 6a side of the p-type gallium nitride compound semiconductor layer 6, and a negative electrode 9 formed on the n-type gallium nitride compound semiconductor The exposed surface 3a of layer 3. The negative electrode 9 is composed of a solidified structure containing Ni and Al as main components. Therefore, in the semiconductor light emitting element 100, the contact resistance between the n-type gallium nitride compound semiconductor layer 3 and the negative electrode 9 can be lowered. The surface 3a exposed by the n-type gallium nitride-based compound semiconductor layer 3 means that the n-type gallium nitride-based compound semiconductor layer 3 is on the side opposite to the substrate 1 side, and is not connected to the light-emitting layers 4 and p. The surface of the type gallium nitride-based compound semiconductor layer 6 overlaps. More specifically, the surface 3a exposed by the n-type gallium nitride-based compound semiconductor layer 3 means that the nitride semiconductor layer 20 is removed in the depth direction, and the n-type gallium nitride-based compound semiconductor layer 3 is formed. The surface exposed. By solidified structure is meant the resulting crystalline structure as a result of the molten metal becoming a solid. In other words, the solidified structure is a molten solidified structure formed by solidification of a molten metal containing Ni and Al. The solidified structure mainly composed of Ni and Al may also contain impurities such as Au and N.

As shown in Figs. 3 to 5, the solidified structure has a plurality of Ni primary crystals 9a in contact with the surface 3a of the n-type gallium nitride-based compound semiconductor layer 3, and a surface 3a of the n-type gallium nitride-based compound semiconductor layer 3. The connected AlNi eutectic 9b is mixed together. Therefore, in the semiconductor light emitting element 100, the contact resistance of the n-type gallium nitride compound semiconductor layer 3 and the negative electrode 9 can be lowered, and the sheet resistance of the negative electrode 9 can be reduced. Since the Al composition ratio of the AlNi eutectic 9b is about 96 to 97 at%, it is richer in Al-rich Al than the Ni. Regarding the solidified structure constituting the negative electrode 9, it is presumed that the plural Ni primary crystal 9a mainly contributes to lowering the contact resistance, and the AlNi eutectic 9b mainly contributes to lowering the sheet resistance. The Ni primary crystal 9a may contain, for example, Au and N as impurities. The AlNi eutectic 9b may, for example, also contain Au as an impurity.

In the semiconductor light-emitting device 100, by reducing the contact resistance between the n-type gallium nitride-based compound semiconductor layer 3 and the negative electrode 9, the operating voltage of the semiconductor light-emitting device 100 can be lowered, and the luminance of the light can be improved.

The semiconductor light-emitting device 100, preferably the contact between the n-type gallium nitride-based compound semiconductor layer 3 and the negative electrode 9, is in ohmic contact. The ohmic contact refers to a contact in which the current rectifying property is generated in the direction in which the voltage is applied in the contact between the n-type gallium nitride-based compound semiconductor layer 3 and the negative electrode 9. The ohmic contact, preferably the current-voltage characteristic, is substantially linear, and more preferably linear. In addition, the smaller the contact resistance of the ohmic contact system, the better. When the n-type gallium nitride-based compound semiconductor layer 3 is in contact with the negative electrode 9, the current passing through the interface between the n-type gallium nitride-based compound semiconductor layer 3 and the negative electrode 9 is believed to be a thermal electron that crosses the Schottky barrier. The sum of the thermal emission current and the tunneling current through the Schottky barrier. Therefore, it is believed that when the n-type gallium nitride-based compound semiconductor layer 3 is in contact with the negative electrode 9, if the tunneling current is dominant, the ohmic contact is approximately achieved.

The wafer size of the semiconductor light emitting element 100 is set to 400 μm □ (400 μm × 400 μm), but is not limited thereto. The wafer size can be appropriately set within a range of, for example, about 200 μm □ (200 μm × 200 μm) to 1 mm □ (1 mm × 1 mm). Further, the planar shape of the semiconductor light emitting element 100 is not limited to a square shape, and may be, for example, a rectangular shape. When the planar shape of the semiconductor light emitting element 100 is a rectangle, the wafer size of the semiconductor light emitting element 100 can be, for example, 500 μm × 240 μm.

Hereinafter, each constituent element of the semiconductor light emitting element 100 will be described in detail.

The semiconductor light emitting element 100 may be, for example, an ultraviolet light emitting diode having an emission wavelength (emission peak wavelength) in an ultraviolet wavelength range of 210 nm to 280 nm. Thereby, the semiconductor light emitting element 100 can be utilized, for example, in the fields of high-efficiency white illumination, sterilization, medical treatment, and high-speed use of environmentally-contaminated substances. When the semiconductor light-emitting device 100 is an ultraviolet light-emitting element such as an ultraviolet light-emitting diode, it preferably has an emission wavelength in a wavelength range of UV-C. The wavelength range of UV-C is 100 nm to 280 nm according to, for example, the ultraviolet light wavelength of the International Commission on Illumination (CIE).

The first surface 1a of the substrate 1 can be formed of, for example, a sapphire substrate of a (0001) plane. That is, the substrate 1 can be composed of a c-plane sapphire substrate (α-Al ₂ O ₃ substrate). Further, the cut-off angle of the (0001) plane of the sapphire substrate is preferably 0 to 0.4.

The semiconductor light-emitting device 100 is preferably provided with a buffer layer 2 between the substrate 1 and the n-type gallium nitride-based compound semiconductor layer 3 (hereinafter sometimes referred to as "n-type semiconductor layer 3"). In short, the semiconductor light emitting device 100 is preferably formed with a buffer layer 2 on the first surface 1a of the substrate 1, and the n-type semiconductor layer 3 is preferably formed on the buffer layer 2. The buffer layer 2 is composed of an Al _y Ga _{1 - y} N (0≦y≦1) layer. The buffer layer 2 is preferably composed of an AlN layer.

The buffer layer 2 is a film layer provided for the purpose of reducing threading dislocation. When the thickness of the buffer layer 2 is too thin, the effect of reducing the penetration difference is likely to be insufficient; if the thickness is too thick, cracks caused by lattice mismatch may occur, or a plurality of semiconductors may be formed. The warpage of the wafer of the light-emitting element 100 is excessively large. Therefore, the thickness of the buffer layer 2 is preferably set to, for example, about 500 nm to 10 μm, and more preferably set to be in the range of 1 μm to 5 μm. The thickness of the buffer layer 2 is set to 4 μm as an example.

The n-type semiconductor layer 3 is a layer for transporting electrons to the light-emitting layer 4. The n-type semiconductor layer 3 can be composed, for example, of an n-type Al _z Ga _{1 - z} N (0 < z < 1) layer. The composition ratio of the n-type Al _z Ga _{1 - z} N (0<z<1) layer constituting the n-type gallium nitride-based compound semiconductor layer 3 is preferably set to emit ultraviolet rays generated by the light-emitting layer 4 with good efficiency. . For example, the light-emitting layer 4 has a quantum well structure composed of a barrier layer and a quantum well layer. If the composition ratio of Al of the quantum well layer is 0.5, and the composition ratio of Al of the barrier layer is 0.7, then n-type Al _z Ga _{1 -} The composition ratio z of Al of _z N (0 < z < 1) may be the same as the composition ratio of Al of the barrier layer, and is set to 0.7. That is, if the quantum well layer of the light-emitting layer 4 is composed of an Al _0.5 Ga _0.5 N layer and the barrier layer is composed of an Al _0.7 Ga _0.3 N layer, the n-type semiconductor layer 3 may be, for example, an n-type Al _0.7 Ga _0.3 N layer. Composition. The composition ratio of Al of the n-type semiconductor layer 3 is not limited to be the same as or different from the composition ratio of Al of the barrier layer. Further, the n-type semiconductor layer 3 is not limited to a single-layer film, and may be formed of, for example, a multilayer film in which a plurality of n-type AlGaN layers having different composition ratios of Al are laminated. The thickness of the n-type semiconductor layer 3 is set to 2 μm as an example. The Donor impurity of the n-type semiconductor layer 3 is preferably Si, for example. Further, the electron concentration n-type semiconductor layer 3 is set, for example, ^{1 × 10 18 ~ 1 × 10} 19 cm - the range of about ³ to.

The light-emitting layer 4 converts the injected carrier (here, referred to as electrons and positive holes) into a film layer of light. In other words, the light-emitting layer 4 emits a film layer of ultraviolet rays by recombination of the two kinds of carriers (electrons, positive holes) injected. The luminescent layer 4 preferably has a quantum well structure. The quantum well layer in the quantum well structure of the light-emitting layer 4 is preferably composed of _a layer of Al _a Ga _{1 - a} N (0<a<1); the barrier layer in the quantum well structure, preferably by Al _b Ga _{1 - b} N (0 < b ≦ 1, b > a) layer. The light-emitting layer 4 having a quantum well layer composed of an Al _a Ga _{1 - a} N (0 < a < 1) layer can have an emission wavelength of 210 nm to 360 nm by changing the composition ratio a of the Al well layer of the quantum well layer. Within the range, it is set to an arbitrary light-emitting wavelength. For example, if the desired emission wavelength is around 265 nm, the composition ratio a of Al may be set to 0.50. The quantum well layer in the quantum well structure of the light-emitting layer 4 may also be composed of an InAlGaN layer.

The quantum well structure can be a multiple quantum well structure or a single quantum well structure. If the thickness of the quantum well layer is too thick in the light-emitting layer 4, it is presumed that the electrons and the positive holes injected into the quantum well layer may cause spatial separation due to the piezoelectric field caused by the lattice mismatch of the quantum well structure. Causes low luminous efficiency. Further, if the thickness of the quantum well layer is too thin in the light-emitting layer 4, it is presumed that the effect of limiting the carrier is lowered, resulting in a decrease in luminous efficiency. Therefore, the thickness of the quantum well layer is preferably, for example, about 1 nm to 5 nm, and more preferably about 1.3 nm to 3 nm. Further, the thickness of the barrier layer is preferably set to, for example, a range of about 5 nm to 15 nm. In the semiconductor light emitting device 100, as an example, the thickness of the quantum well layer is set to 2 nm, and the thickness of the barrier layer is set to 10 nm. In the semiconductor light-emitting device 100, the light-emitting layer 4 is not limited to a structure having a quantum well structure, and the light-emitting layer 4 may be, for example, an n-type semiconductor layer 3 and a p-type gallium nitride-based compound semiconductor layer 6 (hereinafter, sometimes It is called a "p-type semiconductor layer".) It is a double hetero structure.

The semiconductor light emitting element 100 is preferably provided between the light-emitting layer 4 and the p-type semiconductor layer 6, and includes an electron blocking layer 5.

The electron blocking layer 5 may be appropriately disposed between the light-emitting layer 4 and the p-type semiconductor layer 6 to prevent electrons from being recombined with the positive holes in the electrons injected into the light-emitting layer 4, thereby preventing leakage. To the case of the p-type semiconductor layer 6 side (overflow). The electron blocking layer 5 is composed of a p-type Al _c Ga _{1 - c} N (0 < c < 1) layer. The composition ratio c of Al of the p-type Al _c Ga _{1 - c} N (0 < c < 1) layer can be, for example, 0.9. The composition ratio of the p-type Al _c Ga _{1 - c} N (0<c<1) layer is not particularly limited, but is preferably set such that the band gap energy of the electron blocking layer 5 is higher than p The band gap of the type semiconductor layer 6 or the barrier layer. Further, the positive hole concentration of the electron blocking layer 5 is not particularly limited. Further, the thickness of the electron blocking layer 5 is set to 30 nm as an example. If the thickness of the electron blocking layer 5 is too thin, the effect of suppressing overflow is reduced, and if it is too thick, the electric resistance of the semiconductor light emitting element 100 may become large. Regarding the thickness of the electron blocking layer 5, since the suitable thickness varies depending on the composition ratio c of Al or the positive hole concentration, etc., it cannot be generalized, but it is preferably set in the range of 1 nm to 50 nm, and more preferably It is set in the range of 5 nm to 25 nm.

The p-type semiconductor layer 6 is used to transport a layer of positive holes to the light-emitting layer 4. The p-type semiconductor layer 6 is preferably composed of a p-type Al _d Ga _{1 - d} N (0 < d < 1) layer. The composition ratio of the p-type Al _d Ga _{1 - d} N (0 < d < 1) layer is preferably set so that the ultraviolet rays emitted from the light-emitting layer 4 are absorbed. For example, as described above, the composition ratio of Al in the quantum well layer of the light-emitting layer 4 is 0.5, and the composition ratio b of Al in the barrier layer is 0.7, then p-type Al _d Ga _{1 - d} N (0 < d < 1) The composition ratio d of the Al of the layer may be, for example, the same as the composition ratio b of Al of the barrier layer, and is set to 0.7. That is, if the quantum well layer of the light-emitting layer 4 is composed of an Al _0.5 Ga _0.5 N layer, the p-type semiconductor layer 6 may be formed, for example, of a p-type Al _0.7 Ga _0.3 N layer. The composition ratio of Al of the p-type semiconductor layer 6 is not limited to be the same as or different from the composition ratio b of Al of the barrier layer. As the acceptor impurity of the p-type semiconductor layer 6, it is preferably, for example, Mg.

The positive hole concentration of the p-type semiconductor layer 6 is preferably a higher concentration in the range of the positive hole concentration at which the film quality of the p-type semiconductor layer 6 does not deteriorate. However, in the semiconductor light emitting element 100, since the p-type Al _d Ga _{1 - d} N (0 < d < 1) layer has a positive hole concentration lower than that of the n-type Al _z Ga _{1 - z} N (0 < z ≦ 1) layer If the thickness of the p-type semiconductor layer 6 is too thick, the impedance of the semiconductor light-emitting device 100 becomes excessive. Therefore, the thickness of the p-type semiconductor layer 6 is preferably 200 nm or less, more preferably 100 nm or less. Further, in the semiconductor light emitting device 100, as an example, the thickness of the p-type semiconductor layer 6 is set to 50 nm.

The semiconductor light emitting element 100 can be suitably configured to include the p-type contact layer 7 on the surface 6a of the p-type semiconductor layer 6.

The p-type contact layer 7 is provided in order to reduce the contact resistance with the positive electrode 8 to obtain good ohmic contact with the positive electrode 8. The p-type contact layer 7 is preferably composed of a p-type GaN layer. Positive hole concentration, preferably based layer constituting the p-type contact layer 7 of p-type GaN makes it higher than the concentration of the p-type semiconductor layer 6 of, for example, by making it of 7 × 10 ¹⁷ cm ^{- 3} or so, but may be obtained Good ohmic contact with the positive electrode 8. However, the positive hole concentration of the p-type GaN layer may be appropriately changed within a range of the positive hole concentration at which good ohmic contact with the positive electrode 8 can be obtained. The thickness of the p-type contact layer 7 is set to 200 nm, and is not limited thereto, and may be set to, for example, 50 nm to 300 nm.

As described above, in the semiconductor light emitting element 100, the nitride semiconductor layer 20 may be provided with the buffer layer 2, the n-type semiconductor layer 3, the light-emitting layer 4, the electron blocking layer 5, the p-type semiconductor layer 6, and the p-type contact layer 7. structure. As for the nitride semiconductor layer 20, in addition to the n-type semiconductor layer 3, the light-emitting layer 4, and the p-type semiconductor layer 6, the buffer layer 2, the electron blocking layer 5, and the p-type contact layer 7 may be provided as needed. The nitride semiconductor layer 20 can be formed by an epitaxial growth method. For the epitaxial growth method, for example, a metal organic vapor phase epitaxy (MOVPE) method, a hydride vapor phase epitaxy (HVPE) method, or a molecular beam epitaxy (molecular beam epitaxy: MBE) law, etc. Further, in the nitride semiconductor layer 20, impurities such as H, C, O, Si, and Fe which are inevitably mixed in when the nitride semiconductor layer 20 is formed may be present.

The semiconductor light-emitting device 100 is removed from the surface 20a side of the nitride semiconductor layer 20 by etching to the middle of the n-type semiconductor layer 3. Thereby, the semiconductor light emitting element 100 exposes the surface 3a of the n-type semiconductor layer 3. In short, the semiconductor light emitting element 100 has a mesa structure 22 formed by etching a portion of the nitride semiconductor layer 20. On the semiconductor light-emitting device 100, a positive electrode 8 is formed on the surface 20a of the nitride semiconductor layer 20, and a negative electrode 9 is formed on the surface 3a of the n-type semiconductor layer 3. In the semiconductor light emitting element 100, when the nitride semiconductor layer 20 has the p-type contact layer 7, the surface 7a of the p-type contact layer 7 constitutes the surface 20a of the nitride semiconductor layer 20. The positive electrode 8 is sometimes also referred to as a p-electrode. The negative electrode 9 is sometimes also referred to as an n-electrode.

The semiconductor light-emitting device 100 is preferably formed with an insulating film covering a top surface 22a of the high-rise structure 22 (the surface 20a of the nitride semiconductor layer 20) and a side surface 22c of the high-rise structure 22 and a portion 3a of the surface of the n-type semiconductor layer 3. 10. The insulating film 10 is a film having electrical insulation. As the material of the insulating film 10, for example, SiO ₂ or the like can be used. The material of the insulating film 10 is not limited to SiO ₂ as long as it is electrically insulating, and for example, Si ₃ N ₄ , Al ₂ O ₃ , TiO ₂ , Ta ₂ O ₅ , ZrO ₂ , Y may be used. ₂ O ₃ , CeO ₂ , Nb ₂ O ₅ and the like. The thickness of the insulating film 10 is set to 1 μm as an example. The insulating film 10 can be formed by, for example, a CVD (chemical vapor deposition) method, a vapor deposition method, a sputtering method, or the like. The insulating film 10 is not limited to a single layer film, and may be composed of a multilayer film. The multilayer film provided as the insulating film 10 may be composed of a multilayer film of an electric conductor for reflecting light (ultraviolet rays) emitted from the light-emitting layer 4. The illustration of the insulating film 10 of Fig. 1 is omitted in Fig. 2.

As described above, the semiconductor light emitting element 100 has the nitride semiconductor layer 20 formed on the first surface 1a side of the substrate 1. The semiconductor light-emitting device 100 is preferably configured as a light-receiving surface on a surface (second surface) 1b opposite to one surface (first surface) 1a of the substrate 1.

The positive electrode 8 is preferably electrically connected to the p-type semiconductor layer 6 via the p-type contact layer 7. The formation of the positive electrode 8 is formed by forming a laminated film of a Ni film and an Au film on the surface 7a of the p-type contact layer 7 as an example, and then performing tempering treatment. As a laminated film, as an example, the thickness of the Ni film is set to 30 nm, and the thickness of the Au film is set to 200 nm.

The positive electrode 8 is a contact electrode formed on the surface 7a of the p-type contact layer 7 in order to obtain ohmic contact with the p-type contact layer 7. The semiconductor light emitting device 100 preferably includes a first pad electrode 18 on the positive electrode 8. The first flat electrode 18 is an electrode for connection to the outside. In other words, the first flat electrode 18 is used for the assembled electrode. More specifically, when the semiconductor light emitting element 100 is assembled to a package or a wiring board or the like, the first flat electrode 18 is bonded to a conductive electric wire and a conductive bump or the like. The first flat electrode 18 can be composed of, for example, an Al film and a laminated film of a Ti film and an Au film. In the first flat electrode 18, the thicknesses of the Al film, the Ti film, and the Au film are set to 100 nm, 250 nm, and 1250 nm, respectively.

The negative electrode 9 is electrically connected to the n-type semiconductor layer 3. As an example, the negative electrode 9 is formed by forming a multilayer film 90 on the surface 3a of the n-type semiconductor layer 3, performing tempering treatment, and then performing slow cooling. The multilayer film 90 is formed. An Al film 91 and a Ni film 92 as shown in FIG. 7 are laminated, and an Au film 93 is laminated on the uppermost Ni film 92. In the multilayer film 90, the thicknesses of the Al film 91, the Ni film 92, and the Au film 93 were set to 200 nm, 30 nm, and 200 nm, respectively.

The negative electrode 9 is a contact electrode formed on the surface 3a of the n-type gallium nitride compound semiconductor layer 3 in order to obtain ohmic contact with the n-type gallium nitride compound semiconductor layer 3. The semiconductor light emitting device 100 preferably has a second pad electrode 19 on the negative electrode 9. The second flat electrode 19 is an electrode for connection to the outside. In other words, the second flat electrode 19 is used for the assembled electrode. More specifically, the second flat head electrode 19 is bonded to a conductive electric wire, a conductive bump, or the like when the semiconductor light emitting element 100 is assembled to a package or a wiring board. The second flat electrode 19 can be composed of, for example, an Al film 191 shown in FIG. 6 and a laminated film of the Ti film 192 and the Au film 193. In the second flat electrode 19, the thicknesses of the Al film 191, the Ti film 192, and the Au film 193 are set to 100 nm, 250 nm, and 1250 nm, respectively.

The negative electrode 9 will be further described after explaining the method of manufacturing the semiconductor light emitting device 100.

The method of manufacturing the semiconductor light emitting element 100 will be described with reference to FIGS. 8A, 8B, 8C, 9A, 9B, 9C, 10A, 10B, and 10C.

The semiconductor light emitting device 100 includes a substrate 1 and a nitride semiconductor layer 20 formed on the first surface 1a side of the substrate 1; the nitride semiconductor layer 20 has an n-type gallium nitride compound semiconductor in this order from the first surface 1a side. Layer 3, light-emitting layer 4, and p-type gallium nitride-based compound semiconductor layer 6. Further, the semiconductor light emitting element 100 has a positive electrode 8 formed on the surface 6a side of the p-type gallium nitride compound semiconductor layer 6, and a negative electrode 9 formed on the n-type gallium nitride compound semiconductor The exposed surface 3a of layer 3.

When the negative electrode 9 is formed on the surface 3a of the n-type gallium nitride-based compound semiconductor layer 3, a multilayer film 90 is formed on the surface 3a of the n-type gallium nitride-based compound semiconductor layer 3; the multilayer film 90 is an interactive layer The Al film 91 and the Ni film 92 are stacked, and the Au film 93 is laminated on the uppermost Ni film 92. Next, in the method of manufacturing the semiconductor light-emitting device 100, the tempering treatment is performed at a tempering temperature of 640 ° C or higher and 700 ° C or lower to melt the multilayer film 90, and then slow-cooling to form the negative electrode 9 . Thereby, in the method of manufacturing the semiconductor light emitting element 100, the negative electrode 9 composed of a solidified structure containing Ni and Al as main components can be formed. Therefore, the semiconductor light-emitting device 100 capable of reducing the contact resistance between the n-type gallium nitride-based compound semiconductor layer 3 and the negative electrode 9 can be manufactured by the method of manufacturing the semiconductor light-emitting device 100. In the multilayer film 90, the number of times of overlapping of the laminated structure of the Al film 91 and the Ni film 92 may be any value as long as it is 2 or more.

In the method of manufacturing the semiconductor light-emitting device 100, the cooling rate at the time of slow cooling is preferably 20 to 60 ° C / min. Thereby, in the method of manufacturing the semiconductor light-emitting device 100, a solidified structure in which the surface of the n-type gallium nitride-based compound semiconductor layer 3 is in contact with each other and a plurality of Ni primary crystals 9a and AlNi eutectic 9b are mixed together can be formed. In the method of manufacturing the semiconductor light-emitting device 100, if the cooling rate is slower than 20 ° C/min, the size of each of the Ni primary crystals 9a becomes small, resulting in each of the Ni primary crystal 9a and the n-type gallium nitride compound semiconductor layer 3. The contact area of the surface 3a is reduced. Therefore, in the method of manufacturing the semiconductor light-emitting device 100, the cooling rate at the time of slow cooling is preferably 20 ° C / min or more from the viewpoint of reducing the contact resistance. In the method of manufacturing the semiconductor light-emitting device 100, if the cooling rate is faster than 60 ° C / min, it is difficult to form a solidified structure in which a plurality of Ni primary crystals 9 a and AlNi eutectic 9 b are mixed, resulting in amorphization tends to occur. Therefore, in the method of manufacturing the semiconductor light-emitting device 100, the cooling rate at the time of slow cooling is preferably 20 ° C / min or more and 60 ° C / min or less from the viewpoint of reducing the contact resistance.

Hereinafter, a method of manufacturing the semiconductor light emitting element 100 will be described in detail.

(1) Preparation of wafer The wafer is a disk-shaped substrate. When the substrate 1 in the semiconductor light emitting device 100 is a sapphire substrate, a sapphire wafer can be used as the wafer. The wafer is preferably formed with an orientation flat (OF). The thickness of the wafer is preferably, for example, several hundred μm to several mm, more preferably 200 μm to 1 mm. The diameter of the wafer is preferably, for example, 50.8 mm to 150 mm.

The wafer is preferably based on, or based on, specifications of the Japan Electronics Industry Promotion Association (JEIDA) or SEMI (Semiconductor Equipment and Materials International). The sapphire wafer is preferably based on, or based on, a sapphire substrate specification for a compound semiconductor epitaxial wafer standardized by SEMI M65-0306. Further, the sapphire wafer has a first surface corresponding to the first surface 1a of the substrate 1. The first surface of the sapphire wafer may be, for example, a c-plane, an m-plane, an a-plane, an R-plane, etc., and is preferably a (0001) plane formed by the c-plane. Further, the first side of the sapphire wafer preferably has a cut angle of from 0 to 0.3° from the (0001) plane. More specifically, the first side of the sapphire wafer, the cut angle from the (0001) plane is preferably 0 to 0.4°, more preferably 0.1 to 0.31°, and more preferably 0.21 to 0.31°. Ideal.

(2) Process for laminating the nitride semiconductor layer 20 on the first surface of the wafer In this process, the nitride semiconductor layer 20 is formed by an epitaxial growth method (see Fig. 8A).

The nitride semiconductor layer 20 is a laminated film of the n-type gallium nitride-based compound semiconductor layer 3, the light-emitting layer 4, and the p-type gallium nitride-based compound semiconductor layer 6. The nitride semiconductor layer 20 is an epitaxial layer of a multilayer structure. The nitride semiconductor layer 20 is preferably provided with a buffer layer 2, an electron blocking layer 5, and a p-type, in addition to the n-type gallium nitride-based compound semiconductor layer 3, the light-emitting layer 4, and the p-type gallium nitride-based compound semiconductor layer 6, for example. Contact layer 7. The buffer layer 2, the electron blocking layer 5, and the p-type contact layer 7 may be provided as appropriate.

In this process, in the epitaxial growth method of the nitride semiconductor layer 20, the MOVPE method is employed. In this process, in the case of the MOVPE method, a reduced pressure MOVPE method is preferably employed.

As the raw material gas of Al, trimethylaluminum (TMAl) is preferably used. Further, in the case of the material gas of Ga, trimethylgallium (TMGa) is preferably used. In the case of the raw material gas of N, NH _{3 is} preferably used. For the source gas of Si to which an impurity of n-type conductivity is imparted, tetraethyl hydride (TESi; tetraethylsilane) is preferably used. As the raw material gas of Mg which contributes to the p-type conductivity impurity, bis(cyclopentadienyl)magnesium (Cp ₂ Mg; Bis(cyclopentadienyl)magnesium) is preferably used. For the carrier gas of each of the material gases, for example, H ₂ gas is preferably used.

The raw material gases are not particularly limited. For example, the raw material gas of Ga may be a raw material gas of triethylgallium (TEGa) or N, or a hydrazine derivative or a raw material gas of Si may be used. SiH ₄ ).

Regarding the growth conditions of the nitride semiconductor layer 20, the substrate temperature, the V/III ratio, the supply amount of each source gas, the growth pressure, and the like may be set as appropriate.

The epitaxial growth method of the nitride semiconductor layer 20 is not limited to the MOVPE method, and examples thereof include an MBE method and an HVPE method.

(3) A tempering process for activating the p-type impurity. The process is performed by maintaining a specified tempering time at a specified tempering temperature in a tempering furnace of the tempering device to cause the electron blocking layer 5 A process for activating p-type impurities of the p-type gallium nitride-based compound semiconductor layer 6 and the p-type contact layer 7. Regarding the tempering condition, although the tempering temperature is set to 750 ° C and the tempering time is set to 10 minutes, these numbers are only an example and are not particularly limited. As the tempering device, for example, a Lamp Anneal device, an electric furnace tempering device, or the like can be employed.

(4) The process of forming the high-rise structure 22 is performed in the nitride semiconductor layer 20, corresponding to the top surface 22a of the high-rise structure 22 (the surface 20a of the nitride semiconductor layer 20), using photolithography technology. A first photoresist layer is formed. In this process, by using the first photoresist layer as a mask, a portion of the nitride semiconductor layer 20 is etched from the surface 20a side to the n-type gallium nitride-based compound semiconductor layer 3, thereby A high stage structure 22 is formed (please refer to FIG. 8B). Thereafter, the first photoresist layer is removed by this process. The etching of the nitride semiconductor layer 20 is preferably performed using, for example, a dry etching apparatus. In the case of a dry etching apparatus, for example, an inductively coupled plasma etching system is preferred.

(5) Process for Forming Insulating Film 10 This process is formed as an insulating film on the entire surface of the first side of the wafer by, for example, plasma-enhanced chemical vapor deposition (PECVD). 10 basic SiO ₂ film. In this process, the insulating film 10 is formed by patterning the SiO ₂ film, whereby the positive electrode 8 which will respectively form the nitride semiconductor layer 20 is overlapped on the first surface side of the wafer and the SiO ₂ film. And a portion of the predetermined area of the negative electrode 9, an opening is created. Further, the method of forming the SiO ₂ film is not limited to the PECVD method, and may be, for example, another CVD method. The patterning of the SiO ₂ film is carried out using photolithography and etching techniques.

(6) Process for Forming Negative Electrode 9 First, the first step is performed on the first surface side of the wafer to form a second photoresist layer to make only a predetermined formation region of the negative electrode 9 (that is, The portion of the surface 3a exposed by the n-type gallium nitride-based compound semiconductor layer 3 is patterned to be exposed. Then, the second step is performed in this process, and a multilayer film 90 is formed on the surface 3a of the n-type gallium nitride-based compound semiconductor layer 3 by vapor deposition; the multilayer film 90 is formed from the side close to the surface 3a, in order The Al film 91, the Ni film 92, the Al film 91, the Ni film 92, and the Au film 93 shown in Fig. 7 are laminated. The vapor deposition method is preferably an electron beam evaporation method. The film formation method of the laminated film is not limited to the vapor deposition method, and may be, for example, a sputtering method. Then, in the third step of the process, the second photoresist layer and the unnecessary film on the second photoresist layer are removed by performing lift-off. Further, in the fourth step of the process, the tempering treatment is performed and the cooling is performed to form the negative electrode 9 (please refer to FIG. 8C). The tempering treatment is preferably RTA (Rapid Thermal Annealing) under a N ₂ gas atmosphere.

The conditions for the RTA treatment are, for example, a tempering temperature of 650 ° C and a tempering time of 1 minute. The tempering temperature is preferably a temperature higher than a eutectic point (640 ° C) of AlNi, preferably a temperature lower than 700 ° C. When the tempering temperature is higher than 700 ° C, N is easily detached from the n-type gallium nitride-based compound semiconductor layer 3, and the n-type gallium nitride-based compound semiconductor layer 3 may be damaged. The tempering temperature may be appropriately changed depending on the composition ratio of Al of the n-type gallium nitride-based compound semiconductor layer 3. The tempering time may be set within a range of, for example, about 30 seconds to 3 minutes. The so-called eutectic point refers to the temperature at which the liquid eutectic mixture is solidified when it is made into a solid phase of the same composition.

The so-called slow cooling means slow cooling. The cooling rate at the time of slow cooling may be, for example, 30 ° C / min. The cooling rate is not limited to 30 ° C / min, and may be appropriately set within a range of, for example, 20 to 60 ° C / min.

In this process, it is preferred to perform tempering treatment by an infrared tempering device. The infrared tempering apparatus includes an infrared lamp tube as a heating source, a quartz furnace for placing a workpiece, and a vacuum pump as a pressure adjusting device for adjusting the pressure in the furnace. The infrared tempering device preferably uses a halogen lamp as a halogen lamp tempering device for the infrared lamp. Here, the workpiece is a wafer-like structure formed with a nitride semiconductor layer 20 and a multilayer film 90; the nitride semiconductor layer 20 is attached to the wafer having a high-rise structure 22, which is based on n-type nitridation The surface 3a of the gallium-based compound semiconductor layer 3 is exposed. When the halogen tempering device is slowly cooled, the cooling rate can be changed by adjusting the flow rate of the N ₂ gas flowing into the furnace.

The inventive team of the present invention believes that the speculative mechanism for forming the negative electrode 9 by performing the tempering treatment and slow cooling of the process is as follows. Further, the method of manufacturing the semiconductor light-emitting device 100 is not included in the scope of the present invention, even if it is different from the estimation mechanism.

In this process, the multilayer film 90 is melted by tempering treatment; when the slow cooling is performed, first, the Ni primary crystal 9a is precipitated; thereafter, the eutectic structure of AlNi is solidified (formation of the AlNi eutectic 9b). Thereby, in this process, the negative electrode 9 composed of a solidified structure mainly composed of Ni and Al can be formed. More specifically, in this process, a negative electrode 9 composed of a solidified structure of a plurality of Ni primary crystals 9a and AlNi eutectic 9b can be formed. Here, the Ni primary crystal 9a contains Au as an impurity. More specifically, the Ni primary crystal 9a contains a trace amount (ppm grade) of Au as an impurity, but 99% or more is Ni. Since the Ni primary crystal 9a does not grow in an isotropic manner (in other words, the growth rate varies depending on the direction), it grows into a dendritic shape. Further, the AlNi eutectic 9b impurity contains Au as an impurity. It is presumed that since the negative electrode 9 is tempered, the N dissociated from the n-type gallium nitride-based compound semiconductor layer 3 is solid-dissolved to Ni to form an impurity level, so that the n-type due to the tunneling effect can be reduced. Contact resistance of the gallium nitride-based compound semiconductor layer 3. In other words, it is estimated that a part of nitrogen is extracted from the n-type gallium nitride-based compound semiconductor layer 3 by the negative electrode 9, and ohmic contact between the n-type gallium nitride-based compound semiconductor layer 3 and the negative electrode 9 is achieved. Therefore, the Ni primary crystal 9a contains Au as an impurity.

In the tempering treatment, in the multilayer film 90, it is presumed that the Al film 91 is first melted; thereafter, the Ni film 92 between the Al films 91 is melted; thereafter, the Ni film 92 between the Al film 91 and the Au film 93 is melted; thereafter, Au The film 93 is melted. Therefore, the Au film 93 has a function as a protective film, and it is possible to suppress oxidation of Ni due to oxygen in the atmosphere before the tempering treatment, and also to suppress Ni oxidation caused by residual oxygen in the furnace. Thereby, the method of manufacturing the semiconductor light emitting element 100 can prevent high melting point due to oxidation of Ni. In short, in the method of manufacturing the semiconductor light-emitting device 100, it is possible to lower the tempering temperature in the process of forming the negative electrode 9.

(7) Process for Forming Positive Electrode 8 In this process, the positive electrode 8 is formed on the surface 6a side of the p-type gallium nitride-based compound semiconductor layer 6 (see Fig. 9A).

More specifically, in this process, first, a third photoresist layer is formed which is a portion of the surface 7a of the p-type contact layer 7 which is a predetermined region of the positive electrode 8 on the first surface side of the wafer. ) The way of exposure is patterned. Then, in this process, a laminated film composed of, for example, a Ni film having a thickness of 30 nm and an Au film having a thickness of 200 nm is formed by electron beam evaporation, and the third photoresist layer and the third layer are removed by performing the lift-off. An unwanted film on the photoresist layer. Further, in this process, the RTA treatment under the N ₂ gas atmosphere is performed so that the positive electrode 8 and the p-type contact layer 7 are brought into contact with each other to become an ohmic contact. The conditions for the RTA treatment are, for example, a tempering temperature of 500 ° C and a tempering time of 15 minutes.

(8) Process for forming the first flat electrode 18 and the second flat electrode 19 In this process, the first flat electrode 18 is formed on the positive electrode 8 and the negative electrode 9 by photolithography and thin film formation techniques, respectively. The second flat electrode 19 (please refer to FIG. 9B). As the film forming technique, for example, a vapor deposition method or the like can be employed. The vapor deposition method is preferably an electron beam evaporation method. The first flat electrode 18 and the second flat electrode 19 are electrically connected to the positive electrode 8 and the negative electrode 9, respectively. The first flat electrode 18 is preferably formed to cover the positive electrode 8. The second flat electrode 19 is preferably formed to cover the negative electrode 9.

(9) Process for forming a dicing groove In this process, a grooving is formed from the surface 20a side of the nitride semiconductor layer 20 of the wafer to the middle of the thickness direction of the wafer. In this process, it is preferred to form a grooving by electrical abrading processing using a laser processing machine. The so-called electrical burning cutting process refers to laser processing under the irradiation conditions that cause electrical burning and cutting.

(10) Process for Grinding Wafers In this process, the wafer thickness is polished from the side of the second surface (the surface opposite to the first surface) to a thickness corresponding to the specified thickness of the sapphire substrate 1 ( Please refer to FIG. 9C). In the polishing of the wafer, it is preferred to carry out the grinding process and the lapping process in sequence.

In the method of manufacturing the semiconductor light emitting device 100, the wafer on which the plurality of semiconductor light emitting elements 100 are formed is completed by the end of the process. In short, in the method of manufacturing the semiconductor light-emitting device 100, the processes of the above-described (1) to (10) are sequentially performed to complete the wafer on which the plurality of semiconductor light-emitting devices 100 are formed.

(11) A process of dividing a wafer in which a plurality of semiconductor light-emitting elements 100 are formed into individual semiconductor light-emitting elements 100. This process is a dicing process in which a wafer on which a plurality of semiconductor light-emitting elements 100 are formed is cut by a cutter or the like. Thereby, it is divided into individual semiconductor light emitting elements 100.

According to the method of manufacturing the semiconductor light-emitting device 100 of the present embodiment described above, the semiconductor light-emitting device 100 capable of reducing the contact resistance between the n-type gallium nitride-based compound semiconductor layer 3 and the negative electrode 9 can be manufactured.

In other words, when the high-rise structure 22 is formed by etching, the surface 3a of the n-type gallium nitride-based compound semiconductor layer 3 is rough as shown in FIG. 10A. In other words, the surface 3a of the n-type gallium nitride-based compound semiconductor layer 3 has a disordered uneven structure. Therefore, when the multilayer film 90 is formed only by vapor deposition or the like, the multilayer film 90 is in physical contact with the surface 3a of the n-type gallium nitride-based compound semiconductor layer 3, and as shown in FIG. 10B, sufficient contact cannot be obtained. Therefore, it is estimated that it is difficult to reduce the contact resistance between the negative electrode 9 and the n-type gallium nitride-based compound semiconductor layer 3 by tempering at a temperature at which the multilayer film 90 is not melted. However, in the method of manufacturing the semiconductor light-emitting device 100 of the present embodiment, after the multilayer film 90 is melted, the Ni primary crystal 9a is precipitated and the AlNi eutectic is solidified, so that the negative electrode 9 and the n-type gallium nitride can be made. The surface 3a of the compound semiconductor layer 3 can be contacted without any gap. As a result, in the method of manufacturing the semiconductor light-emitting device 100 of the present embodiment, since Ni easily reacts with N in the n-type gallium nitride-based compound semiconductor layer 3, it is possible to reduce the contact resistance.

Further, since Ni has a higher work function than Ti, if it is only in contact with the n-type gallium nitride-based compound semiconductor layer 3, the electric resistance is higher than that of Al. However, in the method of manufacturing the semiconductor light-emitting device 100 of the present embodiment, since the multilayer film 90 is melted, Ni reacts with N in the n-type gallium nitride-based compound semiconductor layer 3 to form a solid solution of N. Therefore, the contact resistance can be reduced. The ability of Ni to dissolve N is higher than that of Ti or Al.

Further, the AlNi eutectic has a eutectic point lower by about 20 ° C than the AlTi eutectic. Therefore, when the composition ratio of Al does not match the Al composition ratio in the eutectic composition, the amount of change in the melting point is small. Therefore, according to the method of manufacturing the semiconductor light-emitting device 100 of the present embodiment, it is possible to suppress the electrical characteristics of the negative electrode 9 of the semiconductor light-emitting device 100 from being inconsistent with each batch, and to reduce the cost.

Furthermore, the negative electrode 9 having a structure in which the Ni primary crystal 9a contained in the Ni primary crystal 9a contains the Ni primary crystal 9aa satisfying the following conditions (refer to FIG. 3) can be realized by the method of manufacturing the semiconductor light-emitting device 100. .

Condition: the width W1 of the continuous region (please refer to FIG. 3) is larger than the thickness H1 of the negative electrode 9 (please refer to FIG. 3); the continuous region is formed to cover the entire length of the negative electrode 9 in the thickness direction, and is at the negative electrode One of the in-plane directions is in contact with the n-type gallium nitride-based compound semiconductor layer 3.

As described above, the negative electrode 9 in the semiconductor light-emitting device 100 of the present embodiment is composed of a solidified structure mainly composed of Ni and Al. Thereby, the semiconductor light-emitting device 100 can achieve a reduction in contact resistance between the n-type gallium nitride-based compound semiconductor layer 3 and the negative electrode 9. The contact resistance is, for example, a number measured by a Transmission Line Model (TLM) method.

As described above, the solidified structure has a plurality of Ni primary crystals 9a which are in contact with the surface 3a of the n-type gallium nitride-based compound semiconductor layer 3, and AlNi which is in contact with the surface 3a of the n-type gallium nitride-based compound semiconductor layer 3. The eutectic 9b is mixed together. The Ni primary crystal 9a preferably contains Au and N as impurities. The reason why the Ni primary crystal 9a contains N as an impurity is as follows: It is presumed that the reaction mechanism is that Ni primary crystal 9a is solid-solved by extracting a part of N from the n-type gallium nitride-based compound semiconductor layer 3 during crystal growth. Further, the semiconductor light emitting element 100 is included in the scope of the present invention even if it is different from the estimated mechanism.

The plurality of Ni primary crystals 9a in the negative electrode 9 of the semiconductor light-emitting device 100 preferably contain Ni primary crystals 9aa satisfying the following conditions: the temperature of the continuous region is greater than the thickness of the negative electrode 9; The entire length in the thickness direction of the negative electrode 9 is formed, and is in contact with the n-type gallium nitride-based compound semiconductor layer 3 in the in-plane direction of the negative electrode 9. Thereby, the semiconductor light-emitting device 100 can have a contact resistance of the surface 3a of the Ni primary crystal 9a and the n-type gallium nitride-based compound semiconductor layer 3, and further reduce.

The Ni primary crystal 9a is a dendritic crystal, and the cross-sectional shape orthogonal to the thickness direction of the n-type gallium nitride-based compound semiconductor layer 3 is preferably dendritic. Thereby, in the semiconductor light emitting element 100, the contact area between the Ni primary crystal 9a and the surface 3a of the n-type gallium nitride compound semiconductor layer 3 can be increased, and the contact resistance can be further reduced. Moreover, the cross-sectional shape of the Ni primary crystal 9a orthogonal to the thickness direction of the n-type gallium nitride-based compound semiconductor layer 3 is substantially the same as the dendritic shape shown in FIG.

In the semiconductor light emitting device 100, the n-type gallium nitride compound semiconductor layer 3 is preferably an n-type AlGaN layer. Thereby, the semiconductor light emitting element 100 can constitute, for example, an ultraviolet light emitting diode. The semiconductor light-emitting device 100 of the present embodiment may be a deep ultraviolet light-emitting diode having a deep ultraviolet light emission wavelength in terms of the ultraviolet light-emitting diode.

In other words, in the measurement results described in Document 3, when the AlN molar fraction x is 0.6, the contact resistance reaches a minimum 热处理 at a heat treatment temperature of about 950 ° C; the lowest 接触 of the contact resistance is 1 × 10 ^{- 2} Ω・cm ² or so. On the other hand, in the semiconductor light-emitting device 100, the contact resistance of the n-type gallium nitride-based compound semiconductor layer 3 composed of the n-type Al _0.7 Ga _0.3 N layer having a higher Al composition ratio and the negative electrode 9 can be 5 × 10 ^{- 3} Ωcm ² or so. In the semiconductor light-emitting device 100, the contact resistance tends to increase as the Al composition ratio increases. Therefore, the negative electrode 9 is not limited to the n-type AlGaN layer having a low composition ratio of Al as long as it can obtain an ohmic contact to the n-type AlGaN layer having a higher Al composition ratio, and is applicable to Al _x1 Ga _y1 In _{1 - x1 -} The composition of _y1 N (0≦x1, 0≦y1, x1+y1≦1) represents the n-type semiconductor layer 3.

The semiconductor light emitting element 100 is not limited to the ultraviolet light emitting diode, and may be an ultraviolet laser diode.

(Aspect of the present invention) The semiconductor light-emitting device (100) according to the first aspect of the present invention includes a substrate (1) and a nitride semiconductor layer (20) formed on the substrate (1). One side (1a) side, and has an n-type gallium nitride-based compound semiconductor layer (3), a light-emitting layer (4), and a p-type gallium nitride-based compound semiconductor layer (6) in this order (1a) side; a positive electrode (8) formed on a surface (6a) side of the p-type gallium nitride compound semiconductor layer (6); and a negative electrode (9) formed on the n-type gallium nitride compound semiconductor layer (3) The exposed surface (3a); the negative electrode (9) is composed of a solidified structure mainly composed of Ni and Al.

A semiconductor light-emitting device (100) according to a second aspect of the present invention is the first aspect, wherein the solidified structure has a plurality of surfaces which are in contact with the surface (3a) of the n-type gallium nitride-based compound semiconductor layer (3). The Ni primary crystal (9a) and the AlNi eutectic (9b) which is in contact with the surface (3a) of the n-type gallium nitride compound semiconductor layer (3) are mixed.

A semiconductor light-emitting device (100) according to a third aspect of the present invention is the second aspect, wherein the plurality of Ni primary crystals (9a) include Ni primary crystals (9aa) satisfying the following conditions; Condition: continuous region The twist (W1) is larger than the thickness (H1) of the negative electrode (9); the continuous region is formed to cover the entire length of the negative electrode (9) in the thickness direction, and is in the plane of one of the negative electrodes (9) The direction is in contact with the n-type gallium nitride-based compound semiconductor layer (3).

A semiconductor light-emitting device (100) according to a fourth aspect of the present invention is characterized in that, in the second or third aspect, the Ni primary crystal (9a) is dendritic; and the n-type gallium nitride compound is orthogonal to the n-type gallium nitride compound. The cross-sectional shape of the semiconductor layer (3) in the thickness direction is a dendritic shape.

In the semiconductor light-emitting device (100) according to the fifth aspect of the present invention, in any one of the first to fourth aspects, the n-type gallium nitride-based compound semiconductor layer (3) is an n-type AlGaN layer.

In a semiconductor light-emitting device (100) according to a sixth aspect of the present invention, in any one of the first to fifth aspects, the negative electrode (9) is formed by pairing the n-type nitride The multilayer film (90) on the surface (3a) of the gallium-based compound semiconductor layer (3) is tempered at a tempering temperature of 640 ° C or higher and 700 ° C or lower, melted, and slowly cooled to form; The film (90) is alternately laminated with an Al film (91) and a Ni film (92), and an Au film is laminated on the uppermost Ni film (92).

In the semiconductor light-emitting device (100) according to the seventh aspect of the present invention, in the sixth aspect, the cooling rate at the time of the slow cooling is set to 20 to 60 ° C / min.

In the eighth or seventh aspect of the semiconductor light-emitting device (100) according to the eighth aspect of the present invention, the tempering time of the tempering treatment is 30 seconds to 3 minutes.

The semiconductor light-emitting device (100) according to the first to eighth aspects of the present invention has an effect of reducing the contact resistance between the n-type gallium nitride-based compound semiconductor layer (3) and the negative electrode (9).

A method of manufacturing a semiconductor light-emitting device (100) according to a ninth aspect of the present invention, comprising: a substrate (1); and a nitride semiconductor layer (20) formed on one side (1a) side of the substrate (1) The n-type gallium nitride-based compound semiconductor layer (3), the light-emitting layer (4), and the p-type gallium nitride compound semiconductor layer (6) are sequentially provided from the one side (1a) side, and the positive electrode (8) is formed. a surface (6a) side of the p-type gallium nitride compound semiconductor layer (6); and a negative electrode (9) formed on the exposed surface (3a) of the n-type gallium nitride compound semiconductor layer (3) The manufacturing method includes the step of forming the negative electrode (9) on the surface (3a) of the n-type gallium nitride compound semiconductor layer (3) in the n-type gallium nitride compound semiconductor layer (3) forming a multilayer film (90) on the surface (3a), and then tempering at a tempering temperature of 640 ° C or higher and 700 ° C or lower to melt the multilayer film (90) by Slow cooling to form the negative electrode (9); the multilayer film (90) is an interactive layer An Al film (91) and a Ni film (92) are stacked, and an Au film is laminated on the uppermost Ni film (92).

A method of manufacturing a semiconductor light-emitting device (100) according to a tenth aspect of the present invention is the cooling rate at the time of the slow cooling in the ninth aspect, and is 20 to 60 ° C / min.

A method of manufacturing the semiconductor light-emitting device (100) according to the eleventh aspect of the present invention is the tempering time of the tempering treatment in the ninth or tenth aspect, wherein the tempering time is 30 seconds to 3 minutes.

According to the method for fabricating the semiconductor light-emitting device (100) according to the ninth to eleventh aspects of the present invention, semiconductor light emission capable of reducing the contact resistance between the n-type gallium nitride compound semiconductor layer (3) and the negative electrode (9) can be produced. Element (100).

A method of forming the negative electrode (9) according to the twelfth aspect of the present invention is to form a multilayer film (90) on the surface (3a) of the n-type gallium nitride-based compound semiconductor layer (3), and thereafter, at 640 ° C or higher. And tempering at a tempering temperature of 700 ° C or less to melt the multilayer film (90), and by slow cooling to form the negative electrode (9); the multilayer film (90) is alternately laminated The Al film (91) and the Ni film (92), and the uppermost Ni film (92), are laminated with an Au film (93).

The method for forming the negative electrode (9) according to the thirteenth aspect of the present invention is the cooling rate at the time of the slow cooling in the twelfth aspect, and is set to 20 to 60 ° C / min.

The method for forming the negative electrode (9) according to the fourteenth aspect of the present invention is the tempering time of the tempering treatment in the 12th or 13th aspect, which is 30 seconds to 3 minutes.

The method for forming the negative electrode (9) of the twelfth to fourteenth aspects of the present invention has an effect of reducing the contact resistance between the n-type gallium nitride-based compound semiconductor layer (3) and the negative electrode (9).

1‧‧‧Substrate
1a‧‧‧1st
1b‧‧‧2nd
2‧‧‧buffer layer
3‧‧‧n type gallium nitride compound semiconductor layer
3a‧‧‧ surface
4‧‧‧Lighting layer
5‧‧‧Electronic barrier
6‧‧‧p-type gallium nitride compound semiconductor layer
6a‧‧‧ surface
7‧‧‧p-type contact layer
7a‧‧‧ surface
8‧‧‧ positive electrode
9‧‧‧Negative electrode
9a‧‧‧Ni crystal
9aa‧‧‧Ni crystal
9b‧‧‧AlNi eutectic
90‧‧‧Multilayer film
91‧‧‧Al film
92‧‧‧Ni film
93‧‧‧Au film
10‧‧‧Insulation film
18‧‧‧1st flat electrode
19‧‧‧2nd flat electrode
191‧‧‧Al film
192‧‧‧Ti film
193‧‧‧Au film
20‧‧‧ nitride semiconductor layer
20a‧‧‧ surface
22‧‧‧High platform structure
22a‧‧‧ top surface
22c‧‧‧ side
100‧‧‧Semiconductor light-emitting components
H1‧‧‧ thickness
W1‧‧‧寛

Fig. 1 is a schematic cross-sectional view showing a semiconductor light emitting device according to an embodiment. Fig. 2 is a schematic perspective view of a semiconductor light emitting device according to an embodiment. Fig. 3 is a schematic cross-sectional view showing a main part of a semiconductor light emitting device according to an embodiment. Fig. 4 is a schematic view showing a solidified structure in a semiconductor light-emitting device of an embodiment. Fig. 5 is an optical micrograph of a negative electrode of a semiconductor light-emitting device of the embodiment, which is observed from the second surface side of the substrate. Fig. 6 is a cross-sectional SEM image of a main portion of a semiconductor light-emitting device of an embodiment. Fig. 7 is a cross-sectional view showing main processes for explaining a method of manufacturing a semiconductor light emitting element according to an embodiment. Fig. 8A is an explanatory view showing a method of manufacturing a semiconductor light emitting element according to an embodiment. Fig. 8B is an explanatory view showing a method of manufacturing a semiconductor light emitting element according to an embodiment. Fig. 8C is an explanatory diagram of a method of manufacturing a semiconductor light emitting element according to an embodiment. Fig. 9A is an explanatory view showing a method of manufacturing a semiconductor light emitting element according to an embodiment. Fig. 9B is an explanatory diagram of a method of manufacturing a semiconductor light emitting element according to an embodiment. Fig. 9C is an explanatory view showing a method of manufacturing a semiconductor light emitting element according to an embodiment. Fig. 10A is an explanatory view showing a method of manufacturing a semiconductor light emitting element according to an embodiment. Fig. 10B is an explanatory view showing a method of manufacturing a semiconductor light emitting element according to an embodiment. Fig. 10C is an explanatory view showing a method of manufacturing a semiconductor light emitting element according to an embodiment.

no

1‧‧‧Substrate

1a‧‧‧1st

1b‧‧‧2nd

2‧‧‧buffer layer

3‧‧‧n type gallium nitride compound semiconductor layer

3a‧‧‧ surface

4‧‧‧Lighting layer

5‧‧‧Electronic barrier

6‧‧‧p-type gallium nitride compound semiconductor layer

6a‧‧‧ surface

7‧‧‧p-type contact layer

7a‧‧‧ surface

8‧‧‧ positive electrode

9‧‧‧Negative electrode

10‧‧‧Insulation film

18‧‧‧1st flat electrode

19‧‧‧2nd flat electrode

20‧‧‧ nitride semiconductor layer

20a‧‧‧ surface

22‧‧‧High platform structure

22a‧‧‧ top surface

22c‧‧‧ side

100‧‧‧Semiconductor light-emitting components

Claims (14)

A semiconductor light-emitting device comprising: a substrate; a nitride semiconductor layer formed on one surface side of the substrate, and having an n-type gallium nitride compound semiconductor layer, a light-emitting layer, and a p-type gallium nitride compound semiconductor sequentially from the one side a positive electrode formed on a surface side of the p-type gallium nitride compound semiconductor layer; and a negative electrode formed on a surface exposed in the n-type gallium nitride compound semiconductor layer; the negative electrode is made of Ni It is composed of a solidified structure mainly composed of Al. The semiconductor light-emitting device of claim 1, wherein the solidified structure has a plurality of Ni primary crystals in contact with a surface of the n-type gallium nitride-based compound semiconductor layer, and the n-type gallium nitride compound The AlNi eutectic, which is in contact with the surface of the semiconductor layer, is mixed together. The semiconductor light-emitting device of claim 2, wherein the plurality of primary crystals of Ni comprise a primary crystal of Ni satisfying the following conditions; condition: a temperature of the continuous region is greater than a thickness of the negative electrode; the continuous region, It is formed so as to cover the entire length of the negative electrode in the thickness direction, and is in contact with the n-type gallium nitride-based compound semiconductor layer in the in-plane direction of the negative electrode. The semiconductor light-emitting device according to claim 2, wherein the Ni primary crystal dendrites are in a dendritic shape in a thickness direction orthogonal to the n-type gallium nitride-based compound semiconductor layer. The semiconductor light-emitting device according to any one of claims 1 to 3, wherein the n-type gallium nitride-based compound semiconductor layer is an n-type AlGaN layer. The semiconductor light-emitting device of claim 1, wherein the negative electrode is formed by using a multilayer film formed on the surface of the n-type gallium nitride compound semiconductor layer at 640 ° C or higher and 700 The tempering temperature below °C is tempered and melted, and is formed by slow cooling; the multilayer film is alternately laminated with an Al film and a Ni film, and an Au film is laminated on the uppermost Ni film. The semiconductor light-emitting device of claim 6, wherein the cooling rate at the time of the slow cooling is 20 to 60 ° C / min. The semiconductor light-emitting device of claim 6 or 7, wherein the tempering time of the tempering treatment is 30 seconds to 3 minutes. A method of manufacturing a semiconductor light-emitting device, comprising: a substrate; a nitride semiconductor layer formed on one surface side of the substrate, and having an n-type gallium nitride compound semiconductor layer, a light-emitting layer, and p in this order from the one surface side a gallium nitride-based compound semiconductor layer; a positive electrode formed on a surface side of the p-type gallium nitride compound semiconductor layer; and a negative electrode formed on a surface exposed in the n-type gallium nitride compound semiconductor layer; The manufacturing method includes the steps of: forming a negative electrode on the surface of the n-type gallium nitride compound semiconductor layer on the surface of the n-type gallium nitride compound semiconductor layer to form a multilayer film, and thereafter, The tempering treatment is performed at a tempering temperature of 640 ° C or higher and 700 ° C or lower to melt the multilayer film, and the negative electrode is formed by slow cooling; the multilayer film is alternately laminated with an Al film and a Ni film. And on the uppermost Ni film, an Au film is laminated. The method for producing a semiconductor light-emitting device according to claim 9, wherein the cooling rate at the time of the slow cooling is 20 to 60 ° C / min. The method for producing a semiconductor light-emitting device according to claim 9 or 10, wherein the tempering time of the tempering treatment is 30 seconds to 3 minutes. A method for forming a negative electrode is formed on a surface of an n-type gallium nitride-based compound semiconductor layer to form a multilayer film, and then tempered at a tempering temperature of 640 ° C or higher and 700 ° C or lower to make the multilayer film The electrode is melted and slowly cooled to form an electrode; the multilayer film is alternately laminated with an Al film and a Ni film, and an Au film is laminated on the uppermost Ni film. The method for forming a negative electrode according to claim 12, wherein the cooling rate at the time of the slow cooling is set to 20 to 60 ° C / min. The method for forming a negative electrode according to claim 12 or 13, wherein the tempering time of the tempering treatment is 30 seconds to 3 minutes.