TW201604998A - Lead frame and manufacturing method thereof - Google Patents

Lead frame and manufacturing method thereof Download PDF

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Publication number
TW201604998A
TW201604998A TW104123156A TW104123156A TW201604998A TW 201604998 A TW201604998 A TW 201604998A TW 104123156 A TW104123156 A TW 104123156A TW 104123156 A TW104123156 A TW 104123156A TW 201604998 A TW201604998 A TW 201604998A
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Taiwan
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lead frame
film
plating layer
plating
external connection
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TW104123156A
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Chinese (zh)
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TWI606556B (en
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Ryouichi YOSHIMOTO
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Sh Materials Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

The present invention provides a lead frame capable of allowing the surface of a terminal for lead connection to be different from the surface of a terminal for external connection, and the manufacturing method thereof. The lead frame (50, 51) is made of a metal plate, wherein at least a part of its backside is exposed as terminals for external connection and a semiconductor device is mounted on its surface. Therefore, the lead frame can be treated as a component of a surface mount type semiconductor package. A plating layer (30) capable of being bonded to the semiconductor device is formed on the surface and side, and a thin film (40) is attached to the backside.

Description

引線架及其製造方法 Lead frame and method of manufacturing same

本發明係關於一種引線架及其製造方法。 The present invention relates to a lead frame and a method of manufacturing the same.

為了因應半導體封裝的小型化、薄型化的要求,作為在半導體封裝的背面露出有外部連接端子的表面構裝型封裝,已知有例如SON、QFN型的封裝。 In order to meet the demand for miniaturization and thinning of a semiconductor package, for example, a SON or QFN type package is known as a surface mount type package in which an external connection terminal is exposed on the back surface of a semiconductor package.

在如此般的半導體封裝中所使用的以往的引線架,並未使用用於部分地形成鍍層的掩膜,而在整面具有由Ni、Pd和Au依序形成的鍍層。由於該鍍層可以進行引線接合,且亦具有與焊料的連接可靠性,因此可使用於與所搭載的半導體元件進行引線接合用的內部端子、和外部連接用的外部連接端子的雙方(例如,參照專利文獻1)。 The conventional lead frame used in such a semiconductor package does not use a mask for partially forming a plating layer, but has a plating layer sequentially formed of Ni, Pd, and Au on the entire surface. Since the plating layer can be wire-bonded and has reliability in connection with solder, both the internal terminal for wire bonding with the mounted semiconductor element and the external connection terminal for external connection can be used (for example, refer to Patent Document 1).

專利文獻:日本特開2005-79524號公報 Patent Document: Japanese Laid-Open Patent Publication No. 2005-79524

然而,在大多的情況,引線接合中的接合性、和外部連接端子的連接中的與焊料的連接可靠性未必一致,而根據其用途,有時也會希望將形成在與半導體元件進行引線接合用的內部端子之鍍層,設為與形成在外部連接用的外部連接端子之鍍層為不同的金屬鍍層。在這種情形下,無需對整面均勻地形成同一鍍層,而必需使形成於內部端子的鍍層與形成於外部端子的鍍層不同,在製造步驟中,亦大多會出現必需使內部端子的 鍍層形成與外部連接端子的鍍層形成為不同製造過程的情形。 However, in many cases, the bonding property in wire bonding and the connection reliability with solder in the connection of the external connection terminals do not necessarily coincide, and depending on the application, it may be desirable to form a wire bonding with the semiconductor component. The plating of the internal terminal used is a metal plating layer different from the plating layer formed on the external connection terminal for external connection. In this case, it is not necessary to uniformly form the same plating layer on the entire surface, and it is necessary to make the plating layer formed on the internal terminal different from the plating layer formed on the external terminal, and in the manufacturing step, it is often necessary to make the internal terminal. The plating forms a plating layer with external connection terminals to form a different manufacturing process.

因此,本發明的目的在於,提供一種能夠使引線接合用端子的表面成為與外部連接用端子不同的表面的引線架及其製造方法。 Therefore, an object of the present invention is to provide a lead frame capable of making the surface of the terminal for wire bonding a surface different from the terminal for external connection, and a method of manufacturing the same.

為了達成上述目的,本發明的一態樣之引線架,是由金屬板形成,其背面的至少一部分作為外部連接端子而露出,並在表面構裝半導體元件,從而可使用作為表面構裝型半導體封裝的部件;在所述表面與側面形成有能夠與所述半導體元件接合的接合用鍍層,在所述背面貼附有薄膜。 In order to achieve the above object, a lead frame according to an aspect of the present invention is formed of a metal plate, at least a part of which is exposed as an external connection terminal, and a semiconductor element is mounted on the surface, so that it can be used as a surface-mounted semiconductor. a packaged member; a bonding plating layer capable of bonding to the semiconductor element is formed on the surface and the side surface, and a film is attached to the back surface.

本發明的另一態樣之引線架的製造方法,其中,所述引線架係在背面露出外部連接端子,且使用於在表面構裝半導體元件之表面構裝型半導體封裝;所述引線架的製造方法,具有:將金屬板加工,形成引線架圖案的步驟;在該引線架圖案的背面貼附薄膜的步驟;以及將該薄膜作為掩膜,在所述引線架的表面與側面形成鍍層的步驟。 According to another aspect of the present invention, in a method of manufacturing a lead frame, the lead frame is exposed to an external connection terminal on a rear surface, and is used for a surface mount type semiconductor package in which a semiconductor element is mounted on a surface; a manufacturing method comprising: a step of processing a metal plate to form a lead frame pattern; a step of attaching a film on a back surface of the lead frame pattern; and using the film as a mask to form a plating layer on a surface and a side surface of the lead frame step.

本發明的又另一態樣之引線架的製造方法,其中,所述引線架係在背面露出外部連接端子,且使用於在表面構裝半導體元件之表面構裝型半導體封裝;所述引線架的製造方法,具有:將金屬板加工,形成引線架圖案的步驟;在該引線架圖案的整面形成第一鍍層的步驟;在所述引線架圖案的背面貼附薄膜的步驟;以及將該薄膜作為掩膜,在所述引線架的表面與側面形成第二鍍層的步驟。 A method of manufacturing a lead frame according to still another aspect of the present invention, wherein the lead frame exposes an external connection terminal on a rear surface, and is used for a surface mount type semiconductor package in which a semiconductor element is mounted on a surface; the lead frame a manufacturing method comprising: a step of processing a metal plate to form a lead frame pattern; a step of forming a first plating layer on the entire surface of the lead frame pattern; a step of attaching a film on a back surface of the lead frame pattern; The film serves as a mask, and a step of forming a second plating layer on the surface and the side surface of the lead frame.

根據本發明,能夠形成對應其用途的合適的接合用鍍層。 According to the present invention, it is possible to form a suitable plating layer for bonding purposes.

10‧‧‧引線架圖案 10‧‧‧ lead frame pattern

11‧‧‧半導體元件搭載區域 11‧‧‧Semiconductor component mounting area

12‧‧‧端子區域 12‧‧‧Terminal area

15‧‧‧金屬板 15‧‧‧Metal sheet

20、30‧‧‧鍍層 20, 30‧‧‧ plating

40‧‧‧薄膜 40‧‧‧ film

50、51‧‧‧引線架 50, 51‧‧‧ lead frame

60‧‧‧半導體元件 60‧‧‧Semiconductor components

70‧‧‧引線 70‧‧‧ lead

80‧‧‧樹脂 80‧‧‧Resin

圖1是本發明的第一實施形態的引線架的一個例子的剖面構成圖。 Fig. 1 is a cross-sectional structural view showing an example of a lead frame according to a first embodiment of the present invention.

圖2是表示本發明的實施形態1的引線架的製造方法的一個例子的一系列步驟的圖;其中,圖2(a)是表示形成引線架的金屬板的準備步驟的圖;圖2(b)是表示形成引線架圖案的步驟的圖;圖2(c)是表示薄膜貼附步驟的一個例子的圖;圖2(d)是表示鍍覆步驟的一個例子的圖。 Fig. 2 is a view showing a series of steps of an example of a method of manufacturing a lead frame according to Embodiment 1 of the present invention; wherein Fig. 2(a) is a view showing a preparation step of forming a metal plate of a lead frame; b) is a view showing a step of forming a lead frame pattern; FIG. 2(c) is a view showing an example of a film attaching step; and FIG. 2(d) is a view showing an example of a plating step.

圖3是表示本發明的第二實施形態的引線架的一個例子的剖面構成圖。 3 is a cross-sectional structural view showing an example of a lead frame according to a second embodiment of the present invention.

圖4是表示本發明的第二實施形態的引線架的製造方法的一個例子的一系列步驟的圖;其中,圖4(a)是表示金屬板的準備步驟的一個例子的圖;圖4(b)是表示形成引線架圖案的步驟的一個例子的圖;圖4(c)是表示第一鍍層形成步驟的一個例子的圖;圖4(d)是表示薄膜貼附步驟的一個例子的圖;圖4(e)是表示第二鍍覆步驟的一個例子的圖。 Fig. 4 is a view showing a series of steps of an example of a method of manufacturing a lead frame according to a second embodiment of the present invention; wherein Fig. 4(a) is a view showing an example of a preparation step of a metal plate; b) is a view showing an example of a step of forming a lead frame pattern; FIG. 4(c) is a view showing an example of a first plating layer forming step; and FIG. 4(d) is a view showing an example of a film attaching step. Fig. 4(e) is a view showing an example of the second plating step.

圖5是表示使用第二實施形態的引線架而得的表面構裝型半導體封裝的一個例子的圖。 FIG. 5 is a view showing an example of a surface mount type semiconductor package obtained by using the lead frame of the second embodiment.

圖6是表示本發明的第一及第二實施形態的引線架50、51的出貨方法的一個例子的圖。 FIG. 6 is a view showing an example of a method of shipping the lead frames 50 and 51 according to the first and second embodiments of the present invention.

以下,參照圖式,針對用於實施本發明的形態進行說明。 Hereinafter, embodiments for carrying out the invention will be described with reference to the drawings.

圖1是表示本發明的第一實施形態的引線架的一個例子的剖面構成的圖。在圖1中,本發明的第一實施形態的引線架50,具有引線架圖案10、接合用鍍層30、及薄膜40。接合用鍍層30,形成在引線架圖案 10的上面及側面上。此外,薄膜40,貼附於引線架圖案10的下面。 1 is a view showing a cross-sectional configuration of an example of a lead frame according to the first embodiment of the present invention. In FIG. 1, a lead frame 50 according to a first embodiment of the present invention includes a lead frame pattern 10, a bonding plating layer 30, and a film 40. Bonding plating 30 formed on the lead frame pattern 10 on the top and side. Further, the film 40 is attached to the lower surface of the lead frame pattern 10.

在詳細說明第一實施形態的引線架之前,針對使用本發明的實施形態的引線架的表面構裝型半導體模組進行說明。 Before describing the lead frame of the first embodiment in detail, a surface mount type semiconductor module using a lead frame according to an embodiment of the present invention will be described.

圖5是表示使用有本發明的實施形態的引線架之表面構裝型半導體模組的一個例子的圖。在圖5中,在引線架51表面上構裝有半導體元件60,整體由樹脂80密封。引線架圖案10,具有中央的半導體元件搭載區域11、及設置在其兩側的端子區域12,半導體元件60則設置於半導體元件搭載區域11上。半導體元件60的端子61,透過引線70並藉由引線接合而與端子區域12連接。在此,端子區域12的上面成為接合用內部端子,下面成為外部連接端子。在圖5中,在整體的下面貼附有薄膜40,若剝掉薄膜40,則端子區域12的下面露出,成為可與存在於外部的裝置電連接的外部連接端子。本實施形態的引線架,可使用作為如此般的表面構裝型半導體模組的部件。 Fig. 5 is a view showing an example of a surface mount type semiconductor module using a lead frame according to an embodiment of the present invention. In FIG. 5, a semiconductor element 60 is mounted on the surface of the lead frame 51, and is entirely sealed by a resin 80. The lead frame pattern 10 has a central semiconductor element mounting region 11 and terminal regions 12 provided on both sides thereof, and the semiconductor element 60 is provided on the semiconductor element mounting region 11. The terminal 61 of the semiconductor element 60 is connected to the terminal region 12 through the lead 70 through wire bonding. Here, the upper surface of the terminal region 12 serves as an internal terminal for bonding, and the lower surface serves as an external connection terminal. In FIG. 5, the film 40 is attached to the lower surface of the whole, and when the film 40 is peeled off, the lower surface of the terminal region 12 is exposed, and it becomes an external connection terminal electrically connectable to the external device. As the lead frame of the present embodiment, a member which is such a surface-mounted semiconductor module can be used.

返回圖1,針對本發明的第一實施形態的引線架50詳細地進行說明。 Referring back to Fig. 1, a lead frame 50 according to the first embodiment of the present invention will be described in detail.

引線架圖案10,是將金屬板加工成引線架的形狀的金屬圖案。金屬板可以由適合於引線架的各種金屬材料構成,也可由例如銅材或銅合金材料構成。另外,如圖5中所說明般,引線架圖案10,至少具有:搭載半導體元件的區域、將半導體元件的端子藉由引線接合而電連接的接合用內部端子、以及用於與外部的端子進行電連接的外部連接端子。在本實施形態的引線架中,半導體元件搭載於引線架圖案10的表面側,而藉由引線接合而與半導體元件的端子連接的接合用端子也形成於表面側。在圖1 中,上面側相當於表面側,而下面側相當於背面側。 The lead frame pattern 10 is a metal pattern in which a metal plate is processed into a shape of a lead frame. The metal plate may be composed of various metal materials suitable for the lead frame, or may be composed of, for example, a copper material or a copper alloy material. Further, as described in FIG. 5, the lead frame pattern 10 has at least a region in which a semiconductor element is mounted, a bonding internal terminal that electrically connects terminals of the semiconductor element to each other by wire bonding, and a terminal for external connection. External connection terminal for electrical connection. In the lead frame of the present embodiment, the semiconductor element is mounted on the surface side of the lead frame pattern 10, and the bonding terminal connected to the terminal of the semiconductor element by wire bonding is also formed on the surface side. In Figure 1 In the middle, the upper side corresponds to the surface side, and the lower side corresponds to the back side.

在圖1中,以覆蓋引線架圖案10的上面(表面)及側面的方式,形成有鍍層30。由於引線架圖案10的表面構成接合用端子,因此鍍層30由可接合的鍍覆材料構成。鍍層30可根據所搭載的半導體元件60的種類、用途等來決定,例如也可由銀(Ag)構成。 In FIG. 1, a plating layer 30 is formed so as to cover the upper surface (surface) and the side surface of the lead frame pattern 10. Since the surface of the lead frame pattern 10 constitutes a terminal for bonding, the plating layer 30 is composed of a bondable plating material. The plating layer 30 can be determined depending on the type, use, and the like of the mounted semiconductor element 60, and may be made of, for example, silver (Ag).

在引線架圖案10的背面,貼附有薄膜40。據此,若剝掉薄膜40,則引線架圖案10露出。如圖5中所說明般,引線架圖案10的背面,發揮作為可與外部裝置電連接的外部連接端子的功能。據此,構成引線架圖案10的金屬材料的表面發揮作為外部連接端子的功能,在其為銅材或銅合金材料的情形下,其表面成為外部連接端子。 A film 40 is attached to the back surface of the lead frame pattern 10. Accordingly, when the film 40 is peeled off, the lead frame pattern 10 is exposed. As described in FIG. 5, the back surface of the lead frame pattern 10 functions as an external connection terminal that can be electrically connected to an external device. Thereby, the surface of the metal material constituting the lead frame pattern 10 functions as an external connection terminal, and in the case of a copper material or a copper alloy material, the surface thereof becomes an external connection terminal.

薄膜40,可在鍍覆步驟時發揮作為掩膜的功能,並且在樹脂密封時也可以發揮作為掩膜的功能,其選自不產生樹脂流出的材料。薄膜40只要是在鍍覆處理及樹脂密封時能夠發揮作為掩膜的功能的材料,則可使用各種材料,例如,亦可使用由聚醯亞胺構成的薄膜。聚醯亞胺的耐熱性高,在鍍覆及樹脂密封時能夠發揮作為掩膜的功能,因此可以適合地使用。 The film 40 can function as a mask in the plating step, and can also function as a mask when the resin is sealed, and is selected from a material that does not cause resin to flow out. As long as the film 40 can exhibit a function as a mask during plating treatment and resin sealing, various materials can be used. For example, a film made of polyimide can also be used. Polyimine has high heat resistance and can function as a mask when plating and resin sealing, and therefore can be suitably used.

另外,關於薄膜40對引線架圖案10背面的接著,可使用各種接著劑或黏著劑。例如,在作為薄膜40而使用上述聚醯亞胺的情形,由於聚醯亞胺系的薄膜帶材已市售,因此也可使用這種薄膜帶材。可以容易地進行薄膜40對引線架圖案10的背面的接著。 Further, regarding the adhesion of the film 40 to the back surface of the lead frame pattern 10, various adhesives or adhesives can be used. For example, in the case where the above polyimine is used as the film 40, since the polyimide film of the polyimide film is commercially available, such a film tape can also be used. The subsequent attachment of the film 40 to the back surface of the lead frame pattern 10 can be easily performed.

接著,使用圖2,說明本發明的實施形態1的引線架的製造方法。圖2是表示本發明實施形態1的引線架的製造方法的一個例子的一系 列步驟的圖。 Next, a method of manufacturing the lead frame according to the first embodiment of the present invention will be described with reference to Fig. 2 . Fig. 2 is a view showing an example of a method of manufacturing a lead frame according to Embodiment 1 of the present invention; A diagram of the column steps.

圖2(a)是表示形成引線架的金屬板的準備步驟的圖。首先,金屬板15,以未形成圖案等的狀態下準備。另外,金屬板15可根據用途而由各種金屬材料構成,也可以如上所述,例如由銅材或銅合金材料構成。 Fig. 2 (a) is a view showing a preparation step of forming a metal plate of a lead frame. First, the metal plate 15 is prepared in a state in which no pattern or the like is formed. Further, the metal plate 15 may be composed of various metal materials depending on the application, or may be composed of, for example, a copper material or a copper alloy material as described above.

圖2(b)是表示形成引線架圖案的步驟的圖。引線架圖案10,藉由將金屬板15加工成引線架的形狀而得。金屬板15的加工,可藉由包括蝕刻加工、衝壓加工在內的各種加工方法而進行。可考慮成本、加工精度等,並根據用途來決定金屬板15的加工方法。 Fig. 2(b) is a view showing a step of forming a lead frame pattern. The lead frame pattern 10 is obtained by processing the metal plate 15 into the shape of a lead frame. The processing of the metal plate 15 can be performed by various processing methods including etching processing and press working. The processing method of the metal plate 15 can be determined depending on the cost, processing accuracy, and the like.

藉由引線架圖案形成步驟,形成引線架圖案10,且至少形成半導體元件搭載區域11與端子區域12。另外,雖然圖2(b)中未記載,但引線架圖案10亦可以藉由彎曲加工等而形成高度的落差等。 The lead frame pattern 10 is formed by the lead frame pattern forming step, and at least the semiconductor element mounting region 11 and the terminal region 12 are formed. Further, although not shown in FIG. 2(b), the lead frame pattern 10 may be formed into a height drop or the like by bending or the like.

圖2(c)是表示薄膜貼附步驟的一個例子的圖。在薄膜貼附步驟中,在引線架圖案10的背面(下面)貼附薄膜40。如上所述,薄膜40,係從在鍍覆處理及樹脂密封時可進行掩膜的材料中選擇。薄膜40的貼附,可使用接著劑來進行,也可使用起初就在薄膜40的單面形成有黏著劑層的如薄膜帶材般的薄膜40來進行貼附。另外,在以下的說明中,接合後固化的接著劑、與接合後無需固化過程而保持其原狀的黏著劑,不一定要嚴格地區分開,即使在稱為接著劑的情形,亦包含黏著劑。 Fig. 2(c) is a view showing an example of a film attaching step. In the film attaching step, the film 40 is attached to the back surface (lower surface) of the lead frame pattern 10. As described above, the film 40 is selected from materials which can be masked during the plating treatment and the resin sealing. The film 40 can be attached by using an adhesive, or a film 40 such as a film tape which is initially formed with an adhesive layer on one surface of the film 40 can be used. Further, in the following description, the adhesive which is cured after bonding and the adhesive which remains in the original state without a curing process after bonding are not necessarily strictly distinguished, and an adhesive is included even in the case of an adhesive.

圖2(d)是表示鍍覆步驟的一個例子的圖。在鍍覆步驟中,在對引線架圖案10的背面接著有薄膜40的狀態下進行鍍覆處理。藉此,僅在未由薄膜40覆蓋的引線架圖案10的上面(表面)與側面上,形成鍍層30。作為鍍層30的材料,可根據用途而使用各種鍍覆材料,例如,亦可使用Ag 來形成Ag鍍層。 Fig. 2(d) is a view showing an example of a plating step. In the plating step, a plating treatment is performed in a state where the film 40 is attached to the back surface of the lead frame pattern 10. Thereby, the plating layer 30 is formed only on the upper surface (surface) and the side surface of the lead frame pattern 10 which is not covered by the film 40. As the material of the plating layer 30, various plating materials can be used depending on the use, for example, Ag can also be used. To form an Ag coating.

另外,在鍍覆步驟中,例如,亦可進行電鍍處理。電鍍,係藉由在電鍍溶液中浸漬引線架圖案10,將引線架圖案10作為陰極,與在電鍍溶液中浸漬的陽極一起進行通電,來進行電鍍處理。薄膜40作為鍍覆步驟的掩膜而發揮功能,僅在未由薄膜40覆蓋的上面與側面形成鍍層30,完成引線架50。 Further, in the plating step, for example, a plating treatment may be performed. In the electroplating, the lead frame pattern 10 is immersed in the plating solution, and the lead frame pattern 10 is used as a cathode, and is energized together with the anode immersed in the plating solution to perform a plating treatment. The film 40 functions as a mask for the plating step, and the plating layer 30 is formed only on the upper surface and the side surface which are not covered by the film 40, and the lead frame 50 is completed.

鍍層30的上面,於後續成為接合用的內部端子,而貼附有薄膜40的引線架圖案10的下面,於後續發揮作為外部連接端子的功能。 The upper surface of the plating layer 30 is subsequently used as an internal terminal for bonding, and the lower surface of the lead frame pattern 10 to which the film 40 is attached is used to function as an external connection terminal.

如此般,根據實施形態1的引線架及其製造方法,在形成引線架圖案10後,藉由在背面貼附薄膜40,而可經過一次鍍覆步驟就能夠容易地將端子區域12的上面與下面構成為不同的表面,能夠靈活地因應對引線架50的端子所要求的各種需求。 As described above, according to the lead frame of the first embodiment and the method of manufacturing the same, after the lead frame pattern 10 is formed, by attaching the film 40 to the back surface, the upper surface of the terminal region 12 can be easily formed by one plating step. The following is configured as a different surface, and it is possible to flexibly cope with various demands required for the terminals of the lead frame 50.

圖3是表示本發明的第二實施形態的引線架的一個例子的剖面構成圖。第二實施形態的引線架51,係引線架圖案10的整面由鍍層20覆蓋,在鍍層20的上面及側面上形成鍍層30,在下面貼附有薄膜40,在這一點上,係與第一實施形態的引線架50不同。也就是,在引線架圖案10的表面如塗層般形成鍍層20,在這一點上,係與第一實施形態的引線架50不同,但關於其他構成,則與第一實施形態的引線架50是同樣的。 3 is a cross-sectional structural view showing an example of a lead frame according to a second embodiment of the present invention. In the lead frame 51 of the second embodiment, the entire surface of the lead frame pattern 10 is covered with a plating layer 20, a plating layer 30 is formed on the upper surface and the side surface of the plating layer 20, and a film 40 is attached to the lower surface. The lead frame 50 of one embodiment is different. That is, the plating layer 20 is formed on the surface of the lead frame pattern 10 as a coating layer. In this regard, unlike the lead frame 50 of the first embodiment, the lead frame 50 of the first embodiment is different from the other configuration. It is the same.

如此般,亦可利用由與鍍層30不同的材料構成的鍍層20將引線架圖案10的整面覆蓋之後,將薄膜40貼附於下面,形成鍍層30。藉由如此般的構成,形成於端子區域12的下面的外部連接端子的表面係由鍍層20構成。也就是,在非為使用於引線架圖案10的金屬板15的材質,形 成任意的鍍層20並藉由任意的金屬材料構成外部連接端子的情形,可以藉由成為如第二實施形態的引線架51般的構成,將外部連接端子的表面設為所欲的金屬材料。 In this manner, the entire surface of the lead frame pattern 10 can be covered with the plating layer 20 made of a material different from the plating layer 30, and then the film 40 can be attached to the lower surface to form the plating layer 30. With such a configuration, the surface of the external connection terminal formed on the lower surface of the terminal region 12 is composed of the plating layer 20. That is, in the material of the metal plate 15 which is not used for the lead frame pattern 10, the shape In the case where the plating layer 20 is formed by any of the metal materials and the external connection terminals are formed by any of the metal materials, the surface of the external connection terminal can be made into a desired metal material by the configuration of the lead frame 51 of the second embodiment.

鍍層20的鍍覆材料,可根據用途而設為各種材料,例如,亦可為將Ni作為底材層並形成在引線架圖案10的表面上,在Ni的表面上形成Pd,進一步在Pd的表面上形成Au而層疊而成的鍍層(以下,亦稱為“鍍鈀層”)。如此般的將Ni、Pd以及Au從下層依序層疊而形成的鍍鈀層,一般使用作為適合於焊接的鍍層。具體而言,在使用銅或銅合金材料作為引線架圖案10的情形時,底材層的Ni抑制銅的擴散,於接合表面使用貴金屬的Au,並將特性良好且比Au廉價的Pd夾在Ni和Au之間,藉此成為品質及成本上優異的外部連接端子。據此,作為構成外部連接端子的鍍層20,亦可為以使用如此般之適合於焊接的鍍層之方式設定。 The plating material of the plating layer 20 may be various materials depending on the application. For example, Ni may be used as a substrate layer and formed on the surface of the lead frame pattern 10 to form Pd on the surface of Ni, further in Pd. A plating layer formed by lamination of Au on the surface (hereinafter also referred to as "palladium plating layer"). Such a palladium plating layer formed by sequentially laminating Ni, Pd, and Au from the lower layer is generally used as a plating layer suitable for soldering. Specifically, when a copper or copper alloy material is used as the lead frame pattern 10, Ni of the substrate layer suppresses diffusion of copper, Au of a noble metal is used for the bonding surface, and Pd having good characteristics and being cheaper than Au is sandwiched. Between Ni and Au, it becomes an external connection terminal excellent in quality and cost. Accordingly, the plating layer 20 constituting the external connection terminal may be set so as to use a plating layer suitable for soldering as described above.

另外,鍍層20較佳為適合於焊接,但只要是由可焊接的材料構成,便能夠充分地發揮其作用及功能,因此可在可焊接的範圍內選擇各種材料。 Further, the plating layer 20 is preferably suitable for welding. However, as long as it is made of a weldable material, its function and function can be sufficiently exerted, so that various materials can be selected within the range that can be welded.

關於其他的構成要素,係與第一實施形態的引線架50是同樣的,因此對同樣的構成要素標記相同的參照符號並省略其說明。 The other components are the same as those of the lead frame 50 of the first embodiment. Therefore, the same components are denoted by the same reference numerals, and their description is omitted.

圖4是表示本發明的第二實施形態的引線架的製造方法的一個例子的一系列步驟的圖。 4 is a view showing a series of steps of an example of a method of manufacturing a lead frame according to a second embodiment of the present invention.

圖4(a)是表示金屬板的準備步驟的一個例子的圖。本步驟係與在圖2(a)中所說明的步驟是同樣的,因此省略其說明。 Fig. 4 (a) is a view showing an example of a preparation step of a metal plate. This step is the same as the step explained in FIG. 2(a), and therefore the description thereof will be omitted.

圖4(b)是表示引線架圖案形成步驟的一個例子的圖。本步 驟亦與在圖2(b)中所說明的步驟是同樣的,因此省略其說明。 Fig. 4 (b) is a view showing an example of a lead frame pattern forming step. This step The same steps are the same as those described in FIG. 2(b), and therefore the description thereof will be omitted.

圖4(c)是表示第一鍍層形成步驟的一個例子的圖。在第一鍍層形成步驟中,在引線架圖案10的整面形成第一鍍層20。第一鍍層20的形成,可藉由浸漬於電鍍溶液並進行通電的一般的電鍍處理來進行。在這點上,係與在圖2(d)中所說明的是同樣的。在引線架圖案10的整面,由於不存在任何掩膜,因此在整面形成第一鍍層20。 Fig. 4 (c) is a view showing an example of a first plating layer forming step. In the first plating layer forming step, the first plating layer 20 is formed on the entire surface of the lead frame pattern 10. The formation of the first plating layer 20 can be carried out by a general plating treatment which is immersed in a plating solution and energized. In this regard, it is the same as that explained in Fig. 2(d). On the entire surface of the lead frame pattern 10, since there is no mask, the first plating layer 20 is formed on the entire surface.

另外,由於將第一鍍層20使用作為外部連接端子,因此以可焊接的鍍覆材料形成,且較佳為以適合於焊接的鍍覆材料構成。將上述Ni、Pd及Au從下層依序層疊而形成的鍍鈀層,也適合作為外部連接端子,因此也可以將鍍鈀層作為第一鍍層20。另外,在形成鍍鈀層的情形,也可為:首先在Ni的電鍍溶液中浸漬引線架圖案10並進行電鍍,接下來,在Pd的電鍍溶液中浸漬已施加鍍Ni的引線架圖案10並進行電鍍,最後將已施加鍍Ni及Pd的引線架圖案10浸漬於Au的電鍍溶液並進行電鍍。只要依序通過三個電鍍槽即可,因此能夠容易地形成鍍鈀層。 Further, since the first plating layer 20 is used as an external connection terminal, it is formed of a weldable plating material, and is preferably made of a plating material suitable for welding. The palladium plating layer formed by sequentially laminating the above Ni, Pd, and Au from the lower layer is also suitable as an external connection terminal. Therefore, the palladium plating layer may be used as the first plating layer 20. Further, in the case of forming a palladium plating layer, first, the lead frame pattern 10 is immersed in a plating solution of Ni and electroplating is performed, and then, the lead pattern 10 to which Ni plating has been applied is immersed in the plating solution of Pd and Electroplating is performed, and finally, the lead frame pattern 10 to which Ni and Pd have been applied is immersed in the plating solution of Au and electroplated. It suffices to pass through the three plating tanks in order, so that the palladium plating layer can be easily formed.

圖4(d)是表示薄膜貼附步驟的一個例子的圖。本步驟,除了貼附薄膜40的對象係在整面形成有第一鍍層20的引線架圖案10以外,亦與在圖2(c)中所說明的步驟是同樣的,因此省略其說明。 Fig. 4 (d) is a view showing an example of a film attaching step. In this step, the object to which the film 40 is attached is the same as the lead frame pattern 10 in which the first plating layer 20 is formed on the entire surface, and is also the same as the step described in FIG. 2(c), and thus the description thereof will be omitted.

圖4(e)是表示第二鍍覆步驟的一個例子的圖。第二鍍覆步驟,除了施以第二鍍覆處理的對象係為以第一鍍層20覆蓋整面的引線架圖案10以外,亦與在圖2(d)中所說明的步驟是同樣的,只要可進行同樣的電鍍處理即可。據此,省略其說明。 Fig. 4 (e) is a view showing an example of a second plating step. The second plating step is the same as the step described in FIG. 2(d) except that the object to which the second plating treatment is applied is the lead frame pattern 10 covering the entire surface with the first plating layer 20, As long as the same plating treatment can be performed. Accordingly, the description thereof will be omitted.

根據第二實施形態的引線架及其製造方法,能夠藉由施加第 一鍍覆步驟即對引線架圖案10的整面進行鍍覆處理,而在外部連接端子的表面形成任意的鍍層,且可根據用途形成合適的外部連接端子。 According to the lead frame of the second embodiment and the method of manufacturing the same, In a plating step, the entire surface of the lead frame pattern 10 is plated, and an arbitrary plating layer is formed on the surface of the external connection terminal, and a suitable external connection terminal can be formed according to the use.

圖5是表示使用有第二實施形態的引線架51的表面構裝型半導體封裝的一個例子的圖。 FIG. 5 is a view showing an example of a surface mount type semiconductor package using the lead frame 51 of the second embodiment.

在圖5中,示出了如下的表面構裝型半導體封裝:在薄膜40已貼附於引線架圖案10的狀態下,將半導體元件60搭載於半導體元件搭載區域11上,使用引線70將半導體元件60的端子61與端子區域12的上面進行引線接合,並以樹脂80密封。如此般,可以無需剝掉薄膜40而將引線架51出貨,在貼附有薄膜40的狀態下進行樹脂密封。藉由使用具有不產生樹脂80流出的材質的材料作為薄膜40,能夠容易地進行封裝。 In FIG. 5, a surface-mounted semiconductor package in which the semiconductor element 60 is mounted on the semiconductor element mounting region 11 and the semiconductor 70 is used in the state in which the thin film 40 has been attached to the lead frame pattern 10 is shown. The terminal 61 of the element 60 is wire-bonded to the upper surface of the terminal region 12 and sealed with a resin 80. In this manner, the lead frame 51 can be shipped without peeling off the film 40, and the resin can be sealed in a state in which the film 40 is attached. By using a material having a material that does not cause the resin 80 to flow out, the film 40 can be easily packaged.

另外,由於端子區域12的上面(表面)及側面,是以適合於引線接合的Ag等材料構成的第二鍍層30覆蓋,因此能夠合適地進行將引線70與端子區域12的上面連接的引線接合。 Further, since the upper surface (surface) and the side surface of the terminal region 12 are covered with the second plating layer 30 made of a material such as Ag suitable for wire bonding, wire bonding for connecting the lead 70 to the upper surface of the terminal region 12 can be suitably performed. .

樹脂密封後,藉由將薄膜40剝掉,端子區域12的背面露出,作為形成有第一鍍層20的外部連接端子而發揮功能。由於第一鍍層20是由適合於外部連接的材料構成,因此亦能夠合適地進行外部連接。 After the resin is sealed, the film 40 is peeled off, and the back surface of the terminal region 12 is exposed to function as an external connection terminal on which the first plating layer 20 is formed. Since the first plating layer 20 is made of a material suitable for external connection, external connection can also be suitably performed.

如此般,第二實施形態的引線架51,能夠在已將薄膜40貼附於引線架51的狀態下,直接在不產生樹脂80流出的薄膜40上容易地進行樹脂密封,因此對於進行封裝的一側而言,其優點也很大。 In the lead frame 51 of the second embodiment, the film 40 can be easily resin-sealed directly on the film 40 where the resin 80 does not flow out in a state where the film 40 is attached to the lead frame 51. On the one hand, the advantages are also great.

另外,在圖5中,雖舉出實施形態2的引線架51為例子進行說明,但實施形態1的引線架50同樣地亦能夠容易地進行樹脂密封。 In addition, although the lead frame 51 of the second embodiment is described as an example in FIG. 5, the lead frame 50 of the first embodiment can be easily resin-sealed in the same manner.

圖6是表示本發明的第一及第二實施形態的引線架50、51 的出貨方法的一個例子的圖。如圖6所示,在金屬板15內形成有多個引線架50、51的狀態下,可將本實施形態的引線架50、51出貨。關於包含半導體元件搭載區域11、端子區域12等的引線架圖案10的形成,可藉由在金屬板15內,在一個框架內形成一個引線架圖案10,並將引線架圖案10不完全從框架切斷而連接並支承於框架的狀態下進行。而且,藉由一併進行薄膜40的貼附、鍍覆步驟,能夠一併製造多個引線架50、51。 Figure 6 is a view showing lead frames 50 and 51 of the first and second embodiments of the present invention. A diagram of an example of a shipping method. As shown in FIG. 6, in the state in which the lead frames 50 and 51 are formed in the metal plate 15, the lead frames 50 and 51 of this embodiment can be shipped. With respect to the formation of the lead frame pattern 10 including the semiconductor element mounting region 11, the terminal region 12, and the like, one lead frame pattern 10 can be formed in one frame in the metal plate 15, and the lead frame pattern 10 is not completely removed from the frame. It is carried out in a state of being cut and connected and supported by the frame. Further, by performing the attaching and plating steps of the film 40 together, the plurality of lead frames 50 and 51 can be collectively manufactured.

而且,在該引線架50、51的收貨方,若在一併進行如圖5所示的封裝後,將薄膜40剝掉,最後將框架切斷而將各封裝個片化,則能夠一併進行引線架50、51的製造及表面構裝型半導體封裝的製造。 Further, when the package of the lead frames 50 and 51 is packaged as shown in FIG. 5, the film 40 is peeled off, and finally the frame is cut and the packages are individually formed. The manufacture of the lead frames 50 and 51 and the manufacture of the surface mount type semiconductor package are performed.

如此般,本發明的實施形態的引線架及其製造方法,還能夠合適地因應量產化,可以實現高效率的量產。 As described above, the lead frame and the method of manufacturing the same according to the embodiment of the present invention can be mass-produced as appropriate, and high-efficiency mass production can be realized.

以下,針對實施了本發明的實施形態的引線架及其製造方法的實施例進行說明。 Hereinafter, an embodiment of a lead frame and a method of manufacturing the same according to an embodiment of the present invention will be described.

【實施例1】 [Example 1]

作為引線架用金屬板1,使用厚度0.2mm、寬度180mm的帶狀銅材(株式會社神戶製鋼所製:KLF-194),在該金屬板1的兩面,形成有厚度20μm的光敏性抗蝕層(旭化成E-materials株式會社製:負型光敏性抗蝕AQ-2058)。 As a metal plate 1 for a lead frame, a strip-shaped copper material (KLF-194 manufactured by Kobe Steel Co., Ltd.) having a thickness of 0.2 mm and a width of 180 mm was used, and a photosensitive resist having a thickness of 20 μm was formed on both surfaces of the metal plate 1. Layer (made by Asahi Kasei E-materials Co., Ltd.: negative photosensitive resist AQ-2058).

然後,使用已實施引線架圖案的玻璃掩膜(Konica Minolta Advanced Layers株式會社製:HY2-50P)進行曝光,然後,通過顯影、蝕刻、光敏性抗蝕的剝離,形成了引線架裸材。然後,在表背面整面依序形成Ni、Pd、Au的極薄的鍍層。此時的Ni膜厚度為0.6μm、Pd膜厚度為0.015μm、 Au膜厚度為0.0065μm。 Then, exposure was performed using a glass mask (manufactured by Konica Minolta Advanced Layers Co., Ltd.: HY2-50P) in which the lead frame pattern was applied, and then a lead frame bare material was formed by development, etching, and peeling of the photosensitive resist. Then, an extremely thin plating layer of Ni, Pd, and Au is sequentially formed on the entire surface of the front and back surfaces. The thickness of the Ni film at this time is 0.6 μm, and the thickness of the Pd film is 0.015 μm. The Au film thickness was 0.0065 μm.

然後,在背面貼附聚醯亞胺系薄膜帶材(Innox製),進一步在表面形成厚度2.5μm、光澤度1.7GAM的極為平滑的Ag鍍層(高氰Ag鍍覆)。其結果為,得到了在表面與背面具有不同金屬鍍層的引線架。然後,在未將背面的聚醯亞胺系薄膜帶材剝離而維持其貼附的狀態下,呈條狀地進行切割,並投入至LED裝置的組裝步驟中,完成了表面為Ag鍍層,背面為Ag/Ni/Pd/Au鍍層的LED裝置。 Then, a polyimide film (manufactured by Innox) was attached to the back surface, and an extremely smooth Ag plating layer (high cyanide Ag plating) having a thickness of 2.5 μm and a gloss of 1.7 GAM was further formed on the surface. As a result, a lead frame having different metal plating layers on the front and back surfaces was obtained. Then, the polyimine-based film strip on the back side is peeled off and the attached film is removed, and the sheet is cut in a strip shape, and is placed in an assembly step of the LED device, and the surface is Ag-plated, and the back surface is completed. It is an Ag/Ni/Pd/Au coated LED device.

【實施例2】 [Example 2]

在與實施例1同樣地形成的引線架裸材的背面,貼附聚醯亞胺系的薄膜帶材(巴川製紙製),依序施以Ni、Pd、Au的鍍覆。然後,在半導體組裝步驟中組裝,鑄模密封後,將背面聚醯亞胺系薄膜帶材剝離。在該狀態下,背面側露出Cu,對該Cu面施加Sn電鍍以作為外裝鍍覆,得到實施例2的引線架。 On the back surface of the lead frame bare material formed in the same manner as in the first embodiment, a polyimide film tape (manufactured by Tosawa Paper Co., Ltd.) was attached, and Ni, Pd, and Au were sequentially applied. Then, it is assembled in the semiconductor assembly step, and after the mold is sealed, the back polyimide-based film strip is peeled off. In this state, Cu was exposed on the back side, and Sn plating was applied to the Cu surface to form an exterior plating, and the lead frame of Example 2 was obtained.

【實施例3】 [Example 3]

在與實施例1同樣地形成的引線架裸材的背面,貼附聚醯亞胺系的薄膜帶材(日東製),施以厚度0.8μm的Ni鍍覆(氨基磺酸(sulfamic acid)Ni鍍覆)。在其之上,施以0.05μm厚度的Ag打底層(Dow Chemical製的Silveron GT-820 Strike),進一步施以1.2μm厚度的Ag/Sn合金鍍覆(Dow Chemical製的Silveron GT-820 Cyanide-free AgSn Plating)。然後,在半導體組裝步驟中組裝,鑄模密封後,將背面聚醯亞胺系薄膜帶材剝離。在該狀態下,背面側露出Cu,對該Cu面施加Sn電鍍以作為外裝鍍覆,得到實施例3的引線架。 On the back surface of the lead frame bare material formed in the same manner as in Example 1, a polyimide film (manufactured by Nitto Dani Co., Ltd.) was attached, and Ni plating (sulfamic acid Ni) having a thickness of 0.8 μm was applied. Plating). On top of this, an underlayer of Ag (a Silveron GT-820 Strike manufactured by Dow Chemical Co., Ltd.) having a thickness of 0.05 μm was applied, and an Ag/Sn alloy plating having a thickness of 1.2 μm was further applied (Silveron GT-820 Cyanide manufactured by Dow Chemical- Free AgSn Plating). Then, it is assembled in the semiconductor assembly step, and after the mold is sealed, the back polyimide-based film strip is peeled off. In this state, Cu was exposed on the back side, and Sn plating was applied to the Cu surface to form an exterior plating, and the lead frame of Example 3 was obtained.

以上,雖已詳細地說明了本發明較佳的實施形態,但本發明並不限於上述的實施形態,可以在不脫離本發明的範圍內,對上述實施形態施加各種變形及置換。 The preferred embodiments of the present invention have been described in detail above, but the present invention is not limited to the embodiments described above, and various modifications and substitutions may be made to the above-described embodiments without departing from the scope of the invention.

10‧‧‧引線架圖案 10‧‧‧ lead frame pattern

11‧‧‧半導體元件搭載區域 11‧‧‧Semiconductor component mounting area

12‧‧‧端子區域 12‧‧‧Terminal area

20、30‧‧‧鍍層 20, 30‧‧‧ plating

40‧‧‧薄膜 40‧‧‧ film

51‧‧‧引線架 51‧‧‧ lead frame

60‧‧‧半導體元件 60‧‧‧Semiconductor components

61‧‧‧端子 61‧‧‧ terminals

70‧‧‧引線 70‧‧‧ lead

80‧‧‧樹脂 80‧‧‧Resin

Claims (17)

一種引線架,是由金屬板形成,其背面的至少一部分作為外部連接端子而露出,並在表面構裝半導體元件,從而可使用作為表面構裝型半導體封裝的部件;在所述表面與側面形成有能夠與所述半導體元件接合的接合用鍍層,在所述背面貼附有薄膜。 A lead frame formed of a metal plate, at least a part of which is exposed as an external connection terminal, and a semiconductor element is mounted on the surface, so that a component as a surface mount type semiconductor package can be used; and the surface and the side surface are formed There is a plating layer for bonding which can be bonded to the semiconductor element, and a film is attached to the back surface. 如申請專利範圍第1項之引線架,其中,所述背面是露出所述金屬板的露出面,在所述露出面貼附有所述薄膜。 The lead frame of claim 1, wherein the back surface is an exposed surface on which the metal plate is exposed, and the film is attached to the exposed surface. 如申請專利範圍第1項之引線架,其中,在所述金屬板的整面,形成有作為所述外部連接端子而能夠與外部電連接的外部連接用鍍層,所述接合用鍍層形成於該外部連接用鍍層上。 The lead frame of claim 1, wherein an outer connection plating layer that can be electrically connected to the outside as the external connection terminal is formed on the entire surface of the metal plate, and the bonding plating layer is formed on the lead frame The external connection is on the plating. 如申請專利範圍第3項之引線架,其中,在所述背面形成有所述外部連接用鍍層,在所述外部連接用鍍層上貼附有所述薄膜。 The lead frame of claim 3, wherein the external connection plating layer is formed on the back surface, and the thin film is attached to the external connection plating layer. 如申請專利範圍第1至4項中任一項之引線架,其中,所述接合用鍍層為Ag鍍層。 The lead frame according to any one of claims 1 to 4, wherein the bonding plating layer is an Ag plating layer. 如申請專利範圍第1至5項中任一項之引線架,其中,所述外部連接用鍍層,由將Ni、Pd以及Au從下層依序層疊而形成的鍍層構成。 The lead frame according to any one of claims 1 to 5, wherein the external connection plating layer is formed of a plating layer formed by sequentially laminating Ni, Pd, and Au from the lower layer. 如申請專利範圍第1至6項中任一項之引線架,其中,所述薄膜為具有接著層或黏著層的薄膜。 The lead frame of any one of claims 1 to 6, wherein the film is a film having an adhesive layer or an adhesive layer. 如申請專利範圍第1至7項中任一項之引線架,其中,所述薄膜能夠使用作為電鍍的掩膜,並且由能夠防止樹脂密封時的樹脂流出、且能夠使用作為用於使所述外部連接端子露出的掩膜的材料構成。 The lead frame according to any one of claims 1 to 7, wherein the film can be used as a mask for electroplating, and is capable of preventing resin from flowing out when the resin is sealed, and can be used as The material of the mask exposed by the external connection terminals is formed. 如申請專利範圍第1至8項中任一項之引線架,其中,所述薄膜是由聚醯亞胺構成的薄膜。 The lead frame of any one of claims 1 to 8, wherein the film is a film composed of polyimide. 如申請專利範圍第1至9項中任一項之引線架,其中,所述金屬板由銅材或銅合金材料構成。 The lead frame of any one of claims 1 to 9, wherein the metal plate is made of a copper material or a copper alloy material. 一種引線架的製造方法,所述引線架係在背面露出外部連接端子,且使用於在表面構裝半導體元件之表面構裝型半導體封裝;所述引線架的製造方法,具有:將金屬板加工,形成引線架圖案的步驟;在該引線架圖案的背面貼附薄膜的步驟;以及將該薄膜作為掩膜,在所述引線架的表面與側面形成鍍層的步驟。 A method of manufacturing a lead frame, wherein the lead frame is exposed to an external connection terminal on a back surface, and is used for a surface mount type semiconductor package in which a semiconductor element is mounted on a surface; the method of manufacturing the lead frame has: processing a metal plate a step of forming a lead frame pattern; a step of attaching a film to the back surface of the lead frame pattern; and a step of forming a plating layer on the surface and the side surface of the lead frame by using the film as a mask. 如申請專利範圍第11項之引線架的製造方法,其中,所述薄膜為具有接著層或黏著層的帶狀的薄膜,使用該接著層或黏著層將所述薄膜貼附於所述引線架圖案的所述背面。 The method of manufacturing a lead frame according to claim 11, wherein the film is a strip-shaped film having an adhesive layer or an adhesive layer, and the film is attached to the lead frame by using the adhesive layer or the adhesive layer. The back side of the pattern. 如申請專利範圍第11或12項之引線架的製造方法,其中,所述形成鍍層的步驟,包含將Ag鍍覆於所述引線架圖案的步驟。 The method of manufacturing a lead frame according to claim 11 or 12, wherein the step of forming a plating layer comprises the step of plating Ag on the lead frame pattern. 一種引線架的製造方法,所述引線架係在背面露出外部連接端子,且使用於在表面構裝半導體元件之表面構裝型半導體封裝;所述引線架的製造方法,具有:將金屬板加工,形成引線架圖案的步驟;在該引線架圖案的整面形成第一鍍層的步驟;在所述引線架圖案的背面貼附薄膜的步驟;以及將該薄膜作為掩膜,在所述引線架的表面與側面形成第二鍍層的步驟。 A method of manufacturing a lead frame, wherein the lead frame is exposed to an external connection terminal on a back surface, and is used for a surface mount type semiconductor package in which a semiconductor element is mounted on a surface; the method of manufacturing the lead frame has: processing a metal plate a step of forming a lead frame pattern; a step of forming a first plating layer on the entire surface of the lead frame pattern; a step of attaching a film on a back surface of the lead frame pattern; and using the film as a mask on the lead frame The step of forming a second plating layer on the surface and the side surface. 如申請專利範圍第14項之引線架的製造方法,其中,所述薄膜為具有接著層或黏著層的帶狀的薄膜,使用該接著層或黏著層將所述薄膜貼附於所述引線架圖案的所述背面。 The method of manufacturing a lead frame according to claim 14, wherein the film is a strip-shaped film having an adhesive layer or an adhesive layer, and the film is attached to the lead frame by using the adhesive layer or the adhesive layer. The back side of the pattern. 如申請專利範圍第14或15項之引線架的製造方法,其中,所述第一鍍層是將Ni、Pd以及Au從下層依序層疊而形成的鍍層,所述形成第一鍍層的步驟,包含將Ni、Pd及Au依序鍍覆於所述引線架圖案的步驟。 The method of manufacturing a lead frame according to claim 14 or 15, wherein the first plating layer is a plating layer formed by sequentially laminating Ni, Pd, and Au from the lower layer, and the step of forming the first plating layer includes Ni, Pd, and Au are sequentially plated on the lead frame pattern. 如申請專利範圍第14至16項中任一項之引線架的製造方法,其中,所述形成第二鍍層的步驟,包含將Ag鍍覆於所述引線架圖案的步驟。 The method of manufacturing a lead frame according to any one of claims 14 to 16, wherein the step of forming the second plating layer comprises the step of plating Ag on the lead frame pattern.
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