JP2017163106A - Lead frame assembly substrate and semiconductor device assembly - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a lead frame assembly substrate involved in dissolving and removing of about half thickness of a substrate in order to separate a lead portion by performing half-etching from the lower surface side after resin-sealing and after mounting the semiconductor element on the substrate, the lead frame assembly substrate being able to prevent plating film from being peeled off due to excess dissolving of base material.SOLUTION: A lead frame assembly substrate 1 includes a lead frame block 3 in which lead frames each including a mounting region of a semiconductor element 6 and a lead part 24 having opposing plating layers on both sides thereof, are joined by a lower side joint metal part 30 that joins lead metal parts each forming the lead part to each other. In the lead frame assembly substrate, each lead frame 2 has a region in which a conductive substrate is dissolved by a predetermined thickness by performing half-etching from the side opposite to the side having the semiconductor element mounted, after performing resin-sealing. Further, the lead frame assembly substrate includes, on the outside of the lead frame block, a substrate dissolving progress display part 4 which enables a dissolving progress state in the thickness direction of the conductive substrate dissolved by etching to be visually confirmed by at least three stages.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a lead frame assembly substrate and a semiconductor device assembly.

  In recent years, as represented by mobile phones, electronic devices are rapidly becoming smaller and lighter, and semiconductor devices used in these electronic devices are also required to be smaller, lighter, and more functional. In particular, the thickness of the semiconductor device is required to be reduced. In order to meet such demands, semiconductor devices have been developed in which a conductive substrate is finally dissolved and removed by etching from a semiconductor device using a lead frame obtained by processing a metal material such as QFP (Quad Flat Package). .

  For example, in the following Patent Document 1, a semiconductor element is divided at the center by an outer frame, an area array is formed around the periphery, and a conductor terminal having an upper surface side as a wire bonding portion and a lower surface side as an external connection terminal portion is arranged. A plurality of semiconductor devices are described. This semiconductor device uses a lead frame in which a plurality of semiconductor element mounting portions and wire bonding portions are formed on the upper surface side by half etching from the upper surface side using a copper-based metal material. Resin sealing is performed collectively from the upper surface side, and then each conductor terminal is made independent by half-etching from the lower surface side to form an external connection terminal portion on the lower surface side. The portion that becomes the conductor terminal is not etched from the upper surface side or the lower surface side, and the thickness of the metal material remains as it is, so that the conductor terminal has a shape protruding from the sealing resin portion.

JP 2007-150372 A

In the semiconductor device manufacturing process, after resin sealing, about half of the copper-based lead frame material is used in order to make the lead metal part, etc., the conductor terminal formed from the conductive substrate by half-etching from the lower surface side independent. In the past, when removing the thickness, it has been dealt with by controlling the Cu solution and confirming the microscope by sampling the product after dissolving the Cu. However, it is very difficult to determine the appropriate Cu dissolution line. . If the etching is insufficient, the lead metal part is not independent and may be defective.
On the other hand, if excessive dissolution occurs, the lead metal part may be cut off during etching, or Ni battery corrosion may occur on the plating film surface of the lead metal part, resulting in peeling of the plating film due to the Ni corrosion phenomenon. There is a case.

Conventionally, in the manufacturing process of a semiconductor element assembly, in a metal plate forming a conductive substrate, an outer peripheral portion surrounding a lead frame block in which a plurality of semiconductor element mounting lead frames are arranged adjacent to each other in a frame shape. By forming a plurality of holes and filling the plurality of holes with resin when sealing the resin, the degree of adhesion of the sealing resin to the semiconductor element mounting substrate is improved, and the metal plate is reduced to about half. Dissolve removal over thickness. At this time, the determination of whether or not the metal plate can be melted at a necessary location is based on the current state of the inspection of the sealing resin exposed after the metal plate is melted and removed, and the dimension measurement by extraction. With this method, the remaining metal plate due to insufficient melting of the metal plate can be easily discriminated, but excessive melting of the metal plate is difficult to discern by appearance and dimensional measurement, so etching proceeds excessively, and plating film peeling due to Ni corrosion phenomenon etc. Will occur.
As described above, in the process of manufacturing a semiconductor device of a type in which a semiconductor element is mounted and then resin-sealed and the conductive substrate is dissolved and removed to about half the thickness of the metal plate, copper forming the semiconductor element mounting substrate is used. It is very important to perform etching for dissolving and removing the metal plate over about half the thickness of the metal plate in an appropriate amount by recognizing the degree of progress of the metal dissolution. A means for confirming the limit of the dissolution amount is not practically used at present.

  The present invention has been made in view of such a problem. In a manufacturing process of a semiconductor device of a type in which a semiconductor element is mounted and then resin-sealed and a conductive substrate is removed, a plurality of elements are batched. In order to make the lead metal part independent by half etching from the lower surface side after resin sealing, when dissolving and removing about half the thickness of the conductive substrate, it is possible to easily and accurately determine the base material dissolution condition visually, An object of the present invention is to provide a lead frame assembly substrate and a semiconductor device assembly capable of preventing excessive etching of lead metal parts, preventing plating film peeling due to Ni corrosion phenomenon, and maintaining high productivity. Yes.

  In order to achieve the above object, a lead frame assembly substrate according to the present invention is a semiconductor element mounting substrate capable of mounting a semiconductor element in a semiconductor element mounting region, and is provided on a top surface of a conductive substrate. A lead upper surface connectable to a mounting region, a lead metal portion formed from the conductive substrate, and an electrode of a semiconductor element mounted in the semiconductor element mounting region bonded to both surfaces of the lead metal portion. A plurality of lead portions each including a plating layer and a lead lower surface plating layer connected to an external device are provided, and the semiconductor element mounting region and the plurality of lead portions are connected to the lower surface side connecting the lead metal portions constituting the lead portion. Including lead frame blocks connected by metal parts, each lead frame is mounted with a semiconductor element and the conductive substrate after resin sealing is on the semiconductor element mounting side Is a lead frame assembly substrate having a region that is dissolved over a predetermined thickness of the conductive substrate by half etching from the opposite side, and the thickness of the conductive substrate that is dissolved by etching outside the lead frame block It is characterized by having a substrate dissolution progress display section that can visually check the progress of dissolution in the vertical direction in at least three stages.

  Further, in the lead frame assembly substrate of the present invention, the substrate dissolution progress indicator is formed in the conductive substrate, and has a plurality of recesses having different depths, each having a different thickness according to the dissolution rate. It is preferable to have at least three dissolution regions having different dissolution rates.

  In the lead frame aggregate substrate of the present invention, it is preferable that the substrate dissolution progress indicator is provided at a predetermined position in a region surrounding the lead frame block in a frame shape.

  In the lead frame assembly substrate of the present invention, it is preferable that the substrate dissolution progress display portion is provided in a resin sealing region where the resin sealing is integrally performed.

  Further, the semiconductor device assembly according to the present invention includes a semiconductor element, the semiconductor element mounting region, a lead surface plating layer disposed around and electrically connected to the semiconductor element, and an external electrical connection. A lead portion having a lead undersurface plating layer, a bonding wire for electrically connecting the electrode of the semiconductor element and the lead surface plating layer, the lead surface plating layer, the bonding wire, and the lead wire A semiconductor device assembly in which a plurality of semiconductor devices each having a semiconductor element and a sealing resin portion for sealing the semiconductor element mounting region are arranged adjacent to each other and integrally sealed with the sealing resin portion. In addition, a substrate dissolution progress table is provided on the outside of the semiconductor device so that the progress of dissolution in the thickness direction of the conductive substrate dissolved by etching can be visually recognized in at least three stages. It is characterized by having a part.

  According to the present invention, when a plurality of elements are collectively encapsulated with resin and the lead metal part is made independent by half etching from the lower surface side, when dissolving and removing about half the thickness of the conductive substrate, the base material is dissolved. A lead frame assembly substrate that can easily and accurately determine the condition visually, prevent excessive etching of the lead metal part, prevent plating film peeling due to Ni corrosion phenomenon, etc., and maintain high productivity A semiconductor device assembly can be provided.

1 is a plan view showing a lead frame assembly board according to an embodiment of the present invention. 1 is a cross-sectional view showing a lead frame aggregate substrate according to an embodiment of the present invention. It is a figure which shows an example of a board | substrate melt | dissolution progress display part, (a) is sectional drawing, (b) is sectional drawing of another example, (c) is a top view of (a) and (b). It is sectional drawing which shows the semiconductor device aggregate | assembly which concerns on one Embodiment of this invention. FIG. 8 is an explanatory diagram illustrating an example of a manufacturing process of the lead frame aggregate substrate illustrated in FIG. 1. FIG. 6 is an explanatory diagram showing an example of a manufacturing process of a semiconductor device assembly using a lead frame assembly substrate manufactured through the process shown in FIG. 5. It is explanatory drawing of the usage method of a board | substrate melt | dissolution progress display part. It is explanatory drawing which shows the other example of the manufacturing process of the board | substrate melt | dissolution progress display part of a lead frame assembly board. It is explanatory drawing which shows the other example of the manufacturing process of the board | substrate melt | dissolution progress display part of a lead frame assembly board.

Prior to the description of the embodiment, the function and effect of the present invention will be described.
The lead frame assembly substrate of the present invention is a semiconductor element mounting substrate on which a semiconductor element can be mounted in the semiconductor element mounting area, and is formed from a semiconductor element mounting area provided on the upper side surface of the conductive substrate and the conductive substrate. Lead metal surface, lead surface plating layer that can be connected to the electrodes of the semiconductor element mounted in the semiconductor element mounting area that is bonded to both surfaces of the lead metal part, and lead lower surface plating that connects to external devices Each lead frame including a lead frame block including a plurality of lead portions each including a layer, wherein the semiconductor element mounting region and the plurality of lead portions are connected by a lower surface side connecting metal portion that connects the lead metal portions constituting the lead portion. However, the conductive substrate after mounting the semiconductor element and encapsulating the resin is half-etched from the side opposite to the side where the semiconductor element is mounted. A lead frame assembly substrate having a region to be melted over the substrate, and the substrate melting progress can be visually recognized in at least three stages in the thickness direction of the conductive substrate melted by etching outside the lead frame block. It has a degree display part.

  As in the lead frame assembly substrate of the present invention, a lead frame assembly including a lead frame block in which a semiconductor element mounting region and a plurality of lead portions are connected by a lower surface side connecting metal portion that connects the lead metal portions constituting the lead portion. If the substrate has a substrate dissolution progress indicator that allows the progress of dissolution to be visually recognized in at least three stages, the semiconductor element is mounted and sealed together with resin, and then the semiconductor element mounting side is viewed from the opposite side. When the conductive substrate is melted over a predetermined thickness by half-etching, the dissolution progress state is displayed by the substrate dissolution progress indicator, immediately before the desired amount of the base material is dissolved, or after the completion of the dissolution (the lower limit of the base material dissolution end). ), The state in which etching has progressed to the extent that all the base material is dissolved and Ni corrosion does not occur (the upper limit of dissolution of the base material), and the etching to the extent that Ni corrosion occurs. Ring is visible in three stages in a state in which progress. As a result, etching can be completed with an appropriate amount, and cutting of the lead metal part and peeling of the plating film caused by excessive dissolution of the base material can be prevented.

  Preferably, in the lead frame assembly substrate of the present invention, the substrate dissolution progress indicator is formed in the conductive substrate, and has a plurality of recesses having different depths, each having a different thickness depending on the dissolution rate. , Consisting of at least three dissolution zones with different dissolution rates.

  In this way, since the dissolution time until the melted regions having different thicknesses are completely melted by the recesses having different depths is different, etching of the melted regions having different thicknesses by the recesses having different depths is performed. Using the degree, the progress of etching can be visually confirmed.

  In the lead frame aggregate substrate of the present invention, preferably, the substrate dissolution progress indicator is provided at a predetermined position in a region surrounding the lead frame block in a frame shape.

  In this way, the substrate melting progress indicator can be provided without affecting the original lead frame block portion, so that the substrate melting can be performed without any special change to the lead frame assembly substrate used conventionally. A progress indicator can be provided.

  In the lead frame assembly substrate of the present invention, it is preferable that the substrate dissolution progress indicator is provided in a resin sealing region where the resin sealing is integrally performed.

  In this way, the resin is filled in the concave portion of the substrate dissolution progress display portion at the time of resin sealing, and the side surface of the substrate serving as the dissolution region of the substrate dissolution progress display portion is sealed with the resin. Therefore, the etching progress rate is accurate with respect to the exposed area of the substrate. Further, since the side surface of the substrate in the dissolution region is fixed with the resin even while the etching is in progress, a part of the substrate is not peeled off during the etching, and an accurate etching amount is shown throughout.

  The semiconductor device assembly of the present invention includes a semiconductor element, a semiconductor element mounting region, a lead surface plating layer disposed around and electrically connected to the semiconductor element, and a lead that can be electrically connected from the outside. A lead portion having a lower surface plating layer; a bonding wire for electrically connecting the electrode of the semiconductor element and the upper surface plating layer; and the upper surface plating layer, the bonding wire, the semiconductor element, and the semiconductor element mounting region. A semiconductor device assembly in which a plurality of semiconductor devices having a sealing resin portion to be stopped are arranged adjacent to each other and integrally sealed with the sealing resin portion, and etched outside the semiconductor device by etching. It has a substrate dissolution progress indicator that can visually check the progress of dissolution in the thickness direction of the conductive substrate to be dissolved in at least three stages.

  According to the semiconductor device assembly of the present invention, since the progress of dissolution in the thickness direction of the conductive substrate can be accurately recognized by the substrate dissolution progress indicator, the conductive substrate can be obtained with an appropriate etching amount. The etching can be completed.

[Lead frame assembly board]
Hereinafter, a lead frame assembly substrate according to an embodiment of the present invention will be described with reference to FIGS.
FIG. 1 is a plan view showing a lead frame assembly board according to an embodiment of the present invention. FIG. 2 is a cross-sectional view showing a lead frame assembly substrate according to an embodiment of the present invention. FIGS. 3A and 3B are diagrams showing an example of the substrate dissolution progress display unit, where FIG. 3A is a cross-sectional view, FIG. 3B is a cross-sectional view of another example, and FIG. 3C is a plan view of FIGS. .
As shown in FIG. 1, the lead frame aggregate substrate 1 of the present embodiment is provided with substrate dissolution progress display portions 4 at four corners surrounding a lead frame block 3 in which a plurality of lead frames 2 are arranged adjacent to each other in a frame shape. ing. The substrate dissolution progress display unit 4 is provided in a resin sealing region where resin sealing is integrally performed when a semiconductor device is manufactured. In the illustrated example, the substrate dissolution progress display units 4 are provided at the four corners. However, the number and positions of the substrate dissolution progress display units 4 are not limited thereto.

In the following description, for the sake of convenience, an example in which the substrate dissolution progress indicator 4 is provided at the end of one lead frame 2 will be described with reference to FIG.
The lead frame 2 includes a lead metal portion 21 formed on the conductive substrate 20, a lead upper surface plating layer 22 and a lead lower surface plating layer 23 provided to face both surfaces of the lead metal portion 21, respectively. Part 24, die pad metal part 25 formed on conductive substrate 20, die pad upper surface plating layer 26 and die pad lower surface plating layer 27 provided opposite to both surfaces of die pad metal part 25, respectively. 28. The lead portion 24 is disposed around the die pad portion 28 that is a semiconductor element mounting region.

  The conductive substrate 20 is a substrate on which the plating layers 26 and 27 of the die pad portion 28 and the plating layers 22 and 23 of the lead portion 24 are formed on both surfaces, and the plating layers 22, 23, and 26 are formed by electroplating. , 27 can be formed from a conductive material. The material of the conductive substrate 20 to be used is not particularly limited as long as conductivity is obtained, but a metal material is generally used, for example, Cu or Cu alloy.

In addition, a recess 29 is formed between the lead metal part 24 and the die pad metal part 25, and the remaining part of the conductive substrate 20 is a lower surface side connecting metal part 30.
The depth of the recess 29 depends on the thickness of the conductive substrate 20, but when the thickness is 0.2mm, it is basically about 1/2 the thickness (depth 0.1mm). The depth is 0.03 mm deeper than 1/2 of the plate thickness (depth 0.13 mm). If the depth of the recess 29 is less than 1/2 of the plate thickness, the amount of etching processing after resin sealing increases, the etching dissolution time becomes longer, and the etching solution dissolves a part of the plating layer. It becomes easy to generate trouble to do. When the depth of the recessed portion 29 is 0.03 mm deeper than 1/2 of the plate thickness (depth 0.13 mm) or more, the strength of the lower surface side connecting metal portion 30 becomes weak, and a deformation failure occurs during conveyance. there's a possibility that.

  Moreover, the board | substrate melt | dissolution progress display part 4 is provided in the edge part of the area | region where resin sealing is planned. In the substrate dissolution progress display unit 4, the conductive substrate 20 is formed with recesses 44 having different depths in three stages. The first display unit 41, the second display unit 42, and the third display unit 43 are sequentially formed. A dissolution region where the thickness of the conductive substrate 20 is increased is formed. If the thicknesses of the display portions 41, 42, and 43 are made different, the time required to complete the etching of the display portions 41, 42, and 43, which are dissolved regions, when the conductive substrate 20 is dissolved and removed by etching. Since they are different, the progress of etching can be understood by visually checking the etching state of each display portion. Each display unit 41, 42, 43 may be provided stepwise as shown in FIG. 3 (b), or as shown in FIG. Only the display portion 43 may have a configuration in which the concave portion 44 is formed on the lower surface side.

  Regarding the thickness of each of the display portions 41, 42, and 43, for example, the first display portion 41 is ½ of the plate thickness and the second display portion 42 is the plate thickness of the conductive substrate 20. The thickness is 5/8 of the thickness, and the third display unit 43 has three thicknesses of 3/4. If the thicknesses are different from each other in this way, when the conductive substrate 20 is etched from the lower surface side, the first display portion 41 is first completely dissolved, and then the second display portion 42 is dissolved. All areas are dissolved. When the etching is further continued, the entire dissolution area of the third display unit 43 is dissolved. In addition, the width | variety and length of each display part 41,42,43 should just be about 5 mm in width and 5 mm in length, for example.

[Semiconductor device assembly]
Next, a semiconductor device assembly according to an embodiment of the present invention manufactured using the above-described lead frame assembly substrate of the present embodiment will be described with reference to FIG.
In the semiconductor device assembly 5 of the present embodiment, the semiconductor element 6 is mounted on the die pad upper surface plating layer 26 of the die pad portion 28 serving as the semiconductor element mounting region, and the electrode of the semiconductor element 6 and the lead upper surface plating layer of the lead portion 24 are mounted. 22 is connected via a bonding wire 7. The entire structure including the connection portions of the semiconductor element 6 and the bonding wires 7 is sealed with a sealing resin portion 8. The sealing resin portion 8 is also formed in the first display portion 41 of the substrate dissolution progress display portion 4 and the recess 44 of the second display portion 42. The die pad portion 28 and the lead portion 24 are covered with the sealing resin portion 8 at the top and side surfaces, but the bottom surface is exposed including the lower surface lead plating layer 23 and the die pad lower surface plating layer 27.

  In addition, although the board | substrate melt | dissolution progress display part 4 is formed in the edge part of the area | region where resin sealing was made, when the above-mentioned semiconductor device assembly 1 is cut | disconnected to a predetermined dimension, a semiconductor device is completed. In addition, the substrate dissolution progress indicator 4 is cut and removed.

[Lead frame substrate manufacturing method]
Next, a method for manufacturing a lead frame aggregate substrate according to an embodiment of the present invention will be described with reference to FIG.
First, in manufacturing the lead frame aggregate substrate 1, a conductive substrate 20 is prepared (see FIG. 5A). The material of the conductive substrate 20 to be used is not particularly limited as long as conductivity can be obtained, but generally a metal material is used, for example, Cu or Cu alloy.

  Next, the entire surface of the conductive substrate 20 is covered with a resist. As the resist 9 to be used, a conventionally known method such as laminating a dry film resist or coating a resist layer by applying and drying a liquid resist can be used (see FIG. 5B). Next, a plating mask 94 having a plating opening 93 for forming the plating layers 22, 23, 26, and 27 is formed through an exposure / development process after covering the resist 9 (FIG. 5C). reference).

  Next, the exposed portion of the conductive substrate 20 in which the opening 93 for plating is formed is plated, and the plating layers 22, 23, 26, 27 are formed on the upper surface or the lower surface of the die pad portion 28 or the lead portion 24. (See FIG. 5D). Thereafter, the plating mask 94 is peeled off. (See FIG. 5 (e)).

  The lead surface plating layer 22 constituting the lead portion 24 is not particularly limited in the type of plating metal used, but is preferably selected in consideration of the following points. Since the uppermost surface of the lead upper surface plating layer 22 includes an internal electrode portion connected to the electrode of the semiconductor element 6 by the bonding wire 7, a plating metal suitable for connection of the bonding wire 7 is selected. For example, when the bonding wire 7 is an Au wire, Ag plating, Au plating, Pd plating, or the like is preferable.

  On the other hand, since the lead lower surface plating layer 23 includes an external electrode portion connected to an external device, a plating metal suitable for connection to the external device is selected. Also, since there are generally many solder-based alloys such as solder balls for connection to external devices, Au plating, Pd plating, etc., which have good solder wettability and good bondability with solder, are preferable.

  Furthermore, since the upper surface plating layer 22 and the lower surface plating layer 23 are generally formed by performing electroplating simultaneously, the same plating configuration is desirable. For example, multilayer plating in which Ni plating, Pd plating, and Au plating are stacked in this order on the outer side of the contact surface of the conductive substrate 20 may be used.

  Further, the types of plating of the upper surface plating layer 22 and the lower surface plating layer 23 may be different. For example, the upper surface may be Ag plating with good bonding properties, and the lower surface may be multi-layer plating in which solder wettability is good, such as Ni plating, Pd plating, and Au plating.

  The plating applied to the die pad upper surface plating layer 26 and the die pad lower surface plating layer 27 constituting the die pad portion 28 is basically the same as the plating of the lead portion 24 because the plating is performed simultaneously with the lead portion 24. is there.

  Next, both surfaces of the base material are covered with a resist in order to form etching openings 91 for forming the recesses 44 for forming the recesses 29 and the substrate dissolution progress display part 4 by half etching (FIG. 5). (Refer to (f)). Next, an etching mask 92 having an etching opening 91 for covering the resist 9 and forming an etching through an exposure / development process is formed (see FIG. 5G). At this time, an opening 91 for forming the first display portion 41 is provided on the upper surface of the substrate dissolution progress display portion 4 portion, and the portion where the second display portion 42 and the third display portion 43 are formed is an etching rate. A lattice-like etching mask 92 ′ is formed in order to slow down and finish the etching depth shallow. Further, the portion where the first display portion 41 and the third display portion 43 are formed on the lower surface of the substrate dissolution progress display portion 4 is covered with an etching mask mask 92 to prevent etching, and the second display portion. In the portion where 42 is formed, a lattice-like etching mask 92 ′ is formed in order to slow down the etching rate and finish the etching depth shallow.

Next, half etching is performed from both surfaces of the conductive substrate 20 to form the recessed portions 29 (see FIG. 5H). By this etching, a concave portion 44 for forming the first display portion 41, the second display portion 42 and the third display portion 43 of the substrate dissolution progress display portion 4 is also formed at the same time. After the etching is completed, the etching mask 92 and the lattice-shaped etching mask 92 ′ are peeled off (see FIG. 5 (i)). The depth of the recess 29 and the depth of the second recess 442 are substantially equal, the first recess 441 is 1/4 of the depth of the recess 29, and the third recess 443 is the depth of the recess 29. It is about half the depth.
Thereby, the lead frame aggregate substrate 1 of this embodiment is obtained.

  In the above example, the first display unit 41, the second display unit 42, and the third display unit 43 are formed by attaching the resist once. However, as shown in FIG. May be formed by etching twice according to depth. Specifically, the recess 29 and the second recess 442 are set as the first time (see FIG. 8B), and the first recess 441 and the third recess 442 are formed. The concave portion 443 may be set for the second time (see FIG. 8E).

  Alternatively, as another example, for example, as shown in FIG. 9, the exposure ratio of the first recess 441 and the third recess 443 to the second recess 442 in the resist 9 used for the etching mask 92 is changed. Differently, the thickness of the resist that is exposed and developed and remains after development is different for forming the second recess 442 and for forming the first recess 441 and the third recess 443 (FIG. 9A). )reference).

  The state before the half etching is performed so that the etching opening 91 for forming the recess 29 and the etching opening 91 for forming the second recess 442 are formed. The first recess 441 and the third recess 443 are in a state where the resist remaining amount is about 10%.

  Then, as the first etching, 1/4 of the base plate thickness that is about half of the half etching depth is etched (see FIG. 9B). Next, the remaining 10% of the resist remaining on the surfaces of the first concave portion 441 and the third concave portion 443 is developed and removed by the second development (see FIG. 9C). Next, as the second etching, the etching conditions of the nozzle of the etching solution are set so that the etching amount is halved on the lower surface than the upper surface when half of the base plate thickness of the remaining depth is etched by half etching. By adjusting, the recess 29 and the second recess 442 are half-etched to a depth of 1/2 of the base plate thickness, and the third recess 443 is half-etched to a depth of 1/4 of the base plate thickness. (See FIG. 9 (d)), the first recess 441 is half-etched to a depth of 1/8 of the base plate thickness (see FIG. 9 (e)).

[Method of Manufacturing Semiconductor Device Assembly]
Next, a manufacturing method of the semiconductor device assembly 5 according to the embodiment of the present invention using the lead frame assembly substrate 1 of the embodiment described above will be described with reference to FIG.

  First, the semiconductor element 6 is mounted on the die pad upper surface plating layer 26 of the die pad portion 28 of the lead frame assembly substrate 1 (see FIG. 6A). At this time, the semiconductor element 6 may be bonded and fixed on the die pad upper surface plating layer 26 using a silver paste, an adhesive, or the like.

  Next, the electrodes of the semiconductor element 6 and the lead surface plating layer 22 of the lead portion 24 are electrically connected using the bonding wire 7 (see FIG. 6B).

  Next, a sealing resin portion 8 is formed on the entire surface of the lead frame aggregate substrate 1 where the semiconductor elements 6 are mounted, and the resin sealing is performed (see FIG. 6C). In this resin sealing step, the sealing resin portion is also formed in the second concave portion 442 and the third concave portion 443 forming the second display portion 42 and the third display portion 43 of the substrate dissolution progress display portion 4. 8 is formed. On the other hand, the sealing resin portion 8 is not formed in the second display portion 42 in which the first concave portion 441 is formed on the lower surface side of the conductive substrate 20, and the first concave portion 441 is exposed as it is. ing.

Next, the lower-surface-side connecting metal portion 30 of the conductive substrate 20 in the lead frame block 3 is dissolved and removed by half-etching from the lower surface, and the lead metal portion 21 and the die pad metal portion 25 are made independent (see FIG. 6D). . At this time, since the remaining base material state of each of the display units 41, 42, and 43 serving as the dissolution region of the substrate dissolution progress display unit 4 can be visually confirmed, it is possible to prevent excessive dissolution.
Thereby, the semiconductor device assembly 5 of the present embodiment is completed. And finally, it cut | disconnected so that it might become the dimension of a predetermined semiconductor device, and the semiconductor device 51 was obtained (refer FIG.6 (e)). Details of how to use the substrate dissolution progress display unit 4 will be described later.

[How to use the substrate dissolution progress indicator]
Next, with reference to FIG. 7, a specific example of a method for using the substrate melting progress display unit 4 which is a feature of the lead frame aggregate substrate 1 of the present invention will be described.
7 (a) to 7 (d) show base materials according to the progress of etching of the display portions 41, 42, and 43, which are the dissolution regions of the substrate dissolution progress display portion 4 arranged on the lead frame aggregate substrate 1 of the present invention. It is sectional drawing which showed an example of the time series change of.

  As shown in FIG. 7A, the substrate dissolution progress indicator 4 is disposed on the outer periphery of the conductive substrate 20 in the resin sealing region, and the substrate dissolution progress indicator 4 includes the thickness of the dissolution region. The first display unit 41, the second display unit 42, and the third display unit 43 are formed so as to be thicker in order. Further, the sealing resin portion 8 is formed in the second concave portion 442 and the third concave portion 443 forming the first display portion 41 and the third display portion 43. When the conductive substrate 20 is dissolved and removed by etching, the thickness of each display portion is different, so that the time required until the dissolution region of each display portion is completely etched is different.

  Regarding the thickness of each of the display portions 41, 42, 43, for example, the first display portion 41 is ½ the thickness of the conductive substrate 20 and the second display portion is thick. The third display unit 43 has three thicknesses of 3/4 thickness. If the thicknesses are different from each other in this way, when the conductive substrate 20 is etched from the lower surface side, the first display portion 41 is first completely dissolved, and then the second display portion 42 is dissolved. All areas are dissolved. When the etching is further continued, the entire dissolution area of the third display unit 43 is dissolved. In addition, the width | variety and length of each display part 41,42,43 should just be about 5 mm in width and 5 mm in length, for example. When etching is performed from the upper surface side until the recess 29 of the conductive substrate 20 has a depth of ½ of the plate thickness, the plate thickness of the lower surface side connecting metal portion 30 is ½ of the plate thickness of the conductive substrate 20. Become. Therefore, if the dissolution region of the first display unit 41 is completely dissolved, it can be considered that the lower surface side connecting metal portion 30 is basically dissolved.

In the following description, it is assumed that the conductive substrate 20 is etched from the upper surface side so as to be slightly deeper than half the thickness of the plate to form the recess 29.
Etching is started, and as shown in FIG. 7B, a portion of the conductive substrate 20 where the substrate dissolution progress display portion 4 is not provided is a recess 29 of the conductive substrate 20 when etching starts from the lower surface side. The first display section 41 is etched when the thickness of the lower-surface-side connecting metal portion 30 immediately below is reduced to half the thickness, that is, when the thickness of the conductive substrate 20 is less than 1/4. Since there was 1/2 the thickness of the conductive substrate at the start, the melted area still remains. In this state, the lower surface side connecting metal part 30 is not dissolved until the lead metal part 21 and the die pad metal part 25 are separated.

  Etching is further continued, and as shown in FIG. 7 (c), a portion of the conductive substrate 20 where the substrate dissolution progress indicator 4 is not provided is a recess 29 of the conductive substrate 20 at the time of starting etching from the lower surface side. If the thickness of the conductive substrate 20 is etched to a thickness that is slightly less than ½ of the plate thickness immediately below, that is, more than ½ of the plate thickness of the conductive substrate 20, the dissolved area of the first display portion 41 is substantially dissolved. In this state, the lower surface side connecting metal part 30 is almost dissolved, and the lead metal part 21 and the die pad metal part 25 are independent. Etching may be completed with this state as the lower limit of dissolution of the substrate.

  However, in this state, if there is a concern about the completion of etching, the etching is further continued, and the etching is continued until the dissolution region of the second display portion 42 is completely dissolved as shown in FIG. If etching is performed up to this state, the lower surface side connecting metal part 30 is completely dissolved, and the lead metal part 21 and the die pad metal part 25 are surely independent. Etching is completed using this state as the upper limit of dissolution of the substrate. Excessive etching can be prevented by completing the etching with the metal of the third display portion 43 still remaining. Basically, the lower limit of the base material dissolution at which all the metal in the dissolution region in the first display unit 41 is dissolved and the base material in which all the metal in the dissolution region in the second display unit 42 is dissolved. If the melting is completed within the upper limit of melting, all the lead frames 2 in the lead frame block 3 can be etched from the lower surface side of the conductive substrate 20 without excess or deficiency.

  Examples of the respective manufacturing methods will be described below with respect to the lead frame assembly substrate and the semiconductor device assembly of the present invention.

[Example 1]
One embodiment of a method for manufacturing a lead frame aggregate substrate will be described with reference to FIG.
First, a Cu plate having a thickness of 0.2 mm was processed into a long plate shape having a width of 140 mm as the conductive substrate 20 (see FIG. 5A).

  Next, a photosensitive dry film resist 9 having a thickness of 0.04 mm was attached to both surfaces of the conductive substrate 20 with a laminate roll (see FIG. 5B). Then, a desired pattern that becomes the lead upper surface plating layer 22 and the die pad upper surface plating layer 26 on the upper side surface of the conductive substrate 20 to which the resist 9 is pasted, and the lead lower surface plating layer 23 and the die pad lower surface plating layer 27 on the lower side surface. The glass masks on which the film was formed were covered on both surfaces in a pattern-aligned state, and both surfaces were exposed to ultraviolet light through the glass mask. After the exposure, the plating mask 94 provided with an opening 93 for plating by performing a development process for dissolving the uncured dry film resist which has not been exposed to the ultraviolet light by blocking the irradiation of the ultraviolet light with a sodium carbonate solution. (See FIG. 5 (c)). A plating mask 94 was also formed at a location where the substrate dissolution progress indicator 4 was formed.

  Next, plating was performed on the opening 93 for plating where the metal surface of the conductive substrate 20 was exposed to form plating layers 22, 23, 26, and 27. In the plating, Ni plating was formed in a thickness of 3.0 μm, Pd plating was 0.1 μm, and Au plating was approximately 0.04 μm in thickness from the exposed surface of the substrate (see FIG. 5D). Thereafter, the plating mask 94 was peeled off with a sodium hydroxide solution (see FIG. 5 (e)).

Next, a photosensitive dry film resist 9 having a thickness of 0.025 mm was attached to both surfaces of the conductive substrate 20 on which the plating layer was formed (see FIG. 5 (f)). Next, the lower surface side of the substrate covers almost the entire surface including the plating layers 23 and 27, and the upper surface side is coated with a desired pattern so as to cover 0.05 mm larger on one side than the lead upper surface plating layer 22 and the die pad upper surface plating layer 26. The formed glass mask was placed on a dry film resist and exposed to ultraviolet light.
At this time, an opening 91 for forming the first display portion 41 is provided on the upper surface of the substrate dissolution progress display portion 4 portion, and the portion where the second display portion 42 and the third display portion 43 are formed is an etching rate. A lattice-like etching mask 92 ′ is formed in order to slow down and finish the etching depth shallow. Further, the portion where the first display portion 41 and the third display portion 43 are formed on the lower surface of the substrate dissolution progress display portion 4 is covered with an etching mask mask 92 to prevent etching, and the second display portion. A lattice-like etching mask 92 ′ was formed in the portion where 42 is formed in order to slow down the etching rate and finish the etching depth shallow. (See FIG. 5 (g)).

  Next, half etching is performed from the upper surface side with a ferric chloride solution to form a recessed portion 29 having a depth of 0.10 mm and a second recessed portion 442 in the conductive substrate 20, and a first having a depth of 0.025mm is formed. The third concave portion 443 having a depth of 0.05 mm was formed (see FIG. 5H). Thereafter, the etching mask 92 was peeled off (see FIG. 5I). By this etching process, the parts to be the lead metal part 21, the die pad metal part 25, and the lower surface side connecting metal part 30 were formed. In addition, the thickness of the first display portion 41 of the substrate melting progress display portion 4 is 0.10 mm, the thickness of the second display portion 42 is 0.125 mm, and the plate of the third display portion 43. The thickness was 0.15 mm. The width was 5 mm and the length was 5 mm.

[Example 2]
Next, an example of a method for manufacturing a semiconductor element assembly using the lead frame assembly substrate 1 obtained by the manufacturing process shown in FIG. 5 will be described with reference to FIG.
First, the semiconductor element 6 was mounted on the die pad upper surface plating layer 26 of the die pad portion 28 of the lead frame assembly substrate 1 obtained by the manufacturing process shown in FIG. 5 (see FIG. 6A).
Next, the semiconductor element 6 and the lead surface plating layer 22 of the lead portion 21 were connected by the bonding wire 7 (see FIG. 6B).
Next, a sealing resin portion 8 was formed on the surface on which the semiconductor element 6 is mounted and resin-sealed (see FIG. 6C).

Next, the conductive substrate 20 in the lead frame block 3 was half-etched from the lower surface side, the lower surface side connecting metal portion 30 was melted, and the lead metal portion 21 and the die pad metal portion 25 were made independent. As a result, a semiconductor device assembly 5 of this example was obtained (see FIG. 6D). At this time, the etching proceeds while confirming the remaining state of the base material on the substrate dissolution progress display unit 4, and between the base material dissolution end lower limit shown in FIG. 7 (c) and the base material dissolution end upper limit shown in FIG. 7 (d). The base material dissolution step by etching was completed.
The semiconductor device assembly 5 manufactured in this way was cut to the dimensions of a predetermined semiconductor device to obtain a semiconductor device 51 (see FIG. 6E).

DESCRIPTION OF SYMBOLS 1 Lead frame assembly board 2 Lead frame 20 Conductive board 21 Lead metal part 22 Lead upper surface plating layer 23 Lead lower surface plating layer 24 Lead part 25 Die pad metal part 26 Die pad upper surface plating layer 27 Die pad lower surface plating layer 28 Die pad part 29 Indentation part 3 Lead frame block 30 Lower surface side connection metal part 4 Substrate dissolution progress display part 41 First display part 42 Second display part 43 Third display part 44 Concave part 441 First concave part 442 Second concave part 443 Third recess 5 Semiconductor device assembly 51 Semiconductor device 6 Semiconductor element 7 Bonding wire 8 Sealing resin portion 9 Resist 91 Etching opening 92 Etching mask 92 ′ Lattice etching mask 93 Plating opening 94 Plating Mask

Claims (5)

A semiconductor element mounting substrate capable of mounting a semiconductor element in a semiconductor element mounting area,
A semiconductor element mounting region provided on the upper surface of the conductive substrate;
A lead metal portion formed from the conductive substrate, a lead surface plating layer that can be connected to an electrode of a semiconductor element mounted on the semiconductor element mounting region that is bonded to both surfaces of the lead metal portion, and an external surface Equipped with multiple lead parts consisting of a plating layer under the lead connected to the device,
The semiconductor element mounting region and the plurality of lead parts include a lead frame block connected by a lower surface side connecting metal part that connects the lead metal parts constituting the lead part, and each lead frame mounts a semiconductor element. A lead frame assembly substrate having a region where the conductive substrate after resin sealing is dissolved over a predetermined thickness of the conductive substrate by half etching from the side opposite to the semiconductor element mounting side,
A lead frame aggregate substrate having a substrate dissolution progress indicator that can visually recognize the progress of dissolution in the thickness direction of the conductive substrate dissolved by etching in at least three stages outside the lead frame block. .   The substrate dissolution progress indicator is formed of at least three dissolution regions with different dissolution rates, each having a different thickness according to the dissolution rate, by a plurality of recesses having different depths formed on the conductive substrate. The lead frame assembly board according to claim 1, wherein   3. The lead frame assembly board according to claim 1, wherein the substrate dissolution progress indicator is provided at a predetermined position in a region surrounding the lead frame block in a frame shape. 4.   The lead frame assembly board according to any one of claims 1 to 3, wherein the substrate dissolution progress indicator is provided in a resin sealing region in which the resin sealing is integrally performed. A semiconductor element, and the semiconductor element mounting region;
A lead portion having a lead upper surface plating layer disposed around and electrically connected to the semiconductor element; and a lead lower surface plating layer capable of being electrically connected from the outside;
A bonding wire for electrically connecting the electrode of the semiconductor element and the surface plating layer on the lead;
A plurality of semiconductor devices having the surface plating layer on the lead, the bonding wire, the semiconductor element, and a sealing resin portion for sealing the semiconductor element mounting region are disposed adjacent to each other, and are integrated by the sealing resin portion. A semiconductor device assembly sealed with resin,
A semiconductor device assembly, comprising a substrate dissolution progress indicator that can visually recognize the progress of dissolution in the thickness direction of the conductive substrate dissolved by etching in at least three stages, outside the semiconductor device.