TW201537273A - Pixel structure - Google Patents

Abstract

A pixel structure includes a scan line, a data line, a first pixel unit and a second pixel unit. The first pixel unit includes a first active device and a pixel electrode electrically connected to the first active device. The first active device includes a first gate electrode, a first source electrode, and a first drain electrode. The first source electrode is electrically connected to the data line. The first drain electrode is electrically connected to the first pixel electrode. The second pixel unit includes a second active device and a second pixel electrode electrically connected to the second active device. The second active device includes a second gate electrode, a second source electrode and a second drain electrode. The first gate electrode and the second gate electrode are electrically connected to the scan line. The second drain electrode is electrically connected to the second pixel electrode. The first drain electrode is electrically connected to the second source electrode.

Description

Pixel structure

The present invention relates to a pixel structure, and more particularly to a pixel structure in which an active element is connected in series with each other.

At present, the pixel structure of a common display panel is formed by arranging an active component in a pixel region with a single pixel electrode. However, in this way, the display medium (for example, a liquid crystal compound) driven in a single pixel structure has only a single degree of deflection, so that the user can view a good quality display screen only within a certain viewing angle range. In order to realize the display function of wide viewing angle, a common pixel design method is to divide a pixel structure into at least two pixel regions, wherein each pixel region is configured with an active component and a pixel electrode, for example. The pixel electrodes in different pixel regions may have different alignment structures and/or different potentials, so that the display medium driven by the single pixel structure can have a plurality of different alignment directions and/or deflection degrees. Thereby achieving a wide viewing angle display function.

As the display quality of the display panel is becoming higher and higher, a high-resolution display panel is born. Currently, 4K2K resolution display panels have been developed, and the number of pixel structures is quite large (for example, the resolution is 3840x2160 and 4096 × 2160 two pixel design methods). Correspondingly, the area allocated by each pixel structure is relatively small. If the design method of the single pixel structure with multiple pixel regions is used, the area of each pixel region will be further reduced. At this time, the setting of the plurality of active elements will occupy too much space, causing the aperture ratio to decrease, and the problem of excessive parasitic capacitance is easily generated.

The present invention provides a pixel structure in which a plurality of active elements can be connected in series to increase an aperture ratio and reduce parasitic capacitance.

A pixel structure of the present invention includes a scan line, a data line, a first pixel unit, and a second pixel unit. The first pixel unit includes a first active component and a first pixel electrode electrically connected to the first active component, wherein the first active component includes a first gate, a first source, and a first pole. The first gate is electrically connected to the scan line, the first source is electrically connected to the data line, and the first drain is electrically connected to the first pixel electrode. The second pixel unit includes a second active component and a second pixel electrode electrically connected to the second active component. The second active device includes a second gate, a second source, and a second drain. The second gate is electrically connected to the scan line, and the second drain is electrically connected to the second pixel. The first drain is electrically connected to the second source.

Based on the above, the first drain of the first active component of the pixel structure of the present invention is electrically connected to the second source of the second active component, thereby forming the first active component and the second active component connected in series with each other, thereby Increase the aperture ratio of the pixel structure and Reduce parasitic capacitance to provide good display quality.

The above described features and advantages of the invention will be apparent from the following description.

10, 10a, 10b, 10c‧‧‧ pixel array

100, 100a, 100b, 100c‧‧‧ pixel structure

110‧‧‧ scan line

120‧‧‧Information line

130‧‧‧ first pixel unit

132‧‧‧First active component

134‧‧‧first pixel electrode

140‧‧‧Second pixel unit

142‧‧‧Second active components

144‧‧‧second pixel electrode

150‧‧‧Connecting electrode

160‧‧‧Signal line

170‧‧‧Share unit

172‧‧‧Share active components

174‧‧‧Share capacitor

180‧‧‧ third pixel unit

182‧‧‧ Third active component

184‧‧‧ third pixel electrode

C1, C2, C3‧‧‧ channels

CL‧‧‧ signal line

Cs‧‧‧Shared Capacitor

D1, D2, D3‧‧‧ bungee

DL‧‧‧ data line

G1, G2, G3‧‧‧ gate

PE1‧‧‧ first pixel electrode

PE2‧‧‧second pixel electrode

S1, S2, S3‧‧‧ source

SS‧‧‧Shared source

SD‧‧‧Share bungee

SG‧‧‧ Sharing gate

SC‧‧‧Share channel

ST‧‧‧Share active components

SE‧‧‧Shared capacitor

SL‧‧‧ scan line

T1‧‧‧ first active component

T2‧‧‧second active component

1 is a top plan view of a pixel structure in accordance with an embodiment of the present invention.

2 is a top plan view of a pixel array formed by the pixel structure of FIG. 1.

3 is a top plan view of a pixel structure in accordance with an embodiment of the present invention.

4 is a top plan view of a pixel array formed by the pixel structure of FIG.

FIG. 5 is a top plan view of a pixel structure according to another embodiment of the present invention.

6 is a top plan view of a pixel array formed by the pixel structure of FIG. 5.

FIG. 7 is an equivalent circuit diagram of the pixel structure of FIG. 5. FIG.

Fig. 8 is a top plan view showing the pixel structure of Comparative Example 1.

Fig. 9 is a top plan view showing a pixel array formed by the pixel structure of Comparative Example 1.

1 is a top plan view of a pixel structure in accordance with an embodiment of the present invention. 2 is a top plan view of a pixel array formed by the pixel structure of FIG. 1. Referring to FIGS. 1 and 2, the pixel array 10 includes a plurality of pixel structures 100, and the pixel structures 100 are arranged in an array. Four pixel structures 100 are illustrated in FIG. 2 as an example. However, the invention is not limited thereto. The pixel array 10 can include more pixel structures 100, depending on the design It depends. As shown in FIG. 1, the pixel structure 100 includes a scan line 110, a data line 120, a first pixel unit 130, and a second pixel unit 140. The first pixel unit 130 and the second pixel unit 140 share the same scan line 110 and the same data line 120.

The first pixel unit 130 includes a first active element 132 and a first pixel electrode 134. The first pixel electrode 134 is electrically connected to the first active component 132. The first active device 132 includes a first gate G1, a first channel C1, a first source S1, and a first drain D1. The first gate G1 and the scan line 110 are electrically connected. The first channel C1 is disposed above the first gate G1, and an insulating layer (not shown) is disposed between the first gate G1 and the first channel C1. The first source S1 and the data line 120 are electrically connected and cover a portion of the first channel C1. The first drain D1 and the first source S1 are separated from each other and cover a portion of the first channel C1. The first pixel electrode 134 and the first drain D1 are electrically connected.

The second pixel unit 140 includes a second active element 142 and a second pixel electrode 144. The second pixel electrode 144 is electrically connected to the second active element 142. The second active component 142 includes a second gate G2, a second channel C2, a second source S2, and a second drain D2. The second gate G2 and the scan line 110 are electrically connected. The second channel C2 is disposed above the second gate G2, and an insulating layer (not shown) is disposed between the second gate G2 and the second channel C2. The second source S2 and the first drain D1 are electrically connected and cover a portion of the second channel C2. The second drain D2 and the second source S2 are separated from each other and cover a portion of the second channel C2. The second pixel electrode 144 and the second drain D2 are electrically connected. In another perspective, the first drain D1 and the second source S2 can be regarded as The same conductive pattern, and the conductive pattern can simultaneously serve as the first drain D1 of the first active component 132 and the second source S2 of the second active component 142, thereby forming the first active component 132 and the second active connected in series with each other Element 142.

In general, if two active components are arranged in parallel, the sources of the two active components are connected together and overlap with the scan line 110, so the parasitic capacitance on the scan line 110 is easily excessive, resulting in the pixel structure 100. The display quality is poor. In contrast, the first drain D1 and the second source S2 of the pixel structure 100 of the present embodiment may be formed by the same conductive pattern, so that the conductor area overlapping with the scan line 110 may be further reduced to reduce the scan line 110. Parasitic capacitance. At the same time, the area occupied by the first active element 132 and the second active element 142 can be reduced, thereby increasing the aperture ratio of the pixel structure 100.

In addition, since the first drain D1 and the second source S2 are electrically connected, the data signal transmitted by the data line 120 can be written into the second active component 142 through the first drain D1, thereby driving the second pixel electrode. 144. In other words, the first active component 132 and the second active component 142 in the pixel structure 100 are connected in series, so when the scan line 110 electrically connected to the pixel structure 100 is enabled, the pixel structure 100 is electrically connected. The data signal of the data line 120 can be written into the first pixel electrode 134 and the second pixel electrode 144 to simultaneously charge the first pixel electrode 134 and the second pixel electrode 144 and make the first pixel electrode 134 The second pixel electrode 144 has the same potential.

In another aspect, a first patterned conductor layer can be formed by a first mask process, and the first patterned conductor layer includes a scan line 110 and a first gate. G1 and the second gate G2, the material of which includes an alloy, a metal material, a nitride of a metal material, an oxide of a metal material, an oxynitride of a metal material, a transparent conductive material, other conductive materials, or a stacked layer of the above materials. In addition, a second patterned conductor layer can be formed by a second mask process, and the second patterned conductor layer includes a data line 120, a first source S1, a first drain D1, and a second source S2. And a second drain D2, the material of which comprises an alloy, a metal material, a nitride of a metal material, an oxide of a metal material, an oxynitride of a metal material, a transparent conductive material, other conductive materials or a stacked layer of the above materials. The material of the first patterned conductor layer and the second patterned conductor layer is preferably a metal material or other highly conductive material based on conductivity considerations.

In addition, the first pixel electrode 134 and the second pixel electrode 144 may be made of a transparent conductive material, such as indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), or the like. Or other suitable conductive materials, but are not limited thereto.

According to the embodiment, the pixel structure 100 further includes a connection electrode 150. The connection electrode 150 is located between the first drain D1 and the second source S2, wherein one end of the connection electrode 150 is connected to the first drain D1 and the other end is connected to the second source S2. The connection electrode 150 does not overlap the first gate G1, the second gate G2, and the scanning line 110. The connection electrode 150 can be formed in the same mask process as the first drain D1 and the second source S2, so the connection electrode 150, the first drain D1 and the second source S2 can be made of the same material and continuous. Membrane layer. In this embodiment, the connection electrode 150 can transfer the data signal from the first drain D1 to the second source S2.

According to the embodiment, the pixel structure 100 further includes a signal line 160 and a sharing unit 170. The signal line 160 is, for example, parallel to the scanning line 110, but the present invention is not limited thereto. In this embodiment, the first pixel electrode 134 and the scan line 110 are located on opposite sides of the signal line 160. The material of the signal line 160 includes an alloy, a metal material, a nitride of a metal material, an oxide of a metal material, an oxynitride of a metal material, a transparent conductive material, other conductive materials, or a stacked layer of the above materials.

The sharing unit 170 includes a sharing active component 172 and a sharing capacitor 174. The sharing capacitor 174 and the sharing active component 172 are electrically connected. The shared active component 172 includes a shared gate SG, a shared channel SC, a shared source SS, and a shared drain SD, wherein the shared gate SG is electrically connected to the signal line 160. The first drain D1 and the second source S2 are electrically connected to the shared source SS. Share the electrical connection between the bungee SD and the shared capacitor 174.

The sharing capacitor 174 includes a bottom electrode 174a and a top electrode 174b. An insulating layer may be interposed between the bottom electrode 174a and the top electrode 174b to have a coupling capacitance therebetween. The bottom electrode 174a is, for example, formed by the first mask process and belongs to a portion of the first patterned conductor layer. The top electrode 174b is formed, for example, by a portion of the second patterned conductor layer formed by the second mask process. When the signal is supplied to the signal line 160 to turn on the sharing active element 172, the driving voltage of the first pixel electrode 134 can be affected by the sharing capacitor 174. As such, the first pixel electrode 134 can have a different driving voltage than the second pixel electrode 144 to further display colors of different gray levels to increase the viewing angle of the display panel having the pixel structure 100.

In the following, various embodiments will be described to illustrate the pixel structure of the present invention, where the same reference numerals will be used to refer to the same components, and the same description will be omitted. 3 is a top plan view of a pixel structure in accordance with an embodiment of the present invention. 4 is a top plan view of a pixel array formed by the pixel structure of FIG. Referring to FIGS. 3 and 4, the pixel array 10a includes a plurality of pixel structures 100a, and the pixel structures 100a are arranged in an array. Four pixel structures 100a are illustrated in FIG. 4 as an example. However, the invention is not limited thereto. The pixel array 10a may include more pixel structures 100 depending on design requirements. As shown in FIG. 3 and FIG. 4, the pixel structure 100a is similar in structure to the pixel structure 100, and the main difference is the setting position of the signal line 160 and the sharing unit 170. In the embodiment of FIG. 3, the first pixel electrode 134 and the signal line 160 of the pixel structure 100a are located on opposite sides of the scan line 110.

FIG. 5 is a top plan view of a pixel structure according to another embodiment of the present invention. 6 is a top plan view of a pixel array formed by the pixel structure of FIG. 5. FIG. 7 is an equivalent circuit diagram of the pixel structure of FIG. 5. FIG. Referring to FIG. 5, FIG. 6, and FIG. 7, the pixel array 10b includes a plurality of pixel structures 100b, and the pixel structures 100b are arranged in an array. The four pixel structure 100b is illustrated in FIG. 6 as an example. However, the invention is not limited thereto. The pixel array 10b may include more pixel structures 100b depending on design requirements.

The pixel structure 100b is similar to the pixel structure 100 of FIG. 1, and the differences will be explained below. The pixel structure 100b further includes a third pixel unit 180. The third pixel unit 180 shares the same scan line 110 and the same data line 120 with the first pixel unit 130 and the second pixel unit 140.

The third pixel unit 180 includes a third active element 182 and a third pixel electrode 184. The third pixel electrode 184 is electrically connected to the third active element 182. The third active component 182 includes a third gate G3, a third channel C3, a third source S3, and a third drain D3. The third gate G3 and the scan line 110 are electrically connected. The third channel C3 is disposed above the third gate G3 and electrically insulated from each other. The third source S3 and the first drain D1 are electrically connected and cover a portion of the third channel C3. The third drain D3 and the third source S3 are separated from each other and cover a portion of the third channel C3. The third pixel electrode 184 and the third drain D3 are electrically connected. In the embodiment, the first gate G1, the second gate G2, and the third gate G3 are connected together. The first channel C1, the second channel C2, and the third channel C3 are connected together. The first drain D1, the second source S2, and the third source S3 are electrically connected together. In another aspect, the first drain D1 and the second source S2 and the third source S3 can be regarded as the same conductive pattern, and the conductive pattern can simultaneously serve as the first drain D1 of the first active component 132. The second source S2 of the second active element 142 and the third source S3 of the third active element 182 are formed to form a first active element 132 and a second active element 142 connected in series with each other and a first active element 132 connected in series with each other and The third active component 182.

According to the embodiment, the pixel structure 100b includes a signal line 160 and a sharing unit 170. The sharing unit 170 includes a sharing active component 172 and a sharing capacitor 174 electrically connected to the sharing active component 172. The shared active component 172 includes a shared gate SG, a shared channel SC, a shared source SS, and a shared drain SD. The first drain D1, the second source S2, the shared source SS, and the third source S3 are electrically connected together. From another perspective, the first drain D1 and the split source SS It can also be regarded as the same conductive pattern, and the conductive pattern can simultaneously serve as the first drain D1 of the first active component 132 and the shared source SS of the shared active component 172, thereby forming the first active component 132 and sharing active in series with each other. Element 172.

In the present embodiment, the sharing capacitor 174 includes a bottom electrode 174a and a top electrode 174b. An insulating layer may be interposed between the bottom electrode 174a and the top electrode 174b to have a coupling capacitance therebetween. The bottom electrode 174a is, for example, formed by the first mask process and belongs to a portion of the first patterned conductor layer. The top electrode 174b is formed, for example, by a portion of the second patterned conductor layer formed by the second mask process. When the signal is supplied to the signal line 160 to turn on the sharing active element 172, the driving voltage of the first pixel electrode 134 can be affected by the sharing capacitor 174. In this way, the first pixel electrode 134 can have different driving voltages from the second pixel electrode 144 and the third pixel electrode 184 to further display colors of different gray levels to increase the display panel having the pixel structure 100. Perspective.

In detail, the pixel structure 100b of the embodiment is described with reference to FIG. 6 and FIG. 7. The first active component 132, the second active component 142, and the third active component 182 are all electrically connected to the scan line 110, and only The first source S1 of the first active component 132 is connected to the data line 120. When the scan line 110 is enabled and the signal line 160 is disabled, the data signal on the data line 120 is written into the first active component 132. At this time, since the first active component 132 is connected in series with the second active component 142, The first active component 132 is connected in series with the third active component 182. Therefore, the data signals on the data line 120 are also written into the second active component 142 and the third active component 182. In other words, when the scan line 110 is turned on, the first pixel electrode 134 and the second pixel electrode may be 144 and the third pixel electrode 184 are charged. In the present embodiment, since the pixel structure 100b is divided into three blocks, and each of the blocks is respectively provided with one pixel electrode (ie, the first, second, and third pixel electrodes), compared to the Knowing that a single pixel structure has only a single pixel electrode having a large area, the pixel electrodes of the embodiment have a small area, so the active elements of the embodiment can be relatively narrowed and connected in series, thus These active elements do not occupy too much space in the pixel structure 100b, so the aperture ratio of the pixel structure 100b can be improved.

The pixel structure of Example 1 and Comparative Example 1 will be subjected to simulation evaluation below. The pixel structure of Embodiment 1 can be referred to FIG. 8 is a top view of the pixel structure of Comparative Example 1, and FIG. 9 is a top view of the pixel array formed by the pixel structure of Comparative Example 1. Referring to FIGS. 8 and 9, the pixel array 10c includes a plurality of pixel structures 100c. The pixel structure 100c includes a scan line SL, a data line DL, a signal line CL, a first active device T1, a first pixel electrode PE1, a second active device T2, and a second pixel electrode PE2. An active component ST and a shared capacitor SE are shared. The first active device T1 and the second active device T2 share the same scan line SL and the same data line DL. The first pixel electrode PE1 and the first active device T1 are electrically connected. The second pixel electrode PE2 and the second active device T2 are electrically connected. Sharing the capacitor SE and sharing the active component ST electrical connection. In the present embodiment, the first active element T1 and the second active element T2 are connected in parallel with each other.

Table 1 shows the evaluation results after charging the pixel structures of Example 1 and Comparative Example 1.

As can be seen from Table 1, the pixel structure of the pixel structure of the first embodiment is significantly lower than that of the pixel structure of the first embodiment, and the pixel electrode of the pixel structure of the first embodiment can be maintained. Enough charging rate.

In summary, the first drain of the first active component of the pixel structure of the present invention is electrically connected to the second source of the second active component, thereby forming a first active component and a second active component connected in series with each other. Therefore, the aperture ratio of the pixel structure can be improved and the parasitic capacitance can be reduced to provide good display quality.

100‧‧‧ pixel structure

110‧‧‧ scan line

120‧‧‧Information line

130‧‧‧ first pixel unit

132‧‧‧First active component

134‧‧‧first pixel electrode

140‧‧‧Second pixel unit

142‧‧‧Second active components

144‧‧‧second pixel electrode

150‧‧‧Connecting electrode

160‧‧‧Signal line

170‧‧‧Share unit

172‧‧‧Share active components

174‧‧‧Share capacitor

174a‧‧‧ bottom electrode

174b‧‧‧ top electrode

C1, C2‧‧‧ channel

D1, D2‧‧‧ bungee

G1, G2‧‧‧ gate

S1, S2‧‧‧ source

SS‧‧‧Shared source

SD‧‧‧Share bungee

SG‧‧‧ Sharing gate

SC‧‧‧Share channel

Claims (8)

A pixel structure includes: a scan line; a data line; a first pixel unit, including a first active component and a first pixel electrode electrically connected to the first active component, wherein the first pixel The active device includes a first gate, a first source, and a first drain. The first gate is electrically connected to the scan line, and the first source is electrically connected to the data line. The drain is electrically connected to the first pixel electrode; and a second pixel unit includes a second active component and a second pixel electrode electrically connected to the second active component, wherein the second active component The device includes a second gate, a second source, and a second drain. The second gate is electrically connected to the scan line, and the second drain is electrically connected to the second pixel electrode. The first drain is electrically connected to the second source. The pixel structure of claim 1, further comprising a connection electrode, one end of the connection electrode being connected to the first drain, and the other end of the connection electrode being connected to the second source. The pixel structure of claim 2, wherein the connection electrode does not overlap the scan line. The pixel structure of claim 1, further comprising a third pixel unit, the third pixel unit comprising a third active component and a third electrically connected to the third active component a pixel electrode, the third active component including a third a gate, a third source, and a third drain, the third gate is electrically connected to the scan line, and the third drain is electrically connected to the third pixel electrode, wherein the first turn The pole, the second source and the third source are electrically connected together. The pixel structure of claim 1, further comprising a signal line and a sharing unit, the sharing unit comprising a sharing active component and a sharing capacitor electrically connected to the sharing active component, the sharing initiative The component includes a shared gate, a shared source, and a shared drain, wherein the shared gate is electrically connected to the signal line, and the first drain and the second source are electrically connected to the shared source . The pixel structure of claim 5, further comprising a third pixel unit, the third pixel unit comprising a third active component and a third electrically connected to the third active component The third active device includes a third gate, a third source, and a third drain. The third gate is electrically connected to the scan line, and the third drain and the third The pixel electrode is electrically connected, wherein the first drain, the second source, the shared source, and the third source are electrically connected together. The pixel structure of claim 5, wherein the first pixel electrode and the scan line are located on opposite sides of the signal line. The pixel structure of claim 5, wherein the first pixel electrode and the signal line are located on opposite sides of the scan line.