TW201528543A - LED array - Google Patents

Abstract

An LED array having N light-emitting diode units (N ≥ 3) comprises a permanent substrate, a bonding layer on the permanent substrate, a second conductivity layer on the bonding layer, a second separation layer on the second conductivity layer, a crossover metal layer on the second separation layer, a first separation layer on the crossover metal layer, a conductive connection layer on the first separation layer, an epitaxial structure on the conductive connection layer, and a first electrode layer on the epitaxial structure. The light-emitting diode units are electrically connected with each other by the crossover metal layer.

Description

Light-emitting diode array

The present invention relates to an array of light-emitting diodes, and more particularly to an array of light-emitting diodes composed of N (N≧3) light-emitting diode units.

In recent years, due to advances in epitaxial and process technology, light emitting diodes (LEDs) have become one of the most promising solid-state lighting sources. Due to the limitation of physical mechanism, LED can only be driven by DC. Therefore, any LED design with LED as the light source needs to be equipped with electronic components such as rectification and step-down to convert the AC directly supplied by the power company into LED. DC power supply. However, in addition to increasing the cost of lighting, the electronic components such as rectification and step-down increase the low AC-DC conversion efficiency and large volume of electronic components such as rectification and step-down, which affect the reliability of LEDs used in daily lighting applications. With the service life.

A light emitting diode array comprises: a permanent substrate; a bonding layer on the permanent substrate; a second conductive layer on the bonding layer; a second spacer layer on the second conductive layer; and a jumper metal layer Located above the second spacer layer; a first spacer layer is over the jumper metal layer; a conductive connection layer is over the first spacer layer; an epitaxial structure is over the conductive connection layer; and a first The electrodes are located above the epitaxial structure.

A light emitting diode array comprises: a permanent substrate; a bonding layer on the permanent substrate; a first conductive layer on the bonding layer; a second spacer layer on the first conductive layer; and a jumper metal layer Located above the second spacer layer; a first spacer layer is over the jumper metal layer; a conductive connection layer is over the first spacer layer; and an epitaxial structure is over the conductive connection layer.

An array of light emitting diodes includes N light emitting diode units (N≧3), and the light emitting diode units are electrically connected to each other via a jumper metal layer.

The invention discloses an array of light emitting diodes composed of N(N≧3) light emitting diode units, which comprises a first light emitting diode unit, a second light emitting diode unit, and The first (N-1) light emitting diode unit and an Nth light emitting diode unit are sequentially arranged. The light-emitting diode array has a first region (I) and a third region (III), wherein the first region (I) comprises a first light-emitting diode unit, and the third region (III) comprises an N-th light-emitting diode a polar body unit; and a second region (II) located between the first region (I) and the third region (III), and including the second light emitting diode unit, and sequentially to the (N-1)th Light-emitting diode unit.

The first embodiment discloses a light-emitting diode array 1 composed of three light-emitting diode units. A schematic cross-sectional view of the structure is shown in Figs. 1A-1I, and a schematic plan view is shown in Fig. 1A'-1G'. The method for manufacturing the LED array 1 includes the following steps: 1. Providing a growth substrate 11 and forming an epitaxial structure on the growth substrate 11, wherein the epitaxial structure comprises a first conductivity type semiconductor layer 12, The active layer 13 and a second conductive semiconductor layer 14 are as shown in FIGS. 1A and 1A'. 2. etching a portion of the epitaxial structure of the first region (I) and the second region (II) to form a plurality of trenches 15, wherein the unetched epitaxial structure forms a plurality of platforms 16; and the third region The epitaxial structure of (III) is not etched as shown in Figures 1B and 1B'. 3. Forming a conductive connection layer 17 over a portion of the plurality of platforms 16, wherein the platform region not covered by the conductive connection layer 17 forms a plurality of vias 18; as shown in Figures 1C and 1C' Show. 4. A first spacer layer 19 is formed on a portion of the conductive connection layer 17, a plurality of vias 18, and a plurality of trenches 15 but is electrically conductively connected to the first region (I). Above the layer 17 and above all of the electrically conductive connection layer 17 of the third region (III) are not covered by the first spacer layer 19. A conductive region 20 is a region of the conductive connection layer 17 of the second region (II) that is not covered by the first spacer layer 19. As shown in Figures 1D and 1D'. 5. forming a bridging metal layer 21 over the first spacer layer 19, the conductive region 20, the plurality of trenches 15, and the entire conductive connecting layer 17 of the third region (III). A portion of the conductive connecting layer 17 of a region (I) is electrically connected to the second conductive semiconductor layer as a subsequent second conductive layer, so that it is not covered by a bridging metal layer 21 above it. The region a located adjacent to the conductive region 20 in the second region (II) is also not covered by the jumper metal layer 21, and can be used for electrical isolation; as shown in Figs. 1E and 1E'. A portion of the bridging metal layer 21 located in the first region (I) extends into the plurality of trenches 15 and is electrically connected to the first conductive semiconductor layer 12; the jumper over the plurality of platforms 16 and the vias 18 The metal layer 21 is electrically isolated from the second conductive semiconductor layer 14 by the first spacer layer 19. The bridging metal layer 21 located on the conductive region 20 in the second region (II) is electrically connected to the second conductive semiconductor layer 14 through the conductive connecting layer 17, and the partial bridging metal layer 21 extends to a plurality of The first conductive semiconductor layer 12 is electrically connected to the first conductive semiconductor layer 12; the jumper metal layer 21 over the plurality of the substrate 16 and the via 18 is electrically connected to the first conductive layer 19 and the second conductive semiconductor layer 14. Sexual isolation. The jumper metal layer 21 located in the third region (III) is electrically connected to the second conductive semiconductor layer 14 via the conductive connection layer 17. 6. Forming a second spacer layer 22 over the jumper metal layer 21 and the a region of the second region (II), but the second spacer layer 22 does not cover a portion of the conductive connection of the first region (I) Layer 17; as shown in Figures 1F and 1F'. 7. A second conductive layer 23 is formed over the second spacer layer 22 and over the portion of the conductive connection layer 17 of the first region (I); as shown in Figures 1G and 1G'. 8. Form a bonding layer 24 over the second conductive layer 23; provide a permanent substrate 25; and bond the permanent substrate 25 by the bonding layer 24, as shown in FIG. 1H. 9. The growth substrate 11 is removed to expose the first conductive type semiconductor layer 12 and roughen its surface. Next, the first conductive layer 12 is etched down from the first conductive type semiconductor layer 12 to expose the first spacer layer 19 to form N light emitting diode units. The first light emitting diode unit is located in the first region (I), the second light emitting diode unit, and the sequentially (N-1) light emitting diode unit is located in the second region (II), and The N-emitting diode unit is located in the third region (III). Finally, a first electrode 27 is formed on the roughened surface of the first conductive semiconductor layer 12 of the Nth light emitting diode unit, that is, the light emitting N through the jumper metal layer 21 is electrically connected. The diode array 1 is as shown in Fig. 1I.

The second embodiment discloses a light-emitting diode array 2 composed of three light-emitting diode units. A schematic cross-sectional view of the structure is shown in Fig. 2A-2I, and a schematic top view is shown in Fig. 2A'-2G'. The method for fabricating the LED array 2 includes the following steps: 1. Providing a growth substrate 11 and forming an epitaxial structure on the growth substrate 11, wherein the epitaxial structure comprises a first conductivity type semiconductor layer 12, The active layer 13 and a second conductive semiconductor layer 14 are as shown in FIGS. 2A and 2A'. 2. A portion of the epitaxial structure is then etched to form a plurality of trenches 15, wherein the unetched epitaxial structure forms a plurality of platforms 16, as shown in Figures 2B and 2B'. 3. Forming a conductive connection layer 17 over a portion of the plurality of platforms 16, wherein the platform region not covered by the conductive connection layer 17 forms a plurality of vias 18; as shown in Figures 2C and 2C' Show. 4. A first spacer layer 19 is formed on the portion of the conductive connection layer 17, over the plurality of vias 18, and on the sidewalls of the plurality of trenches 15. The region of the second region (II) and the third region (III) where the conductive connecting layer 17 is not covered by the first spacer layer 19 is defined as a conductive region 20; as shown in Figs. 2D and 2D'. 5. A jumper metal layer 21 is formed over portions of the first spacer layer 19, the conductive regions 20, and a plurality of trenches 15 other than the third region (III). However, a portion of the first spacer layer 19 in the first region (I) is electrically isolated as the subsequent second conductive layer and the first conductive semiconductor layer, so that a jumper metal layer 21 is not overlaid thereon. The first spacer layer 19 in the plurality of trenches 15 of the third region (III) and the plurality of pads will be electrically isolated from the second conductive semiconductor layer, so that it is not above the trench A capping metal layer 21 is formed to be formed as shown in FIGS. 2E and 2E'. A portion of the bridging metal layer 21 located in the first region (I) extends into the plurality of trenches 15 and is electrically connected to the first conductive semiconductor layer 12, and is bridged over the plurality of platforms 16 and the vias 18. The metal layer 21 is electrically isolated from the second conductive semiconductor layer 14 by the first spacer layer 19. The jumper metal layer 21 on the conductive region 20 in the second region (II) is electrically connected to the second conductive semiconductor layer 14 through the conductive connection layer 17; the partial jumper metal layer 21 extends to a plurality of The first conductive semiconductor layer 12 is electrically connected to the first conductive semiconductor layer 12; the jumper metal layer 21 over the plurality of the substrate 16 and the via 18 is electrically connected to the first conductive layer 19 and the second conductive semiconductor layer 14. Sexual isolation. The bridging metal layer 21 on the conductive region 20 in the third region (III) is electrically connected to the second conductive semiconductor layer 14 via the conductive connecting layer 17. In addition, the b region adjacent to the conductive region 20 in the second region (II) and the third region (III) is not completely covered by the bridging metal layer 21, and can be used for electrical isolation. 6. Above the jumper metal layer 21, above the first spacer layer 19 of the first region (I) and above the b region of the second region (II) not completely covered by the jumper metal layer 21. Forming a second spacer layer 22, but the second spacer layer 22 does not cover the plurality of trenches 15 of the third region (III), the first spacer layer 19 of the plurality of platforms, and the third region (III) The b region is not completely covered by the metal layer 21; as shown in Figures 2F and 2F'. 7. Above the second spacer layer 22, within the plurality of trenches 15 of the third region (III), over the first spacer layer 19 of the plurality of platforms, and in the third region (III) The b region completely covered by the metal layer 21 forms a first conductive layer 26; as shown in Figures 2G and 2G'. 8. A bonding layer 24 is formed over the first conductive layer 26; a permanent substrate 25 is provided and bonded to the permanent substrate 25 by the bonding layer 24, as shown in FIG. 2H. 9. The growth substrate 11 is removed to expose the first conductive type semiconductor layer 12 and roughen its surface. Next, the first conductive layer 12 is etched down from the first conductive type semiconductor layer 12 to expose the first spacer layer 19 to form N light emitting diode units. The first light emitting diode unit is located in the first region (I), and the second light emitting diode unit to the (N-1) light emitting diode unit are located in the second region (II), and the Nth light emitting diode The unit is located in the third zone (III). Further, the first conductive type semiconductor layer 12 in which the portion of the jumper metal layer 21 is not formed in the first region (I) is etched downward to expose the conductive connection layer 17, and a second is formed on the conductive connection layer 17. The electrode 28, that is, the light-emitting diode array 2 in which N light-emitting diode units are electrically connected in series via the jumper metal layer 21, as shown in FIG. 2I.

In the first embodiment and the second embodiment, the material of the growth substrate 11 includes at least one material selected from the group consisting of gallium arsenide, gallium phosphide, sapphire, tantalum carbide, gallium nitride, or aluminum nitride. The epitaxial structure is composed of a III-V semiconductor material which is an aluminum gallium phosphide indium series compound or an aluminum gallium indium nitride series compound. The conductive connecting layer 17 comprises one or more materials selected from the group consisting of indium tin oxide, cadmium tin oxide, antimony tin oxide, indium zinc oxide, zinc aluminum oxide, and zinc tin oxide. The first separation layer 19 and the second separation layer 22 are insulating materials, and each of the materials may comprise one or more materials selected from the group consisting of ceria, titanium oxide, titanium dioxide, trititanium pentoxide, titanium oxynitride, and cerium oxide. A group consisting of zinc sulfide and aluminum oxide. The first conductive layer 26, the second conductive layer 23 may be silver or aluminum. The bonding layer 24 is a conductive material, and the constituent material may be a metal or a metal alloy such as AuSn, PbSn, AuGe, AuBe, AuSi, Sn, In, Au, PdIn. The permanent substrate 25 is a conductive material, for example, a material including a carbide, a metal, a metal alloy, a metal oxide, a metal composite, or the like. The material bridging the metal layer 21 comprises a metal, a metal alloy, a metal oxide.

The examples of the invention are intended to be illustrative only and not to limit the scope of the invention. Any changes or modifications of the present invention to those skilled in the art will be made without departing from the spirit and scope of the invention.

1,2‧‧‧Light Diode Array
11‧‧‧ Growth substrate
12‧‧‧First Conductive Semiconductor Layer
13‧‧‧Active layer
14‧‧‧Second conductive semiconductor layer
15‧‧‧ trench
16‧‧‧ platform
17‧‧‧Electrically conductive layer
18‧‧‧ walkway
19‧‧‧First separation layer
20‧‧‧Conducting area
21‧‧‧Bound metal layer
22‧‧‧Second separation layer
23‧‧‧Second conductive layer
24‧‧‧bonded layer
25‧‧‧Permanent substrate
26‧‧‧First conductive layer
27‧‧‧First electrode
28‧‧‧Second electrode I‧‧‧First region II‧‧‧Second region III‧‧ Third region
a, b‧‧‧ electrically isolated area

1A-1I is a schematic cross-sectional view showing the structure of the light-emitting diode array 1 disclosed in the present invention.

The 1A'-1G' diagram is a schematic top view of the structure of the light-emitting diode array 1 disclosed in the present invention.

2A-2I is a schematic cross-sectional view showing the structure of the light-emitting diode array 2 disclosed in the present invention.

The 2A'-2G' diagram is a schematic top view of the structure of the light-emitting diode array 2 disclosed in the present invention.

no

1‧‧‧Lighting diode array

12‧‧‧First Conductive Semiconductor Layer

13‧‧‧Active layer

14‧‧‧Second conductive semiconductor layer

17‧‧‧Electrically conductive layer

18‧‧‧ walkway

19‧‧‧First separation layer

20‧‧‧Conducting area

21‧‧‧Bound metal layer

22‧‧‧Second separation layer

23‧‧‧Second conductive layer

24‧‧‧bonded layer

25‧‧‧Permanent substrate

27‧‧‧First electrode

I‧‧‧First area

II‧‧‧Second area

III‧‧‧ Third Area

a‧‧‧Electrically isolated area

Claims (10)

A light emitting diode structure comprising: a first epitaxial unit; a second epitaxial unit separated from the first epitaxial unit; and a jumper metal layer including a first protrusion extending into the first An epitaxial unit, and a platform portion are coupled to the second epitaxial unit and have substantially the same width as the first epitaxial unit. The light emitting diode structure of claim 1, further comprising a conductive connecting layer surrounding the first protruding portion. The light emitting diode structure of claim 2, further comprising a first spacer layer between the conductive connecting layer and the first protruding portion. The light-emitting diode structure of claim 1, further comprising a second spacer layer having a width substantially the same as the structure of the light-emitting diode. The light-emitting diode structure of claim 1, further comprising an electrode connected to a side opposite to the platform portion. A light emitting diode structure comprising: a first epitaxial unit; a second epitaxial unit separated from the first epitaxial unit; a jumper metal layer including a first protrusion extending into the first protrusion a crystalline unit; and a conductive layer separated from the jumper metal layer and including a second protrusion extending into the second epitaxial unit. The light emitting diode structure of claim 6, further comprising a conductive connecting layer surrounding the first protruding portion, and an electrode being disposed on the conductive connecting layer. The light-emitting diode structure of claim 7, wherein the conductive connection layer has a portion not covered by the first epitaxial structure. The light emitting diode structure of claim 6, further comprising a spacer layer between the jumper metal layer and the conductive layer. The light emitting diode structure of claim 6, wherein the conductive layer has a width greater than a width of the jumper metal layer.