TWI400788B - Light-emitting element - Google Patents
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本發明係關於一發光元件,尤其是一具發光二極體陣列之發光元件。The invention relates to a light-emitting element, in particular a light-emitting element having an array of light-emitting diodes.
發光二極體(LED)之發光原理和結構與傳統光源並不相同,具有耗電量低、元件壽命長、無須暖燈時間、反應速度快等優點,再加上其體積小、耐震動、適合量產,容易配合應用需求製成極小或陣列式的元件,在市場上的應用頗為廣泛。例如,光學顯示裝置、雷射二極體、交通號誌、資料儲存裝置、通訊裝置、照明裝置、以及醫療裝置等。The principle and structure of the light-emitting diode (LED) are different from those of the traditional light source, and have the advantages of low power consumption, long component life, no need for warming time, fast reaction speed, etc., plus small size and vibration resistance. It is suitable for mass production, and it is easy to make small or array components with application requirements. It is widely used in the market. For example, an optical display device, a laser diode, a traffic sign, a data storage device, a communication device, a lighting device, and a medical device.
傳統的陣列式發光二極體,如第1圖所示,包含一藍寶石絕緣基板10、複數個發光疊層12形成於藍寶石絕緣基板10上,包含一p型半導體層121、一發光層122、以及一n型半導體層123。由於藍寶石基板10不導電,因此於複數個發光疊層12之間由蝕刻形成溝渠14後可使各發光疊層12彼此絕緣,另外再藉由部分蝕刻複數個發光疊層12至n型半導體層123,分別於n型半導體層123暴露區域以及p型半導體層121上形成一第一電極18以及一第二電極16。再藉由金屬導線19選擇性連接複數個發光疊層12之第一電極18及第二電極16,使得複數個發光疊層12之間形成串聯或並聯之電路。The conventional array type light-emitting diode includes a sapphire insulating substrate 10 and a plurality of light-emitting layers 12 formed on the sapphire insulating substrate 10, and includes a p-type semiconductor layer 121 and a light-emitting layer 122, as shown in FIG. And an n-type semiconductor layer 123. Since the sapphire substrate 10 is not electrically conductive, the light-emitting layers 12 can be insulated from each other after the trenches 14 are formed by etching between the plurality of light-emitting layers 12, and the plurality of light-emitting layers 12 to n-type semiconductor layers are partially etched. 123. Form a first electrode 18 and a second electrode 16 on the exposed region of the n-type semiconductor layer 123 and the p-type semiconductor layer 121, respectively. The first electrode 18 and the second electrode 16 of the plurality of light emitting laminates 12 are selectively connected by the metal wires 19 to form a circuit connected in series or in parallel between the plurality of light emitting laminates 12.
本發明提出一發光元件,係包括:一載體;一導電接合結構,形成於載體上;一磊晶結構,形成於導電接合結構上,包括有:至少一第一發光疊層,包括一第一半導體層及一第二半導體層,其中第一半導體層及第二半導體層表面上分別具有一電極;以及至少一第二發光疊層,包括一第三半導體層及一第四半導體層,其中第三半導體層底面電性連接於導電接合結構,第四半導體層表面上具有一電極;至少一絕緣部,其係位於第一發光疊層及導電接合結構間,以使第一發光疊層絕緣於導電接合結構;以及至少一金屬導線,其係設於發光元件表面,係供透過導電接合結構而電性導通第一發光疊層及第二發光疊層。The present invention provides a light-emitting element comprising: a carrier; a conductive bonding structure formed on the carrier; and an epitaxial structure formed on the conductive bonding structure, comprising: at least one first light-emitting layer, including a first a semiconductor layer and a second semiconductor layer, wherein the first semiconductor layer and the second semiconductor layer respectively have an electrode on the surface thereof; and at least one second light emitting layer comprises a third semiconductor layer and a fourth semiconductor layer, wherein The bottom surface of the three semiconductor layers is electrically connected to the conductive bonding structure, and the fourth semiconductor layer has an electrode on the surface thereof; at least one insulating portion is disposed between the first light emitting layer and the conductive bonding structure to insulate the first light emitting layer a conductive bonding structure; and at least one metal wire disposed on the surface of the light emitting element for electrically conducting the first light emitting layer and the second light emitting layer through the conductive bonding structure.
依據本發明之一實施例,載體可為導電半導體基板或金屬基板。可於導電半導體基板底面設置背金或藉由金屬基板底面以連接一外部電源,而外部電源透過背金-載體-導電接合結構可導通所有第二發光疊層。According to an embodiment of the invention, the carrier may be a conductive semiconductor substrate or a metal substrate. The back gold may be disposed on the bottom surface of the conductive semiconductor substrate or connected to an external power source through the bottom surface of the metal substrate, and the external power source may conduct all the second light emitting laminates through the back gold-carrier-conductive bonding structure.
依據本發明之又一實施例,當載體為一絕緣基板時,可使導電接合結構之最上層設置一焊接墊,其材料例如為金屬氧化物或金屬,藉由焊接墊連接導線至一外部電源,以達到與上述背金相同之功能。本實施例之焊接墊係直接設於導電接合結構上,而前述實施例之背金則透過具導電性之載體電性導通於導電接合結構。二者皆具可電性連接於外部電源之功能。According to still another embodiment of the present invention, when the carrier is an insulating substrate, a solder pad may be disposed on the uppermost layer of the conductive bonding structure, and the material thereof is, for example, metal oxide or metal, and the wire is connected to an external power source through the solder pad. In order to achieve the same function as the above-mentioned back gold. The solder pads of this embodiment are directly disposed on the conductive bonding structure, and the back gold of the foregoing embodiment is electrically connected to the conductive bonding structure through the conductive carrier. Both have the function of being electrically connected to an external power source.
導電接合結構係直接與第二發光疊層電性連接,第一發光疊層則利用金屬導線連接導電接合結構後與第二發光疊層電性導通,藉此可簡化設置金屬導線之工序,進而有效地提升產能。The conductive bonding structure is directly electrically connected to the second light emitting layer, and the first light emitting layer is electrically connected to the second light emitting layer by connecting the conductive bonding structure with the metal wire, thereby simplifying the process of setting the metal wire, and further Effectively increase production capacity.
請參閱第2圖,發光元件200包括有一載體202、一形成於載體202上之導電接合結構203、一位於導電接合結構203上方之磊晶結構206、至少一設於磊晶結構206及導電接合結構203間之絕緣部208、以及至少一佈設於發光元件200表面之金屬導線210。Referring to FIG. 2 , the light emitting device 200 includes a carrier 202 , a conductive bonding structure 203 formed on the carrier 202 , an epitaxial structure 206 disposed above the conductive bonding structure 203 , at least one disposed on the epitaxial structure 206 , and conductive bonding The insulating portion 208 between the structures 203 and at least one metal wire 210 disposed on the surface of the light emitting element 200.
載體202可為一導電半導體基板或金屬基板,導電接合結構203可為一具有導電性之疊層結構。The carrier 202 can be a conductive semiconductor substrate or a metal substrate, and the conductive bonding structure 203 can be a laminated structure having conductivity.
磊晶結構206可包括有一第一發光疊層212,其上具有極性彼此不同且位於同側之一電極2122及電極2125、以及至少一第二發光疊層214,其具有一位於頂部之電極2145,且第二發光疊層214之底面係導接於導電接合結構203。The epitaxial structure 206 can include a first light emitting layer 212 having electrodes 1122 and 2125 on the same side that are different in polarity from each other, and at least one second light emitting layer 214 having an electrode 2145 at the top. The bottom surface of the second light emitting layer 214 is electrically connected to the conductive bonding structure 203.
第一發光疊層212及第二發光疊層214可為具有相同結構之發光疊層,意即第一發光疊層212及第二發光疊層214可由同一磊晶基板(圖未示)同時形成。關於第一發光疊層212及第二發光疊層214之形成方式,可由前述之磊晶基板預先形成前述未加工之磊晶結構206,再將未加工之磊晶結構206連同磊晶基板與導電接合結構203相接合,之後可移除磊晶基板後再利用蝕刻顯影方式定義出第 一發光疊層212及第二發光疊層214。導電接合結構203可包含一具有導電性的接合層204、形成於接合層204上之反射層217、及形成於反射層217上之透明導電層215,透明導電層215可於對應第一發光疊層212之位置嵌設有前述之絕緣部208,而為了促進第一發光疊層212之電流擴散效果,第一發光疊層212底部係具有一電流擴散層2126。The first light-emitting layer 212 and the second light-emitting layer 214 may be light-emitting layers having the same structure, that is, the first light-emitting layer 212 and the second light-emitting layer 214 may be simultaneously formed by the same epitaxial substrate (not shown). . Regarding the formation manner of the first light-emitting layer 212 and the second light-emitting layer 214, the unprocessed epitaxial structure 206 may be formed in advance by the epitaxial substrate, and the unprocessed epitaxial structure 206 together with the epitaxial substrate and the conductive layer may be formed. The bonding structure 203 is bonded, and then the epitaxial substrate can be removed, and then the etching development method is used to define the first A light emitting layer 212 and a second light emitting layer 214. The conductive bonding structure 203 may include a conductive bonding layer 204, a reflective layer 217 formed on the bonding layer 204, and a transparent conductive layer 215 formed on the reflective layer 217. The transparent conductive layer 215 may be corresponding to the first light emitting stack. The insulating layer 208 is embedded in the layer 212. To promote the current spreading effect of the first light emitting layer 212, the first light emitting layer 212 has a current spreading layer 2126 at the bottom.
前述透明導電層215包含選自於氧化銦錫、氧化鎘錫、氧化銻錫、氧化鋅及氧化鋅錫所構成材料群組中之至少一種材料。前述反射層217係包含選自Sn、Al、Au、Pt、Zn、Ag、Ti、Pb、Pd、Ge、Cu、AuBc、AuGc、Ni、PbSn、AuZn所構成材料群組中之至少一種材料或其它可代替之材料。The transparent conductive layer 215 includes at least one material selected from the group consisting of indium tin oxide, cadmium tin oxide, antimony tin oxide, zinc oxide, and zinc tin oxide. The reflective layer 217 includes at least one material selected from the group consisting of Sn, Al, Au, Pt, Zn, Ag, Ti, Pb, Pd, Ge, Cu, AuBc, AuGc, Ni, PbSn, and AuZn. Other materials that can be substituted.
第一發光疊層212自最接近載體202由下而上可至少包括有一第一半導體層2121,其上具有電極2122、一形成於第一半導體層2121上部分區域之發光層2123、及一形成於發光層2123上之第二半導體層2124,其上具有電極2125,其中第一半導體層2121下方之透明導電層215中係嵌設有前述之絕緣部208,以使第一發光疊層212絕緣於導電接合結構203。第二發光疊層214自下而上則可至少包括有一第三半導體層2141,其底面係導接於導電接合結構203、一發光層2143、及一第四半導體層2144其表面具有電極2145,其中第一半導體層2121及第三半導體層2141可為p型半導體層;第二半導體層2124及第四半導體層2144可為n型半導體層。以上所述之第一發光疊層212或第二發光疊層214之分別所具半導體層之極性亦可對調, 例如第一半導體層2121及第三半導體層2141可為n型半導體層,而第二半導體層2124及第四半導體層2144可為p型半導體層。The first light emitting layer 212 may include at least a first semiconductor layer 2121 from the bottom closest to the carrier 202, and has an electrode 2122, a light emitting layer 2123 formed on a portion of the first semiconductor layer 2121, and a photo forming layer. The second semiconductor layer 2124 on the light-emitting layer 2123 has an electrode 2125 thereon. The insulating layer 208 is embedded in the transparent conductive layer 215 under the first semiconductor layer 2121 to insulate the first light-emitting layer 212. In the conductive bonding structure 203. The second light emitting layer 214 may include at least a third semiconductor layer 2141 from bottom to top, and the bottom surface of the second light emitting layer 214 is electrically connected to the conductive bonding structure 203, a light emitting layer 2143, and a fourth semiconductor layer 2144 having electrodes 2145 on the surface thereof. The first semiconductor layer 2121 and the third semiconductor layer 2141 may be p-type semiconductor layers; the second semiconductor layer 2124 and the fourth semiconductor layer 2144 may be n-type semiconductor layers. The polarity of the semiconductor layer of the first light-emitting layer 212 or the second light-emitting layer 214 described above may also be reversed. For example, the first semiconductor layer 2121 and the third semiconductor layer 2141 may be n-type semiconductor layers, and the second semiconductor layer 2124 and the fourth semiconductor layer 2144 may be p-type semiconductor layers.
前述第一發光疊層212及第二發光疊層214可包含選自AlGaInP、AlN、GaN、AlGaN、InGaN及AlInGaN所構成材料組群中之至少一種材料。其中第一發光疊層212及第二發光疊層214的結構可為單異質結構(single heterostructure;SH)、雙異質結構(double heterostructure;DH)、雙側雙異質結構(double-side double heterostructure;DDH)、或多層量子井(multi-quantum well;MQW)。前述絕緣部208可選自於SiO2 及SiNx 所構成材料組群中之至少一種材料。The first light emitting layer 212 and the second light emitting layer 214 may include at least one material selected from the group consisting of AlGaInP, AlN, GaN, AlGaN, InGaN, and AlInGaN. The structure of the first light-emitting layer 212 and the second light-emitting layer 214 may be a single heterostructure (SH), a double heterostructure (DH), or a double-side double heterostructure (double-side double heterostructure; DDH), or multi-quantum well (MQW). The insulating portion 208 may be selected from at least one material selected from the group consisting of SiO 2 and SiN x .
另外,第一發光疊層212之第一半導體層2121及第二半導體層2124中可分別形成有具粗化結構之電流擴散層2126。可先將第一半導體層2121及第二半導體層2124之表面進行粗化後,再於粗化表面上形成一層與透明導電層215相同之導電材料,以形成電流擴散層2126;第二發光疊層214中亦對應設有電流擴散層2146,其中第三半導體層2141底面為具粗化形式之電流擴散層2146。藉由電流擴散層2126及2146,可使電流較為平均地分佈於第一發光疊層212及第二發光疊層214中。第一半導體層2121底部之電流擴散層2126之厚度可略大於電流擴散層2146以增進第一發光疊層212之電流擴散效果。第二發光疊層214之第三半導體層2141底面可直接結合於透明導電層215,而於粗化形式之電流擴散層2146中間隔形成有複數平坦表面(圖未示),俾與透明導電層215間形成良好的歐姆 接觸。In addition, a current diffusion layer 2126 having a roughened structure may be formed in each of the first semiconductor layer 2121 and the second semiconductor layer 2124 of the first light-emitting layer 212. The surface of the first semiconductor layer 2121 and the second semiconductor layer 2124 may be roughened, and then a conductive material similar to the transparent conductive layer 215 is formed on the roughened surface to form a current diffusion layer 2126; the second light stack A current diffusion layer 2146 is also disposed in the layer 214, wherein the bottom surface of the third semiconductor layer 2141 is a current diffusion layer 2146 having a roughened form. The current spreading layers 2126 and 2146 allow the current to be evenly distributed among the first and second light emitting stacks 212, 214. The current diffusion layer 2126 at the bottom of the first semiconductor layer 2121 may be slightly thicker than the current diffusion layer 2146 to enhance the current spreading effect of the first light-emitting layer 212. The bottom surface of the third semiconductor layer 2141 of the second light-emitting layer 214 may be directly bonded to the transparent conductive layer 215, and a plurality of flat surfaces (not shown) are formed in the current-diffusion layer 2146 of the roughened form, and the transparent conductive layer is formed. 215 forms a good ohm contact.
形成於發光元件200表面之金屬導線210主要可用以將第一發光疊層212之電極2125或電極2122導接於透明導電層215,進而與第二發光疊層214導通。雖然第2圖中僅示意出第一發光疊層212透過金屬導線210連接於透明導電層215,然而圖式中金屬導線210之形成位置並非表示特定的串並聯結構,金屬導線210亦可視電路之需要直接導接於兩第一發光疊層212、或兩第二發光疊層214、或第一發光疊層212及第二發光疊層214間。金屬導線210可藉黃光製程而形成,與磊晶結構206間係以一介電質211相隔。因此,藉由第二發光疊層214之第三半導體層2141之底面導接於導電接合結構203、及金屬導線210佈設於發光元件200表面可使發光元件200之各第一發光疊層212及第二發光疊層214達成並聯、串聯、或具有串並聯組合之連接。The metal wire 210 formed on the surface of the light-emitting element 200 can be mainly used to conduct the electrode 2125 or the electrode 2122 of the first light-emitting layer 212 to the transparent conductive layer 215, thereby being electrically connected to the second light-emitting layer 214. Although only the first light emitting layer 212 is connected to the transparent conductive layer 215 through the metal wire 210 in FIG. 2, the position of the metal wire 210 in the drawing does not indicate a specific series-parallel structure, and the metal wire 210 can also be seen as a circuit. It is necessary to directly connect between the two first light emitting layers 212, or the two second light emitting layers 214, or between the first light emitting layer 212 and the second light emitting layer 214. The metal wire 210 can be formed by a yellow light process, and is separated from the epitaxial structure 206 by a dielectric 211. Therefore, the first light emitting layer 212 of the light emitting device 200 can be disposed on the surface of the light emitting device 200 by the bottom surface of the third semiconductor layer 2141 of the second light emitting layer 214 being electrically connected to the conductive bonding structure 203 and the metal wire 210. The second luminescent stack 214 is connected in parallel, in series, or in a series-parallel combination.
前述之載體202可為一導電半導體基板,其底面可形成有一金屬層213、或載體202可為一金屬基板,以令發光元件200具有背金之結構。當發光元件200結合於封裝結構時,可藉由背金連接於一外部電源(圖未示),再透過載體202-導電接合結構203而與第二發光疊層214電性連接。外部電源亦可透過載體202-導電接合結構203-金屬導線210而與第一發光疊層212電性連接。The carrier 202 may be a conductive semiconductor substrate, and a metal layer 213 may be formed on the bottom surface thereof, or the carrier 202 may be a metal substrate to make the light-emitting element 200 have a gold back structure. When the light emitting device 200 is coupled to the package structure, it can be electrically connected to the second light emitting layer 214 via a back gold connection to an external power source (not shown) and then through the carrier 202 - the conductive bonding structure 203. The external power source can also be electrically connected to the first light emitting stack 212 through the carrier 202 - the conductive bonding structure 203 - the metal wire 210.
請搭配參閱第3A圖,本發明第一實施例之發光元件200上可具有一第一發光疊層212、及一第二發光疊層214,而兩發光疊層係與一外部之直流電源DC1組成一串 聯電路,如圖所示,直流電源DC1之正極係連接於第一發光疊層212之電極2122,電流可由電極2122進入第一發光疊層212後由電極2125流出,而第一發光疊層212之電極2125與第二發光疊層214間可藉金屬導線210進行導接,金屬導線210一端連接於電極2125、另一端則連接於透明導電層215,電流藉此由第三半導體層2141進入第二發光疊層214,並由電極2145流出,直流電源DC1之負極則連接於第二發光疊層214之電極2145,藉此使串聯之第一發光疊層212、第二發光疊層214通電而發光。第二發光疊層214實際上可串聯多個第一發光疊層212,複數第一發光疊層212間可利用前述金屬導線210進行串聯,而位於整體串聯電路端點之第一發光疊層212則與直流電源DC1連接。Referring to FIG. 3A, the light-emitting element 200 of the first embodiment of the present invention may have a first light-emitting layer 212 and a second light-emitting layer 214, and the two light-emitting layers and an external DC power source DC1. Compose a string As shown in the figure, the positive electrode of the DC power source DC1 is connected to the electrode 2122 of the first light-emitting layer 212, and the current can flow from the electrode 2122 into the first light-emitting layer 212 and then flow out from the electrode 2125, and the first light-emitting layer 212 The electrode 2125 and the second light-emitting layer 214 can be connected by a metal wire 210. One end of the metal wire 210 is connected to the electrode 2125, and the other end is connected to the transparent conductive layer 215, and the current is entered by the third semiconductor layer 2141. The second light emitting layer 214 is discharged from the electrode 2145, and the negative electrode of the DC power source DC1 is connected to the electrode 2145 of the second light emitting layer 214, thereby energizing the first light emitting layer 212 and the second light emitting layer 214 in series. Glowing. The second light emitting layer 214 may actually connect a plurality of first light emitting layers 212 in series, and the plurality of first light emitting layers 212 may be connected in series by using the metal wires 210, and the first light emitting layer 212 located at the end of the entire series circuit. It is connected to the DC power supply DC1.
請參閱第3B圖,本發明第一實施例之發光元件200上可具有一第一發光疊層212、及一第二發光疊層214,而兩發光疊層係與一外部之直流電源DC2組成一並聯電路,第一發光疊層212之電極2122係以金屬導線210連接於導電接合結構203,直流電源DC2之正極係連接於金屬層213,電流透過載體202、導電接合結構203後係分流而分別由電極2122進入第一發光疊層212、及由第三半導體層2141進入第二發光疊層214,直流電源DC2之負極則分別連接至第一發光疊層212之電極2125、及第二發光疊層214之電極2145,以使電流匯整之後回流直流電源DC2。可思及的是,第二發光疊層214可接續串聯一組第一發光疊層212,而形成一串聯電路,再由另一組第一發光疊層212串 聯成另一電路,可藉由將兩電路連接於直流電源DC2而得到一並聯電路。Referring to FIG. 3B, the light-emitting element 200 of the first embodiment of the present invention may have a first light-emitting layer 212 and a second light-emitting layer 214, and the two light-emitting layers are combined with an external DC power source DC2. In a parallel circuit, the electrode 2122 of the first light-emitting layer 212 is connected to the conductive joint structure 203 by a metal wire 210. The positive electrode of the DC power source DC2 is connected to the metal layer 213, and the current is transmitted through the carrier 202 and the conductive joint structure 203, and is shunted. The second light-emitting layer 212 is inserted into the first light-emitting layer 212 and the second light-emitting layer 141 is connected to the second light-emitting layer 214. The anode of the DC power source DC2 is connected to the electrode 2125 of the first light-emitting layer 212, and the second light-emitting layer. The electrode 2145 of the stack 214 is used to sink the DC power source DC2 after the current is collected. It is conceivable that the second light-emitting layer 214 can be connected in series to form a first light-emitting layer 212 to form a series circuit, and then another set of first light-emitting layers 212. In combination with another circuit, a parallel circuit can be obtained by connecting the two circuits to the DC power source DC2.
請參閱第3C圖,本發明第一實施例之發光元件200上可具有一第一發光疊層212、及一第二發光疊層214,而兩發光疊層係與一外部之交流電源AC1組成一反向並聯電路,第一發光疊層212之電極2125、及第二發光疊層214之第三半導體層2141係透過金屬導線210及導電接合結構203導通。交流電源AC1一端係連接至金屬層213以透過載體202及導電接合結構203導接於第二發光疊層214之第三半導體層2141及第一發光疊層212之電極2125,交流電源AC1之另外一端則直接連接至第一發光疊層212之電極2122、及第二發光疊層214之電極2145。可思及的是,第二發光疊層214可接續串聯一組第一發光疊層212,而形成一串聯電路,再由另一組第一發光疊層212串聯成另一電路,可藉由將兩電路連接於交流電源AC1而得到一反向並聯電路。Referring to FIG. 3C, the light-emitting element 200 of the first embodiment of the present invention may have a first light-emitting layer 212 and a second light-emitting layer 214, and the two light-emitting layers are combined with an external AC power source AC1. An anti-parallel circuit, the electrode 2125 of the first light-emitting layer 212, and the third semiconductor layer 2141 of the second light-emitting layer 214 are electrically connected through the metal wire 210 and the conductive bonding structure 203. One end of the AC power source AC1 is connected to the metal layer 213 to be connected to the third semiconductor layer 2141 of the second light emitting layer 214 and the electrode 2125 of the first light emitting layer 212 through the carrier 202 and the conductive bonding structure 203. One end is directly connected to the electrode 2122 of the first light emitting layer 212 and the electrode 2145 of the second light emitting layer 214. It can be considered that the second light-emitting layer 214 can be connected in series to form a first light-emitting layer 212 to form a series circuit, and then another series of first light-emitting layers 212 can be connected in series to form another circuit. Connecting the two circuits to the AC power source AC1 results in an anti-parallel circuit.
請參閱第3D圖,本發明第一實施例之發光元件200上可具有多數第一發光疊層212(212’)、及多數第二發光疊層214(214’),而多數發光疊層係與一外部之交流電源AC2組成一惠斯頓電橋之電路。Referring to FIG. 3D, the light-emitting element 200 of the first embodiment of the present invention may have a plurality of first light-emitting layers 212 (212') and a plurality of second light-emitting layers 214 (214'), and most of the light-emitting layers are An AC power supply AC2 forms an electric circuit with a Wheatstone bridge.
第3D圖中之惠斯頓電橋電路係由複數之第一發光疊層212、212’、212”及複數之第二發光疊層214、214’所組成,其中,位於外圍電路之第一發光疊層212及212’分別所具之電極2125、2125’係藉金屬導線210共同連接至位於縱向電路之第一發光疊層212”之電極2122”,而位於縱向 電路之第一發光疊層212”則藉金屬導線210將其電極2125”連接至導電接合結構203,以導接位於外圍電路之第二發光疊層214、214’分別所具之第三半導體層2141。The Wheatstone bridge circuit in FIG. 3D is composed of a plurality of first light-emitting stacks 212, 212', 212" and a plurality of second light-emitting stacks 214, 214', wherein the first circuit is located first. The electrodes 2125, 2125' of the light-emitting stacks 212 and 212' are respectively connected by a metal wire 210 to the electrode 2122" of the first light-emitting layer 212" of the longitudinal circuit, and are located in the longitudinal direction. The first light emitting layer 212" of the circuit connects the electrode 2125" to the conductive bonding structure 203 by the metal wire 210 to conduct the third semiconductor layer respectively disposed on the second light emitting layer 214, 214' of the peripheral circuit. 2141.
交流電源AC2之一端可連接至第一發光疊層212之電極2122及第二發光疊層214之電極2145上;交流電源AC2之另一端則可連接至第一發光疊層212’之電極2122’及第二發光疊層214’之電極2145’上。因此第一發光疊層212、第一發光疊層212”、及第二發光疊層214’構成一方向之一第一電路;而第一發光疊層212’、第一發光疊層212”、及第二發光疊層214則構成另一方向之一第二電路。第一電路之第一發光疊層212、第二發光疊層214’可不限於只有單一發光疊層,第一發光疊層212可串聯有多個而形成一第一整流電路,第二發光疊層214’亦可串聯多個第一發光疊層212而形成一第二整流電路。第二電路之第一發光疊層212’、第二發光疊層214可不限於只有單一發光疊層,第一發光疊層212’可串聯有多個而形成一第三整流電路,第二發光疊層214亦可串聯多個第一發光疊層212’而形成一第四整流電路。One end of the AC power source AC2 can be connected to the electrode 2122 of the first light emitting layer 212 and the electrode 2145 of the second light emitting layer 214; the other end of the AC power source AC2 can be connected to the electrode 2122 of the first light emitting layer 212' And on the electrode 2145' of the second light emitting laminate 214'. Therefore, the first light emitting layer 212, the first light emitting layer 212", and the second light emitting layer 214' constitute a first circuit in one direction; and the first light emitting layer 212', the first light emitting layer 212", And the second light emitting layer 214 constitutes one of the second circuits in the other direction. The first light-emitting layer 212 and the second light-emitting layer 214 ′ of the first circuit are not limited to a single light-emitting layer, and the first light-emitting layer 212 may be connected in series to form a first rectifier circuit, and the second light-emitting layer is formed. 214' may also connect a plurality of first light emitting stacks 212 to form a second rectifier circuit. The first light emitting layer 212' and the second light emitting layer 214 of the second circuit are not limited to only a single light emitting layer. The first light emitting layer 212' may be connected in series to form a third rectifier circuit. Layer 214 may also connect a plurality of first light emitting stacks 212' in series to form a fourth rectifier circuit.
同樣地,位於縱向電路供第一及第二電路共用之第一發光疊層212”之數量可不限於只有一個,而是可串聯有多個第一發光疊層212”而形成一主要發光電路,以增進發光元件200之整體亮度。Similarly, the number of the first light emitting stacks 212" located in the vertical circuit for sharing the first and second circuits may not be limited to only one, but a plurality of first light emitting layers 212" may be connected in series to form a main light emitting circuit. In order to enhance the overall brightness of the light-emitting element 200.
第3A圖至第3D圖中所揭示之串並聯電路配置僅為具體說明數種較常見之電路其可利用本發明發光元件200之特有結構所達成,並非限制本發明之發光元件200之形 式,而本領域中一般人士亦應有能力利用本發明之精神將以上所述之電路,以異於本實施例所舉例之串並聯之連接方式達成。The series-parallel circuit configuration disclosed in FIGS. 3A to 3D is only a specific description of several common circuits which can be realized by the unique structure of the light-emitting element 200 of the present invention, and does not limit the shape of the light-emitting element 200 of the present invention. In general, those skilled in the art should also be able to utilize the spirit of the present invention to achieve the above-described circuits in a series-parallel connection different from that exemplified in the present embodiment.
請參閱第4圖,發光元件400包括有一載體402、一形成於載體402上之導電接合結構404、一位於導電接合結構404上方之磊晶結構406、設於磊晶結構406及導電接合結構404間之絕緣部408、以及佈設於發光元件400表面之金屬導線410。金屬導線410與磊晶結構406表面間具有一介電質411。Referring to FIG. 4 , the light emitting device 400 includes a carrier 402 , a conductive bonding structure 404 formed on the carrier 402 , an epitaxial structure 406 over the conductive bonding structure 404 , an epitaxial structure 406 , and a conductive bonding structure 404 . The insulating portion 408 and the metal wire 410 disposed on the surface of the light emitting element 400. The metal wire 410 has a dielectric 411 between the surface of the epitaxial structure 406.
磊晶結構406可包括有一或複數個第一發光疊層412、以及一或複數個電性導通於導電接合結構404的第二發光疊層414。而第一發光疊層412及第二發光疊層414可等同於第一實施例中所述之發光疊層。The epitaxial structure 406 can include one or more first light emitting stacks 412 and one or more second light emitting stacks 414 electrically conductive to the conductive bonding structures 404. The first light-emitting layer 412 and the second light-emitting layer 414 are equivalent to the light-emitting layer described in the first embodiment.
本實施例與第一實施例係大致相同,不同之處僅在於導電接合結構404為一透明導電連接層,而載體402為一透明導電基板,藉此增加出光面積。This embodiment is substantially the same as the first embodiment except that the conductive bonding structure 404 is a transparent conductive connection layer, and the carrier 402 is a transparent conductive substrate, thereby increasing the light-emitting area.
請參閱第5圖,發光元件500包括有一載體502、一形成於載體502上之導電接合結構504、一位於導電接合結構504上方之磊晶結構506、至少一設於磊晶結構506及導電接合 結構504間之絕緣部508、以及至少一佈設於發光元件500表面之金屬導線510。導電接合結構504包括一接合層507、形成於接合層507上之一反射層505、及形成於反射層505上之透明導電層503。金屬導線510與磊晶結構506表面間係具有一介電質511。Referring to FIG. 5, the light-emitting device 500 includes a carrier 502, a conductive bonding structure 504 formed on the carrier 502, an epitaxial structure 506 over the conductive bonding structure 504, at least one disposed on the epitaxial structure 506, and conductive bonding. An insulating portion 508 between the structures 504 and at least one metal wire 510 disposed on the surface of the light emitting element 500. The conductive bonding structure 504 includes a bonding layer 507, a reflective layer 505 formed on the bonding layer 507, and a transparent conductive layer 503 formed on the reflective layer 505. The metal wire 510 and the surface of the epitaxial structure 506 have a dielectric 511.
磊晶結構506可包括有第一發光疊層512及512’、以及電性導通於導電接合結構504的第二發光疊層514、514’。The epitaxial structure 506 can include a first luminescent stack 512 and 512', and a second luminescent stack 514, 514' electrically conductive to the conductive bonding structure 504.
本實施例可從第一或第二實施例稍作更改達成,與第一、二實施例之差別主要在於包含第一發光疊層512(512’)、及第二發光疊層514(514’)之發光疊層可分別具有不同之磊晶結構。第5圖中,發光元件500之第一發光疊層512及512’可成長於不同之磊晶基板,而使得第一發光疊層512中發光層5123兩側之第一半導體層5121及第二半導體層5124分別為p型及n型;第一發光疊層512’中發光層5123’兩側之第一半導體層5121’及第二半導體層5124’分別為n型及p型;及/或發光元件500之第二發光疊層514及514’可成長於不同之磊晶基板,而使得第二發光疊層514中發光層5143兩側之第三半導體層5141及第四半導體層5144分別為p型及n型;第二發光疊層514’中發光層5143’兩側之第三半導體層5141’及第四半導體層5144’分別為n型及p型;及/或第一發光疊層512 及第二發光疊層514分別成長於不同之磊晶基板,例如第一半導體層5121與第三半導體層5141係分別具有不同之極性,然而第一半導體層5121及5121’間之極性可為相同。This embodiment can be slightly modified from the first or second embodiment, and differs from the first and second embodiments mainly in that it includes a first light-emitting layer 512 (512') and a second light-emitting layer 514 (514'). The light-emitting stacks may each have a different epitaxial structure. In FIG. 5, the first light emitting layers 512 and 512' of the light emitting device 500 can be grown on different epitaxial substrates, so that the first semiconductor layer 5121 and the second side of the first light emitting layer 512 on both sides of the light emitting layer 5123. The semiconductor layer 5124 is respectively p-type and n-type; the first semiconductor layer 5121' and the second semiconductor layer 5124' on both sides of the light-emitting layer 5123' in the first light-emitting layer 512' are respectively n-type and p-type; and/or The second light emitting stacks 514 and 514' of the light emitting device 500 can be grown on different epitaxial substrates, so that the third semiconductor layer 5141 and the fourth semiconductor layer 5144 on both sides of the light emitting layer 5143 in the second light emitting layer 514 are respectively a p-type and an n-type; the third semiconductor layer 5141' and the fourth semiconductor layer 5144' on both sides of the light-emitting layer 5143' in the second light-emitting layer 514' are respectively n-type and p-type; and/or the first light-emitting layer 512 And the second light emitting layer 514 is respectively grown on different epitaxial substrates. For example, the first semiconductor layer 5121 and the third semiconductor layer 5141 have different polarities respectively, but the polarities between the first semiconductor layers 5121 and 5121' may be the same. .
請參閱第6圖,發光元件600包括有一為絕緣基板之載體601、一形成於載體601上之導電接合結構602、一形成於導電接合結構602上之磊晶結構606、設於磊晶結構606及導電接合結構602間之絕緣部608、以及佈設於發光元件600表面之金屬導線610,其中,金屬導線610與磊晶結構606表面間係具有一介電質611;導電接合結構602包括形成於載體601上之接合層604、形成於接合層上的反射層605、及形成於反射層上之透明導電層603。Referring to FIG. 6 , the light-emitting device 600 includes a carrier 601 as an insulating substrate, a conductive bonding structure 602 formed on the carrier 601 , an epitaxial structure 606 formed on the conductive bonding structure 602 , and an epitaxial structure 606 . The insulating portion 608 between the conductive bonding structure 602 and the metal wire 610 disposed on the surface of the light emitting device 600, wherein the metal wire 610 and the surface of the epitaxial structure 606 have a dielectric 611; the conductive bonding structure 602 includes A bonding layer 604 on the carrier 601, a reflective layer 605 formed on the bonding layer, and a transparent conductive layer 603 formed on the reflective layer.
磊晶結構606之第一發光疊層612及第二發光疊層614可等同於前述各實施例中之結構。The first light emitting stack 612 and the second light emitting layer 614 of the epitaxial structure 606 can be identical to the structures in the foregoing embodiments.
本實施例與前述實施例不同之處在於載體601係一絕緣基板,而導電接合結構602中只需最上層的透明導電層603具有導電能力即可。可於透明導電層603之表面上設有一焊接墊618以藉由打線方式連接於一外部電源(圖未示)。載體601可為矽橡膠(silicone)、玻璃、石英、陶瓷、合金或印刷電路板(PCB)。透明導電層603可為氧化銦錫、氧化鎘錫、氧化銻錫、氧化鋅及氧化鋅錫所構成材料群組中之至少一種材料。反射層605可選自Sn、Al、Au、Pt、Zn、Ag、Ti、Pb、Pd、Ge、Cu、AuBe、AuGe、Ni、 PbSn、AuZn所構成材料群組中之至少一種材料或其它可代替之材料。The difference between the present embodiment and the foregoing embodiment is that the carrier 601 is an insulating substrate, and only the uppermost transparent conductive layer 603 of the conductive bonding structure 602 has electrical conductivity. A solder pad 618 may be disposed on the surface of the transparent conductive layer 603 to be connected to an external power source (not shown) by wire bonding. The carrier 601 can be a silicone, glass, quartz, ceramic, alloy or printed circuit board (PCB). The transparent conductive layer 603 may be at least one of the group consisting of indium tin oxide, cadmium tin oxide, antimony tin oxide, zinc oxide, and zinc tin oxide. The reflective layer 605 may be selected from the group consisting of Sn, Al, Au, Pt, Zn, Ag, Ti, Pb, Pd, Ge, Cu, AuBe, AuGe, Ni, At least one of a group of materials composed of PbSn and AuZn or other alternative materials.
本發明所列舉之各實施例僅用以說明本發明,並非用以限制本發明之範圍。任何人對本發明所作之任何顯而易知之修飾或變更皆不脫離本發明之精神與範圍。The examples of the invention are intended to be illustrative only and not to limit the scope of the invention. Any changes or modifications of the present invention to those skilled in the art will be made without departing from the spirit and scope of the invention.
10‧‧‧藍寶石絕緣基板10‧‧‧Sapphire insulating substrate
12‧‧‧發光疊層12‧‧‧Lighting laminate
123‧‧‧n型半導體層123‧‧‧n type semiconductor layer
122‧‧‧發光層122‧‧‧Lighting layer
121‧‧‧p型半導體層121‧‧‧p-type semiconductor layer
14‧‧‧溝渠14‧‧‧ Ditch
18‧‧‧第一電極18‧‧‧First electrode
16‧‧‧第二電極16‧‧‧second electrode
19‧‧‧金屬導線19‧‧‧Metal wire
208、408、508、608‧‧‧絕緣部208, 408, 508, 608‧‧‧Insulation
212、212’、212”、412、512、512’、612‧‧‧第一發光疊層212, 212', 212", 412, 512, 512', 612‧‧‧ first light-emitting laminate
2122、2122’、2122”‧‧‧電極2122, 2122', 2122" ‧ ‧ electrodes
2123、2143、5123、5123’、5143、5143’‧‧‧發光層2123, 2143, 5123, 5123', 5143, 5143'‧‧‧ luminescent layer
2145、2145’、5145、5145’‧‧‧電極2145, 2145', 5145, 5145' ‧ ‧ electrodes
215、603、503‧‧‧透明導電層215, 603, 503‧‧ ‧ transparent conductive layer
204、604、507‧‧‧接合層204, 604, 507‧‧‧ joint layer
2121‧‧‧第一半導體層2121‧‧‧First semiconductor layer
2124‧‧‧第二半導體層2124‧‧‧Second semiconductor layer
2141‧‧‧第三半導體層2141‧‧‧ Third semiconductor layer
2144‧‧‧第四半導體層2144‧‧‧ fourth semiconductor layer
2126、2146‧‧‧電流擴散層2126, 2146‧‧‧current diffusion layer
200、400、500、600‧‧‧發光元件200, 400, 500, 600‧‧‧Lighting elements
202、402、502、601‧‧‧載體202, 402, 502, 601‧‧‧ carriers
203、404、504、602‧‧‧導電接合結構203, 404, 504, 602‧‧‧ conductive joint structure
206、406、506、606‧‧‧磊晶結構206, 406, 506, 606‧‧‧ epitaxial structure
210、410、510、610‧‧‧金屬導線210, 410, 510, 610‧‧‧Metal wires
214、214’、414、514、514’、614‧‧‧第二發光疊層214, 214', 414, 514, 514', 614‧‧‧ second light-emitting laminate
2125、2125’、2125”‧‧‧電極2125, 2125', 2125" ‧ ‧ electrodes
213‧‧‧金屬層213‧‧‧metal layer
217、605、505‧‧‧反射層217, 605, 505‧ ‧ reflective layer
211、411、511、611‧‧‧介電質211, 411, 511, 611‧‧‧ dielectric
618‧‧‧焊接墊618‧‧‧ solder pad
DC1、DC2‧‧‧直流電源DC1, DC2‧‧‧ DC power supply
AC1、AC2‧‧‧交流電源AC1, AC2‧‧‧ AC power supply
第1圖係顯示習知技術之一具有陣列式發光疊層之發光元件示意圖;第2圖係顯示本發明之發光元件第一實施例示意圖;第3A圖至第3D圖係分別顯示應用本發明之發光元件第一實施例之發光疊層串並聯電路圖;第4圖係顯示本發明之發光元件第二實施例示意圖;第5圖係顯示本發明之發光元件第三實施例示意圖;以及第6圖係顯示本發明之發光元件第四實施例示意圖。1 is a schematic view showing a light-emitting element having an array type light-emitting layer in one of the prior art; FIG. 2 is a schematic view showing a first embodiment of the light-emitting element of the present invention; and FIGS. 3A to 3D are respectively showing the application of the present invention FIG. 4 is a schematic view showing a second embodiment of a light-emitting element of the present invention; FIG. 5 is a view showing a third embodiment of the light-emitting element of the present invention; and a sixth embodiment; The figure shows a schematic view of a fourth embodiment of the light-emitting element of the present invention.
200‧‧‧發光元件200‧‧‧Lighting elements
215‧‧‧透明導電層215‧‧‧Transparent conductive layer
202‧‧‧載體202‧‧‧Vector
210‧‧‧金屬導線210‧‧‧Metal wire
203‧‧‧導電接合結構203‧‧‧Electrical joint structure
214‧‧‧第二發光疊層214‧‧‧Second light-emitting laminate
206‧‧‧磊晶結構206‧‧‧ epitaxial structure
2125‧‧‧電極2125‧‧‧electrode
208‧‧‧絕緣部208‧‧‧Insulation
213‧‧‧金屬層213‧‧‧metal layer
212‧‧‧第一發光疊層212‧‧‧First light-emitting laminate
217‧‧‧反射層217‧‧‧reflective layer
2121‧‧‧第一半導體層2121‧‧‧First semiconductor layer
2122‧‧‧電極2122‧‧‧electrode
2123、2143‧‧‧發光層2123, 2143‧‧‧Lighting layer
2145‧‧‧電極2145‧‧‧electrode
2124‧‧‧第二半導體層2124‧‧‧Second semiconductor layer
2141‧‧‧第三半導體層2141‧‧‧ Third semiconductor layer
2126、2146‧‧‧電流擴散層2126, 2146‧‧‧current diffusion layer
211‧‧‧介電質211‧‧‧ dielectric
204‧‧‧接合層204‧‧‧Connection layer
Claims (13)
Priority Applications (3)
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TW99106549A TWI400788B (en) | 2010-03-05 | 2010-03-05 | Light-emitting element |
US12/979,281 US8405107B2 (en) | 2002-07-15 | 2010-12-27 | Light-emitting element |
US13/850,215 US8785958B2 (en) | 2002-07-15 | 2013-03-25 | Light emitting element |
Applications Claiming Priority (1)
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TW99106549A TWI400788B (en) | 2010-03-05 | 2010-03-05 | Light-emitting element |
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TW201131737A TW201131737A (en) | 2011-09-16 |
TWI400788B true TWI400788B (en) | 2013-07-01 |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040051107A1 (en) * | 2001-03-28 | 2004-03-18 | Shinichi Nagahama | Nitride semiconductor element |
JP2008235582A (en) * | 2007-03-20 | 2008-10-02 | Oki Data Corp | Semiconductor device and led print head |
JP2008235720A (en) * | 2007-03-22 | 2008-10-02 | Toshiba Lighting & Technology Corp | Illumination apparatus |
TW200939513A (en) * | 2008-03-04 | 2009-09-16 | Huga Optotech Inc | Light emitting diode and method |
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2010
- 2010-03-05 TW TW99106549A patent/TWI400788B/en active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040051107A1 (en) * | 2001-03-28 | 2004-03-18 | Shinichi Nagahama | Nitride semiconductor element |
JP2008235582A (en) * | 2007-03-20 | 2008-10-02 | Oki Data Corp | Semiconductor device and led print head |
JP2008235720A (en) * | 2007-03-22 | 2008-10-02 | Toshiba Lighting & Technology Corp | Illumination apparatus |
TW200939513A (en) * | 2008-03-04 | 2009-09-16 | Huga Optotech Inc | Light emitting diode and method |
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