TW201344993A - Package for optical semiconductor device and method thereof, optical semiconductor device and method thereof - Google Patents

Package for optical semiconductor device and method thereof, optical semiconductor device and method thereof Download PDF

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TW201344993A
TW201344993A TW102104912A TW102104912A TW201344993A TW 201344993 A TW201344993 A TW 201344993A TW 102104912 A TW102104912 A TW 102104912A TW 102104912 A TW102104912 A TW 102104912A TW 201344993 A TW201344993 A TW 201344993A
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optical semiconductor
semiconductor device
substrate
package
optical
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TW102104912A
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TWI590494B (en
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Wataru Goto
Toshio Shiobara
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Shinetsu Chemical Co
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Priority claimed from JP2012032853A external-priority patent/JP2013171853A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52Encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58Optical field-shaping elements
    • H01L33/60Reflective elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

The purpose of the present invention is to provide a package for optical semiconductor device and method thereof, and optical semiconductor device. The package for optical semiconductor device is employed to implement an optical semiconductor device with relatively high mechanic stability, robust durability and low interference. The present invention also provides a method of manufacturing optical semiconductor device, which has excellent production yield and can reduce the manufacturing cost. To achieve the purpose of the present invention, the present invention provides a package for optical semiconductor device, which is characterized in that at least two electrical connection parts adapted to be electrically connected to an optical semiconductor element and a reflector structure surrounding the to-be-connected optical semiconductor element are provided on the top surface of a base station formed by immersing and curing silicone resin composition in fiber enhanced material.

Description

光學半導體裝置用封裝體與其製造方法、以及光學半導體裝置與其製造方法 Package for optical semiconductor device, method of manufacturing the same, and optical semiconductor device and method of manufacturing the same

本發明關於一種光學半導體裝置用封裝體及其製造方法、以及使用該封裝體之光學半導體裝置及光學半導體裝置的製造方法。 The present invention relates to a package for an optical semiconductor device, a method of manufacturing the same, and an optical semiconductor device using the package and a method of manufacturing the optical semiconductor device.

發光二極體(Light Emitting Diode,LED)、光電二極體等光學元件及光學半導體裝置,由於效率高,且對外部應力及環境影響的耐性較高,因此在產業界中被廣泛使用。進而,光學元件及光學半導體裝置效率較高,並且壽命較長、小巧緊湊,可以構成許多不同的結構,並且可以用相對較低的製造成本來製造(專利文獻1、專利文獻2)。 Optical elements such as light-emitting diodes (LEDs) and photodiodes, and optical semiconductor devices are widely used in the industry because of their high efficiency and high resistance to external stress and environmental influences. Further, the optical element and the optical semiconductor device are high in efficiency, long in life, small in size, compact, and can be configured in many different configurations, and can be manufactured at a relatively low manufacturing cost (Patent Document 1 and Patent Document 2).

例如,已知通常是使用以環氧玻璃布層壓板(FR-4)為代表的具有纖維強化材料的環氧材料,作為承載半導體元件的基台的材質。尤其是在產生大量熱量的高輸出光學半導體裝置中,使用高耐熱性、同時長時間持續保持高反射率的基台,是非常重要的。 For example, it is known to use an epoxy material having a fiber-reinforced material typified by an epoxy glass cloth laminate (FR-4) as a material for a base for carrying a semiconductor element. In particular, in a high-output optical semiconductor device that generates a large amount of heat, it is very important to use a base having high heat resistance while maintaining a high reflectance for a long period of time.

又,在航空宇宙產業所使用的機械中,受FR-4基板的干擾的影響,會產生機械錯誤動作的問題。因此,使用一種具有低干擾性的基台的光學半導體裝置用封裝體的開發 開始受到重視。 Moreover, in the machinery used in the aerospace industry, the problem of mechanical malfunction occurs due to the interference of the FR-4 substrate. Therefore, development of a package for an optical semiconductor device using a substrate having low interference Began to pay attention.

[先前技術文獻] [Previous Technical Literature]

(專利文獻) (Patent Literature)

專利文獻1:日本特表2011-521481號公報 Patent Document 1: Japanese Patent Publication No. 2011-521481

專利文獻2:日本專利第4789350號公報 Patent Document 2: Japanese Patent No. 4789350

本發明是為了解決上述問題(第1問題)而完成,目的在於提供一種光學半導體裝置用封裝體及其製造方法、以及使用該封裝體的光學半導體裝置,該光學半導體裝置用封裝體是用於實現一種機械穩定性較高且高耐久性、低干擾性的光學半導體裝置。 The present invention has been made to solve the above problems (first problem), and an object of the invention is to provide a package for an optical semiconductor device, a method of manufacturing the same, and an optical semiconductor device using the package, which is used for a package for an optical semiconductor device An optical semiconductor device having high mechanical stability, high durability, and low interference is realized.

又,由被稱為矩陣陣列封裝(Matrix array package,MAP)的集合基板製造而成的光學半導體裝置,在它的製造階段中難以實施通電檢查,而是在成為最終產品形狀(經過單粒化(singulation)的光學半導體裝置)後再實施通電檢查。因此,無法確認製造階段中的品質不良,因而導致生產效率下降。 Moreover, an optical semiconductor device manufactured by a collective substrate called a matrix array package (MAP) is difficult to perform a power-on inspection in its manufacturing stage, but is in a final product shape (single graining) The singulation optical semiconductor device is then subjected to an energization check. Therefore, it is impossible to confirm the quality defect in the manufacturing stage, and thus the production efficiency is lowered.

又,由於光學半導體元件的輸出或密封的螢光體的濃度偏差,光學半導體裝置需要實施分選。一般來說,在光學半導體裝置的分選步驟中,是在將光學半導體裝置完全單粒化的狀態下實施,但由於完全單粒化的狀態下的分選,需要光學半導體裝置的排列等附加步驟,因此造成成本增加。 Further, the optical semiconductor device needs to perform sorting due to the output of the optical semiconductor element or the concentration deviation of the sealed phosphor. In general, in the sorting step of the optical semiconductor device, the optical semiconductor device is completely granulated. However, since the sorting in the completely singulated state requires the arrangement of the optical semiconductor device or the like. The steps, therefore, result in increased costs.

本發明也是為了解決該問題(第2問題)而完成,目的在於提供一種光學半導體裝置的製造方法、及利用該製造方法製造的光學半導體裝置,該光學半導體裝置的生產效率良好,且可以降低成本。 The present invention has been made to solve the above problem (second problem), and an object of the invention is to provide a method for manufacturing an optical semiconductor device and an optical semiconductor device manufactured by the method, which is excellent in production efficiency and can reduce cost .

為了解決上述第1問題,在本發明中,提供一種光學半導體裝置用封裝體,其特徵在於:在將矽酮樹脂組成物含浸於纖維強化材料中並硬化而成的基台的頂面上,具有要與光學半導體元件電性連接的至少兩個電性連接部、及圍繞前述要連接的光學半導體元件的反射體(reflector)結構。 In order to solve the above-mentioned first problem, the present invention provides a package for an optical semiconductor device, characterized in that a top surface of a base which is obtained by impregnating a fluorenone resin composition with a fiber reinforced material and hardening it is provided. There are at least two electrical connection portions to be electrically connected to the optical semiconductor element, and a reflector structure surrounding the optical semiconductor element to be connected.

如果是這種光學半導體裝置用封裝體,可以實現一種機械穩定性較高且高耐久性、低干擾性的光學半導體裝置。 According to such a package for an optical semiconductor device, an optical semiconductor device having high mechanical stability, high durability, and low interference can be realized.

又,前述纖維強化材料較佳為玻璃纖維。 Further, the fiber-reinforced material is preferably a glass fiber.

如果纖維強化材料為玻璃纖維,進而,基台表現出良好的耐紫外線性及耐熱性,也確保了纖維強化材料與矽酮樹脂組成物的良好的黏著。進而,由於玻璃纖維為廉價且易於操作的材料,因此從成本方面來看也較為有利。 If the fiber-reinforced material is glass fiber, the base exhibits good ultraviolet resistance and heat resistance, and also ensures good adhesion of the fiber-reinforced material to the fluorenone resin composition. Further, since the glass fiber is a material that is inexpensive and easy to handle, it is also advantageous in terms of cost.

進而,較佳為前述基台是使用至少一層以上的半固化片(prepreg)硬化而成,該半固化片是將前述矽酮樹脂組成物含浸於前述纖維強化材料中。 Further, it is preferable that the base is cured by using at least one layer of a prepreg in which the fluorenone resin composition is impregnated into the fiber reinforced material.

這樣一來,利用積層一層或兩層以上的半固化片,可以根據用途來控制厚度,使機械穩定性更為優異。 In this way, by using one or two or more layers of prepregs, the thickness can be controlled according to the use, and the mechanical stability is further improved.

又,可以使前述矽酮樹脂組成物為縮合硬化型或加成硬化型矽酮樹脂組成物。 Further, the fluorenone resin composition may be a condensation-curable or addition-curable fluorenone resin composition.

藉此,可以易於獲得一種機械特性、耐熱性、耐變色 性優異且表面的褶縫較少的光學半導體裝置用封裝體。 Thereby, a mechanical property, heat resistance, and discoloration resistance can be easily obtained. A package for an optical semiconductor device which is excellent in properties and has few pleats on the surface.

進而,前述電性連接部是由至少一層金屬層所構成。 Further, the electrical connection portion is composed of at least one metal layer.

藉此,電性連接部可以利用一種費用效果較高(亦即成本低)且簡單的步驟來形成。 Thereby, the electrical connection can be formed by a simple and costly (ie, low cost) and simple step.

又,較佳為,前述基台在底面上具有底面金屬被覆層,進而較佳為,具有至少一個以上穿孔(via),基台頂面的電性連接部與底面金屬被覆層通過該穿孔而電性連接。 Moreover, it is preferable that the base has a bottom metal coating layer on the bottom surface, and further preferably has at least one via, and the electrical connection portion of the top surface of the base and the metal coating layer of the bottom surface pass through the through hole. Electrical connection.

如果是這種基台,那麼散熱性優異,並且利用底面金屬被覆層,可以實現與其他基板的連接。並且,利用穿孔,可以增加光學半導體裝置用封裝體的設計上的選擇,並達成基台的上底面之間的節省空間的電性連接。 If it is such a base, the heat dissipation is excellent, and the connection with other substrates can be realized by the underlying metal coating layer. Further, by using the through holes, the design of the package for the optical semiconductor device can be increased, and a space-saving electrical connection between the upper and lower surfaces of the base can be achieved.

又,前述反射體結構可以由矽酮樹脂、環氧樹脂、及矽酮樹脂與環氧樹脂的雜化樹脂(hybrid resin)中的任一種成型而成。 Further, the reflector structure may be formed of any one of an oxime resin, an epoxy resin, and a hybrid resin of an oxime resin and an epoxy resin.

利用使用這種樹脂,可以易於將高耐久性且具有高反射率性的反射體結構成型。 By using such a resin, it is possible to easily form a reflector structure having high durability and high reflectivity.

進而,較佳為,前述基台在25℃、1 GHz下的相對介電常數為5.0以下。 Further, it is preferable that the base has a relative dielectric constant of 5.0 or less at 25 ° C and 1 GHz.

如果是這種基台,可以進一步達成低干擾(noise)性。 If it is such a base, it is possible to further achieve low noise.

又,在本發明中,提供一種光學半導體裝置用封裝體的製造方法,是製造光學半導體裝置用封裝體的方法,其特徵在於具有以下步驟:基台製作步驟,製作將矽酮樹脂組成物含浸於纖維強化材料中並硬化而成的基台;頂面金屬被覆層形成步驟,在該基台頂面上,形成頂 面金屬被覆層;電性連接部形成步驟,將該頂面金屬被覆層形成於要與光學半導體元件電性連接的至少兩個電性連接部上;及,反射體結構成型步驟,在具有該電性連接部之前述基台上,利用轉注成型或射出成型,以圍繞前述要連接的光學半導體元件的方式,將反射體結構成型。 Moreover, the present invention provides a method for producing a package for an optical semiconductor device, which is a method for producing a package for an optical semiconductor device, which comprises the steps of: a step of fabricating a substrate to prepare an impregnation resin composition a base formed by hardening in a fiber reinforced material; a top metal coating layer forming step, forming a top on the top surface of the base a surface metal coating layer; an electrical connection portion forming step of forming the top metal cladding layer on at least two electrical connection portions to be electrically connected to the optical semiconductor element; and a reflector structure molding step having the The reflector is formed on the abutment of the electrical connection portion by transfer molding or injection molding to surround the optical semiconductor element to be connected.

如果是這種光學半導體裝置用封裝體的製造方法,能以低成本且容易地製造一種機械穩定性較高、高耐久性、低干擾性的光學半導體裝置用封裝體。 According to the method for producing a package for an optical semiconductor device, a package for an optical semiconductor device having high mechanical stability, high durability, and low interference can be easily manufactured at low cost.

進而,較佳為,在前述電性連接部形成步驟後且前述反射體結構成型步驟前,具有表面處理步驟,該表面處理步驟是對前述基台的表面進行電漿處理及/或紫外線(UV)臭氧處理。 Furthermore, it is preferable that after the step of forming the electrical connection portion and before the step of forming the reflector structure, there is a surface treatment step of performing plasma treatment and/or ultraviolet (UV) on the surface of the base. ) Ozone treatment.

利用具有這種表面處理步驟,可以提高反射體結構的黏著強度。 By having such a surface treatment step, the adhesion strength of the reflector structure can be improved.

又,在本發明中,提供一種光學半導體裝置,是在前述光學半導體裝置用封裝體上,承載光學半導體元件而製造出來。 Moreover, in the present invention, an optical semiconductor device is manufactured which is manufactured by carrying an optical semiconductor element on the package for an optical semiconductor device.

如果是這種光學半導體裝置,那麼機械穩定性較高,且為高耐久性、低干擾性。 In the case of such an optical semiconductor device, mechanical stability is high and high durability and low interference are obtained.

為了解決上述第2課題,在本發明中,提供一種光學半導體裝置的製造方法,是製造光學半導體裝置的方法,其特徵在於具有以下步驟:構裝步驟,在具有通電部之基板上構裝複數個光學半導體元件,因而獲得光學半導體元件集合基板; 半切割步驟,將前述光學半導體元件集合基板半切割,因而切斷前述通電部的一部分,以便在前述光學半導體元件集合基板內製作通電檢查用電子電路;通電檢查步驟,對該通電檢查用電子電路進行通電檢查,以便獲得每一前述光學半導體元件的光學特性資訊;分選步驟,使用該光學特性資訊,分選前述光學半導體元件;及,全切割步驟,在前述半切割步驟的切斷線上進行全切割,藉此將前述光學半導體元件集合基板分割為各個前述光學半導體裝置,因而獲得利用前述光學特性資訊而分選後的複數個前述光學半導體裝置。 In order to solve the above-described second problem, the present invention provides a method of manufacturing an optical semiconductor device, and a method of manufacturing an optical semiconductor device, comprising the steps of: constructing a plurality of structures on a substrate having an energization portion Optical semiconductor components, thereby obtaining an optical semiconductor component assembly substrate; In the half-cutting step, the optical semiconductor element assembly substrate is half-cut, thereby cutting a part of the current-carrying portion to form an electronic circuit for conducting electricity inspection in the optical semiconductor element assembly substrate; and an energization inspection step for the power-on inspection electronic circuit Performing a power-on check to obtain optical characteristic information of each of the foregoing optical semiconductor elements; a sorting step of sorting the optical semiconductor elements using the optical characteristic information; and a full-cutting step on the cutting line of the half-cutting step By performing the full dicing, the optical semiconductor element assembly substrate is divided into the respective optical semiconductor devices, and thus a plurality of the optical semiconductor devices separated by the optical characteristic information are obtained.

如果是這種光學半導體裝置的製造方法,生產效率良好,且可以降低成本。 If it is such a manufacturing method of an optical semiconductor device, production efficiency is good, and cost can be reduced.

又,較佳為,在前述通電檢查步驟中,使用光學特性檢測裝置進行通電檢查。 Further, it is preferable that the energization inspection step is performed using the optical characteristic detecting means in the energization inspection step.

藉此,可以確認並分選例如每一光學半導體元件是否亮燈、光束值、色度、色溫、波長光譜及演色性等。 Thereby, it is possible to confirm and sort, for example, whether each optical semiconductor element is lit, a beam value, a chromaticity, a color temperature, a wavelength spectrum, a color rendering property, and the like.

進而,較佳為,在前述通電檢查步驟中,與每一光學半導體元件對應地配置光學特性檢測用光學透鏡,並獲得光學特性資訊。 Furthermore, in the energization inspection step, optical characteristics detecting optical lenses are disposed corresponding to each optical semiconductor element, and optical characteristic information is obtained.

藉此,通過一次的測定,可以獲得大量的光學半導體元件的光學特性資訊,且光學半導體裝置的分選的工作量大幅降低。 Thereby, the optical characteristic information of a large number of optical semiconductor elements can be obtained by one measurement, and the workload of sorting of an optical semiconductor device is drastically reduced.

又,作為具有前述通電部之基板,可以使用一種在金屬框架上將樹脂轉注成型(transfer molding)而成的基板、或 在印刷基板上將樹脂轉注成型而成的基板。 Further, as the substrate having the above-described current-carrying portion, a substrate obtained by transfer molding a resin on a metal frame, or A substrate obtained by transferring a resin onto a printed substrate.

如果使用這種基板,光學半導體裝置的製造方法的生產效率將更為良好,且可以進一步降低成本。 If such a substrate is used, the manufacturing method of the optical semiconductor device will be more efficient, and the cost can be further reduced.

進而,較佳為,使用一種金屬框架在前述半切割步驟中所切斷的部分中具有溝槽之基板,作為在前述金屬框架上將樹脂轉注成型而成的基板。 Further, it is preferable to use a substrate having a groove in a portion cut by the metal frame in the half-cut step as a substrate on which the resin is transferred onto the metal frame.

藉此,可防止由切割毛邊(dicing burr)或崩角(chipping)引起的成型樹脂的缺口。 Thereby, the notch of the molding resin caused by the dicing burr or chipping can be prevented.

又,較佳為,使用一種在積層3層以上的纖維強化材料中含浸有樹脂而成的基板,作為前述印刷基板。 Moreover, it is preferable to use a board|substrate which impregnates the fiber reinforcement material of three or more layers, and is a board|

如果是這種印刷基板,可以製造一種耐熱性或耐紫外線性較強的光學半導體裝置。 In the case of such a printed substrate, an optical semiconductor device having high heat resistance or ultraviolet resistance can be produced.

進而,較佳為,在前述全切割步驟中,使用與半切割步驟中所使用的切割刀片寬度不同寬度的切割刀片。 Further, preferably, in the above-described full cutting step, a cutting blade having a width different from the width of the cutting blade used in the half cutting step is used.

藉此,當在半切割步驟或全切割步驟中產生位置偏移時,也可以完全將光學半導體裝置單粒化。 Thereby, when the positional shift occurs in the half-cutting step or the full-cutting step, the optical semiconductor device can be completely granulated.

又,較佳為,在前述半切割步驟中,製作通電檢查用電子電路,該通電檢查用電子電路具有連接通電檢查步驟中使用的電源探針的連接面。 Moreover, in the half-cutting step, it is preferable to form an electronic circuit for checking the power supply, and the electronic circuit for checking the power supply has a connection surface to which the power source probe used in the power-on inspection step is connected.

這樣一來,在光學半導體元件集合基板的電子電路上設計電源探針的連接面,藉此,作業性進一步提升。 In this way, the connection surface of the power source probe is designed on the electronic circuit of the optical semiconductor element assembly substrate, whereby the workability is further improved.

進而,在本發明中,提供一種光學半導體裝置,其特徵在於,由前述光學半導體裝置的製造方法製造而成。 Furthermore, in the invention, an optical semiconductor device manufactured by the method for manufacturing an optical semiconductor device described above is provided.

如果是這種光學半導體裝置,由於利用半切割形成溝槽部,因此在構裝於外部基板上時,利用在此溝槽部上配 置與外部基板的黏著材料,可以獲得良好的黏著強度。 In the case of such an optical semiconductor device, since the groove portion is formed by the half cut, when it is mounted on the external substrate, the groove portion is used. A good adhesion strength can be obtained by placing an adhesive material with an external substrate.

如以上說明,根據本發明的光學半導體裝置用封裝體,利用使用一種將矽酮樹脂組成物含浸於纖維強化材料中並硬化而成的基台,可以實現一種機械穩定性較高,且高耐久性、低干擾性的光學半導體裝置。進而,利用反射體結構,可以維持初始光束及初始反射率。又,利用設置穿孔,可以賦予高散熱性,也可以高密度地構裝高輸出光學半導體裝置。 As described above, the package for an optical semiconductor device according to the present invention can achieve a high mechanical stability and high durability by using a base which is obtained by impregnating a fluorenone resin composition with a fiber reinforced material and hardening it. Optical, low-interference optical semiconductor device. Further, the initial beam and the initial reflectance can be maintained by the reflector structure. Further, by providing the perforations, high heat dissipation properties can be imparted, and a high-output optical semiconductor device can be assembled at a high density.

又,根據本發明的光學半導體裝置的製造方法,可以在製造階段實施通電檢查,並可以使用通電檢查時所獲得的光學特性資訊,來實現製造階段中的分選及品質加工。因此,可以提升生產效率。又,由於是在光學半導體元件集合基板上進行通電檢查,因此可以省略每個光學半導體裝置的排列等步驟,並可以利用簡化製造方法而達成成本降低。 Moreover, according to the method of manufacturing an optical semiconductor device of the present invention, the energization inspection can be performed at the manufacturing stage, and the optical characteristic information obtained at the time of energization inspection can be used to realize sorting and quality processing in the manufacturing stage. Therefore, productivity can be improved. Moreover, since the energization inspection is performed on the optical semiconductor element collective substrate, the steps of arranging each optical semiconductor device and the like can be omitted, and the cost can be reduced by the simplified manufacturing method.

又,在利用上述製造方法製造而成的光學半導體裝置中,利用半切割形成溝槽部。因此,在將本發明的半導體裝置構裝於外部基板上時,利用在此溝槽部上配置與外部基板的黏著材料,可以獲得良好的黏著強度。 Moreover, in the optical semiconductor device manufactured by the above-described manufacturing method, the groove portion is formed by half cutting. Therefore, when the semiconductor device of the present invention is mounted on an external substrate, a good adhesion strength can be obtained by arranging an adhesive material on the groove portion with the external substrate.

進而,根據在上述通電檢查中經半切割的光學半導體元件集合基板的光學半導體裝置的排列間距,配置複數個光學特性檢測裝置的測定用光學透鏡,藉此利用一次測定就可以獲得大量的光學特性資訊,且光學半導體裝置的分選所需的工作量大幅降低。 Further, according to the arrangement pitch of the optical semiconductor devices of the half-cut optical semiconductor element assembly substrate in the above-described energization inspection, a plurality of optical lenses for measurement are disposed, whereby a large number of optical characteristics can be obtained by one measurement. Information, and the amount of work required for sorting optical semiconductor devices is greatly reduced.

1‧‧‧基台 1‧‧‧Abutment

2‧‧‧纖維強化材料 2‧‧‧Fiber Strengthening Materials

2’、2”‧‧‧纖維 2', 2" ‧ ‧ fiber

3‧‧‧電性連接部 3‧‧‧Electrical connection

4、4a、4b‧‧‧底面金屬被覆層 4, 4a, 4b‧‧‧ bottom metal coating

5‧‧‧矽酮樹脂組成物 5‧‧‧矽 ketone resin composition

6‧‧‧反射體結構 6‧‧‧Reflect structure

7‧‧‧穿孔 7‧‧‧Perforation

10‧‧‧光學半導體裝置用封裝體 10‧‧‧Package for optical semiconductor devices

11‧‧‧上下金屬模具 11‧‧‧Up and down metal mold

12a、12b‧‧‧光學半導體元件 12a, 12b‧‧‧ Optical semiconductor components

13‧‧‧內層材料 13‧‧‧ Inner material

14‧‧‧引線 14‧‧‧ lead

15‧‧‧光學半導體裝置 15‧‧‧Optical semiconductor device

201‧‧‧金屬框架(金屬導線框架) 201‧‧‧Metal frame (metal wire frame)

202‧‧‧印刷基板 202‧‧‧Printed substrate

203‧‧‧光學半導體裝置 203‧‧‧Optical semiconductor device

204‧‧‧基板 204‧‧‧Substrate

205、205’‧‧‧通電部(電極、外部端子) 205, 205'‧‧‧Electric power supply (electrode, external terminal)

206‧‧‧光學半導體元件 206‧‧‧Optical semiconductor components

207‧‧‧焊線 207‧‧‧welding line

208‧‧‧成型物(反射體) 208‧‧‧Molded goods (reflectors)

209‧‧‧密封樹脂(矽酮樹脂) 209‧‧‧Sealing Resin (Anthrone Resin)

210‧‧‧溝槽部(溝槽) 210‧‧‧ Groove (groove)

211‧‧‧穿孔 211‧‧‧Perforation

212‧‧‧光學半導體元件集合基板 212‧‧‧Optical semiconductor component assembly substrate

203‧‧‧通電部 203‧‧‧Electricity Department

213’‧‧‧通電檢查用電子電路 213'‧‧‧Electronic circuit for power check

214‧‧‧半切割線 214‧‧‧ half cut line

215‧‧‧連接面 215‧‧‧ Connection surface

216‧‧‧玻璃纖維材料 216‧‧‧glass fiber material

217‧‧‧黏著材料 217‧‧‧Adhesive materials

218‧‧‧光學透鏡群 218‧‧‧Optical lens group

219‧‧‧外部基板 219‧‧‧External substrate

220‧‧‧分光器(光學特性檢測裝置) 220‧‧‧ Spectroscope (optical characteristic detection device)

221‧‧‧半切割處 221‧‧‧Half cut

222‧‧‧光學透鏡 222‧‧‧ optical lens

223‧‧‧腔體結構 223‧‧‧ cavity structure

224‧‧‧光纖 224‧‧‧ fiber optic

圖1A是本發明的光學半導體裝置用封裝體的俯視圖。 Fig. 1A is a plan view of a package for an optical semiconductor device of the present invention.

圖1B是本發明的光學半導體裝置用封裝體的概略剖面圖。 Fig. 1B is a schematic cross-sectional view showing a package for an optical semiconductor device of the present invention.

圖1C是表示基台中的纖維強化材料的纖維層的纖維方向的概略俯視圖。 Fig. 1C is a schematic plan view showing a fiber direction of a fiber layer of a fiber-reinforced material in a base.

圖2A是反射體結構成型步驟前的光學半導體裝置用封裝體的俯視圖。 2A is a plan view of a package for an optical semiconductor device before a reflector structure molding step.

圖2B是反射體結構成型步驟後的本發明的光學半導體裝置用封裝體的俯視圖。 2B is a plan view of the package for an optical semiconductor device of the present invention after the reflector structure molding step.

圖2C是說明反射體結構成型步驟的概略剖面圖。 Fig. 2C is a schematic cross-sectional view showing a step of molding a reflector structure.

圖3是將反射體結構成型步驟後的本發明的光學半導體裝置用封裝體單粒化的步驟的概略圖。 FIG. 3 is a schematic view showing a step of singulating the package for an optical semiconductor device of the present invention after the reflector structure molding step.

圖4A是本發明的光學半導體裝置的概略剖面圖。 4A is a schematic cross-sectional view of an optical semiconductor device of the present invention.

圖4B是本發明的光學半導體裝置的其他態樣的概略剖面圖。 Fig. 4B is a schematic cross-sectional view showing another aspect of the optical semiconductor device of the present invention.

圖5是本發明的光學半導體裝置的概略剖面圖。 Fig. 5 is a schematic cross-sectional view showing an optical semiconductor device of the present invention.

圖6是光學半導體元件集合基板的概略平面圖。 Fig. 6 is a schematic plan view of an optical semiconductor element collective substrate.

圖7是光學半導體元件集合基板的半切割步驟的概略立體圖。 Fig. 7 is a schematic perspective view showing a half-cut step of the optical semiconductor element collective substrate.

圖8是光學半導體元件集合基板的概略平面圖、及表示光學半導體元件集合基板上的半切割位置與電子電路製作方法的一例的概略平面圖。 8 is a schematic plan view showing an optical semiconductor element assembly substrate, and a schematic plan view showing an example of a half-cut position on the optical semiconductor element assembly substrate and an electronic circuit manufacturing method.

圖9是本發明的光學半導體裝置與外部基板的連接方 法的概略剖面圖。 Figure 9 is a diagram showing the connection between the optical semiconductor device of the present invention and an external substrate A schematic cross-sectional view of the law.

圖10是關於光學半導體元件集合基板的通電檢查方法的概略平面圖。 Fig. 10 is a schematic plan view showing a method of checking energization of an optical semiconductor element collective substrate.

圖11是本發明的光學半導體裝置的製造方法的流程圖。 Fig. 11 is a flow chart showing a method of manufacturing the optical semiconductor device of the present invention.

圖12是本發明的另一光學半導體裝置的製造方法的流程圖。 Fig. 12 is a flow chart showing a method of manufacturing another optical semiconductor device of the present invention.

圖13是利用光學透鏡群來實行的光學半導體元件集合基板的光學特性資訊檢測方法的概略剖面圖。 FIG. 13 is a schematic cross-sectional view showing a method of detecting optical characteristic information of an optical semiconductor element collective substrate which is performed by an optical lens group.

以下,詳細地說明本發明的光學半導體裝置用封裝體,但本發明並不限定於這些。如上所述,需要一種光學半導體裝置用封裝體,它提供一種機械穩定性較高且高耐久性、低干擾性的光學半導體裝置。 Hereinafter, the package for an optical semiconductor device of the present invention will be described in detail, but the present invention is not limited thereto. As described above, there is a need for a package for an optical semiconductor device which provides an optical semiconductor device having high mechanical stability and high durability and low interference.

本發明人為了達成上述課題而反復努力研究,結果發現:可以利用將矽酮樹脂組成物含浸於纖維強化材料中並硬化而成的基台,來同時達成機械穩定性、高耐久性及低干擾性,進而,利用具有反射體結構,可以維持光學半導體元件的初始光束及初始反射率,因而完成本發明。 In order to achieve the above-mentioned problems, the inventors of the present invention have conducted intensive studies and found that it is possible to simultaneously achieve mechanical stability, high durability, and low interference by using a base in which an anthrone resin composition is impregnated with a fiber-reinforced material and hardened. Further, the present invention can be completed by using a reflector structure to maintain the initial light beam and initial reflectance of the optical semiconductor element.

亦即,本發明是一種光學半導體裝置用封裝體,在將矽酮樹脂組成物含浸於纖維強化材料中並硬化而成的基台的頂面上,具有要與光學半導體元件電性連接的至少兩個電性連接部、及圍繞前述要連接的光學半導體元件的反射體結構。 That is, the present invention is a package for an optical semiconductor device having at least a top surface to be electrically connected to an optical semiconductor element in a top surface of a base in which an fluorenone resin composition is impregnated and hardened in a fiber-reinforced material. Two electrical connecting portions and a reflector structure surrounding the optical semiconductor element to be connected.

[基台] [base]

在圖1A中,表示本發明的光學半導體裝置用封裝體10的俯視圖。在圖1B中,表示沿圖1A中的AA線的剖面圖。基台1是將矽酮樹脂組成物5含浸於3層纖維強化材料2中並硬化而成。這樣一來,採用以介電常數低於先前的環氧基板(FR-4等)的矽酮樹脂作為主體而成的基台,而具有低干擾性。又,光學半導體裝置用封裝體的耐熱性高,在長期環境試驗(高溫高濕試驗等)中基台也不會變黃,並長時間持續保持高反射率。而且,這種基台的可撓性優異,易於操作。 Fig. 1A is a plan view showing a package 10 for an optical semiconductor device of the present invention. In Fig. 1B, a cross-sectional view taken along line AA of Fig. 1A is shown. The base 1 is obtained by impregnating the fluorenone resin composition 5 into the three-layer fiber-reinforced material 2 and hardening it. In this way, a base having a dielectric constant lower than that of the conventional epoxy substrate (FR-4 or the like) as a main component is used, and the interference is low. Further, the package for an optical semiconductor device has high heat resistance, and the base does not become yellow in a long-term environmental test (such as a high-temperature and high-humidity test), and the high reflectance is maintained for a long period of time. Moreover, such a base is excellent in flexibility and easy to handle.

當為高輸出二極體(光輸出較高,因此也產生大量的廢熱)時、或當在溫度上升的環境(例如:汽車的引擎附近的頭燈)中使用光學半導體裝置用封裝體時,關於耐熱性要求較嚴格的要件。如果是本發明的光學半導體裝置用封裝體,也能滿足這些要求。 When a high-output diode is used (the light output is high, so a large amount of waste heat is also generated), or when the package for an optical semiconductor device is used in an environment where the temperature rises (for example, a headlight near an engine of a car), The requirements for stricter heat resistance requirements. It is also possible to satisfy these requirements if it is a package for an optical semiconductor device of the present invention.

尤其,較佳為,基台在25℃、1 GHz下的相對介電常數為5.0以下。如果是這種相對介電常數,低干擾性更為優異。 In particular, it is preferred that the base has a relative dielectric constant of 5.0 or less at 25 ° C and 1 GHz. If it is such a relative dielectric constant, the low interference is more excellent.

又,可以使基台的頂面形狀為長方形或正方形,且較佳為平坦的結構。較佳為,基台的厚度儘量較薄,且較佳為,具有充分的機械穩定性,例如不會因自重而導致彎曲。基台1的厚度為1 mm以下,較佳為0.6 mm以下,尤其較佳為0.4 mm以下。 Further, the shape of the top surface of the base can be rectangular or square, and is preferably a flat structure. Preferably, the thickness of the abutment is as thin as possible, and preferably, it has sufficient mechanical stability, for example, it does not cause bending due to its own weight. The thickness of the base 1 is 1 mm or less, preferably 0.6 mm or less, and particularly preferably 0.4 mm or less.

進而,如圖2B所示,光學半導體裝置用封裝體10的基台1,可以具有複數個光學半導體元件承載部(要與光學半導體元件電性連接的至少兩個電性連接部3),並可以採 用大面積印刷基板的形式。又,也可以在安裝光學半導體元件之前或安裝之後,將光學半導體裝置用封裝體劃分為更小的個別的組件。 Further, as shown in FIG. 2B, the base 1 of the package 10 for an optical semiconductor device may have a plurality of optical semiconductor element carrying portions (at least two electrical connecting portions 3 to be electrically connected to the optical semiconductor elements), and Can be taken In the form of a large area printed substrate. Further, the package for an optical semiconductor device may be divided into smaller individual components before or after mounting the optical semiconductor element.

[矽酮樹脂組成物] [矽 树脂 树脂 resin composition]

矽酮樹脂,由於耐熱性高且高耐久性,介電常數也較低,而使干擾性較低,因此非常適合作為基台的構成材料。作為矽酮樹脂組成物,雖無特別限制,但期望為硬化性矽酮樹脂組成物,且為加成硬化型或縮合硬化型矽酮樹脂組成物。如果是這種矽酮樹脂組成物,可以容易地獲得一種在先前的成型裝置中也可以容易地成型、機械特性優異,且表面的褶縫較少的基台。進而,可以容易地獲得一種光學半導體裝置用封裝體,該光學半導體裝置用封裝體的機械特性、耐熱性、耐變色性優異,且表面的褶縫較少。 The anthrone resin is highly suitable as a constituent material of the base because it has high heat resistance and high durability, and has a low dielectric constant and low interference. The fluorenone resin composition is not particularly limited, but is preferably a curable fluorenone resin composition and is an addition-curable or condensed-curable fluorenone resin composition. In the case of such an oxime resin composition, it is possible to easily obtain a base which can be easily molded in the prior molding apparatus, has excellent mechanical properties, and has less pleats on the surface. Further, it is possible to easily obtain a package for an optical semiconductor device which is excellent in mechanical properties, heat resistance, and discoloration resistance, and has less pleats on the surface.

尤其,當使用如日本特開2010-89493號公報中所記載的在室溫下為固體形狀的矽酮樹脂組成物時,在使該矽酮樹脂組成物溶解、分散於溶劑中的狀態下含浸於纖維強化材料中,並由該纖維強化材料中使前述溶劑蒸發並去除後,該組成物為A階段狀態,且為固體。因此,具有以下優點:將矽酮樹脂組成物含浸於纖維強化材料中的半固化片的保管更加容易,並可以更容易地利用熱壓力機進行成型,進而,可以更自由地使光學半導體裝置用封裝體的形狀成型。又,使用此光學半導體裝置用封裝體製作而成的本發明的光學半導體裝置的經時波長(色調)的變化、初始光束或反射率的變化較小,壽命較長。 In particular, when the fluorenone resin composition which is solid at room temperature as described in JP-A-2010-89493 is used, the fluorenone resin composition is dissolved in a solvent and dispersed in a solvent. In the fiber-reinforced material, after the solvent is evaporated and removed from the fiber-reinforced material, the composition is in the A-stage state and is a solid. Therefore, the prepreg in which the fluorenone resin composition is impregnated into the fiber-reinforced material is more easily stored, and can be molded more easily by a heat press, and further, the package for an optical semiconductor device can be more freely used. The shape is shaped. Moreover, the optical semiconductor device of the present invention produced by using the package for an optical semiconductor device has a small change in the temporal wavelength (hue) and a change in the initial beam or reflectance, and has a long life.

又,可以向本發明的矽酮樹脂組成物中添加無機質填 充材料。具體來說,可以使用氧化鋁、二氧化矽、鈦酸鋇、鈦酸鉀、鈦酸鍶、碳酸鈣、碳酸鋁、氫氧化鎂、氫氧化鋁、氮化矽、氮化鋁、氮化硼、及碳化矽等。這些無機質填充材料可以單獨使用或並用兩種以上使用。 Further, an inorganic filler can be added to the fluorenone resin composition of the present invention. Fill the material. Specifically, alumina, ceria, barium titanate, potassium titanate, barium titanate, calcium carbonate, aluminum carbonate, magnesium hydroxide, aluminum hydroxide, tantalum nitride, aluminum nitride, boron nitride can be used. And carbonized bismuth, etc. These inorganic fillers may be used singly or in combination of two or more.

此無機質填充材料的形狀及粒徑並無特別限制。填充材料的粒徑一般可以為0.01~50微米,較佳為0.1~20微米。 The shape and particle diameter of the inorganic filler are not particularly limited. The filler material may have a particle diameter of generally from 0.01 to 50 μm, preferably from 0.1 to 20 μm.

在本發明的矽酮樹脂組成物中,無機填充材料的調配量並無特別限制,通常相對於樹脂成分總計100質量份,可以添加1~1000質量份,較佳添加5~800質量份。 In the fluorenone resin composition of the present invention, the amount of the inorganic filler to be added is not particularly limited, and may be usually 1 to 1000 parts by mass, preferably 5 to 800 parts by mass, based on 100 parts by mass of the total of the resin component.

除了無機質填充材料以外,可以向矽酮樹脂組成物中添加一種以上的添加物質。作為這種添加物質,可以採用例如擴散介質、染料、過濾介質、反射介質及轉換介質的形式,並可以列舉例如發光染料、中空粒子或黏著促進劑等。利用這種添加物質,尤其可以使其具有基台的光學特徵,即使基台具有例如反射性、穿透性或吸收性。這樣一來,通過使用一種或多種添加物質,使基台的設計上的選擇增加。 In addition to the inorganic filler, one or more additional substances may be added to the fluorenone resin composition. As such an additive, for example, a form of a diffusion medium, a dye, a filter medium, a reflection medium, and a conversion medium can be used, and examples thereof include a luminescent dye, a hollow particle, an adhesion promoter, and the like. With such an additive substance, it is possible in particular to have the optical characteristics of the abutment even if the abutment has, for example, reflectivity, penetration or absorption. In this way, the design choice of the abutment is increased by using one or more additional substances.

[纖維強化材料] [Fiber reinforced material]

作為纖維強化材料,可以根據產品特性,使用以下中的任一種:碳纖維、玻璃纖維、石英玻璃纖維、及金屬纖維等無機纖維;芳香族聚醯胺纖維、聚醯亞胺纖維、及聚醯胺醯亞胺纖維等有機纖維;以及,碳化矽纖維、碳化鈦纖維、硼纖維、及氧化鋁纖維等。較佳的纖維為玻璃纖維、石英纖維、及碳纖維等。其中,尤其較佳為絕緣性較高的玻璃纖維或石英玻璃纖維。從其他觀點來看,作為纖維強 化材料,尤其較佳為表現出對矽酮樹脂組成物的良好的黏著性及較高的機械負載能力的材料。又,較佳為,纖維強化材料具有至少與矽酮樹脂組成物同等程度的耐熱性、及較低的熱膨脹係數。 As the fiber-reinforced material, any of the following may be used depending on the product characteristics: inorganic fibers such as carbon fiber, glass fiber, quartz glass fiber, and metal fiber; aromatic polyamide fibers, polyimine fibers, and polyamines. Organic fibers such as yttrium imide fibers; and cerium carbide fibers, titanium carbide fibers, boron fibers, and alumina fibers. Preferred fibers are glass fibers, quartz fibers, carbon fibers, and the like. Among them, glass fibers or quartz glass fibers having high insulation properties are particularly preferred. From other points of view, as a fiber The material is particularly preferably a material which exhibits good adhesion to the fluorenone resin composition and high mechanical loadability. Further, it is preferable that the fiber-reinforced material has at least the same heat resistance as the fluorenone resin composition and a low coefficient of thermal expansion.

尤其,如果纖維強化材料為玻璃纖維,基台將表現出良好的耐紫外線性及耐熱性。進而,通過使用玻璃纖維,纖維強化材料與矽酮樹脂組成物的良好的黏著得以確保。又,玻璃纖維為廉價且易於操作的材料。 In particular, if the fiber-reinforced material is glass fiber, the abutment will exhibit good ultraviolet resistance and heat resistance. Further, by using glass fibers, good adhesion of the fiber-reinforced material to the fluorenone resin composition is ensured. Also, glass fibers are inexpensive and easy to handle materials.

此處,在圖1C中,示意性地表示基台中的纖維強化材料2的纖維層的纖維2’、2”的方向。如圖1C所示,較佳為,纖維強化材料2具備3層以上的纖維層,更佳為,具備4層纖維層。又,較佳為,纖維強化材料2的各層的纖維2’、2”是沿著與基台1的主面平行的方向而延伸。一般來說,在纖維強化材料的一層纖維層中,複數條纖維是朝向實質上平行的方向,並且纖維方向一致。當電氣絕緣性的基台具備包含多層的纖維強化材料時,較佳為,各個纖維層的纖維方向相對於彼此而旋轉90°。如果基台的纖維強化材料為這種多層結構,基台的機械穩定性將更高。此處,“旋轉”,是指將與基台1的頂面及/或底面垂直的軸線作為中心,各層中的纖維的方向相互90°旋轉(圖1C)。 Here, in Fig. 1C, the direction of the fibers 2', 2" of the fiber layer of the fiber-reinforced material 2 in the base is schematically shown. As shown in Fig. 1C, the fiber-reinforced material 2 preferably has three or more layers. More preferably, the fiber layer has four layers of fibers. Further, it is preferable that the fibers 2' and 2" of the respective layers of the fiber-reinforced material 2 extend in a direction parallel to the main surface of the base 1. Generally, in a fibrous layer of a fiber-reinforced material, a plurality of fibers are oriented in a substantially parallel direction and the fibers are aligned in the same direction. When the electrically insulating base is provided with a fiber-reinforced material comprising a plurality of layers, it is preferred that the fiber directions of the respective fiber layers are rotated by 90° with respect to each other. If the fiber reinforced material of the abutment is such a multilayer structure, the mechanical stability of the abutment will be higher. Here, "rotation" means that the direction of the fibers in each layer is rotated by 90° with respect to the axis perpendicular to the top surface and/or the bottom surface of the base 1 (FIG. 1C).

作為纖維強化材料的形態,並無特別限制,較佳為,將長纖維長絲朝一定方向一致拉伸而成的粗紗、織物及不織布等片狀物,進而較佳為,短切原絲薄氈等可以形成積層體的材料。 The form of the fiber-reinforced material is not particularly limited, and is preferably a sheet such as roving, woven fabric, or non-woven fabric obtained by uniformly stretching long filaments in a predetermined direction, and further preferably, chopped strand mat A material that can form a laminate.

又,纖維強化材料可以由矽酮樹脂完全包圍。這樣一 來,如果基台的外表面為矽酮樹脂,可以將使電性連接部或底面金屬被覆層附著於基台上的步驟簡單化。又,由於纖維強化材料受矽酮樹脂保護,而使金屬或金屬離子不會到達纖維,因此可以防止例如金屬離子沿纖維移動。 Also, the fiber reinforced material may be completely surrounded by the fluorenone resin. Such a If the outer surface of the base is an fluorenone resin, the step of attaching the electrical connection portion or the underlying metal coating layer to the base can be simplified. Further, since the fiber-reinforced material is protected by the fluorenone resin, the metal or metal ions do not reach the fibers, so that, for example, metal ions can be prevented from moving along the fibers.

[電性連接部、底面金屬被覆層] [Electrical connection part, bottom metal coating layer]

本發明的光學半導體裝置用封裝體10,在基台1的頂面,具有要與光學半導體元件電性連接的至少兩個電性連接部3(圖1B)。各個電性連接部可以設計為通過金屬引線等連接於光學半導體元件,或設計為通過倒裝晶片(flip chip)構裝方式連接於光學半導體元件。 The package 10 for an optical semiconductor device according to the present invention has at least two electrical connecting portions 3 (Fig. 1B) to be electrically connected to the optical semiconductor element on the top surface of the base 1. Each of the electrical connection portions may be designed to be connected to the optical semiconductor element by a metal lead or the like, or to be connected to the optical semiconductor element by a flip chip configuration.

較佳為,基台進而在底面具有底面金屬被覆層4(圖1B)。較佳為,底面金屬被覆層構成為可以利用例如焊接、或黏著結合而與承載本發明的光學半導體裝置用封裝體的外部連接部電性連接。 Preferably, the base further has a bottom metal coating layer 4 on the bottom surface (Fig. 1B). Preferably, the bottom metal coating layer is configured to be electrically connected to an external connection portion that carries the package for an optical semiconductor device of the present invention by, for example, soldering or adhesive bonding.

電性連接部和底面金屬被覆層等,可以使用金屬或金屬合金來形成。作為這種金屬或金屬合金,並無特別限制,可以例示銅、鎳、金、鈀、銀或它們的合金。又,電性連接部或底面金屬被覆層也可以由透明的導電材料(例如無機質填充材料(還已知透明導電性氧化物(簡稱為TCO)))形成。 The electrical connection portion, the underlying metal coating layer, and the like can be formed using a metal or a metal alloy. The metal or metal alloy is not particularly limited, and examples thereof include copper, nickel, gold, palladium, silver, or an alloy thereof. Further, the electrical connection portion or the bottom metal coating layer may be formed of a transparent conductive material (for example, an inorganic filler (also known as a transparent conductive oxide (TCO)).

又,電性連接部及底面金屬被覆層,是由至少一層金屬層所構成,並且也可以由多種不同的金屬或金屬合金的多層而構成。例如,較佳為,電性連接部中位於距基台最近的位置的第1金屬層為銅層。第一金屬層的厚度較佳為30以上且不足150 μm、30以上且不足80 μm,尤其較佳 為30以上且不足50 μm。進而,可以在第一金屬層上,形成鎳、鈀、金、銀中的至少一層第二金屬層。這些層的厚度較佳為不足25 μm,尤其較佳為不足5 μm,最佳為不足2 μm。尤其當在銅層上形成鎳-金層時,較佳為不足500 nm。這種第二金屬層可以利用費用效果較高、且簡單的步驟來形成,進而可以有效地結構化。 Further, the electrical connection portion and the bottom metal coating layer are composed of at least one metal layer, and may be composed of a plurality of layers of different metals or metal alloys. For example, it is preferable that the first metal layer located at the position closest to the base in the electrical connection portion is a copper layer. The thickness of the first metal layer is preferably 30 or more and less than 150 μm, 30 or more and less than 80 μm, and particularly preferably It is 30 or more and less than 50 μm. Further, at least one of the second metal layers of nickel, palladium, gold, and silver may be formed on the first metal layer. The thickness of these layers is preferably less than 25 μm, particularly preferably less than 5 μm, and most preferably less than 2 μm. Particularly when a nickel-gold layer is formed on the copper layer, it is preferably less than 500 nm. Such a second metal layer can be formed by a cost-effective and simple process, and can be effectively structured.

這種電性連接部及底面金屬被覆層並無特別限制,可以利用印刷法、浸漬法、蒸鍍、濺鍍(spattering)或電鍍法形成。較佳為,基台的表面經粗面化,以確保這些電性連接部及底面金屬被覆層與基台的良好的黏著。 The electrical connection portion and the underlying metal coating layer are not particularly limited, and may be formed by a printing method, a dipping method, a vapor deposition method, a sputtering method, or a plating method. Preferably, the surface of the abutment is roughened to ensure good adhesion of the electrical connection portion and the underlying metal coating layer to the base.

又,較佳為,電性連接部與底面金屬被覆層構成為可以分別利用焊接,而與光學半導體元件或外部連接部連接。此時,較佳為,本發明的光學半導體裝置用封裝體可以承受焊接步驟時所產生的熱應力。如果是這種光學半導體裝置用封裝體,可以成品率良好地達成例如與光學半導體元件或外部連接部的連接。此時,較佳為,底面金屬被覆層形成連接於外部連接部、並且相互電性絕緣的區域。又,較佳為,電性連接部或底面金屬被覆層覆蓋基台表面的大部分(例如50%以上)。由於金屬通常表現出較高的導熱性,因此將電性連接部或底面金屬被覆層形成於較大的區域中,藉此可以形成一種對外部表現出較高的導熱性的基台。 Moreover, it is preferable that the electrical connection portion and the bottom metal coating layer are configured to be connected to the optical semiconductor element or the external connection portion by soldering. At this time, it is preferable that the package for an optical semiconductor device of the present invention can withstand the thermal stress generated at the time of the soldering step. In the case of such a package for an optical semiconductor device, for example, connection to an optical semiconductor element or an external connection portion can be achieved with good yield. At this time, it is preferable that the bottom metal coating layer is formed in a region that is connected to the external connection portion and electrically insulated from each other. Further, it is preferable that the electrical connection portion or the bottom metal coating layer covers most of the surface of the base (for example, 50% or more). Since the metal generally exhibits high thermal conductivity, the electrical connection portion or the underlying metal coating layer is formed in a large area, whereby a base which exhibits high thermal conductivity to the outside can be formed.

又,較佳為,基台1進而具有至少一個以上的穿孔(via)7,基台1頂面的電性連接部3與底面金屬被覆層4可以通過該穿孔7而電性連接(圖1B)。在圖1B中,底面金 屬被覆層4被分為底面金屬被覆層4a與底面金屬被覆層4b,底面金屬被覆層4b大於底面金屬被覆層4a,穿孔數量也較多。藉此,可以使光學半導體元件所產生的熱量高效地擴散。穿孔可以為例如隧道狀孔。此穿孔可以利用例如鑽孔、雷射鑽孔或衝孔來形成。可以通過金屬被覆穿孔的內表面、或以導電材料填滿,來形成電性連接部與底面金屬被覆層的電性連接。利用穿孔,可以增加光學半導體裝置用封裝體的設計上的選擇,並達成基台的頂面及底面之間的節省空間的電性連接。 Moreover, it is preferable that the base 1 further has at least one or more vias 7, and the electrical connection portion 3 on the top surface of the base 1 and the bottom metal coating layer 4 can be electrically connected through the through holes 7 (FIG. 1B). ). In Figure 1B, the bottom gold The coating layer 4 is divided into a bottom metal coating layer 4a and a bottom metal coating layer 4b, and the bottom metal coating layer 4b is larger than the bottom metal coating layer 4a, and the number of perforations is also large. Thereby, the heat generated by the optical semiconductor element can be efficiently diffused. The perforations can be, for example, tunnel shaped holes. This perforation can be formed using, for example, drilling, laser drilling or punching. The electrical connection between the electrical connection portion and the underlying metal coating layer can be formed by metal-coated perforated inner surface or filled with a conductive material. With the perforation, the design choice of the package for an optical semiconductor device can be increased, and a space-saving electrical connection between the top surface and the bottom surface of the base can be achieved.

[反射體結構] [reflector structure]

本發明的光學半導體裝置用封裝體具有反射體結構6,該反射體結構6圍繞著要連接於基台1的頂面上的光學半導體元件(圖1B)。又,還可以根據目的,在基台的底面上設置樹脂成型結構。另外,在本發明中,反射體結構並無特別限制,只要是圍繞光學半導體元件,且反射來自光學半導體元件的光的結構即可,可以為收納光學半導體元件的凹坑或凹結構。通過在基台的表面上形成利用樹脂的反射體結構,可以製造一種耐久性得以進而提升的高功能的光學半導體裝置用封裝體。 The package for an optical semiconductor device of the present invention has a reflector structure 6 surrounding an optical semiconductor element to be connected to the top surface of the base 1 (Fig. 1B). Further, a resin molded structure may be provided on the bottom surface of the base according to the purpose. Further, in the present invention, the reflector structure is not particularly limited as long as it is a structure that surrounds the optical semiconductor element and reflects light from the optical semiconductor element, and may be a pit or a concave structure that accommodates the optical semiconductor element. By forming a reflector structure using a resin on the surface of the base, it is possible to manufacture a highly functional package for an optical semiconductor device in which durability is further improved.

又,反射體結構可以由矽酮樹脂、環氧樹脂及矽酮樹脂與環氧樹脂的雜化樹脂(hybrid resin)中的任一種成型而成。 Further, the reflector structure may be formed of any one of an oxime resin, an epoxy resin, and a hybrid resin of an oxime resin and an epoxy resin.

作為這種樹脂,並無特別限制,但從耐熱性或耐久性的觀點來看,較佳是使用:熱硬化性矽酮樹脂組成物;包含三嗪衍生物環氧樹脂、酸酐、硬化促進劑及無機質填充 劑的熱硬化性環氧樹脂組成物;或包含熱硬化性矽酮樹脂及環氧樹脂的雜化樹脂(混成樹脂)組成物等。另外,期望配合最終的光學半導體裝置的使用用途,來進行成型樹脂的選定。 The resin is not particularly limited, but from the viewpoint of heat resistance and durability, it is preferred to use a thermosetting ketone resin composition; a triazine derivative epoxy resin, an acid anhydride, and a hardening accelerator. And inorganic filling A thermosetting epoxy resin composition of the agent; or a hybrid resin (mixed resin) composition containing a thermosetting fluorenone resin and an epoxy resin. Further, it is desirable to select a molding resin in accordance with the use of the final optical semiconductor device.

作為上述熱硬化性矽酮樹脂的一例,代表性的有下述平均化學式(1)所表示的縮合硬化型熱硬化性矽酮樹脂組成物等。此外,還可以使用加成硬化型矽酮樹脂組成物。 As an example of the above-mentioned thermosetting fluorenone resin, a condensed-hardening thermosetting fluorenone resin composition represented by the following average chemical formula (1) and the like are exemplified. Further, an addition-curable fluorenone resin composition can also be used.

R1 aSi(OR2)b(OH)cO(4-a-b-c)/2 (1) R 1 a Si(OR 2 ) b (OH) c O (4-abc)/2 (1)

(式中,R1表示相同或不同種類的碳數1~20的有機基,R2表示相同或不同種類的碳數1~4的有機基,滿足0.8≦a≦1.5、0≦b≦0.3、0.001≦c≦0.5、0.801≦a+b+c<2的數。) (wherein R 1 represents the same or different kinds of organic groups having 1 to 20 carbon atoms, and R 2 represents the same or different kinds of organic groups having 1 to 4 carbon atoms, satisfying 0.8≦a≦1.5, 0≦b≦0.3 , 0.001≦c≦0.5, 0.801≦a+b+c<2.)

作為環氧樹脂組成物,從耐熱性、耐光性等來看,期望為三嗪衍生物環氧樹脂、1,3,5-三嗪核衍生物環氧樹脂也就是熱硬化性環氧樹脂組成物。並不限於使用三嗪衍生物作為環氧樹脂,及使用酸酐作為硬化劑,也可以適當使用先前公知的環氧樹脂或胺、苯酚硬化劑等。 As an epoxy resin composition, it is desirable to form a triazine derivative epoxy resin, a 1,3,5-triazine core derivative epoxy resin, that is, a thermosetting epoxy resin from the viewpoints of heat resistance, light resistance, and the like. Things. It is not limited to the use of a triazine derivative as an epoxy resin and an acid anhydride as a curing agent, and a conventionally known epoxy resin, an amine, a phenol curing agent, or the like can be suitably used.

又,作為矽酮樹脂與環氧樹脂的雜化樹脂,可以列舉包含前述環氧樹脂及前述矽酮樹脂的共聚物等。 In addition, examples of the hybrid resin of the fluorenone resin and the epoxy resin include a copolymer containing the above epoxy resin and the above fluorenone resin.

可以向上述矽酮樹脂或環氧樹脂的組成物中,調配無機填充材料。作為所調配的無機填充材料,可以使用一般調配到矽酮樹脂組成物或環氧樹脂組成物等中的材料。可以列舉例如溶融二氧化矽、結晶性二氧化矽等二氧化矽類;氧化鋁、氮化矽、氮化鋁、氮化硼、玻璃纖維、及矽灰石(wollastonite)等纖維狀填充材料;三氧化二銻等。這些 無機填充材料的平均粒徑或形狀並無特別限定。 The inorganic filler may be formulated into the composition of the above fluorenone resin or epoxy resin. As the inorganic filler to be blended, a material which is generally formulated into an oxime resin composition or an epoxy resin composition or the like can be used. Examples thereof include cerium oxide such as molten cerium oxide and crystalline cerium oxide; fibrous filler materials such as alumina, tantalum nitride, aluminum nitride, boron nitride, glass fiber, and wollastonite; Antimony trioxide, etc. These ones The average particle diameter or shape of the inorganic filler is not particularly limited.

可以再向本發明所使用的樹脂組成物中調配二氧化鈦。二氧化鈦是作為白色著色材料,用於提高白度,提升光的反射效率而調配,此二氧化鈦的單元晶格可以為金紅石型(rutile-type)、(anatase-type)銳鈦型中的任一種。又,平均粒徑或形狀也並無限定。上述二氧化鈦可以預先利用Al或Si等水合氧化物等進行表面處理,以提高與樹脂或無機填充材料的相溶性、分散性。 Titanium dioxide can be further formulated into the resin composition used in the present invention. Titanium dioxide is used as a white coloring material for improving whiteness and improving light reflection efficiency. The unit cell of titanium dioxide may be any of rutile-type and anatase-type anatase. . Further, the average particle diameter or shape is also not limited. The titanium dioxide may be surface-treated in advance by a hydrated oxide such as Al or Si to improve compatibility and dispersibility with a resin or an inorganic filler.

較佳為,二氧化鈦的填充量為全部組成物的2~30質量%,尤其較佳為5~10質量%。如果不足2質量%,可能會無法獲得充分的白度,如果超過30質量%,可能導致未填充或空隙等成型性下降。 Preferably, the amount of titanium dioxide filled is 2 to 30% by mass, and particularly preferably 5 to 10% by mass based on the total composition. If it is less than 2% by mass, sufficient whiteness may not be obtained, and if it exceeds 30% by mass, moldability such as unfilling or voids may be lowered.

前述光學半導體裝置用封裝體是利用樹脂成型步驟(轉注成型或射出成型)形成反射體結構,進而在樹脂成型後經過切割步驟,製造經單粒化的光學半導體裝置用封裝體。 In the package for an optical semiconductor device, a reflector structure is formed by a resin molding step (transfer molding or injection molding), and after the resin molding, a dicing step is performed to produce a single-packaged package for an optical semiconductor device.

[光學半導體裝置用封裝體的製造方法] [Method of Manufacturing Package for Optical Semiconductor Device]

本發明的光學半導體裝置用封裝體的製造方法,具有以下步驟:基台製作步驟,製作將矽酮樹脂組成物含浸於纖維強化材料中並硬化而成的基台;頂面金屬被覆層形成步驟,在該基台頂面上形成頂面金屬被覆層;電性連接部形成步驟,將該頂面金屬被覆層形成於要與光學半導體元件電性連接的至少兩個電性連接部上;及, 反射體結構成型步驟,在具有該電性連接部之前述基台上,利用轉注成型(transfer molding)或射出成型,以圍繞前述所連接的光學半導體元件的方式,將反射體結構成型。 In the method for producing a package for an optical semiconductor device according to the present invention, the base step is as follows: a base for impregnating the fluorenone resin composition with the fiber reinforced material and curing the base; and a top metal coating layer forming step Forming a top metal coating layer on the top surface of the base; and forming an electrical connection portion, the top metal coating layer is formed on at least two electrical connection portions to be electrically connected to the optical semiconductor element; , In the reflector structure forming step, the reflector structure is formed by transfer molding or injection molding on the aforementioned base having the electrical connection portion so as to surround the connected optical semiconductor element.

‧基台製作步驟 ‧Base making steps

在基台製作步驟中,將矽酮樹脂組成物含浸於纖維強化材料中並使其硬化來製作基台。製造基台可以利用溶劑法及熱熔膠法(hot melt method)中的任一方法來實施。當利用溶劑法時,製備將矽酮樹脂組成物溶解於有機溶劑中的樹脂清漆,將此樹脂清漆含浸於前述纖維強化材料中,並通過加熱而脫溶劑,因而製造半固化片。半固化片等基板的厚度取決於所使用的加強用纖維等的厚度,當要增厚基板時,就積層多層加強用纖維。 In the base production step, the fluorenone resin composition is impregnated into the fiber reinforced material and hardened to prepare a base. The manufacturing abutment can be carried out by any of a solvent method and a hot melt method. When a solvent method is used, a resin varnish in which an oxime resin composition is dissolved in an organic solvent is prepared, and the resin varnish is impregnated into the fiber reinforced material, and is desolventized by heating, thereby producing a prepreg. The thickness of the substrate such as a prepreg depends on the thickness of the reinforcing fiber or the like to be used, and when the substrate is to be thickened, a plurality of reinforcing fibers are laminated.

更具體來說,可以向矽酮樹脂組成物的溶液或分散液中含浸玻璃布,較佳為在50~150℃,更佳為在60~120℃的乾燥爐中去除溶劑,因而可以獲得矽酮半固化片。 More specifically, the solution may be impregnated with a glass cloth, preferably at 50 to 150 ° C, more preferably at 60 to 120 ° C in a solution or dispersion of the fluorenone resin composition, thereby obtaining hydrazine. Ketone prepreg.

又,當利用熱熔膠法時,加熱溶解固體矽酮樹脂組成物,並使它含浸於纖維強化材料中,因而製造半固化片。 Further, when the hot melt method is used, the solid ketone resin composition is heated and dissolved, and it is impregnated into the fiber reinforced material, thereby producing a prepreg.

此處,較佳為,基台是使用至少一層以上的半固化片硬化而成,該半固化片是將矽酮樹脂組成物含浸於纖維強化材料中。此時,可以將與絕緣層的厚度對應的片數的半固化片重疊,並加壓加熱而成為基台。 Here, it is preferable that the base is cured by using at least one layer of a prepreg which impregnates the fluorenone resin composition with the fiber reinforced material. At this time, the number of prepregs corresponding to the thickness of the insulating layer may be superimposed and heated under pressure to form a base.

‧頂面金屬被覆層形成步驟 ‧Top metal coating formation step

在頂面金屬被覆層形成步驟中,在上述製作的基台頂面上形成頂面金屬被覆層。頂面金屬被覆層並無特別限制,可以利用印刷法、浸漬法、蒸鍍及濺鍍形成。又,此 時也可以同時形成底面金屬被覆層。 In the top metal coating layer forming step, a top metal coating layer is formed on the top surface of the base made above. The top metal coating layer is not particularly limited and can be formed by a printing method, a dipping method, vapor deposition, and sputtering. Again, this It is also possible to simultaneously form the underlying metal coating layer.

此外,在基台上重疊金屬箔,並在5~50 MPa的壓力、70~180℃的溫度的範圍內,使用真空壓力機等加壓加熱,藉此也可以製造在基台上具有頂面金屬被覆層、或頂面金屬被覆層及底面金屬被覆層的金屬包層積層板。作為此時的金屬箔,並無特別限定,可以使用銅、鎳、金、鈀或銀等,且從電氣性、經濟性方面來看,較佳是使用銅箔。 In addition, a metal foil is superposed on the base, and a pressure of 5 to 50 MPa and a temperature of 70 to 180 ° C are used, and a vacuum press or the like is used for heating, whereby a top surface can be manufactured on the base. A metal clad laminate having a metal coating layer or a top metal coating layer and a bottom metal coating layer. The metal foil at this time is not particularly limited, and copper, nickel, gold, palladium, silver or the like can be used, and from the viewpoint of electrical and economic efficiency, copper foil is preferably used.

‧電性連接部形成步驟 ‧Electrical connection forming step

在電性連接部形成步驟中,將此頂面金屬被覆層形成於要與光學半導體元件電性連接的至少兩個電性連接部上。例如,通過利用去除法或鑽孔加工等一般所使用的方法來加工頂面金屬被覆層,可以獲得一種具有電性連接部之基台(印刷配線板)。 In the electrical connection portion forming step, the top metal cladding layer is formed on at least two electrical connection portions to be electrically connected to the optical semiconductor element. For example, a base (printed wiring board) having an electrical connection portion can be obtained by processing a top metal coating layer by a method generally used such as a removal method or a drilling process.

‧表面處理步驟 ‧ surface treatment steps

進而,較佳為,在電性連接部形成步驟後且反射體結構成型步驟前,具有表面處理步驟,該表面處理步驟是對前述基台的表面進行電漿處理及/或紫外線臭氧處理。藉此,可以提升成型的材料(尤其是矽酮樹脂組成物)與基台的黏著強度。 Furthermore, it is preferable that after the step of forming the electrical connection portion and before the step of forming the reflector structure, there is a surface treatment step of performing plasma treatment and/or ultraviolet ozone treatment on the surface of the base. Thereby, the adhesion strength of the formed material (especially the fluorenone resin composition) to the base can be improved.

‧反射體結構成型步驟 ‧ Reflector structure molding steps

在反射體結構成型步驟中,利用轉注成型或射出成型,圍繞前述要連接的光學半導體元件地將反射體結構成型在具有電性連接部之前述基台上。圖2是說明基台表面的反射體結構成型步驟的圖。圖2A是反射體結構成型步驟前的基台,圖2B是反射體結構成型步驟後的基台。如圖2C 所示,需要一種轉注模具,該轉注模具是利用上下金屬模具11來固定電性連接部,並將反射體結構6樹脂成型,以防止電性連接部3的樹脂毛邊。 In the step of forming the reflector structure, the reflector structure is formed on the aforementioned base having the electrical connection portion around the optical semiconductor element to be connected by transfer molding or injection molding. Fig. 2 is a view for explaining a step of forming a reflector structure on the surface of the base. 2A is a base before the reflector structure forming step, and FIG. 2B is a base after the reflector structure forming step. As shown in Figure 2C As shown, there is a need for a transfer mold which uses an upper and lower metal mold 11 to fix an electrical connection portion and resin-form the reflector structure 6 to prevent resin burrs of the electrical connection portion 3.

如圖3所示,在反射體結構成型步驟後,可以利用切割進行切割步驟。藉此,製造一種經單粒化的半導體裝置用封裝體10。另外,在本發明中,半導體裝置用封裝體10可以這樣經單粒化而具有一個半導體元件承載部,也可以不經單粒化而具有複數個承載部。 As shown in FIG. 3, after the reflector structure forming step, the cutting step can be performed by cutting. Thereby, a single-sized package 10 for a semiconductor device is manufactured. Further, in the present invention, the package 10 for a semiconductor device may have one semiconductor element carrier portion by singulation in this manner, or may have a plurality of carrier portions without singulation.

[光學半導體裝置] [Optical semiconductor device]

本發明的光學半導體裝置,是將光學半導體元件承載於光學半導體裝置用封裝體上製造而成。如果是這種光學半導體裝置,那麼機械穩定性較高,且高耐久性、低干擾性。 The optical semiconductor device of the present invention is produced by supporting an optical semiconductor element on a package for an optical semiconductor device. If it is such an optical semiconductor device, mechanical stability is high, and durability and low interference are high.

在圖4中,表示本發明的光學半導體裝置的一例。在圖4中,作成的結構是在光學半導體元件12a、12b的承載部的下方配置穿孔7,因而使晶片所產生的熱量釋放。圖4A所表示的是以引線14連接朝上(face-up)型晶片12a(光學半導體元件)並以內層材料13密封的光學半導體裝置15,圖4B所表示的是構裝倒裝晶片型晶片12b(光學半導體元件)並以內層材料13密封的光學半導體裝置15。 An example of the optical semiconductor device of the present invention is shown in Fig. 4 . In Fig. 4, the structure is such that the perforations 7 are disposed under the carrying portions of the optical semiconductor elements 12a, 12b, thereby releasing the heat generated by the wafer. 4A shows an optical semiconductor device 15 in which a lead 14 is connected to a face-up type wafer 12a (optical semiconductor element) and sealed with an inner layer material 13, and FIG. 4B shows a flip chip type wafer. An optical semiconductor device 15 of 12b (optical semiconductor element) and sealed with an inner layer material 13.

此光學半導體裝置,可以用作例如要求高耐久性和低干擾性等的航空宇宙產業機械和汽車產業機械等的用於投影的照明裝置、或使外部得知機械存在的識別信號燈。進而,還可以用於普通家庭中的室內用照明和液晶等的背景光中。 This optical semiconductor device can be used as, for example, an illumination device for projection such as an aerospace industry machine or an automobile industry machine requiring high durability and low interference, or an identification signal lamp for externally knowing the presence of a machine. Furthermore, it can also be used for indoor lighting in an ordinary home, and background light such as a liquid crystal.

繼而,以下,詳細說明本發明的光學半導體裝置的製造方法及利用該光學半導體裝置的製造方法所製造的光學半導體裝置,但本發明並不限定於這些。 Next, the method of manufacturing the optical semiconductor device of the present invention and the optical semiconductor device manufactured by the method of manufacturing the optical semiconductor device will be described in detail below, but the present invention is not limited thereto.

亦即,本發明的光學半導體裝置的製造方法具有以下步驟:構裝步驟,在具有通電部之基板上構裝複數個光學半導體元件,因而獲得光學半導體元件集合基板;半切割步驟,將前述光學半導體元件集合基板半切割,因而切斷前述通電部的一部分,以便在前述光學半導體元件集合基板內製作通電檢查用電子電路;通電檢查步驟,對該通電檢查用電子電路進行通電檢查,以便獲得每一前述光學半導體元件的光學特性資訊;分選步驟,使用該光學特性資訊,分選前述光學半導體元件;及,全切割步驟,在前述半切割步驟的切斷線上進行全切割,藉此將前述光學半導體元件集合基板分割為各個前述光學半導體裝置,因而獲得利用前述光學特性資訊而分選後的複數個前述光學半導體裝置。 That is, the manufacturing method of the optical semiconductor device of the present invention has the steps of: constructing a plurality of optical semiconductor elements on a substrate having an energizing portion, thereby obtaining an optical semiconductor element collecting substrate; and a half-cutting step of the optical The semiconductor element assembly substrate is half-cut, and thus a part of the current-carrying portion is cut so that an electronic circuit for conducting electricity inspection is formed in the optical semiconductor element assembly substrate, and a power-on inspection step is performed to check the current for the power-on inspection electronic circuit to obtain each An optical characteristic information of the optical semiconductor element; a sorting step of sorting the optical semiconductor element using the optical characteristic information; and a full cutting step of performing full cutting on the cutting line of the half cutting step, thereby Since the optical semiconductor element collecting substrate is divided into the respective optical semiconductor devices, a plurality of the optical semiconductor devices separated by the optical characteristic information are obtained.

此時,作為具有通電部之基板,可以使用在金屬框架上將樹脂轉注成型而成的基板、或在印刷基板上將樹脂轉注成型而成的基板。考慮到光學半導體裝置的耐熱性或耐久性,期望轉注成型的樹脂是使用矽酮樹脂組成物或環氧樹脂組成物。 In this case, as the substrate having the current-carrying portion, a substrate obtained by transferring a resin onto a metal frame or a substrate obtained by transferring a resin onto a printed substrate can be used. In view of heat resistance or durability of the optical semiconductor device, it is desirable to use a fluorenone resin composition or an epoxy resin composition for the resin to be transferred.

又,較佳為,在通電檢查步驟中,使用光學特性檢測裝置進行通電檢查。由於在通電檢查步驟中光學半導體元 件為排列於集合基板上的狀態,因此可以省去為了下一分選步驟而進行光學半導體裝置的排列等步驟。另外,較佳為,在半切割步驟中,製作通電檢查用電子電路,該通電檢查用電子電路具有連接通電檢查步驟中使用的電源探針的連接面。這樣一來,在集合基板的外周部設計通電檢查用電源探針的接觸點,藉此作業性進一步提升。 Moreover, it is preferable to perform the energization inspection using the optical characteristic detecting means in the energization inspection step. Due to the optical semiconductor element in the power-on inspection step Since the components are arranged on the collective substrate, the steps of arranging the optical semiconductor devices for the next sorting step can be omitted. Further, in the half-cutting step, it is preferable to form an electronic circuit for energization inspection, which has a connection surface to which the power source probe used in the power-on inspection step is connected. In this way, the contact point of the power supply probe for the power supply inspection is designed on the outer peripheral portion of the collective substrate, whereby the workability is further improved.

另外,較佳為,使用一種金屬框架在半切割步驟中所切斷的部分中具有溝槽之基板,作為在金屬框架上將樹脂轉注成型而成的基板。藉此,可以防止由切割毛邊或崩角所引起的成型樹脂的缺口。 Further, it is preferable to use a substrate having a groove in a portion cut by the metal frame in the half-cut step as a substrate obtained by transferring a resin onto a metal frame. Thereby, the notch of the molding resin caused by the cut burr or the chipping angle can be prevented.

又,較佳為,使用一種在積層3層以上的纖維強化材料中含浸有樹脂而成的基板,來作為印刷基板。此纖維強化材料可以是以層相互旋轉90度的狀態積層。又,含浸於此纖維強化材料中的樹脂,可列舉例如矽酮樹脂或環氧樹脂。較佳為,通過使用矽酮樹脂,而使印刷基板的耐熱性或耐紫外線性較強。使用此印刷基板製造而成的光學半導體裝置的耐熱性或耐紫外線性也優異。 Moreover, it is preferable to use a substrate in which a resin reinforcing material of three or more layers is impregnated with a resin as a printed circuit board. This fiber-reinforced material may be laminated in a state in which the layers are rotated by 90 degrees with each other. Further, examples of the resin impregnated in the fiber-reinforced material include an anthrone resin or an epoxy resin. Preferably, the heat resistance or ultraviolet light resistance of the printed substrate is strong by using an fluorenone resin. The optical semiconductor device manufactured using this printed circuit board is also excellent in heat resistance and ultraviolet light resistance.

又,較佳為,在全切割步驟中,使用與半切割步驟中所使用的切割刀片寬度不同的寬度的切割刀片。藉此,當在半切割步驟或全切割步驟中產生位置偏移時,也可以將光學半導體裝置完全單粒化。此時,從確保集合基板的小型化或PN間的絕緣性來看,期望在全切割步驟中,使用寬度小於半切割步驟中也會使用的切割刀片的切割刀片。 Further, preferably, in the full cutting step, a cutting blade having a width different from the width of the cutting blade used in the half cutting step is used. Thereby, the optical semiconductor device can also be completely granulated when a positional shift occurs in the half-cutting step or the full-cutting step. At this time, from the viewpoint of ensuring miniaturization of the collective substrate or insulation between the PNs, it is desirable to use a cutting blade having a width smaller than that of the cutting blade which is also used in the half-cutting step in the full cutting step.

在利用上述製造方法製造而成的光學半導體裝置中,存在由半切割所造成的切割溝槽部。與外部基板黏結的黏 著材料(焊錫),進入此溝槽部中,藉此可以飛躍性地提升光學半導體裝置與外部基板的黏著性。 In the optical semiconductor device manufactured by the above-described manufacturing method, there is a cut groove portion caused by half cutting. Sticky to the outer substrate The material (solder) enters the groove portion, whereby the adhesion of the optical semiconductor device to the external substrate can be dramatically improved.

進而,較佳為,在通電檢查步驟中,與每一光學半導體元件對應地配置光學特性檢測用光學透鏡,因而獲得光學特性資訊。例如,可以準備複數個檢測光學特性的光學透鏡,使用與光學半導體元件集合基板的配置間距及形狀一致的光學透鏡群。通過使用此光學透鏡群,可以一次檢測由複數個光學半導體元件所產生的光學特性資訊。又,期望此光學透鏡的前端為包入光學半導體元件的腔體形狀。其原因在於,通過在此腔體形狀內配置各個光學半導體元件,可以隔斷由其他光學半導體元件所產生的光的影響並測定。 Further, in the energization inspection step, the optical characteristic detecting optical lens is disposed corresponding to each optical semiconductor element, and optical characteristic information is obtained. For example, a plurality of optical lenses that detect optical characteristics can be prepared, and an optical lens group that matches the arrangement pitch and shape of the optical semiconductor element collective substrate can be used. By using this optical lens group, optical characteristic information generated by a plurality of optical semiconductor elements can be detected at one time. Further, it is desirable that the front end of the optical lens is in the shape of a cavity enclosing the optical semiconductor element. The reason for this is that by arranging the respective optical semiconductor elements in the shape of the cavity, it is possible to block and measure the influence of light generated by the other optical semiconductor elements.

以下,基於圖式,詳細說明本發明的實施形態。圖5(A)是使用金屬框架201(也稱為金屬導線框架)的光學半導體裝置的剖面圖。圖5(B)是使用印刷基板202的光學半導體裝置的剖面圖。另外,在圖5中,表示使用朝上型光學半導體元件的一例,本發明的光學半導體裝置的製造方法還可以通過變更基板的襯墊(pad)或襯墊接合部的配置方法,而與倒裝晶片型或垂直型光學半導體元件對應。又,即便光學半導體裝置的襯墊為兩個或、三個時,也可以利用調整襯墊接合部的配置來對應。 Hereinafter, embodiments of the present invention will be described in detail based on the drawings. Fig. 5(A) is a cross-sectional view of an optical semiconductor device using a metal frame 201 (also referred to as a metal wire frame). FIG. 5(B) is a cross-sectional view of the optical semiconductor device using the printed substrate 202. In addition, FIG. 5 shows an example in which the optical semiconductor device of the present invention is used, and the method of manufacturing the optical semiconductor device of the present invention can be changed by changing the pad or the pad bonding portion of the substrate. A wafer type or vertical type optical semiconductor element corresponds. Further, even when the number of spacers of the optical semiconductor device is two or three, it is possible to correspond to the arrangement of the adjustment pad joints.

在圖5(A)中,表示晶片類型的光學半導體裝置203的一例。具有通電部205、205’(電極、外部連接端子)之基板204,可以通過利用在金屬框架201上將以矽酮樹脂為主體的組成物轉注成型來將成型物208成型來製造,電極205 是在基板204的兩面所形成的一對電極,基板204的底面側的電極205為外部連接端子205’。又,光學半導體元件206可以為藍色或紫外線光學半導體元件,並承載於基板204上,以便在與各電極205之間利用Au-Al等焊線(bonding wire)207來配線。另外,當光學半導體元件為倒裝晶片型時,可以為金凸塊的配線。成型物(反射體)208是利用轉注成型而成型,並圍繞光學半導體元件206。密封樹脂(矽酮樹脂)209密封光學半導體裝置203的成型物(反射體)208的腔體部內。在密封樹脂209中可以包含螢光體。溝槽部210是利用半切割所形成的溝槽。另外,使用圖5(B)的印刷基板202時的光學半導體裝置也為相同的構成,且印刷基板202的頂面與底面可以通過穿孔211而電性連接。另外,作為具有通電部之基板204,當使用在金屬框架201上將樹脂轉注成型而成的基板時,金屬框架201為通電部;當使用在印刷基板202上將樹脂轉注成型而成的基板時,利用印刷等形成於印刷基板202上的金屬被覆層等為通電部。 An example of the wafer type optical semiconductor device 203 is shown in FIG. 5(A). The substrate 204 having the energizing portions 205 and 205' (electrodes, external connection terminals) can be manufactured by molding a molded article 208 by transferring a composition mainly composed of an anthrone resin on the metal frame 201, and the electrode 205 is formed. These are a pair of electrodes formed on both surfaces of the substrate 204, and the electrode 205 on the bottom surface side of the substrate 204 is an external connection terminal 205'. Further, the optical semiconductor element 206 may be a blue or ultraviolet optical semiconductor element and carried on the substrate 204 so as to be wired with each of the electrodes 205 by a bonding wire 207 such as Au-Al. Further, when the optical semiconductor element is of a flip chip type, it may be a wiring of gold bumps. The molded article (reflector) 208 is molded by transfer molding and surrounds the optical semiconductor element 206. A sealing resin (anthracene resin) 209 seals the inside of the cavity of the molded product (reflector) 208 of the optical semiconductor device 203. A phosphor may be contained in the sealing resin 209. The groove portion 210 is a groove formed by half cutting. Further, the optical semiconductor device when the printed circuit board 202 of FIG. 5(B) is used has the same configuration, and the top surface and the bottom surface of the printed substrate 202 can be electrically connected by the through holes 211. Further, when the substrate having the current-carrying portion is a substrate on which the resin is injection-molded on the metal frame 201, the metal frame 201 is an energized portion; when a substrate on which the resin is transferred onto the printed substrate 202 is used, A metal coating layer or the like formed on the printed circuit board 202 by printing or the like is an energizing portion.

圖6是以概略前視圖來表示光學半導體元件集合基板212的一例。光學半導體裝置203是通過將圖6所示的稱為MAP(Matrix array package)的光學半導體元件集合基板212全切割製造而成。另外,光學半導體元件集合基板212可以通過在具有通電部之基板上構裝複數個光學半導體元件來獲得。具有通電部之基板204是通過對可以承載複數個光學半導體元件206的金屬框架201,利用轉注成型將成型物208樹脂成型來獲得。期望成型物208由矽酮樹脂組成物構成,且包含金屬氧化物以提升反射率。 FIG. 6 shows an example of the optical semiconductor element collecting substrate 212 in a schematic front view. The optical semiconductor device 203 is manufactured by completely cutting the optical semiconductor element assembly substrate 212 called MAP (Matrix Array Package) shown in FIG. 6 . Further, the optical semiconductor element collecting substrate 212 can be obtained by arranging a plurality of optical semiconductor elements on a substrate having an energizing portion. The substrate 204 having the energization portion is obtained by resin molding the molded article 208 by transfer molding to the metal frame 201 which can carry the plurality of optical semiconductor elements 206. It is desirable that the molded article 208 is composed of an oxime resin composition and contains a metal oxide to enhance reflectance.

如圖7所示,在光學半導體元件集合基板212中,通過利用半切割而切斷基板204的通電部的一部分,藉此在光學半導體元件集合基板212內製作通電檢查用電子電路。而且,預先通過連接光學半導體元件集合基板212所具備的通電檢查用電源探針的連接面215,與電源相連,藉此可以對通電檢查用電子電路外加電流,並在承載於光學半導體元件集合基板212上的狀態下,檢查光學半導體元件206的光學特性。在此通電檢查時,作為光學特性,尤其確認是否亮燈、光束值、色度、色溫、波長光譜及演色性等,然後實施分選步驟。 As shown in FIG. 7 , in the optical semiconductor element assembly substrate 212, a part of the current-carrying portion of the substrate 204 is cut by half-cutting, whereby an electronic circuit for conducting electricity inspection is formed in the optical semiconductor element collecting substrate 212. In addition, by connecting the connection surface 215 of the power supply test power supply probe provided in the optical semiconductor element assembly substrate 212 to the power supply, an electric current can be applied to the electronic circuit for power-on inspection and carried on the optical semiconductor element assembly substrate. In the state above 212, the optical characteristics of the optical semiconductor element 206 are inspected. At the time of this energization check, as the optical characteristics, in particular, whether or not lighting, beam value, chromaticity, color temperature, wavelength spectrum, color rendering property, and the like are confirmed, and then a sorting step is performed.

此處,使用圖8,來說明在光學半導體元件集合基板212內製作通電檢查用電子電路213’的方法。圖8是例示性表示光學半導體元件206排列為3×3的光學半導體元件集合基板212的通電部213及光學半導體元件206的圖。圖8A是半切割前的光學半導體元件集合基板212。圖8B至圖8D表示可以根據半切割線214的位置及長度的不同,在光學半導體元件集合基板212上製作3列(B)-三個光學半導體元件的串聯電子電路213’,製作3列(C)-三個光學半導體元件的並聯電子電路213’,並製作一個(D)-使三個光學半導體元件的串聯電子電路三個並聯的電子電路213’的一例。可以對此通電檢查用電子電路213’使用直流電源(direct current supply,DC supply),從連接電源探針的連接面215外加電流,藉此獲得每一光學半導體元件206的光學特性資訊。 Here, a method of fabricating the power-on inspection electronic circuit 213' in the optical semiconductor element collecting substrate 212 will be described with reference to FIG. FIG. 8 is a view exemplarily showing the energizing portion 213 and the optical semiconductor element 206 in which the optical semiconductor element 206 is arranged in the 3 × 3 optical semiconductor element collecting substrate 212. FIG. 8A is an optical semiconductor element assembly substrate 212 before half cutting. 8B to 8D show that the series electronic circuit 213' of three columns (B) - three optical semiconductor elements can be formed on the optical semiconductor element collective substrate 212 according to the position and length of the half-cut line 214, and three columns are produced ( C) - a parallel electronic circuit 213' of three optical semiconductor elements, and an example of (D) - an electronic circuit 213' in which three series electronic circuits of three optical semiconductor elements are connected in parallel. The power supply inspection electronic circuit 213' can apply a direct current supply (DC supply) to apply a current from the connection surface 215 to which the power supply probe is connected, thereby obtaining optical characteristic information of each optical semiconductor element 206.

又,在經半切割的狀態下,光學半導體裝置203由基板的樹脂成型部連接,光學半導體元件集合基板212保持原 樣。之後,利用全切割步驟,將光學半導體裝置203完全單粒化。此時,在全切割步驟中,使用與半切割步驟中使用的切割刀片寬度不同的寬度的切割刀片,藉此當在全切割步驟或半切割步驟中產生位置偏移時,也可以完全單粒化。 Further, in the half-cut state, the optical semiconductor device 203 is connected by the resin molding portion of the substrate, and the optical semiconductor element assembly substrate 212 remains intact. kind. Thereafter, the optical semiconductor device 203 is completely granulated by the full cutting step. At this time, in the full cutting step, a cutting blade having a width different from the width of the cutting blade used in the half cutting step is used, whereby when the positional shift occurs in the full cutting step or the half cutting step, it is also possible to completely separate the single particles. Chemical.

在圖9中,表示利用本發明所製造的光學半導體裝置203與外部基板219的黏著情況。在光學半導體裝置203中,存在由半切割所引起的溝槽210,且在其溝槽內配置焊錫所代表的導電黏著劑217。通過在此溝槽210內配置黏著材料217,可以提升光學半導體裝置203與外部基板219的黏著強度。 FIG. 9 shows the adhesion of the optical semiconductor device 203 manufactured by the present invention to the external substrate 219. In the optical semiconductor device 203, there is a trench 210 caused by half-cutting, and a conductive adhesive 217 represented by solder is disposed in the trench. By arranging the adhesive material 217 in the trench 210, the adhesion strength between the optical semiconductor device 203 and the external substrate 219 can be improved.

在圖10中,表示本發明中使用的通電檢查方法及其光學特性檢測裝置220。在圖10中,使用與經半切割的光學半導體元件集合基板212的光學半導體元件206的配置間距一致的光學特性檢測用光學透鏡群218。通過使用此光學透鏡群218,可以一次分選複數個光學半導體元件,因而減少分選工作量。 In Fig. 10, a power-on inspection method and an optical characteristic detecting device 220 used in the present invention are shown. In FIG. 10, the optical characteristic detecting optical lens group 218 which matches the arrangement pitch of the optical semiconductor element 206 of the half-cut optical semiconductor element assembly substrate 212 is used. By using this optical lens group 218, a plurality of optical semiconductor elements can be sorted at a time, thereby reducing the sorting workload.

在圖11中,表示使用在金屬框架201上將樹脂轉注成型而成的基板204的光學半導體裝置203的製造流程。在圖12中,表示使用在印刷基板202上將樹脂轉注成型而成的基板204的光學半導體裝置203的製造流程。 In FIG. 11, the manufacturing flow of the optical semiconductor device 203 using the substrate 204 in which the resin is injection-molded on the metal frame 201 is shown. FIG. 12 shows a manufacturing flow of the optical semiconductor device 203 using the substrate 204 on which the resin is transferred onto the printed substrate 202.

首先,製作圖6所示的光學半導體元件集合基板212。通過在具有通電部之基板204上構裝光學半導體元件,由例如包含螢光體的矽酮樹脂密封,來獲得光學半導體元件集合基板212。如圖11A、圖12A所示,準備在金屬框架201或印刷基板202上施加Ag、Au、Pd、Ni等電鍍的材料,以 便製作具有通電部之基板204。繼而,如圖11B、圖12B所示,在金屬框架201上將樹脂轉注成型,或在印刷基板202上將樹脂轉注成型,因而製作具有通電部之基板204。此時,較佳為,在前述金屬框架201或印刷基板202上將包含金屬氧化物的成型樹脂轉注成型。又,在使用金屬框架201時,期望金屬框架201的一部分形成溝槽,尤其是為了防止由切割毛邊或崩角引起的樹脂的缺口,在實施全切割步驟或半切割的切割線上形成溝槽。又,考慮到耐熱性或耐久性,期望印刷基板202是使用將矽酮樹脂或環氧樹脂含浸於玻璃纖維材料216中而成的基板(參照圖5B)。 First, the optical semiconductor element assembly substrate 212 shown in FIG. 6 is produced. The optical semiconductor element collecting substrate 212 is obtained by, for example, arranging an optical semiconductor element on a substrate 204 having an energizing portion and sealing it with, for example, an anthrone resin containing a phosphor. As shown in FIG. 11A and FIG. 12A, a material for plating of Ag, Au, Pd, Ni, or the like is applied to the metal frame 201 or the printed substrate 202 to A substrate 204 having an energized portion is fabricated. Then, as shown in FIG. 11B and FIG. 12B, the resin is transferred onto the metal frame 201, or the resin is transferred onto the printed substrate 202, whereby the substrate 204 having the conductive portion is produced. At this time, it is preferable that the molding resin containing a metal oxide is transferred onto the metal frame 201 or the printed substrate 202. Further, when the metal frame 201 is used, it is desirable that a part of the metal frame 201 is formed with a groove, and in particular, in order to prevent a gap of the resin caused by cutting a burr or a chipping, a groove is formed on the cutting line on which the full cutting step or the half cutting is performed. Moreover, in consideration of heat resistance and durability, it is desirable that the printed substrate 202 be a substrate obtained by impregnating a glass fiber material 216 with an fluorenone resin or an epoxy resin (see FIG. 5B).

又,較佳為,配置符合目的的襯墊接合部,以便製作後述半切割步驟的電子電路。又,通過在成型樹脂中使用矽酮樹脂組成物,可以提升光學半導體裝置的耐熱性或耐紫外線性。進而,當在成型樹脂中使用環氧樹脂組成物時,可以提升光學半導體裝置的強度。另外,前述金屬氧化物是作為反射材料、強化材料及散熱材料而添加。 Further, it is preferable to arrange a matching pad joint portion to prepare an electronic circuit of a half-cut step to be described later. Further, by using the fluorenone resin composition in the molding resin, heat resistance or ultraviolet ray resistance of the optical semiconductor device can be improved. Further, when an epoxy resin composition is used in the molding resin, the strength of the optical semiconductor device can be improved. Further, the metal oxide is added as a reflective material, a reinforcing material, and a heat dissipating material.

在圖11C、12C中,表示在具有通電部之基板204上構裝複數個光學半導體元件206因而獲得光學半導體元件集合基板212的構裝步驟。在構裝中,可以使用Au-Sn、焊錫、導電性漿料、樹脂黏著劑及金凸塊,且期望在構裝之前,對用於提升前述基板與光學半導體的黏著強度的基板,實施電漿處理或紫外線臭氧處理。在基板上構裝光學半導體元件之後,根據需要而實施Au引線的引線接合(wire bonding)。 In Figs. 11C and 12C, a construction step of forming a plurality of optical semiconductor elements 206 on a substrate 204 having an energizing portion and obtaining an optical semiconductor element collecting substrate 212 is shown. In the package, Au-Sn, solder, conductive paste, resin adhesive, and gold bumps may be used, and it is desirable to apply electricity to the substrate for improving the adhesion strength between the substrate and the optical semiconductor before the mounting. Pulp treatment or UV ozone treatment. After the optical semiconductor element is mounted on the substrate, wire bonding of the Au wire is performed as needed.

之後,如圖11D、12D所示,使用包含螢光體的樹脂等, 來密封光學半導體元件206樹脂。此時,期望在密封樹脂209中使用矽酮樹脂,以便提升耐熱性或耐久性,且較佳為,矽酮樹脂內包含螢光體及添加物。此時,添加物並無特別限制,是指二氧化矽等用於黏度調整或光散射的材料。又,期望在樹脂密封之前,對基板204實施電漿處理或紫外線臭氧處理,以便提升密封樹脂209及成型體208的黏著強度。樹脂密封後,完成光學半導體元件集合基板212。 Thereafter, as shown in FIGS. 11D and 12D, a resin containing a phosphor or the like is used. The optical semiconductor element 206 resin is sealed. At this time, it is desirable to use an fluorenone resin in the sealing resin 209 in order to improve heat resistance or durability, and it is preferable that the fluorenone resin contains a phosphor and an additive. In this case, the additive is not particularly limited, and refers to a material such as cerium oxide used for viscosity adjustment or light scattering. Further, it is desirable to subject the substrate 204 to plasma treatment or ultraviolet ozone treatment before the resin sealing to increase the adhesion strength of the sealing resin 209 and the molded body 208. After the resin is sealed, the optical semiconductor element collecting substrate 212 is completed.

在光學半導體元件集合基板212中,存在光學半導體元件206及成型物208的一側為表面,且將光學半導體裝置連接外部的基板(在此未示出)的外部連接端子205’側為背面(參照圖5)。首先,如圖11E、圖12E所示,在半切割步驟中,將光學半導體元件集合基板212的背面半切割,藉此切斷通電部的一部分(半切割處221),以便在光學半導體元件集合基板內製作通電檢查用電子電路。此時,期望半切割刀片的寬度為0.4~0.5 mm。利用實施半切割,光學半導體元件集合基板212可以保持形狀地構成通電檢查用電子電路。另外,較佳為,事先確認基板內的襯墊接合部的配置,以便製作目標電子電路。在本實施形態中,光學半導體裝置203串聯排列地配置襯墊接合部。 In the optical semiconductor element assembly substrate 212, one side of the optical semiconductor element 206 and the molded article 208 is a surface, and the side of the external connection terminal 205' of the substrate (not shown here) connecting the optical semiconductor device to the outside is a back surface ( Refer to Figure 5). First, as shown in FIG. 11E and FIG. 12E, in the half-cutting step, the back surface of the optical semiconductor element collecting substrate 212 is half-cut, thereby cutting off a part of the conducting portion (half-cut portion 221) so as to be in the optical semiconductor element assembly. An electronic circuit for energization inspection is fabricated in the substrate. At this time, it is desirable that the width of the half-cutting blade is 0.4 to 0.5 mm. By performing the half dicing, the optical semiconductor element collecting substrate 212 can form the electronic circuit for electric conduction inspection while maintaining the shape. Moreover, it is preferable to confirm the arrangement of the pad joints in the substrate in advance in order to produce a target electronic circuit. In the present embodiment, the optical semiconductor device 203 is provided with the pad bonding portions arranged in series.

之後,如圖11F、12F所示,在通電檢查步驟中,對通電檢查用電子電路進行通電檢查,以便獲得每一光學半導體元件的光學特性資訊,之後,在分選步驟中,使用該光學特性資訊來分選光學半導體元件。例如,可以使用連接設置於光學半導體元件集合基板212上的通電檢查用電源探針的連接面215,對利用半切割步驟所製作的電子電路外 加電流,利用通電檢查而獲得光學特性資訊。在通電檢查中不僅確認是否亮燈,還要確認使用積分球或亮度測定裝置的光束值、色度、色溫、波長光譜及演色性等,且構裝於光學半導體元件集合基板212上而直接進行光學半導體裝置的分選。又,光學特性資訊不僅用於產品的分選,還可以用於確認製造上的不良點或螢光體濃度的偏差,還與提升步驟內檢查的品質相關。 Thereafter, as shown in FIGS. 11F and 12F, in the energization checking step, the energization inspection electronic circuit is subjected to energization inspection to obtain optical characteristic information of each optical semiconductor element, and then, in the sorting step, the optical characteristic is used. Information to sort optical semiconductor components. For example, the connection surface 215 of the power supply probe for connection to the optical semiconductor element assembly substrate 212 can be connected to the electronic circuit fabricated by the half-cut step. Current is applied, and optical characteristics information is obtained by power-on inspection. In the energization check, it is confirmed not only whether or not the light is turned on, but also the beam value, chromaticity, color temperature, wavelength spectrum, color rendering property, and the like of the integrating sphere or the brightness measuring device, and are mounted on the optical semiconductor element collecting substrate 212 to be directly performed. Sorting of optical semiconductor devices. Moreover, the optical characteristic information is not only used for sorting products, but also for confirming defects in manufacturing or variations in phosphor concentration, and also relating to the quality of inspection in the lifting step.

通電檢查後,如圖11G、圖12G所示,在全切割步驟中,在半切割步驟的切斷線上進行全切割,藉此將光學半導體元件集合基板分割為各個光學半導體裝置,因而可以獲得利用光學特性資訊而分選後的複數個光學半導體裝置。例如,從光學半導體元件集合基板212的表面進行全切割,以便完全單粒化,藉此完成光學半導體裝置203。在此全切割步驟時,較佳為,使在半切割步驟中製作的切割線與全切割的切割線一致以便單粒化,並且期望全切割步驟中所使用的切割刀片寬度與半切割步驟的切割刀片寬度不同。尤其期望全切割刀片寬度小於半切割刀片寬度,以便確保集合基板的小型化或PN間的絕緣性。 After the energization inspection, as shown in FIG. 11G and FIG. 12G, in the full cutting step, the entire cutting is performed on the cutting line of the half-cut step, whereby the optical semiconductor element assembly substrate is divided into the respective optical semiconductor devices, and thus it is possible to obtain A plurality of optical semiconductor devices sorted by optical characteristic information. For example, the entire surface of the optical semiconductor element collecting substrate 212 is completely cut so as to be completely singulated, whereby the optical semiconductor device 203 is completed. In this full cutting step, it is preferred that the cutting line produced in the half-cutting step is aligned with the fully-cut cutting line for singulation, and that the width of the cutting blade used in the full-cutting step and the half-cutting step are desired. The cutting blade has a different width. It is particularly desirable that the full-cutting blade width is smaller than the half-cutting blade width in order to ensure miniaturization of the collective substrate or insulation between the PNs.

例如,若在通電檢查步驟及分選步驟中,記錄哪一位置處的光學半導體元件具有哪種光學特性資訊,可以在全切割步驟後立即將半導體裝置分類。 For example, if in the power-on inspection step and the sorting step, which optical characteristic information is recorded at which position, the semiconductor device can be classified immediately after the full-cutting step.

在通電檢查中,可以使用與配置於經半切割的光學半導體元件集合基板上的光學半導體元件的配置間距一致的光學特性檢測光學透鏡群218。期望使用以電荷耦合元件照相機(Charge-coupled Device Camera,CCD Camera)為代表的 亮度測定用光學探針,作為此光學透鏡群。又,如圖13所示,此光學探針是通過光纖224等而與分光器(光學特性檢測裝置220)相連,因而可以處理與各個半導體裝置對應的光學透鏡的光學特性資訊。又,光學透鏡的前端為圍繞光學透鏡222的腔體結構223。通過利用此腔體223來覆蓋光學半導體元件,使各個光學半導體元件所發出的光不會漏掉,因而可以測定光學特性資訊。藉此,可以實施分選,而不會干擾其他光學半導體元件群。 In the energization inspection, the optical lens group 218 can be detected using an optical characteristic that matches the arrangement pitch of the optical semiconductor elements disposed on the half-cut optical semiconductor element assembly substrate. It is desirable to use a Charge-coupled Device Camera (CCD Camera) as a representative An optical probe for luminance measurement is used as the optical lens group. Further, as shown in Fig. 13, the optical probe is connected to the spectroscope (optical characteristic detecting device 220) via the optical fiber 224 or the like, so that the optical characteristic information of the optical lens corresponding to each semiconductor device can be processed. Also, the front end of the optical lens is a cavity structure 223 surrounding the optical lens 222. By covering the optical semiconductor element with the cavity 223, the light emitted from each optical semiconductor element is not leaked, and optical characteristic information can be measured. Thereby, sorting can be performed without interfering with other optical semiconductor element groups.

[實施例] [Examples]

以下,示出實施例及比較例,更詳細地說明本發明,但本發明並不限定於這些。 Hereinafter, the present invention will be described in more detail by way of examples and comparative examples, but the invention is not limited thereto.

(實施例1) (Example 1)

積層3層將包含作為無機質填充材料的氧化鈦的苯基系矽酮樹脂組成物(信越化學(Shin-Etsu Chemical Co.,Ltd.)製造:商品名KJR-5547)含浸於玻璃纖維中而成的每1片為70 μm的片材,並使樹脂硬化來作為基台。在此基台的頂面及底面上使75 μm的銅層熱壓結合。而且,形成對銅層的表面施加Ni/Pd/Au的電鍍的金屬被覆層,並利用蝕刻步驟,在基台頂面上形成兩個電性連接部。 The phenyl fluorenone resin composition (manufactured by Shin-Etsu Chemical Co., Ltd.: trade name KJR-5547) containing titanium oxide as an inorganic filler is impregnated into glass fibers. Each of the sheets was a sheet of 70 μm, and the resin was hardened to serve as a base. A 75 μm copper layer was thermocompression bonded on the top and bottom surfaces of the abutment. Further, a plated metal coating layer of Ni/Pd/Au was applied to the surface of the copper layer, and two electrical connecting portions were formed on the top surface of the base by an etching step.

以電漿處理100 W/30秒,對前述基台的表面實施表面處理,對於該處理面,利用轉注模具,使用矽酮樹脂組成物將凹形狀的反射體結構成型。將矽酮系晶片接合(晶粒接合(die bonding))材料(信越化學製造:商品名632DA-1)列印塗布於此反射體內的光學半導體元件承載部分上,承載藍色LED晶片(美國科銳公司(Cree Corporation)製造 TR350M系列),以150℃、4小時使其硬化。之後,通過直徑為30 μm的金引線將電性連接部與藍色LED晶片引線接合(wire bond)連接。 The surface of the abutment was subjected to a surface treatment by plasma treatment for 100 W/30 seconds, and a concave-shaped reflector structure was molded using the oxime resin composition on the treated surface by using a transfer mold. An anthrone-based wafer bonding (die bonding) material (manufactured by Shin-Etsu Chemical Co., Ltd.: trade name 632DA-1) is printed on the optical semiconductor component carrying portion of the reflector, and carries a blue LED wafer (American Section) Made by Cree Corporation TR350M series), hardened at 150 ° C for 4 hours. Thereafter, the electrical connection portion was wire-bonded to the blue LED wafer by a gold wire having a diameter of 30 μm.

之後,在反射體內,利用武藏工程機械(Musashi Engineering Co.,Ltd.)製造的分配器,塗布混揉有黃色螢光體及矽酮樹脂組成物(信越化學製造:商品名KJR-9022)的內層材料後,以150℃、4小時使其熱硬化。熱硬化後,經過切割步驟將其單粒化,因而獲得本發明的光學半導體裝置。 Then, in a reflector, a yellow fluorescent material and an anthrone resin composition (manufactured by Shin-Etsu Chemical Co., Ltd.: trade name KJR-9022) were coated with a dispenser manufactured by Musashi Engineering Co., Ltd. After the inner layer material, it was thermally hardened at 150 ° C for 4 hours. After the heat curing, it is singulated by a dicing step, thereby obtaining the optical semiconductor device of the present invention.

(比較例1、2) (Comparative Examples 1, 2)

使用FR-4基板(比較例1)、AlN基板(比較例2)作為基台,除此以外,與實施例1同樣地,製作光學半導體裝置。 An optical semiconductor device was produced in the same manner as in Example 1 except that the FR-4 substrate (Comparative Example 1) and the AlN substrate (Comparative Example 2) were used as the base.

之後,對實施例1、比較例1至比較例2中製作的光學半導體裝置,實施85℃/85%的高溫高濕通電試驗,確認100 h、500 h、1,000 h初期光束值的變動情況。結果示於表1。若使初期光束為100%,那麼實施例1的光學半導體裝置維持與陶瓷AlN基板(比較例2)的光學半導體裝置同程度的光束。 Then, the optical semiconductor device produced in Example 1 and Comparative Example 1 to Comparative Example 2 was subjected to a high-temperature and high-humidity electric current test at 85 ° C / 85%, and the change in the initial beam value at 100 h, 500 h, and 1,000 h was confirmed. The results are shown in Table 1. When the initial light beam was made 100%, the optical semiconductor device of Example 1 maintained the light beam of the same level as the optical semiconductor device of the ceramic AlN substrate (Comparative Example 2).

進而,對實施例1、比較例1至比較例2中製作的光學半導體裝置,實施85℃/85%的高溫高濕通電試驗,確認100 h、500 h、1,000 h的光學半導體裝置的反射率的變動情況。結果示於表2。若使初期反射率為100%,那麼實施例1的光學半導體裝置可以維持與樹脂也就是FR-4基板(比較例1)的光學半導體裝置同程度以上的反射率。 Further, the optical semiconductor device produced in Example 1 and Comparative Example 1 to Comparative Example 2 was subjected to a high-temperature and high-humidity electric current test at 85 ° C / 85%, and the reflectance of the optical semiconductor device at 100 h, 500 h, and 1,000 h was confirmed. The change. The results are shown in Table 2. When the initial reflectance is made 100%, the optical semiconductor device of the first embodiment can maintain the reflectance of the same or higher than that of the optical semiconductor device of the resin, that is, the FR-4 substrate (Comparative Example 1).

進而,比較實施例1中使用的光學半導體裝置用封裝體、與比較例1中使用的FR-4基板的相對介電常數。相對介電常數是利用三平板傳輸線諧振器法(Triplate-line Resonator Method),使用惠普公司(Hewlett-Packard Company)製造的網路分析器HP-8722C,在室溫25℃下,進行1 GHz的相對介電常數的測定。結果示於表3。本發明的光學半導體裝置用封裝體的相對介電常數為3.2,先前的FR-4基板為5.2。由此可知,使用本發明的光學半導體裝置用封裝體的光學半導體裝置的相對介電常數低於40%,因而具有低干擾性。 Further, the relative dielectric constant of the package for an optical semiconductor device used in Example 1 and the FR-4 substrate used in Comparative Example 1 was compared. The relative dielectric constant was measured using a Triplate-line Resonator Method using a network analyzer HP-8722C manufactured by Hewlett-Packard Company at room temperature 25 ° C for 1 GHz. Determination of relative dielectric constant. The results are shown in Table 3. The package for an optical semiconductor device of the present invention has a relative dielectric constant of 3.2, and the previous FR-4 substrate has a size of 5.2. From this, it is understood that the optical semiconductor device using the package for an optical semiconductor device of the present invention has a relative dielectric constant of less than 40%, and thus has low interference.

(實施例2、3) (Examples 2 and 3)

在將反射體結構成型時,在轉注成型中使用環氧樹脂(實施例2)、或矽酮樹脂與環氧樹脂的雜化樹脂(實施例3),除此以外,與實施例1同樣地製作光學半導體裝置。 In the same manner as in the first embodiment, the epoxy resin (Example 2) or the hybrid resin of the fluorenone resin and the epoxy resin (Example 3) was used for the transfer molding. An optical semiconductor device is fabricated.

對在實施例2至實施例3中試製的光學半導體裝置,實施85℃/85%的高溫高濕通電試驗,確認100 h、500 h、1,000 h初期光束值的變動情況。結果示於表4。可知由於基台的耐久性較高,因此兩種都未有較大的光束的下降,較為良好。 The optical semiconductor device experimentally produced in the second to third embodiments was subjected to a high-temperature and high-humidity electric current test at 85 ° C / 85%, and the change in the initial beam value at 100 h, 500 h, and 1,000 h was confirmed. The results are shown in Table 4. It can be seen that since the durability of the base is high, both of them have no large beam drop, which is good.

進而,在實施例1至實施例3中試製的光學半導體裝置用封裝體由於包含纖維強化劑,因此機械穩定性較高。 Further, since the package for an optical semiconductor device which was experimentally produced in Examples 1 to 3 contains a fiber reinforcing agent, the mechanical stability is high.

(實施例4) (Example 4)

使用厚度0.25 mm的Cu基底的基材(三菱伸銅股份有限公司(Mitsubishi Shindoh Co.Ltd.)製造Tamac194),通過蝕刻步驟形成將襯墊與襯墊間接起來的連接部,製作已施加Ni/Pd/Au電鍍的金屬導線框架。使用此基板,在電漿處理 50 W/60秒下,對基台表面實施表面處理,並利用轉注成型機對該處理面實施矽組成物的樹脂成型,製作具有通電部之基板。 A substrate of a Cu substrate having a thickness of 0.25 mm (Tamac 194 manufactured by Mitsubishi Shindoh Co., Ltd.) was used, and a joint portion in which the liner and the liner were indirectly formed was formed by an etching step, and Ni/Ni was applied. Pd/Au plated metal wire frame. Use this substrate in plasma processing The surface of the base surface was subjected to surface treatment at 50 W/60 seconds, and the surface of the base was subjected to resin molding by a transfer molding machine to prepare a substrate having an electric conduction portion.

將矽酮系晶片接合材(信越化學製造:商品名632DA-1)列印塗布於前述成型中所形成的凹部(反射體)內,承載藍色LED晶片(美國科銳公司製造TR350M系列),以150℃、4小時硬化。之後,利用30 μm的金引線實施引線接合。 The fluorenone-based wafer bonding material (manufactured by Shin-Etsu Chemical Co., Ltd.: trade name 632DA-1) is printed and applied in a concave portion (reflector) formed in the above molding, and carries a blue LED chip (TR350M series manufactured by Cree, USA). Hardened at 150 ° C for 4 hours. Thereafter, wire bonding was performed using a gold lead of 30 μm.

之後,利用武藏工程機械製造分配器塗布混揉有黃色螢光體及矽酮樹脂(信越化學製造:商品名KJR-9022)的內層材料後,以150℃、4小時使其熱硬化,製作光學半導體元件集合基板。之後,將所製作的集合基板的背面實施切割刀片厚0.4 mm的半切割步驟,切斷通電部,以便在集合基板上製作使10列20個光學半導體元件的串聯電子電路並聯的電子電路。使用連接設置於集合基板的外周部的通電探針的連接面,外加50 mA,實施利用積分球所實行的通電檢查,因而獲得光學特性資訊。之後,可以在切割刀片0.2 mm的全切割步驟中將集合基板單粒化,因而獲得利用光學特性資訊而分選後的200個光學半導體裝置。由於無需對單粒化之後的光學半導體裝置進行分選,一次可獲得複數個光學特性資訊,因此步驟得以簡化,生產效率提升。並且生產成本也隨之降低。 After that, the inner layer material of the yellow phosphor and the fluorenone resin (manufactured by Shin-Etsu Chemical Co., Ltd., trade name: KJR-9022) was applied by a distributor of a Musashi engineering machine, and then thermally cured at 150 ° C for 4 hours. An optical semiconductor element assembly substrate. Thereafter, a half-cut step of a dicing blade having a thickness of 0.4 mm was performed on the back surface of the produced collective substrate, and the energized portion was cut so that an electronic circuit in which 10 series of 20 optical semiconductor elements were connected in parallel was fabricated on the collective substrate. Optical connection information was obtained by connecting 50 mA to the connection surface of the energization probe provided on the outer peripheral portion of the collective substrate, and performing energization inspection by the integrating sphere. Thereafter, the collective substrate can be singulated in a full cutting step of a cutting blade of 0.2 mm, thereby obtaining 200 optical semiconductor devices sorted by optical characteristic information. Since it is not necessary to sort the optical semiconductor device after the single granulation, a plurality of optical characteristic information can be obtained at a time, so that the steps are simplified and the production efficiency is improved. And the production costs are also reduced.

(實施例5) (Example 5)

積層3層將包含作為金屬氧化物的氧化鋁(Admatechs(Admatechs Co.,Ltd.)製造:商品名AO-502)的 加成硬化型苯基改質矽組成物(信越化學工業製造)含浸於玻璃纖維中的每1片為70 μm的片材,將其作為基底,在其表面及底面上形成75 μm的銅層、及已對其表面施加Ni/Pd/Au的電鍍的金屬被覆層。之後,在蝕刻步驟中形成連接區域,以便製作具有通電部的印刷基板。之後,通過與實施例4同樣的轉注成型步驟、半切割步驟、通電檢查步驟、分選步驟及全切割步驟,獲得光學半導體裝置。由於無需對單粒化之後的光學半導體裝置進行分選步驟,一次可獲得複數個光學特性資訊,因此步驟得以簡化,生產效率提升。又,生產成本也隨之降低。 The build-up 3 layer will contain alumina as a metal oxide (manufactured by Admatechs (Admatechs Co., Ltd.): trade name AO-502) The addition-hardening type phenyl modified ruthenium composition (manufactured by Shin-Etsu Chemical Co., Ltd.) is a 70 μm sheet each of which is impregnated into glass fibers, and is used as a base to form a 75 μm copper layer on the surface and the bottom surface thereof. And a plated metal coating on which Ni/Pd/Au has been applied to the surface. Thereafter, a connection region is formed in the etching step to fabricate a printed substrate having an energization portion. Thereafter, an optical semiconductor device was obtained by the same transfer molding step, half-cut step, energization inspection step, sorting step, and full-cut step as in Example 4. Since it is not necessary to perform a sorting step on the optical semiconductor device after the single granulation, a plurality of optical characteristic information can be obtained at a time, so that the steps are simplified and the production efficiency is improved. In addition, production costs are also reduced.

(實施例6) (Example 6)

與實施例4所示的製造方法同樣地,製造使用垂直型光學半導體(立式)及倒裝晶片型光學半導體元件的光學半導體裝置。結果與實施例4同樣地,步驟得以簡化,生產效率提升。 An optical semiconductor device using a vertical optical semiconductor (vertical) and a flip chip type optical semiconductor element was produced in the same manner as the manufacturing method described in the fourth embodiment. As a result, in the same manner as in the fourth embodiment, the steps were simplified and the production efficiency was improved.

(實施例7) (Example 7)

使用焊錫,使實施例4中製作的光學半導體裝置與FR-4(外部基板)黏著。之後,對於光學半導體裝置與FR-4(外部基板)的黏著情況,進行熱衝擊試驗(愛斯佩克股份有限公司(Espec Corporation)製造TSE-11-A),調查在-40℃~150℃下,進行500次循環、1,000次循環時的通電情況。結果示於表5。如表5所示,可知光學半導體裝置保持與外部基板良好的黏著情況,也不會產生不亮燈。 The optical semiconductor device produced in Example 4 was adhered to FR-4 (external substrate) using solder. After that, the thermal shock test was performed on the adhesion of the optical semiconductor device to the FR-4 (external substrate) (TSE-11-A manufactured by Espec Corporation), and the investigation was carried out at -40 ° C to 150 ° C. Next, the energization was performed for 500 cycles and 1,000 cycles. The results are shown in Table 5. As shown in Table 5, it is understood that the optical semiconductor device maintains a good adhesion to the external substrate and does not cause a non-lighting.

[表5] [table 5]

(比較例3) (Comparative Example 3)

繼而,與實施例4同樣地製作光學半導體元件集合基板,只進行全切割步驟,而不進行半切割步驟、通電檢查步驟及分選步驟,因而製作光學半導體裝置。之後,通過黏著劑,使單粒化之後的光學半導體裝置排列於基板上,進行通電檢查,基於該光學特性資訊而分選。利用這種光半導體裝置的製造方法,步驟較為複雜,與實施例4比較,生產效率下降約20%。並且生產成本也增大。 Then, an optical semiconductor element assembly substrate was produced in the same manner as in Example 4, and only the full-cut step was performed without performing the half-cut step, the power-on inspection step, and the sorting step, thereby fabricating an optical semiconductor device. Thereafter, the optical semiconductor device after the singulation is arranged on the substrate by an adhesive, and the electric current inspection is performed, and the optical characteristic information is sorted based on the optical characteristic information. With such a manufacturing method of the optical semiconductor device, the steps are complicated, and the production efficiency is reduced by about 20% as compared with the fourth embodiment. And the production cost also increases.

另外,本發明並不限定於上述實施形態。上述實施形態為例示,具有與本發明的申請專利範圍所述的技術思想實質相同的結構,並發揮相同作用效果的技術方案,均包含在本發明的技術範圍內。 Further, the present invention is not limited to the above embodiment. The above-described embodiments are exemplified, and those having substantially the same configuration as the technical idea described in the claims of the present invention and exhibiting the same effects are included in the technical scope of the present invention.

3‧‧‧電性連接部 3‧‧‧Electrical connection

6‧‧‧反射體結構 6‧‧‧Reflect structure

10‧‧‧光學半導體裝置用封裝體 10‧‧‧Package for optical semiconductor devices

Claims (21)

一種光學半導體裝置用封裝體,其特徵在於:在將矽酮樹脂組成物含浸於纖維強化材料中並硬化而成的基台的頂面上,具有要與光學半導體元件電性連接的至少兩個電性連接部、及圍繞前述要連接的光學半導體元件的反射體結構。 A package for an optical semiconductor device, characterized in that at least two electrodes to be electrically connected to an optical semiconductor element are provided on a top surface of a base on which an fluorenone resin composition is impregnated and hardened in a fiber-reinforced material An electrical connection portion and a reflector structure surrounding the optical semiconductor element to be connected. 如請求項1所述的光學半導體裝置用封裝體,其中,前述纖維強化材料為玻璃纖維。 The package for an optical semiconductor device according to claim 1, wherein the fiber-reinforced material is glass fiber. 如請求項1所述的光學半導體裝置用封裝體,其中,前述基台是使用至少一層以上的半固化片硬化而成,該半固化片是將前述矽酮樹脂組成物含浸於前述纖維強化材料中。 The package for an optical semiconductor device according to claim 1, wherein the base is cured by using at least one or more prepregs, and the prepreg is impregnated with the fluorenone resin composition in the fiber reinforced material. 如請求項1所述的光學半導體裝置用封裝體,其中,前述矽酮樹脂組成物為縮合硬化型或加成硬化型矽酮樹脂組成物。 The package for an optical semiconductor device according to claim 1, wherein the fluorenone resin composition is a condensation hardening type or an addition curing type fluorenone resin composition. 如請求項1所述的光學半導體裝置用封裝體,其中,前述電性連接部是由至少一層金屬層所構成。 The package for an optical semiconductor device according to claim 1, wherein the electrical connection portion is composed of at least one metal layer. 如請求項1所述的光學半導體裝置用封裝體,其中,前述基台在底面上具有底面金屬被覆層。 The package for an optical semiconductor device according to claim 1, wherein the base has a bottom metal coating layer on the bottom surface. 如請求項6所述的光學半導體裝置用封裝體,其中,前述基台具有至少一個以上穿孔,前述頂面的電性連接部與前述底面金屬被覆層通過該穿孔而電性連接。 The package for an optical semiconductor device according to claim 6, wherein the base has at least one or more through holes, and the electrical connection portion of the top surface and the underlying metal coating layer are electrically connected by the through holes. 如請求項1所述的光學半導體裝置用封裝體,其中,前述反射體結構是由矽酮樹脂、環氧樹脂、及矽酮樹脂與環氧樹脂的雜化樹脂中的任一種成型而成。 The package for an optical semiconductor device according to claim 1, wherein the reflector structure is formed of any one of an oxime resin, an epoxy resin, and a hybrid resin of an oxime resin and an epoxy resin. 如請求項1所述的光學半導體裝置用封裝體,其中,前述基台在25℃、1 GHz下的相對介電常數為5.0以下。 The package for an optical semiconductor device according to claim 1, wherein the base has a relative dielectric constant of 5.0 or less at 25 ° C and 1 GHz. 一種光學半導體裝置用封裝體的製造方法,是製造光學半導體裝置用封裝體的方法,其特徵在於具有以下步驟:基台製作步驟,製作將矽酮樹脂組成物含浸於纖維強化材料中並硬化而成的基台;頂面金屬被覆層形成步驟,在該基台頂面上,形成頂面金屬被覆層;電性連接部形成步驟,將該頂面金屬被覆層形成於要與光學半導體元件電性連接的至少兩個電性連接部上;及,反射體結構成型步驟,在具有該電性連接部之前述基台上,利用轉注成型或射出成型,以圍繞前述要連接的光學半導體元件的方式,將反射體結構成型。 A method for producing a package for an optical semiconductor device, which is a method for producing a package for an optical semiconductor device, comprising the steps of: fabricating a ketone resin composition and impregnating the fiber reinforced material by a step of fabricating a base a base metal; a top metal coating layer forming step, forming a top metal coating layer on the top surface of the base; and an electrical connection forming step of forming the top metal coating layer to be electrically connected to the optical semiconductor component And at least two electrical connection portions of the connection; and a reflector structure forming step, on the aforementioned base having the electrical connection portion, by transfer molding or injection molding to surround the optical semiconductor component to be connected In a way, the reflector structure is shaped. 如請求項10所述的光學半導體裝置用封裝體的製造方法,其中,在前述電性連接部形成步驟後且前述反射體結構成型步驟前,具有表面處理步驟,該表面處理步驟是對前述基台的表面進行電漿處理及/或紫外線臭氧處理。 The method of manufacturing a package for an optical semiconductor device according to claim 10, further comprising a surface treatment step after the step of forming the electrical connection portion and before the step of forming the reflector structure, the surface treatment step being The surface of the stage is subjected to plasma treatment and/or ultraviolet ozone treatment. 一種光學半導體裝置,是在如請求項1至請求項9中的任一項所述的光學半導體裝置用封裝體上,承載光學半導體元件而製造出來。 An optical semiconductor device manufactured by carrying an optical semiconductor element on a package for an optical semiconductor device according to any one of claims 1 to 9. 一種光學半導體裝置的製造方法,是製造光學半導體裝置的方法,其特徵在於具有以下步驟:構裝步驟,在具有通電部之基板上構裝複數個光學半導體元件,因而獲得光學半導體元件集合基板;半切割步驟,將前述光學半導體元件集合基板半切 割,因而切斷前述通電部的一部分,以便在前述光學半導體元件集合基板內製作通電檢查用電子電路;通電檢查步驟,對該通電檢查用電子電路進行通電檢查,以便獲得每一前述光學半導體元件的光學特性資訊;分選步驟,使用該光學特性資訊,分選前述光學半導體元件;及,全切割步驟,在前述半切割步驟的切斷線上進行全切割,藉此將前述光學半導體元件集合基板分割為各個前述光學半導體裝置,因而獲得利用前述光學特性資訊而分選後的複數個前述光學半導體裝置。 A method of manufacturing an optical semiconductor device, characterized in that the method of manufacturing an optical semiconductor device has the following steps: a step of constructing a plurality of optical semiconductor elements on a substrate having an energizing portion, thereby obtaining an optical semiconductor element collecting substrate; a half-cutting step of half-cutting the aforementioned optical semiconductor element assembly substrate After cutting, a part of the energization portion is cut so as to form an electric circuit for conducting electric current inspection in the optical semiconductor element assembly substrate, and an electric current inspection step is performed to perform electric current inspection on the electric current inspection electronic circuit to obtain each of the foregoing optical semiconductor elements. Optical characteristic information; a sorting step of sorting the optical semiconductor element using the optical characteristic information; and a full cutting step of performing full cutting on the cut line of the half-cutting step, thereby concentrating the optical semiconductor element Since the substrate is divided into the respective optical semiconductor devices, a plurality of the optical semiconductor devices separated by the optical characteristic information are obtained. 如請求項13所述的光學半導體裝置的製造方法,其中,在前述通電檢查步驟中,使用光學特性檢測裝置進行通電檢查。 The method of manufacturing an optical semiconductor device according to claim 13, wherein in the energization inspection step, the optical characteristic inspection device is used to perform the energization inspection. 如請求項13所述的光學半導體裝置的製造方法,其中,在前述通電檢查步驟中,與每一前述光學半導體元件對應地配置光學特性檢測用光學透鏡,並獲得前述光學特性資訊。 The optical semiconductor device manufacturing method according to claim 13, wherein in the energization inspection step, an optical characteristic detecting optical lens is disposed corresponding to each of the optical semiconductor elements, and the optical characteristic information is obtained. 如請求項13所述的光學半導體裝置的製造方法,其中,作為具有前述通電部之基板,使用在金屬框架上將樹脂轉注成型而成的基板、或在印刷基板上將樹脂轉注成型而成的基板。 The method of manufacturing an optical semiconductor device according to claim 13, wherein the substrate having the current-carrying portion is formed by transferring a resin onto a metal frame or by transferring a resin onto a printed substrate. Substrate. 如請求項16所述的光學半導體裝置的製造方法,其中,使用前述金屬框架在前述半切割步驟中所切斷的部分中具有溝槽之基板,作為在前述金屬框架上將樹脂轉注成型而成的基板。 The method of manufacturing an optical semiconductor device according to claim 16, wherein the substrate having the groove in the portion cut by the metal frame in the half-cutting step is used as a resin injection molding on the metal frame. The substrate. 如請求項16所述的光學半導體裝置的製造方法,其中,使用在積層3層以上的纖維強化材料中含浸有樹脂而成的基板,作為前述印刷基板。 The method of producing an optical semiconductor device according to claim 16, wherein a substrate obtained by impregnating a fiber-reinforced material having three or more layers of a resin is used as the printed circuit board. 如請求項13所述的光學半導體裝置的製造方法,其中,在前述全切割步驟中,使用與前述半切割步驟中所使用的切割刀片寬度不同寬度的切割刀片。 The method of manufacturing an optical semiconductor device according to claim 13, wherein in the above-described full cutting step, a cutting blade having a width different from that of the cutting blade used in the above-described half-cutting step is used. 如請求項13所述的光學半導體裝置的製造方法,其中,在前述半切割步驟中,製作前述通電檢查用電子電路,該通電檢查用電子電路具有連接前述通電檢查步驟中使用的電源探針的連接面。 The method of manufacturing an optical semiconductor device according to claim 13, wherein in the half-cutting step, the electronic circuit for energization inspection is provided, and the electronic circuit for conducting current inspection has a power supply probe connected to the power-on inspection step. Connection surface. 一種光學半導體裝置,其特徵在於:由如請求項13至請求項20中的任一項所述的光學半導體裝置的製造方法製造而成。 An optical semiconductor device manufactured by the method of manufacturing an optical semiconductor device according to any one of claims 13 to 20.
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