TW201332084A - 三維封裝裝置 - Google Patents
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Abstract
提供一種可更加提升半導體製造元件製造之產率,且可防止所製造之半導體元件品質之降低的三維封裝裝置。三維封裝裝置中,搬送托盤係具有分別含配置面的8個內側托盤,且搬送各配置面所配置之8個層積晶片,腔室係收納所有的內側托盤,複數下部台各自於腔室內中載置各自複數內側托盤,複數夾具各自於腔室內以一對一對應於配置面所配置之層積晶片而加以配設,各下部台及各複數夾具係以填塞各下部台及各複數夾具之間的方式來加以移動。
Description
本發明係關於一種層積複數晶片之三維封裝裝置。
近年來,為了降低半導體元件之記憶體使用量(footprint),已開發出有將複數IC基板(晶片)加以層積來製造半導體元件之三維封裝方法。此三維封裝方法係將各晶片中形成有將該晶片於厚度方向加以貫穿之導體所構成之配線(例如TSV(Through Silicon Via)),將一晶片之配線端部所形成之電極墊與另一晶片之配線端部所形成之焊料墊加以接合來三維地形成電路。三維封裝方法已知有COW(Chip On Wafer)工法或COC(Chip On Chip)工法等。任一工法中,均已知有為了防止所層積之晶片位移,係在各晶片彼此正式接合之前將各晶片彼此暫時接合,將暫時接合後之複數晶片彼此藉由回焊(reflow)來正式接合(例如,參照專利文獻1)。
此三維封裝方法中,係在1個腔室,例如回焊爐內將構成半導體元件之已層積晶片組(以下稱為「層積晶片」)一個個地回焊,但從產率提升之觀點來看,1個層積晶片的回焊要在數秒內進行,而用以回焊的層積晶片之加熱及回焊後的層積晶片之冷卻亦會被急速地加以進行。
專利文獻1:日本特開2009-110995號公報
但是,由於1個層積晶片之回焊已係在數秒內進行,要在此以上地將進行回焊的時間縮短來提升產率便有困難。又,層積晶片的急速加熱及急速冷卻,由於焊料的熔融形態、
凝固形態並不穩定,故所製造之半導體元件的焊料結晶狀態便無法為理想狀態,凝固後的焊料會產生殘留應力,而容易使得焊料中發生氣泡(VOID),而有降低層積晶片所製造之半導體元件品質之問題。
本發明之課題在於提供一種可更加提升半導體元件製造之產率,且可防止所製造之半導體元件品質之降低的三維封裝裝置。
為解決上述課題,依本發明樣態係提供一種三維封裝裝置,係具備有:搬送部,係具有基部,及構成為從該基部可分離且各自具有平面所構成之配置面的複數分離部,該複數分離部各自的該配置面係一個個配置有為層積複數晶片所構成的晶片組之層積晶片,而搬送各該配置面所配置之各該層積晶片;收納室,係收納該複數分離部;複數載置部,係於該收納室內,將該複數分離部加以載置;以及複數按壓部,係於該收納室內,對向於該複數載置部所載置之該複數分離部的該配置面所配置之各該層積晶片;其中該複數載置部各自及該複數按壓部各自係分別內建有加熱裝置及冷卻裝置;該複數載置部各自係以一對一對應於該複數分離部各自來加以配設;該複數按壓部各自係以一對一對應於各該配置面所配置之各該層積晶片各自來加以配設;該複數載置部及該複數按壓部之至少一者係以填塞該複數載置部及該複數按壓部之間的方式來加以移動。
本發明樣態中,較佳地,該複數按壓部各自係具有與該
層積晶片上面相接之相接部以及支撐該相接部之支撐部;該支撐部具有球切狀之凹部,該相接部具有球切狀之凸部,該凸部係嵌合於該凹部來使得該相接部被組裝於該支撐部。
本發明樣態中,較佳地,該按壓部的該相接部之與該層積晶片的相接面在傾斜的情況,係將該相接部按壓於具有水平面之構件來將該相接面成為水平。
本發明樣態中,較佳地,該收納室可分割為上部及下部;該搬送部之該基部係負荷有用以將該搬送部移動於既定方向之移動力;在該收納室內對該複數分離部之該配置面所配置之各該層積晶片施加處理後,該搬送部在移動於該既定方向之際,該收納室會被加以分割而從該搬送部之移動路徑來加以退出。
本發明樣態中,較佳地,該複數分離部被收納於該收納室之際,該基部會被夾置於該收納室之上部及下部,且該複數分離部會從該被夾置之基部分離。
依本發明,由於載置有各自具有將層積晶片1個個配置之配置面的複數分離部之複數載置部,以及與複數分離部之配置面所配置之各層積晶片對向之複數按壓部的至少一者會以填塞複數載置部及複數按壓部之間的方式來加以移動,而複數載置部各自及複數按壓部各自係分別內建有加熱裝置,故複數分離部所配置之複數層積晶片會同時地被按壓且加熱。其結果,便可同時地製造複數半導體元件,可更加提升製造1個半導體元件時的產率。又,由於製造1個半導體元件時的產率可更加提升,故可充
分確保進行層積晶片之加熱或冷卻的時間,而可穩定焊料的熔融形態、凝固形態。其結果,便可防止所製造之半導體元件品質的降低。
又,由於複數載置部各自係以一對一對應於複數分離部各自來加以配設,複數按壓部各自係以一對一對應於各配置面所配置之各層積晶片各自來加以配設,故可將各層積晶片由其他層積晶片獨立地來加以按壓,縱使各層積晶片之高度相異,亦可確實地按壓各層積晶片。其結果,便可防止所製造之各半導體元件之品質差異的產生。
以下,就本發明實施形態參照圖式來加以說明。
首先,就本發明實施形態相關之三維封裝裝置來加以說明。
圖1係顯示本發明實施形態相關之三維封裝裝置及晶片之層積裝置的配置狀態的俯視圖。另外,圖1中,為了簡單進行說明,係顯示層積裝置及三維封裝裝置均將上部機構加以去除之狀態。
圖1中,晶片之層積裝置10及三維封裝裝置11係配置成一列,層積裝置10及三維封裝裝置11間係張設有輸送帶12。層積裝置10係具備有:晶片載置處15,係載置有將複數IC電路(晶片)加以並排之切割膜(DICING FILM)14;搬送托盤16(搬送部),係被支撐於搬送帶12;拾取單元17,係將晶片13加以移動;浸漬單元18,係充滿有焊料膏;照相機單元19,係拍攝拾取單元17所拾取之晶片13下面;以及工
具交換單元20,係載置有對應於晶片13種類來交換的拾取單元17之各種工具。
層積裝置10中,拾取單元17會從晶片載置處15將1個晶片13拾起而朝浸漬單元18移動,將晶片13下面浸漬於焊料膏來將焊料膏附著於該下面,進一步地,將晶片13朝照相機單元19移動來拍攝晶片13下面,以確認該下面所附著之焊料膏狀態。之後,將晶片13朝搬送托盤16移動而重疊於已配置於該搬送托盤16上之其他晶片16上。藉此,搬送托盤16上,便構成有層積複數晶片13後之晶片組(以下稱為「層積晶片」)21。本實施形態中,係構成為於搬送托盤16上有8個層積晶片21。
搬送托盤16係由對應於8個層積晶片21所設置之方形不鏽鋼板所構成的8個內側托盤16a(分離部)、包圍該內側托盤16a而由不鏽鋼板所構成之外側托盤16b(基部)、包圍該外側托盤16b之框狀的框16c(基部)所構成。搬送托盤16中,外側托盤16b係設有8個方形貫穿孔,於該貫穿孔一個個處係一個個插嵌有內側托盤16a。各內側托盤16a外周緣部係載置於外側托盤16b之各貫穿孔之內緣部,而內側托盤16a及外側托盤16b並未相互固定,外側托盤16b之外緣部係載置於框16c,而外側托盤16b及框16c並未相互固定(參照圖3等)。各內側托盤16a各自為表面之配置面16aa係一個個配置有層積晶片21,框16c係連結有輸送帶12,該輸送帶12係藉由朝三維封裝裝置11對框16c施加驅動力,來使得搬送托盤16從層積裝置10朝三維封裝裝置11移動。
朝三維封裝裝置11移動後之搬送托盤16中,內側托盤16a會被收納於腔室27,而在該腔室27內對各層積晶片21施以回焊處理。三維封裝裝置11之詳細構成、作用將於後述。
圖2A及圖2B係概略顯示圖1之三維封裝裝置施以回焊處理之層積晶片構成的剖視圖,圖2A係顯示施以回焊處理前之構成,圖2B係顯示施以回焊處理後之構成。
如圖2A所示,層積晶片21係於最下方所配置之基底晶片22層積複數晶片13所構成。基底晶片22上面係形成有複數電極墊23,各晶片13下面則形成有複數焊料墊24,且以避開該焊料墊24之方式形成有擋件25,另一方面,晶片13上面形成有複數電極墊26。晶片13下面的焊料墊24係藉由晶片13下面所附著之焊料膏所形成。又,各焊料墊24表面係形成有助焊劑(未圖示)的層。各晶片13之下面的焊料墊24係與上面之電極墊26藉由於厚度方向貫穿該晶片13之配線(例如TSV(未圖示))來加以連接。
構成層積晶片21之際,係以將晶片13下面之各焊料墊24相接於基底晶片22上面之各電極墊23之方式,來將晶片13朝基底晶片22重疊,進一步地,以將其他晶片13下面之各焊料墊24相接於晶片13上面之各電極墊26之方式,來將晶片13朝基底晶片22重疊,之後,便反覆操作晶片13之堆疊。此時,由於電極墊26及焊料墊24之厚度總計會較擋件25之厚度要大,故對層積晶片21施以回焊處理前,下面的晶片13之上面並不會與上面的晶片13之擋件25相接。
另一方面,對層積晶片21施以回焊處理時,上面晶片
13之焊料墊24會熔融而與下面晶片13之電極墊26接合,但此時,焊料墊24的形狀會崩塌,故上面晶片13會朝下面晶片13下沉,使得上面晶片13之擋件25相接於下面晶片13的上面(圖2B)。藉此,來從層積晶片21製造半導體元件。
圖3係沿圖1之線III-III的剖視圖,係概略表示圖1中三維封裝裝置的構成。
圖3中,三維封裝裝置11係具備有:腔室27(收納室),係收納搬送托盤16之各內側托盤16a;複數台狀之下部台28(載置部),係藉由從腔室27底部朝上方所立設之複數桿41所加以支撐;複數略圓柱狀夾具29(按壓部),係於腔室27之頂部中對向於各下部台28而加以配設;以及排氣管30,係將腔室27內之氣體排出而調整腔室27內之壓力。除該等之外,三維封裝裝置11尚具備真空泵、壓力計、流量計、調節器(regulator)等,或連接於該等機器。
腔室27可分割為上部27a及下部27b,腔室27於分割之際,下部27b係從三維封裝裝置11之基部31透過支柱(pillar)32而被加以支撐。下部27b側壁之頂部係形成有朝外側之凸緣27ba,從下部27b底部至凸緣27ba上面之高度係較從下部27b底部至為各下部台28上面之載置面28a的高度要低。下部台28係內建有台加熱器(加熱裝置)及散熱用熱槽(冷卻裝置)(均未圖示)。又,複數下部台28各自係以一對一對應於複數內側托盤16a各自來加以配設。亦即,三維封裝裝置11係具備有8個下部台28。複數下部台28各自之載置面28a係載置有1個內側托盤16a,載置面28a係被維持於水
平。
腔室27之上部27a係從基部31所立設之支柱部35而被固定的頂部36透過桿體37而藉由腔室致動器38被加以吊設,該腔室致動器38會調整桿體37之突出量來控制上部27a之上下方向的移動。又,上部27a側壁之外側係配置有控制朝下方突出之L字型鈎體44之突出量及旋轉的鈎體致動器45。
複數夾具29各自係以一對一對應於下部台28所載置之內側托盤16a的配置面所配置之1個層積晶片21而被加以配設,如圖4所示,係具有:夾具頭(相接部),係具有與層積晶片21上面相接之夾具面29a(相接面);以及夾具基台29c(支撐部),係支撐該夾具頭29b;夾具頭29b係內建有夾具加熱器(加熱裝置)及散熱用熱槽(冷卻裝置)(均未圖示)。
夾具頭29b於夾具面29a之相反側係具有球切狀之凸部29d,夾具基台29c係具有球切狀之凹部29e,該凹部29e係嵌合有凸部29d。本實施形態中,凹部29e之曲率半徑係設定為較凸部29d之曲率半徑稍大,故凸部29d朝凹部29e嵌合,且凸部29d能沿著凹部29e內之該凹部29e的球切表面而動作。藉此,夾具頭29b便能相對於夾具基台29c而自由地改變方向。又,各夾具29係從上部27a之頂部藉由桿體42而被加以吊設,並被固定於該頂部,且藉由控制桿體42之突出量的夾具致動器43來控制上下方向的移動。
本實施形態中,腔室致動器38、夾具致動器43以及鈎體致動器45係分別內建有作為動力源之電氣馬達(未圖示),
藉由該電氣馬達來控制桿體37,42或鈎體44之突出量。另外,各致動器作為動力源不一定為電氣馬達,亦可為內建汽缸或電磁簧等。
圖5A~圖5C係顯示以圖4夾具按壓層積晶片樣子之工序圖。
首先,桿體42會因夾具致動器43連續伸出而使得夾具29相接於配置面16aa上之層積晶片21,但圖5A所示,在夾具29之夾具面29a係水平,而另一方面,層積晶片21之上面卻是傾斜的情況,要將夾具面29a維持水平地來藉由夾具29適當地按壓層積晶片21便有所困難。
但是,如上述般,夾具頭29b由於可自由地改變相對於夾具基台29c之方向,故當夾具面29a接觸至層積晶片21上面時,如圖5B所示,夾具頭29b的夾具面29a整面便會以均勻地相接層積晶片21上面之方式來改變方向。藉此,由於可均勻地將按壓力負荷於層積晶片21上面,故可適當地按壓層積晶片21,而可獲得經適當按壓後之層積晶片21(圖5C)。
又,在按壓如圖5A所示之上面有傾斜之層積晶片21後,由於夾具頭29b之夾具面29a仍是維持傾斜,在接著按壓之層積晶片21上面為水平的情況,在按壓工序初期便有無法適當地按壓層積晶片21的情事。
本實施形態中,對應於此,在夾具頭29b之夾具面29a為傾斜之情況,係在按壓層積晶片21前將該夾具面29a回歸成水平。
圖6A~圖6C係顯示將圖4夾具的夾具頭之夾具面回歸
水平處理之工序圖。
首先,將搬送托盤16從腔室27搬出後,並不是將新的搬送托盤16搬送至該腔室27,而是將各下部台28之載置面28a對向於夾具面29a已傾斜之各夾具29(圖6A)。
接著,藉由夾具致動器43將夾具29下降來相接於載置面28a。此時,係以夾具面29a密接於載置面28a之方式來改變與載置面28a相接之夾具頭29b的方向,但由於載置面28a係維持於水平,故夾具面29a亦會回歸成水平(圖6B)。
接著,藉由夾具致動器43將夾具29上升來從載置面28a分離(圖6C)。
因此,在夾具29之夾具面29a傾斜的情況,藉由實行圖6A~圖6C之處理,便可將夾具面29a回歸成水平,從而,縱使是在按壓上面傾斜之層積晶片21後,而按壓上面為水平之層積晶片21的情況,均可是適當地按壓任何層積晶片21。
另外,圖6A~圖6C之處理中,雖係將夾具29之夾具面29a相接於下部台28之載置面28a,但亦可為將具有水平面之構件朝腔室27搬入而載置於各下部台28,再將夾具面29朝該構件之水平面相接來將該夾具面29a成為水平。
三維封裝裝置11中,在腔室27被分割為上部27a及下部27b之際,係藉由輸送帶12使得搬送托盤16被搬入上部27a及下部27b之間,被搬入之搬送托盤16係以複數內側托盤16a各自會對向於複數下部台28各自之方式來調整位置。本實施形態中,各內側托盤16a之大小係設定為可將所有內側托盤16a全部收納於腔室27內,藉此,搬送托盤16被搬
入上部27a及下部27b之間時,腔室27之上部27a側壁部及下部27b側壁部之間便會存在有外側托盤16b。又,本實施形態中,各下部台28之大小係設定為較內側托盤16a要小。
接著,就圖3之三維封裝裝置所實行之層積晶片之三維封裝方法加以說明。
圖7A及圖7B、圖8A及圖8B、以及圖9A及圖9B係分別用以說明圖3之三維封裝裝置所實行之層積晶片之三維封裝方法工序之圖。
首先,如圖7A所示,在搬送托盤16被搬送至上部27a及下部27b之間後,腔室致動器38會將腔室27之上部27a下降使得L字型的鈎體44前端位於較下部27b之凸源27ba要更下方處。之後,如圖7B所示,鈎體致動器45會將L字型之鈎體44加以旋轉使得該鈎體44前端之L字部朝凸緣27ba卡合。
接著,如圖8A所示,鈎體致動器45會藉由將L字型之鈎體44的突出量變少來將腔室27之下部27b上提至該下部27b之凸緣27ba相接至外側托盤16b。此時,從下部27b底部至凸緣27ba上面之高度係較從下部27b底部至各下部台28之載置面28a的高度要低,故各下部台28之載置面28a在與凸緣27ba之外側托盤16b相接前,便會與各內側托盤16b相接,但如上所述,各內側托盤16a及外側托盤16b並未相互固定,且各下部台28係較各內側托盤16a要小,故僅有各內側托盤16a會被載置於各下部台28,而藉由各下部台28被上提來從外側托盤16b分離。各下部台28之載置面28a
由於維持於水平,故載置面28a所載置之各內側托盤16a之配置面16aa亦為水平。又,各內側托盤16a係藉由真空吸附或靜電吸附而被吸附於各下部台28之載置面28a。
接著,如圖8B所示,在下部27b之凸緣27ba相接於外側托盤16b後,亦藉由鈎體致動器45將下部27b持續上提,並且腔室致動器38會將腔體27之上部27a下降來將外側托盤16b夾置於下部27b之側壁部及上部27a之側壁部之間,而將腔室27由外部加以密閉。此時,外側托盤16b會藉由凸緣27ba被上提而從框16c分離。
接著,如圖9A所示,藉由各夾具致動器43將各夾具29下降,各夾具29會藉由夾具面29a以既定壓力來按壓各配置面16aa所配置之複數層積晶片21。又,此時,藉由排氣管30來將腔室27內真空吸引而減壓,讓夾具頭29b內之夾具加熱器及下部台28內之台加熱器發熱而加熱各層積晶片21以對各層積晶片21施以回焊處理。藉此,各層積晶片21之各焊料墊24便會熔融而與各電極墊26接合來製造半導體元件。
由各層積晶片21來製造半導體元件後,如圖9所示,藉由夾具致動器43將夾具29上提,藉由腔室致動器38將腔室27之上部27a上提,進一步地,藉由鈎致動器45將鈎體44旋轉而解除腔室27之下部27b的凸緣27ba與鈎體44之前端的L字部之卡合來將下部27b降下。藉此,將腔室27分割為上部27a及下部27b來從搬送托盤16之移動路徑退出,並將外側托盤16b朝框16c載置,而將內側托盤16a朝外側托
盤16b載置。
之後,藉由輸送帶12將搬送托盤16移動而從上部27a及下部27b之間搬出來結束本處理。
上述之三維封裝裝置11中,載置有各自具有配置一個個複數層積晶片21之配置面16aa的複數內側托盤16a之複數下部台28以及各自具有夾具面29a之各夾具29係以填塞各下部台28及各夾具29之間的方式加以移動,各下部台28及各夾具29係分別內建有台加熱器、夾具加熱器,故配置於複數載置面16aa之複數層積晶片21會同時地被按壓且加熱來施以回焊處理。其結果,可同時地製造複數半導體元件,可進一步地提升每一個半導體元件之製造產率。又,由於每一個半導體元件之製造產率進一步地加以提升,故可充分地確保進行層積晶片21之加熱及冷卻的時間,進而可穩定焊料的熔融形態、凝固形態。其結果,可防止所製造之半導體元件品質的降低。
上述三維封裝裝置11中,複數下部台28各自係以一對一對應於複數內側托盤16a各自來加以配設,複數夾具29各自係以一對一對應於複數配置面16aa所配置之複數層積晶片21各自來加以配設,故可將各層積晶片21從其他層積晶片21獨立來加以按壓,縱使各層積晶片21之高度有異,仍可確實地按壓各層積晶片21。藉此,可防止所製造之半導體元件品質差異的產生。
又,三維封裝裝置11中,內側托盤16a在收納於腔室27之際,各內側托盤16a會從被夾置於腔室27之上部27a
及下部27b之間的外側托盤16b分離,故各內側托盤16a不會受限於外側托盤16b,而會藉由夾具29及下部台28來被按壓。其結果,可確實地按壓複數配置面16aa所配置之複數層積晶片21。
再者,三維封裝裝置11中,在腔室內對配置面16aa所配置之複數層積晶片21施以回焊處理後,搬送托盤16在移動之際,腔室27會被分割而從搬送托盤16之移動路徑退出,故可在複數半導體元件直接配置在複數配置面16aa下來讓搬送托盤16移動。其結果,可更加提升半導體元件之製造產率。
又,三維封裝裝置11中,對各層積晶片21施以回焊處理之際,由於腔室27內會被真空吸引而減壓,故可在低氧狀態下進行焊料墊24及電極墊26之熔融接合,進而可防止電極墊26的氧化。又,可促進各焊料墊24表面之助焊劑的蒸發,且可去除熔融焊料墊24中所產生氣泡。另外,為了促進移行至低氧狀態,亦可於腔室27設置N2導入口,在回焊處理之際,將N2氣體導入至腔室27內。
以上,雖已就本發明使用上述實施形態加以說明,但本發明不限定於上述實施形態。
上述實施形態中,雖係於1個搬送托盤16載置8個層積晶片21,在三維封裝裝置11中對8個層積晶片21同時施以回焊處理,但搬送托盤數量不限於1個,例如圖10所示,亦可設有2個搬送托盤48,於各搬送托盤48分別載置4個層積晶片,於對應各搬送托盤48所設置之三維封裝裝置之2
個腔室49各自同時地收納4個層積晶片21來施以回焊處理。
又,三維封裝裝置11亦可具備有在按壓層積晶片21之際,可檢出夾具致動器43對層積晶片21所施加之荷重的荷重檢出機構(未圖示),基於該荷重檢出機構所檢出之荷重,為了穩定夾具致動器43所施加之荷重而控制夾具致動器43之動力源。
10‧‧‧層積裝置
11‧‧‧三維封裝裝置
12‧‧‧輸送帶
13‧‧‧晶片
16‧‧‧搬送托盤
16a‧‧‧內側托盤
16aa‧‧‧配置面
16b‧‧‧外側托盤
16c‧‧‧框
21‧‧‧層積晶片
27‧‧‧腔室
27a‧‧‧上部
27b‧‧‧下部
28‧‧‧下部台
29‧‧‧夾具
29a‧‧‧夾具面
29b‧‧‧夾具頭
29c‧‧‧夾具基台
圖1係顯示本發明實施形態相關之三維封裝裝置及晶片之層積裝置的配置狀態的俯視圖。
圖2A係概略顯示圖1之三維封裝裝置施以回焊處理之層積晶片構成的剖視圖,為顯示施以回焊處理前構成之圖。
圖2B係概略顯示圖1之三維封裝裝置施以回焊處理之層積晶片構成的剖視圖,為顯示施以回焊處理後構成之圖。
圖3係沿圖1之線III-III的剖視圖。
圖4係概略顯示圖3之夾具構成之放大剖視圖。
圖5A係顯示以圖4夾具按壓層積晶片樣子之工序圖。
圖5B係顯示以圖4夾具按壓層積晶片樣子之工序圖。
圖5C係顯示以圖4夾具按壓層積晶片樣子之工序圖。
圖6A係顯示將圖4夾具的夾具頭之夾具面回歸水平處理之工序圖。
圖6B係顯示將圖4夾具的夾具頭之夾具面回歸水平處理之工序圖。
圖6C係顯示將圖4夾具的夾具頭之夾具面回歸水平處理之工序圖。
圖7A係用以說明圖3之三維封裝裝置所實行之層積晶片之三維封裝方法工序之圖。
圖7B係用以說明圖3之三維封裝裝置所實行之層積晶片之三維封裝方法工序之圖。
圖8A係用以說明圖3之三維封裝裝置所實行之層積晶片之三維封裝方法工序之圖。
圖8B係用以說明圖3之三維封裝裝置所實行之層積晶片之三維封裝方法工序之圖。
圖9A係用以說明圖3之三維封裝裝置所實行之層積晶片之三維封裝方法工序之圖。
圖9B係用以說明圖3之三維封裝裝置所實行之層積晶片之三維封裝方法工序之圖。
圖10係顯示設有2個搬送托盤情況的俯視圖。
10‧‧‧層積裝置
11‧‧‧三維封裝裝置
12‧‧‧輸送帶
13‧‧‧晶片
14‧‧‧切割膜
15‧‧‧晶片載置處
16‧‧‧搬送托盤
16a‧‧‧內側托盤
16b‧‧‧外側托盤
16c‧‧‧框
17‧‧‧拾取單元
18‧‧‧浸漬單元
19‧‧‧照相機單元
20‧‧‧工具交換單元
21‧‧‧晶片組
27‧‧‧腔室
Claims (5)
- 一種三維封裝裝置,係具備有:搬送部,係具有基部,及構成為從該基部可分離且各自具有平面所構成之配置面的複數分離部,該複數分離部各自的該配置面係一個個配置有為層積複數晶片所構成的晶片組之層積晶片,而搬送各該配置面所配置之各該層積晶片;收納室,係收納該複數分離部;複數載置部,係於該收納室內,將該複數分離部加以載置;以及複數按壓部,係於該收納室內,對向於該複數載置部所載置之該複數分離部的該配置面所配置之各該層積晶片;其中該複數載置部各自及該複數按壓部各自係分別內建有加熱裝置及冷卻裝置;該複數載置部各自係以一對一對應於該複數分離部各自來加以配設;該複數按壓部各自係以一對一對應於各該配置面所配置之各該層積晶片各自來加以配設;該複數載置部及該複數按壓部之至少一者係以填塞該複數載置部及該複數按壓部之間的方式來加以移動。
- 如申請專利範圍第1項之三維封裝裝置,其中該複數按壓部各自係具有與該層積晶片上面相接之相接部以及支撐該相接部之支撐部; 該支撐部具有球切狀之凹部,該相接部具有球切狀之凸部,該凸部係嵌合於該凹部來使得該相接部被組裝於該支撐部。
- 如申請專利範圍第2項之三維封裝裝置,其中該按壓部的該相接部之與該層積晶片的相接面在傾斜的情況,係將該相接部按壓於具有水平面之構件來將該相接面成為水平。
- 如申請專利範圍第1項之三維封裝裝置,其中該收納室可分割為上部及下部;該搬送部之該基部係負荷有用以將該搬送部移動於既定方向之移動力;在該收納室內對該複數分離部之該配置面所配置之各該層積晶片施加處理後,該搬送部在移動於該既定方向之際,該收納室會被加以分割而從該搬送部之移動路徑來加以退出。
- 如申請專利範圍第1項之三維封裝裝置,其中該複數分離部被收納於該收納室之際,該基部會被夾置於該收納室之上部及下部,且該複數分離部會從該被夾置之基部分離。
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