TW201330036A - Device and method for manufacturing device - Google Patents
Device and method for manufacturing device Download PDFInfo
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- TW201330036A TW201330036A TW101148449A TW101148449A TW201330036A TW 201330036 A TW201330036 A TW 201330036A TW 101148449 A TW101148449 A TW 101148449A TW 101148449 A TW101148449 A TW 101148449A TW 201330036 A TW201330036 A TW 201330036A
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- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 238000000034 method Methods 0.000 title claims description 4
- 239000003990 capacitor Substances 0.000 claims abstract description 205
- 239000002346 layers by function Substances 0.000 claims abstract description 79
- 239000010410 layer Substances 0.000 claims description 239
- 239000000758 substrate Substances 0.000 claims description 119
- 229910052751 metal Inorganic materials 0.000 claims description 28
- 239000002184 metal Substances 0.000 claims description 28
- 230000000149 penetrating effect Effects 0.000 claims description 20
- 238000005520 cutting process Methods 0.000 claims description 12
- 239000007784 solid electrolyte Substances 0.000 claims description 12
- 238000005507 spraying Methods 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims 1
- 230000035515 penetration Effects 0.000 claims 1
- 238000004806 packaging method and process Methods 0.000 abstract description 3
- 239000011347 resin Substances 0.000 description 42
- 229920005989 resin Polymers 0.000 description 42
- 239000010408 film Substances 0.000 description 24
- 230000002093 peripheral effect Effects 0.000 description 12
- 238000000465 moulding Methods 0.000 description 9
- 239000007787 solid Substances 0.000 description 8
- 238000009413 insulation Methods 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 239000012792 core layer Substances 0.000 description 4
- 238000009434 installation Methods 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 239000011888 foil Substances 0.000 description 3
- 238000001465 metallisation Methods 0.000 description 3
- 238000007789 sealing Methods 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- 238000005452 bending Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000000889 atomisation Methods 0.000 description 1
- 239000003985 ceramic capacitor Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000003595 mist Substances 0.000 description 1
- 229920000767 polyaniline Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 229920000128 polypyrrole Polymers 0.000 description 1
- 229920000123 polythiophene Polymers 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000013585 weight reducing agent Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
- H01G9/26—Structural combinations of electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices with each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
- H01G9/004—Details
- H01G9/008—Terminals
- H01G9/012—Terminals specially adapted for solid capacitors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
本發明係有關內建有電容器元件的裝置。 The present invention relates to a device having a built-in capacitor element.
在日本國特許公開2003-264125號公報中記載著:提供一種晶片狀固態電解電容器,係在連接電容器元件和導線架的凸部時有高度不同的情形,在没有製造用以緩和陽極基體的彎曲之高價的金屬模之下為避免陽極基體彎曲而在導線架的凸部設置階差,獲得成本便宜、漏洩電流值良好的晶片狀固態電解電容器。此文獻所記載的晶片狀固態電解電容器為,表面具有介電體氧化皮膜層的平板狀的閥作用金屬所構成的陽極基體,其端部設為陽極部,於此陽極基體的剩餘部份的前述介電體氧化皮膜層上依序設置半導體層,其上設置導電體層而成的固態電解電容器元件被連接於導線架,且留下導線架的一部份地利用外裝樹脂封口而作成晶片狀固態電解電容器,其中至少閥作用金屬基體的陽極部是透過金屬線連接於導線架的陽極側。 Japanese Laid-Open Patent Publication No. 2003-264125 discloses that a wafer-like solid electrolytic capacitor is provided which has a height difference when connecting a capacitor element and a convex portion of a lead frame, and is not manufactured to relax a bending of an anode substrate. Under the high-priced metal mold, in order to avoid bending of the anode substrate, a step is placed on the convex portion of the lead frame, and a wafer-shaped solid electrolytic capacitor having a low cost and a good leakage current value is obtained. The wafer-shaped solid electrolytic capacitor described in this document is an anode base composed of a flat valve action metal having a dielectric oxide film layer on its surface, and an end portion thereof is an anode portion, and the remaining portion of the anode substrate is A semiconductor layer is sequentially disposed on the dielectric oxide film layer, and a solid electrolytic capacitor element having a conductor layer disposed thereon is connected to the lead frame, and a portion of the lead frame is left to be sealed with an external resin to form a wafer. A solid electrolytic capacitor in which at least the anode portion of the valve-acting metal substrate is connected to the anode side of the lead frame through a metal wire.
日本國特許公開2003-264125號公報 Japanese Patent Publication No. 2003-264125
伴隨著包含智慧手機等之行動資訊終端在內的電子設備的高機能化及小型輕量化,用在電子設備的CPU周圍的電容器裝置亦被要求小型化及大容量化。在上述文獻所揭示的晶片狀固態電解電容器中,電容器元件的陽極部和導線架的陽極側在外裝樹脂的內部以金屬線連接著。因此,外裝樹脂係以覆蓋電容器元件且覆蓋包含金屬線及與金屬線導線架之連接部份在內的區域(體積),即無助於擴大電容器裝置容量之電容器元件以外的區域之方式成形。 With the high performance and small size and weight reduction of electronic devices including mobile information terminals such as smart phones, capacitor devices used around the CPU of electronic devices are also required to be smaller and larger. In the wafer-like solid electrolytic capacitor disclosed in the above document, the anode portion of the capacitor element and the anode side of the lead frame are connected by a metal wire inside the exterior resin. Therefore, the exterior resin is formed so as to cover the capacitor element and cover a region (volume) including a metal wire and a connection portion with the wire lead frame, that is, a region other than the capacitor element which does not contribute to the expansion of the capacity of the capacitor device. .
本發明的態樣之一為,一具有含有電容器元件的電容器單元、覆蓋電容器單元的封裝構件及電連接於電容器元件的複數個外部連接用電極的裝置。電容器元件包含:作為陽極的板狀基體;以覆蓋基體之對峙的一面及另一面的各自一部份之方式所形成的機能層且為含有固態電解質層及電極層的機能層;基體的一面的一部份且沒被機能層覆蓋的第1非被覆區域;及基體的另一面的一部份且沒被機能層覆蓋的第2非被覆區域。複數個外部連接用電極包含第1外部連接用電極:其覆蓋將封裝構件的一部份連同基體的一部份以通過第1非被覆區域的一部份及第2非被覆區域的一部份的方式貫通形成的第1面。 One aspect of the present invention is a device having a capacitor unit including a capacitor element, a package member covering the capacitor unit, and a plurality of external connection electrodes electrically connected to the capacitor element. The capacitor element comprises: a plate-shaped substrate as an anode; a functional layer formed to cover a pair of opposite sides of the substrate and a part of the other surface; and a functional layer containing a solid electrolyte layer and an electrode layer; one side of the substrate a first non-covered area partially covered by the functional layer; and a second non-covered area partially covered by the functional layer and not covered by the functional layer. The plurality of external connection electrodes include a first external connection electrode that covers a portion of the package member together with a portion of the substrate to pass a portion of the first non-covered region and a portion of the second non-covered region The way through the first surface formed.
此裝置含有在以壓模樹脂等之封裝構件覆蓋電容器單元之後,將其一部份連同電容器元件的基體一起貫通 所形成的第1面予以覆蓋的第1外部連接用電極。第1外部連接用電極係與在第1面露出的基體電連接。第1外部連接用電極乃削去封裝構件對基體直接連接。因此,可削減無助於擴大電容器容量之金屬線或封裝構件的空間,可提升空間效率。 The device includes a part of the capacitor unit after being covered by a package member such as a stamper resin. The first external connection electrode covered by the formed first surface. The first external connection electrode is electrically connected to the substrate exposed on the first surface. The first external connection electrode is directly connected to the substrate by cutting off the package member. Therefore, the space of the metal wire or the package member which does not contribute to the expansion of the capacitor capacity can be reduced, and the space efficiency can be improved.
電容器單元亦可含有積層的複數個電容器元件,積層的複數個電容器元件透過機能層的至少一部份而電連接,第1外部連接用電極亦可含有覆蓋複數個電容器元件的至少任一電容器元件的基體所露出之第1面的電極。即便是含有積層了複數個電容器元件的電容器單元的裝置,亦可將基體和外部連接用電極直接連接,可提升空間效率。 The capacitor unit may further include a plurality of laminated capacitor elements, and the plurality of laminated capacitor elements are electrically connected through at least a portion of the functional layer, and the first external connection electrode may further include at least one capacitor element covering the plurality of capacitor elements. The electrode of the first surface exposed by the substrate. Even in a device including a capacitor unit in which a plurality of capacitor elements are stacked, the substrate and the external connection electrode can be directly connected to each other, thereby improving space efficiency.
第1非被覆區域及第2非被覆區域以配置在一面及另一面之對峙的位置上較為理想。可縮短第1外部連接用電極通過第1非被覆區域的一部份及第2非被覆區域的一部份之距離。因此,可縮短電流路徑。因此,可提供低ESL的裝置。 It is preferable that the first non-covered region and the second non-covered region are disposed at positions facing each other on the one surface and the other surface. The distance between the portion of the first non-covered region and a portion of the second non-covered region of the first external connection electrode can be shortened. Therefore, the current path can be shortened. Therefore, a device with a low ESL can be provided.
第1面係以含有藉將封裝構件的一部份連同基體的一部份以通過第1非被覆區域的一部份及第2非被覆區域的一部份所切成的端面之方式形成,第1外部連接用電極亦可含有覆蓋端面同時取代封裝構件的一部份將電容器單元的一部份覆蓋的電極。可削減或省略在封裝構件的內部的配線用空間。因此,可削減或省略在被封裝構件覆蓋的空間內部中無助於擴大電容器容量之配線用的空間。因此,可將被封裝構件所覆蓋的空間有效地使用作為發揮電容器機能的空 間。因此,可提供空間效率高、小型且大容量的裝置。 The first surface is formed by including a portion of the package member together with a portion of the substrate through an end portion of the first non-covered region and a portion of the second non-covered region. The first external connection electrode may further include an electrode covering the end surface while covering a part of the capacitor member to cover a part of the capacitor unit. The space for wiring inside the package member can be reduced or omitted. Therefore, it is possible to reduce or omit the space for wiring which does not contribute to the expansion of the capacitor capacity in the space covered by the package member. Therefore, the space covered by the packaged member can be effectively used as an empty function of the capacitor. between. Therefore, it is possible to provide a device that is space efficient, small, and large in capacity.
再者,於此裝置中,可削減或省略在被壓模樹脂等封裝構件所覆蓋的空間中佔據的配線用空間,可縮短電流路徑。因此,可提供低ESL的裝置。 Further, in this device, the wiring space occupied by the space covered by the package member such as the mold resin can be reduced or omitted, and the current path can be shortened. Therefore, a device with a low ESL can be provided.
較理想為,電容器元件包含:使基體的前述第1非被覆區域對機能層絶緣的第1絶緣層;及使基體的第2非被覆區域對機能層絶緣的第2絶緣層,第1外部連接用電極係包含覆蓋藉由將包含第1絶緣層的一部份及第2絶緣層的一部份在內予以貫通的方式所形成之前述第1面的電極。 Preferably, the capacitor element includes: a first insulating layer that insulates the first non-covered region of the substrate from the functional layer; and a second insulating layer that insulates the second non-covered region of the substrate from the functional layer, the first external connection The electrode system includes an electrode covering the first surface formed by penetrating a portion including the first insulating layer and a portion of the second insulating layer.
電容器元件的基體亦可為四角形,第1外部連接用電極亦可含有覆蓋以基體的4個角落的至少任一露出的方式所形成的第1面的電極。再者,電容器元件包含貫通基體且電連接一面及另一面的電極層之貫通電極,第1外部連接用電極亦可含有分別覆蓋形成於基體的4個角落或4個邊的任一位置之複數個第1面的複數個電極。 The base of the capacitor element may have a square shape, and the first external connection electrode may include an electrode covering the first surface formed by exposing at least one of the four corners of the base. Further, the capacitor element includes a through electrode that penetrates the substrate and electrically connects the electrode layers on one surface and the other surface, and the first external connection electrode may include plural numbers covering each of four corners or four sides formed on the substrate. A plurality of electrodes on the first side.
較理想為,第1外部連接用電極包含:熔射於第1面的金屬層、蒸鍍於第1面的金屬層及塗布於第1面的導電性糊製的金屬層當中至少任一者。典型的外部連接用電極係藉由將呈粉霧狀的導電性金屬熔射於第1面所形成的金屬噴鍍電極。 Preferably, the first external connection electrode includes at least one of a metal layer that is melted on the first surface, a metal layer that is vapor-deposited on the first surface, and a conductive paste-coated metal layer that is applied to the first surface. . A typical external connection electrode is a metallization electrode formed by melting a powdery conductive metal on a first surface.
較理想為,裝置具有搭載電容器單元的基板,封裝構件覆蓋搭載於基板上的電容器單元。 Preferably, the device has a substrate on which the capacitor unit is mounted, and the package member covers the capacitor unit mounted on the substrate.
本發明的不同態樣之一為,具有上述的裝置和用以安裝裝置的印刷配線之印刷配線板及具有其印刷配線板 的電子設備。 One of the different aspects of the present invention is a printed wiring board having the above-described device and printed wiring for mounting the device and having the printed wiring board thereof Electronic equipment.
本發明的又一不同的態樣之一為,製造具有電容器單元的裝置之方法,包含以下的步驟。 One of the other different aspects of the present invention is a method of fabricating a device having a capacitor unit, comprising the following steps.
1.將封裝構件的一部份連同基體的一部份一起以通過第1非被覆區域的一部份及第2非被覆區域的一部份的方式貫通而形成第1面。 1. A portion of the package member is formed to pass through a portion of the first non-covered region and a portion of the second non-covered region together with a portion of the substrate to form a first surface.
2.以導電性構件覆蓋第1面,形成複數個外部連接用電極所含有的第1外部連接用電極。 2. The first surface is covered with a conductive member, and the first external connection electrode included in the plurality of external connection electrodes is formed.
電容器單元亦可含有,積層的複數個電容器元件,包含被積層的複數個電容器元件,被積層的複數個電容器元件經由機能層的至少一部份而被電連接,形成第1面亦可含有以複數個電容器元件的至少任一電容器元件的基體露出的方式形成第1面。 The capacitor unit may further include a plurality of laminated capacitor elements including a plurality of laminated capacitor elements, and the plurality of laminated capacitor elements are electrically connected via at least a portion of the functional layer, and the first surface may be formed to The first surface is formed such that the base of at least one of the plurality of capacitor elements is exposed.
形成第1面亦可含有將封裝構件的一部份連同基體的一部份一起以通過基體的第1非被覆區域的一部份及第2非被覆區域的一部份之方式切割而形成第1面,形成第1外部連接用電極亦可含有以覆蓋端面同時取代封裝構件的一部份將電容器單元的一部份覆蓋的方式形成電極。 Forming the first surface may also include forming a portion of the package member together with a portion of the substrate through a portion of the first non-covered region of the substrate and a portion of the second non-covered region The first external connection electrode may be formed on one side, and the electrode may be formed to cover the end surface while covering a part of the capacitor member to cover a part of the capacitor unit.
電容器元件包含:使基體的第1非被覆區域對機能層絶緣的第1絶緣層;及使基體的第2非被覆區域對機能層絶緣的第2絶緣層,形成第1面亦可含有藉由將包含第1絶緣層的一部份及第2絶緣層的一部份在內予以貫通方式形成第1面。 The capacitor element includes: a first insulating layer that insulates the first non-covered region of the substrate from the functional layer; and a second insulating layer that insulates the second non-covered region of the substrate from the functional layer, and the first surface may be formed by The first surface is formed by penetrating a portion including the first insulating layer and a portion of the second insulating layer.
較理想為,形成第1外部連接用電極包含:將 金屬熔射於第1面、將金屬蒸鍍於第1面及將導電性糊塗布第1面者當中任一者。 Preferably, forming the first external connection electrode includes: The metal is sprayed on the first surface, and the metal is vapor-deposited on the first surface and the conductive paste is applied to the first surface.
1‧‧‧裝置 1‧‧‧ device
2‧‧‧安裝面 2‧‧‧Installation surface
5‧‧‧電容器元件 5‧‧‧ capacitor components
10‧‧‧基體 10‧‧‧ base
10e‧‧‧端部 10e‧‧‧ end
11‧‧‧表面 11‧‧‧ surface
11a‧‧‧第1非被覆區域 11a‧‧‧1st non-covered area
12‧‧‧背面 12‧‧‧ Back
12a‧‧‧第2非被覆區域 12a‧‧‧2nd non-covered area
15‧‧‧貫通孔(通孔) 15‧‧‧through holes (through holes)
15c‧‧‧內周面 15c‧‧‧ inner circumference
19‧‧‧貫通電極 19‧‧‧through electrodes
20‧‧‧介電體氧化皮膜 20‧‧‧Dielectric oxide film
21‧‧‧固態電解質層 21‧‧‧Solid electrolyte layer
22a(22)‧‧‧電極層(陰極層) 22a (22) ‧ ‧ electrode layer (cathode layer)
22b(22)‧‧‧電極層(陰極層) 22b (22) ‧ ‧ electrode layer (cathode layer)
31‧‧‧第1機能層 31‧‧‧1st functional layer
32‧‧‧第2機能層 32‧‧‧2nd functional layer
33‧‧‧第3電容器機能層(機能層) 33‧‧‧3rd Capacitor Functional Layer (Functional Layer)
35‧‧‧周緣 35‧‧‧ Periphery
36‧‧‧周緣 36‧‧‧ Periphery
41‧‧‧第1絶緣層 41‧‧‧1st insulation layer
42‧‧‧第2絶緣層 42‧‧‧2nd insulation layer
42e‧‧‧端部 42e‧‧‧ end
50‧‧‧電容器單元 50‧‧‧ capacitor unit
51‧‧‧陽極部 51‧‧‧Anode
60‧‧‧塑模體 60‧‧‧ mould body
62‧‧‧內部空間 62‧‧‧Internal space
63a‧‧‧右側面(一部份) 63a‧‧‧right side (part of)
71‧‧‧端面 71‧‧‧ end face
81‧‧‧電極層 81‧‧‧Electrode layer
90‧‧‧基板 90‧‧‧Substrate
90a‧‧‧搭載側的面 90a‧‧‧Side side
90b‧‧‧安裝側的面 90b‧‧‧Face on the side of the installation
90e‧‧‧端部 90e‧‧‧ end
91‧‧‧陽極端子(陽極連接電極、第1外部連接用電極) 91‧‧‧Anode terminal (anode connection electrode, first external connection electrode)
92‧‧‧陰極端子(陰極連接用電極、第2外部連接用電極) 92‧‧‧ cathode terminal (electrode for cathode connection, electrode for second external connection)
92a,92b‧‧‧電極層 92a, 92b‧‧‧ electrode layer
92c‧‧‧核心層 92c‧‧‧ core layer
95‧‧‧電極(通孔) 95‧‧‧electrodes (through holes)
99‧‧‧壓模樹脂 99‧‧‧Molded resin
圖1係顯示搭載著裝置之印刷配線板的一部份之剖面圖。 Fig. 1 is a cross-sectional view showing a part of a printed wiring board on which a device is mounted.
圖2係顯示裝置的概要之斜視圖。 Fig. 2 is a perspective view showing the outline of the apparatus.
圖3係扣除電極層後的裝置之狀態的斜視圖。 Fig. 3 is a perspective view showing the state of the device after the electrode layer is removed.
圖4係以穿透壓模樹脂的狀態顯示裝置之俯視圖。 Fig. 4 is a plan view of the state display device penetrating the stamper resin.
圖5係裝置的V-V剖面圖(圖4的V-V剖面)。 Fig. 5 is a V-V sectional view of the apparatus (V-V section of Fig. 4).
圖6係顯示在基板上搭載電容器元件的樣子之剖面圖。 Fig. 6 is a cross-sectional view showing a state in which a capacitor element is mounted on a substrate.
圖7係顯示基板和電容器單元藉由壓模樹脂一體成形的樣子之剖面圖。 Fig. 7 is a cross-sectional view showing a state in which a substrate and a capacitor unit are integrally molded by a molding resin.
圖8係顯示切斷塑模體的樣子之剖面圖。 Fig. 8 is a cross-sectional view showing a state in which the molded body is cut.
圖9係顯示在端面積層電極層的樣子之剖面圖。 Fig. 9 is a cross-sectional view showing the state of the electrode layer in the end face layer.
圖10係以穿透壓模樹脂的狀態顯示不同裝置之俯視圖。 Fig. 10 is a plan view showing different devices in a state of penetrating a stamper resin.
圖11係以穿透電極層的狀態顯示圖10所示的裝置之斜視圖。 Fig. 11 is a perspective view showing the apparatus shown in Fig. 10 in a state of penetrating the electrode layer.
圖12係以穿透壓模樹脂的狀態顯示又一不同的裝置之俯視圖。 Figure 12 is a plan view showing still another different device in a state of penetrating the molding resin.
圖13係以穿透壓模樹脂的狀態顯示又一不同的裝置之俯視圖。 Figure 13 is a plan view showing still another different device in a state of penetrating the molding resin.
圖14係圖13所示的裝置之XIV-XIV剖面圖(圖13的XIV-XIV剖面)。 Figure 14 is a cross-sectional view of the XIV-XIV of the apparatus shown in Figure 13 (section XIV-XIV of Figure 13).
圖15係顯示扣除電極層後的又一不同的裝置之狀態的斜視圖。 Fig. 15 is a perspective view showing a state of still another different device after the electrode layer is removed.
圖16係圖15所示的裝置之XVI-XVI剖面圖(圖15的XVI-XVI剖面)。 Figure 16 is a cross-sectional view taken along the line XVI-XVI of the apparatus shown in Figure 15 (XVI-XVI section of Figure 15).
圖17係顯示又一不同的裝置之剖面圖。 Figure 17 is a cross-sectional view showing still another different device.
圖18係顯示又一不同的裝置之剖面圖。 Figure 18 is a cross-sectional view showing still another different device.
圖19係顯示又一不同的裝置之剖面圖。 Figure 19 is a cross-sectional view showing still another different device.
圖1是利用剖面圖顯示搭載著本發明所涉及的裝置之印刷配線板的一部份。印刷配線板100係搭載於包含智慧手機或筆記型的個人電腦等之行動資訊終端在內的電子設備之印刷基板。在印刷配線板100的表面100a搭載著CPU200,背面100b搭載著包含電容器單元50的裝置(電容器裝置)1。CPU200的電源端子201和裝置1的連接電極(第1及第2外部連接用的電極端子)91及92,係藉由貫通印刷基板100的貫通電極101電連接。因此,裝置1係作為去耦電容器或旁路電容器發揮機能。 Fig. 1 is a cross-sectional view showing a part of a printed wiring board on which a device according to the present invention is mounted. The printed wiring board 100 is mounted on a printed circuit board of an electronic device including a mobile information terminal such as a smart phone or a notebook type personal computer. The CPU 200 is mounted on the front surface 100a of the printed wiring board 100, and the device (capacitor device) 1 including the capacitor unit 50 is mounted on the back surface 100b. The power supply terminal 201 of the CPU 200 and the connection electrodes (electrode terminals for the first and second external connection) 91 and 92 of the device 1 are electrically connected by the through electrode 101 penetrating the printed circuit board 100. Therefore, the device 1 functions as a decoupling capacitor or a bypass capacitor.
圖2是顯示裝置1的概要之斜視圖。裝置1包含:基板90;搭載於基板90的搭載側的面90a之電容器單元50;除了基板90及電容器單元50的一面(第1面、端面)71以外將基板90及電容器單元50覆蓋的外裝用的構件(封裝構件,壓模樹脂)99;及覆蓋端面71的電極層81。端面71係切割以基板90及電容器單元50藉由壓模樹脂99可成為 薄的直方體狀(板狀)般所一體成形的塑模體60的一端(一部份、右側面)63a而形成。覆蓋端面71的電極層81係和與端面71呈同一面般露出的電容器單元50的第1電極部(陽極部)51電連接。因此,電極層81係兼具外部連接用的引出電極層及第1外部連接用的電極端子(第1外部連接用電極)91。關於壓模樹脂99,可列舉環氧樹脂等之密封樹脂。 2 is a perspective view showing an outline of the display device 1. The device 1 includes a substrate 90, a capacitor unit 50 mounted on the mounting surface 90a of the substrate 90, and a substrate 90 and a capacitor unit 50 in addition to the substrate 90 and the one surface (first surface, end surface) 71 of the capacitor unit 50. A member for mounting (packaging member, stamper resin) 99; and an electrode layer 81 covering the end face 71. The end surface 71 is cut so that the substrate 90 and the capacitor unit 50 can be formed by the molding resin 99 One end (one portion, right side surface) 63a of the molded body 60 integrally formed in a thin rectangular parallelepiped shape (plate shape) is formed. The electrode layer 81 covering the end surface 71 is electrically connected to the first electrode portion (anode portion) 51 of the capacitor unit 50 which is exposed in the same plane as the end surface 71. Therefore, the electrode layer 81 has both the extraction electrode layer for external connection and the electrode terminal (first external connection electrode) 91 for the first external connection. The sealing resin 99 may be a sealing resin such as an epoxy resin.
就此裝置1而言,電容器單元50的陽極部51係藉由兼作為外裝的電極層81電連接。典型的電極層81係為透過將依霧化法等而粉霧狀化金屬熔射(噴吹)於端面71所形成(附著)的金屬噴鍍電極。關於被熔射於端面71的金屬方面,可列舉金、銀、銅及鋁等之導電性金屬,考慮到導電性及成本的平衡時以銅較合適。此外,電極層81亦可透過金屬蒸鍍或塗布導電性糊而形成。 In the device 1, the anode portion 51 of the capacitor unit 50 is electrically connected by the electrode layer 81 which also serves as an exterior. The typical electrode layer 81 is a metallized electrode that is formed (adhered) by being sprayed (adsorbed) on the end surface 71 by a mist atomization method or the like. Examples of the metal to be melted on the end surface 71 include conductive metals such as gold, silver, copper, and aluminum, and copper is suitable in consideration of balance between conductivity and cost. Further, the electrode layer 81 can also be formed by metal deposition or coating of a conductive paste.
圖3係顯示扣除電極層81後的裝置1之狀態的斜視圖。被塑模後的電容器單元50包含上下積層的2個電容器元件5。電容器元件5是固態電解電容器元件。此電容器元件5係包含:切割成大致正方形的薄膜狀(板狀)的閥作用基體(基體)10;形成在基體10之上下對峙的兩面11及12的介電體氧化皮膜20;積層於基體10的表面(一面)11側的介電體氧化皮膜20之上的第1電容器機能層(機能層)31;積層於基體10的背面(另一面)12側的介電體氧化皮膜20之上的第2電容器機能層(機能層)32;覆蓋第1機能層31的周緣35的全部(全周)般地在基體10的表面11側的介電體氧化皮膜20之上直接積層的第1絶緣層41;覆蓋第2機能 層32的周緣36的全部(全周)般地在基體10的背面12側的介電體氧化皮膜20之上直接積層的第2絶緣層42。 Fig. 3 is a perspective view showing the state of the apparatus 1 after the electrode layer 81 is removed. The molded capacitor unit 50 includes two capacitor elements 5 stacked one on another. The capacitor element 5 is a solid electrolytic capacitor element. The capacitor element 5 includes: a valve-shaped substrate (base) 10 cut into a substantially square film shape (plate shape); a dielectric oxide film 20 formed on both sides 11 and 12 of the lower surface of the substrate 10; laminated on the substrate The first capacitor functional layer (functional layer) 31 on the dielectric oxide film 20 on the surface (one surface) 11 side of the surface 10 is laminated on the dielectric oxide film 20 on the back side (the other surface) 12 side of the substrate 10 The second capacitor functional layer (functional layer) 32; the first layer covering the entire periphery (the entire circumference) of the first functional layer 31 on the dielectric oxide film 20 on the surface 11 side of the substrate 10 Insulation layer 41; covering the second function The second insulating layer 42 is directly laminated on the dielectric oxide film 20 on the back surface 12 side of the substrate 10 in the entire periphery (all circumferences) of the layer 32.
第1機能層31及第2機能層32和第1絶緣層41及第2絶緣層42,分別以包夾基體10地配置在上下對峙的位置(範圍)。此裝置1的端面71係透過讓包含壓模樹脂99在內的第1絶緣層41、基體10、第2絶緣層42及基板90產生缺口(切斷、切割)所形成之無階差的平坦面(同一面)。因此,端面71包含:壓模樹脂99呈現門型狀而成的端部99e;基板90的方形的端部90e;被此等所包夾般地從上方依序積層的2個電容器元件5的第1絶緣層41的方形的端部41e;基體10的方形的端部10e;第2絶緣層42的方形的端部42e;第1絶緣層41的方形的端部41e;基體10的方形的端部10e;第2絶緣層42的方形的端部42e。因此,在端面71,透過包含各個基體10的1邊13a的部份(端部)10e以被第1絶緣層41及第2絶緣層42包夾的狀態顯露(露出)而形成電容器單元50的陽極部51。 The first functional layer 31 and the second functional layer 32, the first insulating layer 41, and the second insulating layer 42 are disposed at positions (ranges) in which the first and second insulating layers 41 and the second insulating layer 42 are placed on the substrate 10 in the vertical direction. The end surface 71 of the apparatus 1 transmits the unevenness (not cut) formed by the notch (cutting or cutting) of the first insulating layer 41, the substrate 10, the second insulating layer 42, and the substrate 90 including the stamper resin 99. Face (same side). Therefore, the end surface 71 includes an end portion 99e in which the stamper resin 99 has a gate shape, a square end portion 90e of the substrate 90, and two capacitor elements 5 which are sequentially stacked from above in the like. The square end portion 41e of the first insulating layer 41; the square end portion 10e of the base body 10; the square end portion 42e of the second insulating layer 42; the square end portion 41e of the first insulating layer 41; the square of the base body 10 The end portion 10e; the square end portion 42e of the second insulating layer 42. Therefore, in the end surface 71, the portion (end portion) 10e including the one side 13a of each of the base members 10 is exposed (exposed) in a state of being sandwiched by the first insulating layer 41 and the second insulating layer 42 to form the capacitor unit 50. Anode portion 51.
此外,關於此裝置1,在無設置第1絶緣層41及第2絶緣層42之下,透過覆蓋基體10的兩面11及12的介電體氧化皮膜20來進行第1及第2機能層31及32與電極層81之絶緣亦可。此裝置1中,在介電體氧化皮膜20之上積層第1及第2絶緣層41及42。因此,能更加提升第1及第2機能層31及32與電極層81之絶緣性。且可容易地將複數個電容器元件5上下穩定地積層。 Further, in the apparatus 1, the first and second functional layers 31 are passed through the dielectric oxide film 20 covering the both surfaces 11 and 12 of the substrate 10 without providing the first insulating layer 41 and the second insulating layer 42. And 32 may be insulated from the electrode layer 81. In the device 1, the first and second insulating layers 41 and 42 are laminated on the dielectric oxide film 20. Therefore, the insulation properties of the first and second functional layers 31 and 32 and the electrode layer 81 can be further improved. Further, a plurality of capacitor elements 5 can be easily laminated vertically.
圖4係以穿透壓模樹脂99的狀態來顯示裝置1 的俯視圖。此電容器單元50的陽極部51係透過包含基體10的4個邊13a~13d當中的1邊13a的部份(端部)10e在端面71露出而形成。此外,陽極部51亦可透過將含有基體10的其他3個邊13b~13d的部份依上述同樣地切割使端面露出而形成,亦可透過讓4個邊13a~13d當中的2個邊以上顯露那樣的端面露出而形成。 4 shows the display device 1 in a state of penetrating the stamper resin 99. Top view. The anode portion 51 of the capacitor unit 50 is formed by exposing a portion (end portion) 10e including one side 13a of the four sides 13a to 13d of the base 10 to the end surface 71. Further, the anode portion 51 may be formed by exposing a portion including the other three sides 13b to 13d of the base 10 in the same manner as described above, or by passing two or more of the four sides 13a to 13d. It is revealed that such an end surface is exposed.
圖5係利用V-V剖面圖(圖4的V-V剖面)顯示裝置1的更詳細構成。各個電容器元件5的第1機能層31包含:於基體10的表面11所形成之介電體氧化皮膜20之上依序積層的固態電解質層21;電極層(陰極層)22a(22)。電容器元件5的第2機能層32包含:於形成在基體10的背面12之介電體氧化皮膜20之上依序積層的固態電解質層21;電極層(陰極層)22b(22)。基體10的表面11及背面12係透過蝕刻等而被多孔質化。 Fig. 5 shows a more detailed configuration of the display device 1 by a V-V sectional view (V-V cross section of Fig. 4). The first functional layer 31 of each capacitor element 5 includes a solid electrolyte layer 21 which is sequentially laminated on the dielectric oxide film 20 formed on the surface 11 of the substrate 10, and an electrode layer (cathode layer) 22a (22). The second functional layer 32 of the capacitor element 5 includes a solid electrolyte layer 21 which is sequentially laminated on the dielectric oxide film 20 formed on the back surface 12 of the substrate 10, and an electrode layer (cathode layer) 22b (22). The surface 11 and the back surface 12 of the base 10 are made porous by etching or the like.
電容器元件5包含:沒被基體10的表面11的第1機能層31覆蓋的第1非被覆區域11a;沒被基體10的背面12的第2機能層32覆蓋的第2非被覆區域12a。再者,電容器元件5包含:使基體10的第1非被覆區域11a對第1機能層31絶緣的第1絶緣層41;使基體10的第2非被覆區域12a對第2機能層32絶緣的第2絶緣層42。第1絶緣層41係在基體10的表面11側的介電體氧化皮膜20之上以覆蓋第1機能層31的周緣35的全周之方式積層。第2絶緣層42係在基體10的背面12側的介電體氧化皮膜20之上以覆蓋第2機能層32的周緣36的全周之方式積層。因此,透過將第1 及第2絶緣層41及42一起以通過基體10的第1非被覆區域11a的一部份及第2非被覆區域12a的一部份方式貫通,可形成端面71。因此,可藉由第1及第2絶緣層41及42將在端面71露出的基體10和第1及第2機能層31及32絶緣。 The capacitor element 5 includes a first non-covered region 11a that is not covered by the first functional layer 31 of the surface 11 of the substrate 10, and a second non-covered region 12a that is not covered by the second functional layer 32 of the back surface 12 of the substrate 10. Further, the capacitor element 5 includes a first insulating layer 41 that insulates the first non-covered region 11a of the base 10 from the first functional layer 31, and in which the second non-covered region 12a of the base 10 is insulated from the second functional layer 32. The second insulating layer 42. The first insulating layer 41 is laminated on the dielectric oxide film 20 on the surface 11 side of the substrate 10 so as to cover the entire circumference of the peripheral edge 35 of the first functional layer 31. The second insulating layer 42 is laminated on the dielectric oxide film 20 on the back surface 12 side of the substrate 10 so as to cover the entire circumference of the peripheral edge 36 of the second functional layer 32. Therefore, through the first The second insulating layers 41 and 42 are formed to penetrate through a portion of the first non-covered region 11a of the substrate 10 and a portion of the second non-covered region 12a, whereby the end surface 71 can be formed. Therefore, the base 10 exposed to the end surface 71 and the first and second functional layers 31 and 32 can be insulated by the first and second insulating layers 41 and 42.
各個電容器元件5更包含:貫通基體10中央的貫通孔(通孔)15;及形成於貫通孔15的內周面15c的第3電容器機能層(機能層)33。第3機能層33包含:從與覆蓋基體10的介電體氧化皮膜20相接之側依序積層的固態電解質層21;透過於貫通孔15充填銀糊等之導電性糊而形成的貫通電極19。因此,第1機能層31的陰極層22a和第2機能層32的陰極層22b,藉由第3機能層33的貫通電極19電連接。 Each of the capacitor elements 5 further includes a through hole (through hole) 15 penetrating through the center of the base 10; and a third capacitor functional layer (functional layer) 33 formed on the inner peripheral surface 15c of the through hole 15. The third functional layer 33 includes a solid electrolyte layer 21 which is sequentially stacked on the side in contact with the dielectric oxide film 20 covering the substrate 10, and a through electrode formed by being filled with a conductive paste such as a silver paste in the through hole 15. 19. Therefore, the cathode layer 22a of the first functional layer 31 and the cathode layer 22b of the second functional layer 32 are electrically connected by the through electrode 19 of the third functional layer 33.
再者,此電容器單元50為,下側的電容器元件5的陰極層22a和上側的電容器元件5的陰極層22b藉由元件固定用的導電性糊等電連接。陽極部51係以在第1絶緣層41及第2絶緣層42上下包夾的狀態被包覆。因此,在將複數個電容器元件5上下積層之際,幾乎沒不會有陽極部51和陰極層22發生短路(short)之虞。因此,容易積層複數個電容器元件5。而且,透過增加積層片數容易增加電容器單元50的靜電容量,亦容易降低ESR(等效串聯電阻)。 Further, in the capacitor unit 50, the cathode layer 22a of the lower capacitor element 5 and the cathode layer 22b of the upper capacitor element 5 are electrically connected by a conductive paste or the like for fixing the element. The anode portion 51 is covered in a state in which the first insulating layer 41 and the second insulating layer 42 are vertically sandwiched. Therefore, when a plurality of capacitor elements 5 are stacked one on another, there is almost no occurrence of a short circuit between the anode portion 51 and the cathode layer 22. Therefore, it is easy to laminate a plurality of capacitor elements 5. Further, it is easy to increase the electrostatic capacitance of the capacitor unit 50 by increasing the number of laminated sheets, and it is also easy to lower the ESR (Equivalent Series Resistance).
此外,關於基體10,可列舉蝕刻鋁箔、鉭燒結體、鈮燒結體及鈦燒結體等,考慮形成薄型的裝置1時,蝕刻鋁箔是適合的。在基體10使用蝕刻鋁箔的情況,介電體氧化被膜20係形成於基體10的表面11及背面12的氧化鋁。固態電解質層21可以是將聚吡咯、聚噻吩、聚苯胺等之導電 性高分子藉由電解聚合等積層於介電體氧化被膜20之上而形成。電極層22(22a,22b)的一例為,透過使銀糊等之導電性糊積層於固態電解質層21之上而形成的陰極層。第1機能層31及第2機能層32亦可含有被積層於固態電解質層21和電極層(陰極層)22之間的高導電性石墨層等,容易減低接觸電阻。第1絶緣層41及第2絶緣層42的一例為聚醯亞胺樹脂或環氧樹脂等之絶緣性的樹脂。 Further, examples of the substrate 10 include an etched aluminum foil, a tantalum sintered body, a tantalum sintered body, and a titanium sintered body. When forming a thin device 1, it is suitable to etch the aluminum foil. In the case where the base 10 is made of an etched aluminum foil, the dielectric oxide film 20 is formed on the surface 11 of the substrate 10 and the alumina of the back surface 12. The solid electrolyte layer 21 may be a conductive material of polypyrrole, polythiophene, polyaniline or the like. The polymer is formed by laminating on the dielectric oxide film 20 by electrolytic polymerization or the like. An example of the electrode layer 22 (22a, 22b) is a cathode layer formed by transmitting a conductive paste such as a silver paste on the solid electrolyte layer 21. The first functional layer 31 and the second functional layer 32 may also contain a highly conductive graphite layer or the like which is laminated between the solid electrolyte layer 21 and the electrode layer (cathode layer) 22, and the contact resistance is easily reduced. An example of the first insulating layer 41 and the second insulating layer 42 is an insulating resin such as a polyimide resin or an epoxy resin.
此外,本說明書中記載作為陰極層22機能的電極層22是外觀上的陰極,而固態電解質層21是發揮擔任真的陰極之機能的角色。後面的實施形態中亦相同。 Further, in the present specification, the electrode layer 22 functioning as the cathode layer 22 is an appearance cathode, and the solid electrolyte layer 21 functions as a function of a true cathode. The same applies to the following embodiments.
搭載電容器單元50的基板90係切成大致正方形的玻璃環氧基板。此基板90的搭載側的面90a之對向側之安裝側的面90b沒被壓模樹脂99覆蓋。因此,基板90的安裝側的面90b係以用以將裝置1搭載於外部的印刷基板100等的安裝面2顯現。基板90之搭載側的面90a及安裝側的面90b的銅箔係透過蝕刻等而圖案化。在搭載側的面90a形成和電容器單元50的陰極層22連接的陰極連接電極層92a。在安裝側的面90b形成和外部連接的陰極端子電極層92b。該等電極層92a及92b係藉由貫通基板90的核心層92c之電極(通孔)95電連接。 The substrate 90 on which the capacitor unit 50 is mounted is cut into a substantially square glass epoxy substrate. The mounting surface 90b on the opposite side of the mounting surface 90a of the substrate 90 is not covered by the molding resin 99. Therefore, the surface 90b on the mounting side of the substrate 90 appears on the mounting surface 2 of the printed circuit board 100 or the like for mounting the device 1 to the outside. The copper foil on the mounting side surface 90a of the substrate 90 and the mounting side surface 90b are patterned by etching or the like. A cathode connection electrode layer 92a connected to the cathode layer 22 of the capacitor unit 50 is formed on the surface 90a on the mounting side. A cathode terminal electrode layer 92b connected to the outside is formed on the mounting surface 90b. The electrode layers 92a and 92b are electrically connected by electrodes (through holes) 95 penetrating through the core layer 92c of the substrate 90.
因此,電容器單元50的陰極層22係隔著形成在基板90的電極層92a及92b以陰極端子(陰極連接用電極、第2外部連接用電極)92顯露於裝置1的安裝面2。電容器單元50的陽極部51係藉由形成外裝的一部份的電極層81以 陽極端子(陽極連接電極、第1外部連接用電極)91顯露於安裝面2。在安裝面2露出的陽極端子91及陰極端子92,係和設置在印刷基板100等之上的連接端子電連接。因此,裝置1作為表面安裝型的裝置發揮機能。 Therefore, the cathode layer 22 of the capacitor unit 50 is exposed on the mounting surface 2 of the device 1 via the cathode terminals (cathode connecting electrodes, second external connecting electrodes) 92 formed on the electrode layers 92a and 92b of the substrate 90. The anode portion 51 of the capacitor unit 50 is formed by forming an electrode layer 81 of a portion of the exterior. The anode terminal (anode connection electrode, first external connection electrode) 91 is exposed on the mounting surface 2. The anode terminal 91 and the cathode terminal 92 exposed on the mounting surface 2 are electrically connected to a connection terminal provided on the printed circuit board 100 or the like. Therefore, the device 1 functions as a surface mount type device.
此外,基板90未受限於本例,亦可為沒有核心層92c的薄型輕量的無核心基板。起因於削減通孔95的電感器成分易於提升電氣特性,也易於提升配線的設計自由度。再者,透過在電容器單元50形成再配線層,亦可作成没有基板90的無基板。 Further, the substrate 90 is not limited to this example, and may be a thin and lightweight coreless substrate without the core layer 92c. The inductor component resulting from the reduction of the through hole 95 is easy to improve electrical characteristics, and it is also easy to increase the degree of freedom in design of the wiring. Further, by forming a rewiring layer in the capacitor unit 50, a substrate without the substrate 90 can be formed.
此裝置1中,電極層81被積層於從塑模體60切出的端面71,構成外裝(封裝)的一部份。因此,電極層81係連接複數個電容器元件5的陽極部51,更兼作為外部連接用的陽極端子91。因此,在利用壓模樹脂99及電極層81所封裝的裝置1的內部空間62無需設置連接陽極部51和外部連接用的端子用的空間,即電極引出用的配線空間。因此,可省略配線空間。因此,可將無實質助益於擴大電容器容量之部份(配線空間)從裝置1的內部空間62切割或創減。因此,可將裝置1的內部空間62作為用以確保電容器(蓄電器)的容量之空間更有效率地使用(利用)。因此,可提供空間效率高、小型且大容量的裝置1。 In this apparatus 1, the electrode layer 81 is laminated on the end surface 71 cut out from the mold body 60 to constitute a part of the exterior (package). Therefore, the electrode layer 81 is connected to the anode portion 51 of the plurality of capacitor elements 5, and also serves as the anode terminal 91 for external connection. Therefore, it is not necessary to provide a space for connecting the anode portion 51 and the terminal for external connection, that is, the wiring space for electrode extraction, in the internal space 62 of the device 1 packaged by the mold resin 99 and the electrode layer 81. Therefore, the wiring space can be omitted. Therefore, the portion (wiring space) which does not substantially contribute to the expansion of the capacitor capacity can be cut or reduced from the internal space 62 of the apparatus 1. Therefore, the internal space 62 of the apparatus 1 can be used (utilized) more efficiently as a space for securing the capacity of the capacitor (storage). Therefore, it is possible to provide the apparatus 1 which is space efficient, small, and large in capacity.
再者,關於此裝置1,使電極層81密接(附著,直接安裝)於在端面71露出的基體10的端部10e。因此,可縮短積層於基體10的表面11、背面12及貫通孔15的內周面15c的作為蓄電部的介電體氧化被膜20與外部連接用的陽極 端子91的距離。因此,可縮短電流路徑且能提供低ESL(等效串聯電感)的裝置1。 Further, in the apparatus 1, the electrode layer 81 is adhered (attached, directly attached) to the end portion 10e of the base 10 exposed at the end surface 71. Therefore, the dielectric oxide film 20 as a power storage unit and the anode for external connection which are laminated on the inner surface 15c of the base 10, the back surface 12, and the inner peripheral surface 15c of the through hole 15 can be shortened. The distance of the terminal 91. Therefore, the device 1 can be shortened in current path and can provide a low ESL (equivalent series inductance).
再者,關於此裝置1,可直接將外部的連接用電極連接於覆蓋端面71的電極層81的一部份或全部。因此,與印刷基板100的連接方法是靈活的。例如,亦可將電極層81作為裝置1的安裝面而搭載於外部的印刷基板100等,可提供更縮短電流路徑的低ESL的裝置1。 Further, with this device 1, the external connection electrode can be directly connected to a part or all of the electrode layer 81 covering the end surface 71. Therefore, the connection method with the printed substrate 100 is flexible. For example, the electrode layer 81 can be mounted on the external printed circuit board 100 as the mounting surface of the device 1, and the device 1 can be provided with a low ESL that shortens the current path.
關於本例的裝置1,因電極層81覆蓋端面71同時取代壓模樹脂99將塑模體60的右側面(一部份)63a覆蓋而兼作為外裝(封裝)的一部份,但透過於電極層81的外側(外壁)附加(連接)導線架(金屬板),金屬膜及端子插座等形成外部連接電極亦可。電極層81係透過被熔射的金屬層、被蒸鍍的金屬層或導電性糊製的金屬層等而形成。因此,易使導線架等之端子密接,易於提升接觸面積。 In the apparatus 1 of the present example, the electrode layer 81 covers the end surface 71 and covers the right side surface (part) 63a of the mold body 60 instead of the stamper resin 99, and serves as a part of the exterior package (package). A lead frame (metal plate) may be attached (connected) to the outer side (outer wall) of the electrode layer 81, and an external connection electrode may be formed by a metal film, a terminal socket, or the like. The electrode layer 81 is formed by transmitting a metal layer to be evaporated, a metal layer to be vapor-deposited, or a metal layer of a conductive paste. Therefore, it is easy to make the terminals of the lead frame and the like closely connected, and it is easy to increase the contact area.
在圖6~圖9表示製造裝置1的方法。圖6係顯示在基板90上搭載含有電容器元件5的電容器單元50的樣子之剖面圖,圖7係顯示基板90和電容器單元50藉由壓模樹脂99一體成形的樣子之剖面圖,圖8係顯示切斷塑模體60的樣子之剖面圖,圖9係顯示在端面71積層電極層81進行覆蓋的樣子之剖面圖。 A method of manufacturing the apparatus 1 is shown in FIGS. 6 to 9. 6 is a cross-sectional view showing a state in which the capacitor unit 50 including the capacitor element 5 is mounted on the substrate 90, and FIG. 7 is a cross-sectional view showing a state in which the substrate 90 and the capacitor unit 50 are integrally molded by the molding resin 99, and FIG. A cross-sectional view showing a state in which the molded body 60 is cut is shown, and FIG. 9 is a cross-sectional view showing a state in which the laminated electrode layer 81 is covered on the end surface 71.
首先,如圖6所示,透過導電性糊將電容器單元50搭載於基板90的搭載側的面90a。藉以電連接基板90的陰極端子92及電容器元件5的陰極層22。而且,電容器單元50之上下積層的複數個電容器元件5的陰極層22對陰極 端子92並列地連接。 First, as shown in FIG. 6, the capacitor unit 50 is mounted on the mounting surface 90a of the substrate 90 through the conductive paste. The cathode terminal 92 of the substrate 90 and the cathode layer 22 of the capacitor element 5 are electrically connected. Moreover, the cathode layer 22 of the plurality of capacitor elements 5 stacked above and below the capacitor unit 50 is opposite to the cathode Terminals 92 are connected in parallel.
其次,如圖7所示,電容器單元50及基板90利用壓模樹脂99一體成型而製造塑模體60。就此裝置1而言,電容器單元50及基板90除了基板90的安裝側的面90b以外,全都是被壓模樹脂99所覆蓋。 Next, as shown in FIG. 7, the capacitor unit 50 and the substrate 90 are integrally molded by a stamper resin 99 to produce a molded body 60. In the device 1, the capacitor unit 50 and the substrate 90 are all covered with the mold resin 99 except for the surface 90b on the mounting side of the substrate 90.
其次,如圖8所示,切割塑模體60的一部份。亦即,以電容器單元50及基板90被壓模樹脂99覆蓋的狀態,讓包含壓模樹脂99在內的第1絶緣層41、第1非被覆區域11a、第2非被覆區域12a、第2絶緣層42及基板90在第1絶緣層41及第2絶緣層42的範圍內(寛度中)以垂直於基板90的方向貫通之方式產生缺口(切斷)。藉此,對基板90垂直的塑模體60的右側面63a被切出,可形成在同一面上的端面71。在端面71,基體10的端部10e呈現被第1絶緣層41及第2絶緣層42包夾的狀態。因此,可將電容器單元50的陽極部51以對陰極層22(第1機能層31及第2機能層32)絶緣的狀態形成於端面71。 Next, as shown in Fig. 8, a part of the mold body 60 is cut. In other words, the first insulating layer 41 including the stamper resin 99, the first non-covered region 11a, the second non-covered region 12a, and the second portion are placed in a state where the capacitor unit 50 and the substrate 90 are covered with the mold resin 99. The insulating layer 42 and the substrate 90 are notched (cut) so as to penetrate in a direction perpendicular to the substrate 90 in the range of the first insulating layer 41 and the second insulating layer 42. Thereby, the right side surface 63a of the molded body 60 perpendicular to the substrate 90 is cut out, and the end surface 71 on the same surface can be formed. In the end surface 71, the end portion 10e of the base 10 is in a state of being sandwiched by the first insulating layer 41 and the second insulating layer 42. Therefore, the anode portion 51 of the capacitor unit 50 can be formed on the end surface 71 in a state in which the cathode layer 22 (the first functional layer 31 and the second functional layer 32) is insulated.
其次,如圖9所示,透過將呈粉霧狀的銅等朝端面71熔射以銅層覆蓋端面71,而積層(形成)和陽極部51電連接之外部連接用的電極層81。藉此,圖8中以電極層81覆蓋經切斷塑模體60而成的端面71,電極層81構成裝置1的外裝的一部份。再者,電容器單元50的複數個電容器元件5的陽極部51藉電極層81並列地連接。電極層81覆蓋端面71,到達基板90並在基板90的安裝側的面90b露出,成為外部連接用的電極(陽極端子)91。因此,形成於安裝側 的面90b具備陽極端子91和陰極端子92而成的表面安裝型的裝置1。此外,電極層81亦可透過金屬蒸鍍或塗布導電性糊而形成。 Then, as shown in FIG. 9, the electrode layer 81 for external connection electrically connected to the anode portion 51 is laminated (formed) by exposing the end face 71 to the end surface 71 by spraying the copper or the like in the form of a powder. Thereby, in Fig. 8, the end surface 71 formed by cutting the molded body 60 is covered with the electrode layer 81, and the electrode layer 81 constitutes a part of the exterior of the apparatus 1. Further, the anode portions 51 of the plurality of capacitor elements 5 of the capacitor unit 50 are connected in parallel by the electrode layer 81. The electrode layer 81 covers the end surface 71, reaches the substrate 90, and is exposed on the surface 90b on the mounting side of the substrate 90, and serves as an electrode (anode terminal) 91 for external connection. Therefore, formed on the mounting side The surface 90b includes a surface mount type device 1 in which an anode terminal 91 and a cathode terminal 92 are provided. Further, the electrode layer 81 can also be formed by metal deposition or coating of a conductive paste.
關於此表面安裝型之裝置的製造方法,係在密封(壓模)電容器單元50及基板90而形成塑模體60之後,以陽極部51露出於塑模體60的外部61之方式切割塑模體60而形成端面71,透過將端面71以兼作為外裝的方式利用電極層81覆蓋而形成用以將陽極部51彼此連接並且將陽極部51連接於外部的陽極端子91。因此,將陽極部51和陽極端子91電連接的構成(電極)兼作為外裝。因此,可削減或省略外裝的內部,即被壓模樹脂99覆蓋的部份(裝置1的內部62)的電極引出用的配線空間。因此,可製造小型且大容量的裝置1。 In the method of manufacturing the surface mount type device, after the mold body 60 is formed by sealing (die) the capacitor unit 50 and the substrate 90, the mold is cut so that the anode portion 51 is exposed to the outer portion 61 of the mold body 60. The end face 71 is formed by the body 60, and the end face 71 is covered with the electrode layer 81 so as to be an exterior, and the anode terminal 91 for connecting the anode portions 51 to each other and connecting the anode portion 51 to the outside is formed. Therefore, the configuration (electrode) that electrically connects the anode portion 51 and the anode terminal 91 also serves as an exterior. Therefore, the inside of the exterior, that is, the wiring space for the electrode lead-out of the portion covered by the mold resin 99 (the inside 62 of the device 1) can be reduced or omitted. Therefore, the small and large-capacity device 1 can be manufactured.
圖10係以穿透壓模樹脂的99的狀態來顯示相異的表面安裝型的裝置1a之俯視圖。圖11係以穿透電極層81的狀態來顯示裝置1a之斜視圖。此裝置1a具有形成在直方體狀的塑模體60的1個角隅(角落)64a的無階差之平坦(同一面)的端面71。亦即,端面71係透過讓包含壓模樹脂99在內的第1絶緣層41、基體10的第1非被覆區域11a、第2非被覆區域12a、第2絶緣層42及基板90產生(切成)扇形(圓筒(1/4筒)狀)缺口所形成。再者,裝置1a係包含覆蓋端面71且以裝置1的整體形狀成為直方體的方式形成的電極(電極層)81。 Fig. 10 is a plan view showing a device 1a of a different surface mount type in a state of 99 penetrating the stamper resin. Fig. 11 is a perspective view showing the device 1a in a state of penetrating the electrode layer 81. This device 1a has an end surface 71 which is formed on the flat (the same surface) of one corner of the square-shaped molded body 60 without a step. In other words, the end surface 71 is caused to pass through the first insulating layer 41 including the stamper resin 99, the first non-covered region 11a of the substrate 10, the second non-covered region 12a, the second insulating layer 42, and the substrate 90. Formed into a fan-shaped (cylindrical (1/4 cylinder)) notch. Further, the device 1a includes an electrode (electrode layer) 81 which is formed to cover the end surface 71 and has a shape in which the entire shape of the device 1 is a rectangular parallelepiped.
端面71係透過在絶緣層41及42的範圍內讓含 有基體10的4個角落的1個角落14a的部份(端部)10e產生缺口而形成。因此,陽極部51,係以包含基體10的1個角落14a的部份(端部)10e被第1絶緣層41的端部41e及第2絶緣層42的端部42e包夾的狀態(被絶緣的狀態)在端面71露出。因此,透過以電極層81覆蓋端面71,能利用電極層81將複數個電容器元件5的陽極部51並列地連接。再者,由於電極層81在裝置1a的安裝面90b露出,故兼作為第1外部連接用的電極(陽極端子)91。 The end face 71 is transmitted through the insulating layers 41 and 42 A portion (end portion) 10e having one corner 14a of the four corners of the base 10 is formed by a notch. Therefore, the anode portion 51 is in a state in which the portion (end portion) 10e including the one corner portion 14a of the base 10 is sandwiched by the end portion 41e of the first insulating layer 41 and the end portion 42e of the second insulating layer 42. The insulated state) is exposed at the end face 71. Therefore, by covering the end surface 71 with the electrode layer 81, the anode portions 51 of the plurality of capacitor elements 5 can be connected in parallel by the electrode layer 81. In addition, since the electrode layer 81 is exposed on the mounting surface 90b of the device 1a, it also serves as an electrode (anode terminal) 91 for the first external connection.
端面71能以含有基體10的4個角落14a~14d的部份任一露出的方式形成。端面71可以是複數個,亦可透過4個角落14a~14d的2個角落以上露出而形成。又,覆蓋複數個端面71的電極層81(陽極端子91)可為複數(多端子)個,亦可為連續的1個電極層81(陽極端子91)。 The end surface 71 can be formed in such a manner that any of the four corners 14a to 14d of the base 10 is exposed. The end faces 71 may be plural or formed by exposing the two corners of the four corners 14a to 14d. Further, the electrode layer 81 (anode terminal 91) covering the plurality of end faces 71 may be plural (multiple terminals), or may be one continuous electrode layer 81 (anode terminal 91).
此裝置1a亦透過構成外裝的一部份的電極層81而連接電容器元件5的陽極部51。因此,電極層81兼作為陽極端子(第1外部連接用電極)91。因此,可利用兼作為陽極端子91的電極層81電連接複數個電容器元件5。因此,可提供簡易且緊湊的構成之裝置1a。再者,由於使塑模體60的角隅產生缺口,形成連結用及外部連接用的電極層81(陽極端子91),可削減為了配線或電極所騰出的空間。因此,可將裝置1a的內容積作為電容器更有效地活用。因此,可提供緊湊且大容量的表面安裝型的裝置1a。又,切割塑模體60的部份(體積)被限定在角隅,亦可削減電極層81之熔射所使用的金屬量。因此,能以更低成本提供空間效率高、大容量的 裝置1a。 The device 1a is also connected to the anode portion 51 of the capacitor element 5 through an electrode layer 81 constituting a part of the exterior. Therefore, the electrode layer 81 also serves as an anode terminal (first external connection electrode) 91. Therefore, the plurality of capacitor elements 5 can be electrically connected by the electrode layer 81 which also serves as the anode terminal 91. Therefore, it is possible to provide the device 1a which is simple and compact. In addition, since the corners of the mold body 60 are notched, the electrode layer 81 (anode terminal 91) for connection and external connection is formed, and the space vacated by the wiring or the electrode can be reduced. Therefore, the inner volume of the device 1a can be utilized more effectively as a capacitor. Therefore, a compact and large-capacity surface mount type device 1a can be provided. Further, the portion (volume) of the cutting mold body 60 is limited to the corners, and the amount of metal used for the spraying of the electrode layer 81 can be reduced. Therefore, it is possible to provide space efficient and large capacity at a lower cost. Device 1a.
圖12係以穿透壓模樹脂99的狀態顯示又一不同的裝置1b之俯視圖。裝置1b的電容器單元50亦包含上下積層的2個電容器元件5b,電容器元件5b包含切成大致長方形的薄膜狀(板狀)的閥作用基體(基體)10。 Fig. 12 is a plan view showing still another different device 1b in a state of penetrating the molding resin 99. The capacitor unit 50 of the device 1b also includes two capacitor elements 5b stacked one above another, and the capacitor element 5b includes a film-shaped substrate (base) 10 cut into a substantially rectangular film shape (plate shape).
此裝置1b具有:形成在成形為直方體狀的塑模體60的右側面63a之中央的無階差之平坦(同一面)的端面71;以覆蓋其端面71的方式形成的電極層81。端面71係透過讓包含壓模樹脂99在內的第1絶緣層41、基體10的第1非被覆區域11a、第2非被覆區域12a、第2絶緣層42及基板90產生(切出)半月狀(半圓形)缺口而形成。電極層81係形成半圓筒狀地覆蓋端面71。因此,藉由壓模樹脂99和電極層81而形成整體被封裝成直方體狀的裝置1b。 This apparatus 1b has an end surface 71 which is formed in a flat (same surface) portion having no step in the center of the right side surface 63a of the molded body 60 formed into a rectangular parallelepiped shape, and an electrode layer 81 formed to cover the end surface 71 thereof. The end surface 71 transmits (cuts out) the first insulating layer 41 including the stamper resin 99, the first non-covered region 11a of the substrate 10, the second non-covered region 12a, the second insulating layer 42, and the substrate 90. Formed by a semi-circular notch. The electrode layer 81 covers the end surface 71 in a semi-cylindrical shape. Therefore, the device 1b which is integrally packaged in a rectangular parallelepiped shape is formed by the molding resin 99 and the electrode layer 81.
就此裝置1b而言,基體10的1個邊13a的中央部份(端部)10e係依端面71而在第1及第2絶緣層41及42的範圍內(寛度以下)被切割成半圓狀。因此,在端面71,中央部份(端部)10e呈現被第1絶緣層41及第2絶緣層42包夾的狀態。因此,陽極部51係在被絶緣的狀態露出。因此,透過以覆蓋端面71的方式形成電極層81能將複數個電容器元件5的陽極部51並列地連接,同時形成作為陽極端子(第1外部連接用電極)91的電極層81。 In the device 1b, the central portion (end portion) 10e of one side 13a of the base 10 is cut into a semicircle in the range of the first and second insulating layers 41 and 42 (below the twist) depending on the end surface 71. shape. Therefore, in the end surface 71, the central portion (end portion) 10e is in a state of being sandwiched by the first insulating layer 41 and the second insulating layer 42. Therefore, the anode portion 51 is exposed in an insulated state. Therefore, by forming the electrode layer 81 so as to cover the end surface 71, the anode portions 51 of the plurality of capacitor elements 5 can be connected in parallel, and the electrode layer 81 serving as the anode terminal (first external connection electrode) 91 can be formed.
同樣地,端面71亦能以包含基體10的4個邊13a~13d的任一邊的中央或從中央偏離的位置之方式形成。又,亦可提供形成複數個端面71,形成覆蓋各個端面71的複 數個電極層81且具備複數個陽極端子91的裝置。 Similarly, the end surface 71 can be formed to include a center of either side of the four sides 13a to 13d of the base 10 or a position deviated from the center. Moreover, a plurality of end faces 71 may be formed to form a complex covering each end face 71. A plurality of electrode layers 81 and a plurality of anode terminals 91 are provided.
此裝置1b亦透過積層於端面71的電極層81,在壓模樹脂99的外部61連接電容器元件5的陽極部51。因此,塑模體60的內部62亦可不設置配線空間。因此,可提供緊湊且大容量的裝置1b。又,亦可不將直方體狀封裝的1個面整體替換成電極層。因此,亦可削減電極層81之熔射所使用的金屬量,可提供含有複數個陽極端子91的裝置。因此,能以低成本提供低ESL及低ESR且小型大容量的裝置。 This device 1b also passes through the electrode layer 81 laminated on the end surface 71, and connects the anode portion 51 of the capacitor element 5 to the outside 61 of the stamper resin 99. Therefore, the inner portion 62 of the molded body 60 may not be provided with a wiring space. Therefore, a compact and large-capacity device 1b can be provided. Further, the entire surface of the rectangular package may not be replaced with the electrode layer. Therefore, the amount of metal used for the electrode layer 81 to be melted can be reduced, and a device including a plurality of anode terminals 91 can be provided. Therefore, a device with low ESL and low ESR and small size and large capacity can be provided at low cost.
圖13係以穿透壓模樹脂99的狀態顯示又一不同的裝置1c之俯視圖。又,在圖14,利用XIV-XIV剖面圖(圖13的XIV-XIV剖面)顯示裝置1c。 Fig. 13 is a plan view showing still another different device 1c in a state of penetrating the molding resin 99. Further, in Fig. 14, the apparatus 1c is displayed by the XIV-XIV sectional view (XIV-XIV cross section of Fig. 13).
此裝置1c包含形成在成形為直方體狀的塑模體60的1個角隅64a上的貫通孔70。貫通孔70具有無階差之平坦(同一面)的內周面(第1面)71。內周面71係透過在未讓包含壓模樹脂99在內的第1絶緣層41、基體10的第1非被覆區域11a、第2非被覆區域12a、第2絶緣層42及基板90產生缺口下以呈圓形的方式貫通(拔出)所形成。貫通孔70係在第1及第2絶緣層41及42的寛度內(範圍內)貫通。因此,在內周面71,各個電容器元件5的陽極部51以被絶緣的狀態露出。因此,透過將導電性糊等充填於貫通孔70,使導電性糊塗布(附著)在貫通孔70的內周面71,能形成電極層81以覆蓋內周面71。因此,可連接複數個電容器元件5的陽極部51。因此,可將作為陽極端子(第1外部連接用電極)91的電極層81形成於塑模體60的外部61。此外,於內 周面(第1面)71塗布導電性糊,係包含向貫通孔70充填(注入)導電性糊的概念,且進一步包含將充填於貫通孔70的導電性糊塗布於內周面71(使之附著、密接)的概念。 This device 1c includes a through hole 70 formed in one corner 64a of a molded body 60 formed into a rectangular parallelepiped shape. The through hole 70 has an inner peripheral surface (first surface) 71 having no flatness (same surface) of step difference. The inner peripheral surface 71 is permeable to the first non-covered region 11a, the second non-covered region 12a, the second insulating layer 42, and the substrate 90 in which the first insulating layer 41 including the stamper resin 99 and the substrate 10 are not allowed to pass. The lower part is formed by being inserted (extracted) in a circular shape. The through hole 70 penetrates within the range of the first and second insulating layers 41 and 42 (in the range). Therefore, on the inner peripheral surface 71, the anode portion 51 of each capacitor element 5 is exposed in an insulated state. Therefore, the conductive paste is applied to the through hole 70, and the conductive paste is applied (attached) to the inner peripheral surface 71 of the through hole 70, whereby the electrode layer 81 can be formed to cover the inner peripheral surface 71. Therefore, the anode portion 51 of the plurality of capacitor elements 5 can be connected. Therefore, the electrode layer 81 as the anode terminal (first external connection electrode) 91 can be formed on the outer portion 61 of the mold body 60. In addition, inside The circumferential surface (first surface) 71 is coated with a conductive paste, and includes a concept of filling (injecting) a conductive paste into the through hole 70, and further including applying a conductive paste filled in the through hole 70 to the inner peripheral surface 71 (so that The concept of attachment and closeness.
如此,在塑模體60一旦形成之後,不僅以電極層81覆蓋讓包含塑模體60在內的含有基體10的4個邊13a~13d的部份或含有4個角落14a~14d的部份產生缺口所成的端面71,亦能以電極層81覆蓋在第1絶緣層41及第2絶緣層42的範圍內貫穿基體10所成的端面71。就此裝置1c而言,透過以電極層81置換呈貫通狀被拔出的部份(貫通孔70),能將複數個電容器元件5的陽極部51並列地連接,同時形成作為端子電極91的電極層81。 Thus, after the mold body 60 is formed, not only the electrode layer 81 but also the portion including the four sides 13a to 13d of the substrate 10 or the portions including the four corners 14a to 14d including the mold body 60 is covered. The end surface 71 formed by the notch can also cover the end surface 71 formed by the base 10 in the range of the first insulating layer 41 and the second insulating layer 42 by the electrode layer 81. In the device 1c, the anode portion 51 of the plurality of capacitor elements 5 can be connected in parallel by forming a portion (through hole 70) that is pulled out in a penetrating manner by the electrode layer 81, and an electrode serving as the terminal electrode 91 can be formed. Layer 81.
此裝置1c中亦不需要用以將接合線(金屬線)等之電容器元件5與基板90或導線架連接的配線構件。因此,可省略用以配置該些配線構件的配線空間。再者,裝置1c的封裝的大部份是被塑模體60所佔據。因此,能以更低成本提供均衡的形狀且空間效率高、大容量的裝置1c。 A wiring member for connecting the capacitor element 5 such as a bonding wire (metal wire) to the substrate 90 or the lead frame is not required in the device 1c. Therefore, the wiring space for arranging the wiring members can be omitted. Moreover, most of the package of device 1c is occupied by molded body 60. Therefore, the device 1c having a balanced shape and high space efficiency and large capacity can be provided at a lower cost.
圖15係顯示扣除電極層81後的又一不同的裝置1d之狀態的斜視圖。在圖16,利用XVI-XVI剖面圖(圖15的XVI-XVI剖面)顯示裝置1d的概略構造。 Fig. 15 is a perspective view showing a state of still another different device 1d after the electrode layer 81 is removed. In Fig. 16, the schematic structure of the device 1d is shown by the XVI-XVI sectional view (XVI-XVI cross section of Fig. 15).
此裝置1d具有:形成在成形為直方體狀的塑模體60的右側面63a的無階差之平坦(同一面)的端面71及以覆蓋其端面71的方式形成的電極層81。端面71係透過讓包含壓模樹脂99在內的第1絶緣層41、基體10的第1非被覆區域11a、第2非被覆區域12a、第2絶緣層42以及作為 第1陽極端子(第1外部連接用電極)91的導線架190的陽極引線端子191產生缺口(切斷、切割)而形成。 This device 1d has an end surface 71 which is formed on the right side surface 63a of the molded body 60 formed into a rectangular parallelepiped shape, and has an uneven surface (the same surface) 71 and an electrode layer 81 formed to cover the end surface 71 thereof. The end surface 71 transmits the first insulating layer 41 including the stamper resin 99, the first non-covered region 11a of the substrate 10, the second non-covered region 12a, and the second insulating layer 42 The anode lead terminal 191 of the lead frame 190 of the first anode terminal (first external connection electrode) 91 is formed by a notch (cutting or cutting).
裝置1d的電容器單元50包含上下積層的2個電容器元件5d。電容器元件5d並没有貫通基體10的貫通孔15,取而代之的是,包含形成於基體10的1個邊35c的側面之第3機能層33且為繋接第1機能層31及第2機能層32的第3機能層33。因此,第1絶緣層41係沿著第1機能層31的周緣35的3個邊35a、35b及35d形成。第2絶緣層42係沿著第2機能層32的周緣36的3個邊36a、36b及36d形成。第1機能層31及第2機能層32係經由形成在1個邊35c上的第3機能層33而電連接。 The capacitor unit 50 of the device 1d includes two capacitor elements 5d stacked one above another. The capacitor element 5d does not penetrate the through hole 15 of the base 10, and instead includes the third functional layer 33 formed on the side surface of one side 35c of the base 10 and is connected to the first functional layer 31 and the second functional layer 32. The third functional layer 33. Therefore, the first insulating layer 41 is formed along the three sides 35a, 35b, and 35d of the peripheral edge 35 of the first functional layer 31. The second insulating layer 42 is formed along the three sides 36a, 36b, and 36d of the peripheral edge 36 of the second functional layer 32. The first functional layer 31 and the second functional layer 32 are electrically connected via a third functional layer 33 formed on one side 35c.
因此,各個電容器元件5d的陰極層22係透過取代貫通基體10的貫通孔15用的第3機能層33而被並列地連接。再者,陽極部51係透過形成於端面71的電極層81而並列地連接。因此,可提供緊湊且大容量的裝置1d。 Therefore, the cathode layer 22 of each capacitor element 5d is connected in parallel by the third functional layer 33 for the through hole 15 penetrating through the base 10. Further, the anode portion 51 is connected in parallel by the electrode layer 81 formed on the end surface 71. Therefore, a compact and large-capacity device 1d can be provided.
再者,陽極部51和陽極引線端子191可藉由覆蓋端面71的電極層81電連接。又,陰極層22和陰極引線端子192可藉由經由導電性糊等而電連接。 Further, the anode portion 51 and the anode lead terminal 191 can be electrically connected by the electrode layer 81 covering the end surface 71. Further, the cathode layer 22 and the cathode lead terminal 192 can be electrically connected by a conductive paste or the like.
圖17係顯示又一不同的裝置1e的概略構成之剖面圖。裝置1e的電容器單元50包含左右位置錯開(千鳥狀)地上下積層的2個電容器元件5e。例如,各個電容器元件5e為,貫通基體10的貫通孔15設在從基體10的中央向4個邊13a~13d的任一方向些許偏移的位置(偏心(shift)位置)。因此,將該等電容器元件5e以改變朝向使貫通孔15上 下對向的方式疊合時,基體10的端部10e可上下不一致地錯開積層。亦可使中央有貫通孔15的電容器元件5、無貫通孔15的電容器元件5d同樣地以基體10的端部10e上下不一致般地疊合。 Fig. 17 is a cross-sectional view showing a schematic configuration of still another different device 1e. The capacitor unit 50 of the device 1e includes two capacitor elements 5e which are vertically stacked in a left-right position (a thousand birds). For example, in each of the capacitor elements 5e, the through hole 15 penetrating the base 10 is provided at a position (eccentric position) slightly shifted from the center of the base 10 to any of the four sides 13a to 13d. Therefore, the capacitor elements 5e are oriented to change the orientation to the through holes 15. When the lower opposing manner is superimposed, the end portion 10e of the base 10 can be staggered in a staggered manner. The capacitor element 5 having the through hole 15 at the center and the capacitor element 5d having no through hole 15 may be stacked in the same manner as the end portion 10e of the base 10 in the same manner.
就此裝置1e而言,具有:分別形成在成形為直方體狀的塑模體60的兩側,即右側面63a及左側面63c之第1端面71及第2端面72;覆蓋各個端面71及72的第1電極層81及第2電極層82。第1端面71係透過讓包含壓模樹脂99在內的下側的電容器元件5e的第1絶緣層41、基體10的第1非被覆區域11a、第2非被覆區域12a、第2絶緣層42以及作為第1陽極端子(第1外部連接用電極)91a的導線架190的第1陽極引線端子191a產生缺口(切斷、切割)而形成。第2端面72係透過讓包含壓模樹脂99在內的上側的電容器元件5e的第1絶緣層41、基體10的第1非被覆區域11a、第2非被覆區域12a、第2絶緣層42及作為第2陽極端子91b的導線架190的第2陽極引線端子191b產生缺口而形成。 The device 1e has a first end face 71 and a second end face 72 which are formed on both sides of the molded body 60 which is formed into a rectangular parallelepiped shape, that is, the right side face 63a and the left side face 63c, and cover the respective end faces 71 and 72. The first electrode layer 81 and the second electrode layer 82. The first end surface 71 transmits the first insulating layer 41 of the lower capacitor element 5e including the stamper resin 99, the first non-covered region 11a of the base 10, the second non-covered region 12a, and the second insulating layer 42. The first anode lead terminal 191a of the lead frame 190 as the first anode terminal (first external connection electrode) 91a is formed by a notch (cutting or cutting). The second end surface 72 transmits the first insulating layer 41 of the upper capacitor element 5e including the stamper resin 99, the first non-covered region 11a of the substrate 10, the second non-covered region 12a, and the second insulating layer 42. The second anode lead terminal 191b of the lead frame 190 as the second anode terminal 91b is formed to have a notch.
因此,下側的電容器元件5e的陽極部51和第1陽極引線端子191a,係藉由覆蓋第1端面71的第1電極層81而電連接。又,上側的電容器元件5e的陽極部51和第2陽極引線端子191b,係藉由覆蓋第2端面72的第2電極層82而電連接。又,該等電極層81及82到達安裝面190b,分別作為連接電極發揮機能。再者,於安裝面90b的中央設有作為陰極端子92的陰極引線端子192,以與電容器元件5e的陰極層22及/或貫通電極19連接。 Therefore, the anode portion 51 of the lower capacitor element 5e and the first anode lead terminal 191a are electrically connected by the first electrode layer 81 covering the first end surface 71. Further, the anode portion 51 and the second anode lead terminal 191b of the upper capacitor element 5e are electrically connected by the second electrode layer 82 covering the second end surface 72. Further, the electrode layers 81 and 82 reach the mounting surface 190b and function as connection electrodes. Further, a cathode lead terminal 192 as a cathode terminal 92 is provided at the center of the mounting surface 90b to be connected to the cathode layer 22 and/or the through electrode 19 of the capacitor element 5e.
此裝置1e中,積層的複數個電容器元件5e以在水平方向的端部的位置錯開的方式積層。因此,在形成第1及第2端面71及72時,相異的電容器元件5e的基體10的端部10e在各個端面71及72露出。因此,可透過分別形成於相異的端面71及72的電極層81及82獨立地連接各個電容器元件5e。因此,可提供具備複數個靜電容量的多端子的電容器裝置1e。再者,透過上側的電容器元件5e和下側的電容器元件5e變更基體10的耐電壓,可提供多端子多電壓規格的裝置1e。 In the device 1e, a plurality of laminated capacitor elements 5e are laminated such that the positions at the ends in the horizontal direction are shifted. Therefore, when the first and second end faces 71 and 72 are formed, the end portions 10e of the base 10 of the different capacitor elements 5e are exposed at the respective end faces 71 and 72. Therefore, the respective capacitor elements 5e can be independently connected through the electrode layers 81 and 82 formed on the different end faces 71 and 72, respectively. Therefore, a multi-terminal capacitor device 1e having a plurality of electrostatic capacitances can be provided. Further, by changing the withstand voltage of the base 10 through the upper capacitor element 5e and the lower capacitor element 5e, the multi-terminal multi-voltage specification device 1e can be provided.
電容器元件5e未侷限於左右2個方向,可在3個或4個方向錯開地積層。覆蓋端面的電極層未侷限於直方體狀封裝之對峙的側面,可分別形成於3或4方的面。再者,透過採用多角形的封裝、左右地配置複數個電容器元件5e,可設置更多的端子。 The capacitor element 5e is not limited to the left and right directions, and may be stacked in three or four directions. The electrode layer covering the end faces is not limited to the side faces of the opposite sides of the rectangular package, and may be formed on the faces of 3 or 4 squares, respectively. Further, by using a polygonal package and a plurality of capacitor elements 5e arranged left and right, more terminals can be provided.
圖18係顯示又一不同的裝置1f的概略構成之剖面圖。裝置1f的電容器單元50包含上下積層的2個電容器元件5f及5。上側的電容器元件5f係作成比下側的電容器元件5的尺寸小者。就此電容器單元50而言,係將不同尺寸的2個電容器元件5f及5以下側的電容器元件5的貫通孔15和上側的電容器元件5f的貫通孔15上下繋接的方式重疊。 Fig. 18 is a cross-sectional view showing a schematic configuration of still another different device 1f. The capacitor unit 50 of the device 1f includes two capacitor elements 5f and 5 stacked vertically. The capacitor element 5f on the upper side is made smaller than the size of the capacitor element 5 on the lower side. In the capacitor unit 50, the through holes 15 of the capacitor elements 5 on the lower side of the two capacitor elements 5f and 5 of different sizes and the through holes 15 of the upper capacitor element 5f are superposed on each other.
此裝置1f亦具有:在成形為直方體狀的塑模體60的兩側,即右側面63a露出的第1端面71;左側面63c露出的第2端面72。第1端面71係透過讓包含壓模樹脂99在內的下側的電容器元件5的第1絶緣層41、基體10的第1 非被覆區域11a、第2非被覆區域12a、第2絶緣層42及作為第1陽極端子(第1外部連接用電極)91a的導線架190的第1陽極引線端子191a產生缺口而形成。而且,第1端面71被第1電極層81所覆蓋。又,第2端面72係透過讓包含壓模樹脂99在內的上側的電容器元件5f及下側的電容器元件5的第1絶緣層41、基體10的第1非被覆區域11a、第2非被覆區域12a、第2絶緣層42及作為第2陽極端子91b的導線架190的第2陽極引線端子191b產生缺口而形成。而且,第2端面72被第2電極層82所覆蓋。 This device 1f also has a first end surface 71 that is exposed on both sides of the molded body 60 that is formed into a rectangular parallelepiped shape, that is, the first end surface 71 that is exposed on the right side surface 63a, and a second end surface 72 that is exposed on the left side surface 63c. The first end surface 71 transmits the first insulating layer 41 of the lower capacitor element 5 including the stamper resin 99, and the first substrate 10 The non-covered region 11a, the second non-covered region 12a, the second insulating layer 42, and the first anode lead terminal 191a of the lead frame 190 as the first anode terminal (first external connection electrode) 91a are formed to have a notch. Further, the first end surface 71 is covered by the first electrode layer 81. In addition, the second end surface 72 transmits the first insulating layer 41 including the upper capacitor element 5f and the lower capacitor element 5, the first non-covered region 11a of the substrate 10, and the second non-covered layer. The region 12a, the second insulating layer 42, and the second anode lead terminal 191b of the lead frame 190 as the second anode terminal 91b are formed to have a notch. Further, the second end surface 72 is covered by the second electrode layer 82.
因此,下側的電容器元件5的陽極部51和第1陽極引線端子191a,係藉由第1端面71的第1電極層81而電連接。上側的電容器元件5f的陽極部51及下側的電容器元件5的陽極部51和第2陽極引線端子191b,係藉由第2端面72的第2電極層82而電連接。 Therefore, the anode portion 51 of the lower capacitor element 5 and the first anode lead terminal 191a are electrically connected by the first electrode layer 81 of the first end surface 71. The anode portion 51 of the upper capacitor element 5f and the anode portion 51 and the second anode lead terminal 191b of the lower capacitor element 5 are electrically connected by the second electrode layer 82 of the second end surface 72.
因此,在僅下側的電容器元件5的陽極部51進行外部連接的情況,可使用第1端面71的第1電極層81及第1陽極端子91a(第1陽極引線端子191a)。另一方面,在將上下積層的2個電容器元件5f及5的陽極部51進行外部連接的情況,可使用第2端面72的電極層82及第2陽極端子91b(第2陽極引線端子191b)。因此,透過變更在兩側引出的陽極部51的數量,可提供具備複數個靜電容量的裝置1f。再者,透過利用上側的電容器元件5f和下側的電容器元件5變更基體10的耐電壓,可提供多種電壓規格的裝置1f。 Therefore, when only the anode portion 51 of the lower capacitor element 5 is externally connected, the first electrode layer 81 of the first end surface 71 and the first anode terminal 91a (first anode lead terminal 191a) can be used. On the other hand, when the anode portions 51 of the two capacitor elements 5f and 5 stacked one above another are externally connected, the electrode layer 82 of the second end surface 72 and the second anode terminal 91b (second anode lead terminal 191b) can be used. . Therefore, by changing the number of anode portions 51 drawn on both sides, it is possible to provide a device 1f having a plurality of electrostatic capacitances. Further, by changing the withstand voltage of the base 10 by the upper capacitor element 5f and the lower capacitor element 5, a plurality of voltage-sized devices 1f can be provided.
圖19係顯示又一不同的裝置1g的概略構成之 剖面圖。此裝置1g係從圖5所示的裝置1省略了第1絶緣層41及第2絶緣層42。 Figure 19 shows a schematic configuration of a further different device 1g. Sectional view. In the device 1g, the first insulating layer 41 and the second insulating layer 42 are omitted from the device 1 shown in FIG.
此裝置1g包含具備將除了基體10的表面11及背面12各自的周緣(全周)以外的部份予以覆蓋的第1機能層31及第2機能層32之電容器元件5g。電容器元件5g係包含沒被基體10的表面11的第1機能層31覆蓋的第1非被覆區域11a及沒被基體10的背面12的第2機能層32覆蓋的第2非被覆區域12a。 The device 1g includes a capacitor element 5g including a first functional layer 31 and a second functional layer 32 which cover portions other than the periphery (all circumferences) of the surface 11 and the back surface 12 of the substrate 10. The capacitor element 5g includes a first non-covered region 11a that is not covered by the first functional layer 31 of the surface 11 of the substrate 10, and a second non-covered region 12a that is not covered by the second functional layer 32 of the back surface 12 of the substrate 10.
此裝置1g的第1非被覆區域11a及第2非被覆區域12a雖被介電體氧化皮膜20所覆蓋,但沒被第1絶緣層41及第2絶緣層42覆蓋。因此,裝置1g的端面71係透過讓包含壓模樹脂99在內的電容器元件5g的基體10的第1非被覆區域11a、第2非被覆區域12a及基板90產生缺口(切斷、切割)而形成。而且,端面71被電極層81所覆蓋。如此一來,介電體氧化皮膜20亦可作成兼具將第1及第2機能層31及32和電極層81絶緣的機能。 The first non-covered region 11a and the second non-covered region 12a of the device 1g are covered by the dielectric oxide film 20, but are not covered by the first insulating layer 41 and the second insulating layer 42. Therefore, the end surface 71 of the device 1g transmits the notch (cutting and cutting) of the first non-covered region 11a, the second non-covered region 12a, and the substrate 90 of the substrate 10 of the capacitor element 5g including the stamper resin 99. form. Moreover, the end face 71 is covered by the electrode layer 81. As a result, the dielectric oxide film 20 can also function to insulate the first and second functional layers 31 and 32 from the electrode layer 81.
此外,本發明未侷限於該等實施形態,而是包含申請專利範圍所規定者。又,本發明所涉及的裝置的電容器單元50可以是包含1個電容器元件,亦可包含積層有2個以上的電容器元件。又,電容器元件可以是非固態的電解電容器、陶瓷型的電容器及薄膜型的電容器等之其他類型的電容器元件。又,本發明所涉及的裝置不僅和CPU組合,亦可和其他電路元件作組合,例如亦可適用於DC-DC轉換器的平滑電路等。 Further, the present invention is not limited to the embodiments, but includes those specified in the scope of the patent application. Further, the capacitor unit 50 of the device according to the present invention may include one capacitor element, or may include two or more capacitor elements stacked. Further, the capacitor element may be another type of capacitor element such as a non-solid electrolytic capacitor, a ceramic capacitor, or a thin film capacitor. Further, the device according to the present invention may be combined with a CPU or a combination of other circuit elements, and may be applied to, for example, a smoothing circuit of a DC-DC converter.
1‧‧‧裝置 1‧‧‧ device
2‧‧‧安裝面 2‧‧‧Installation surface
5‧‧‧電容器元件 5‧‧‧ capacitor components
10‧‧‧基體 10‧‧‧ base
10e‧‧‧端部 10e‧‧‧ end
11‧‧‧表面 11‧‧‧ surface
11a‧‧‧第1非被覆區域 11a‧‧‧1st non-covered area
12‧‧‧背面 12‧‧‧ Back
12a‧‧‧第2非被覆區域 12a‧‧‧2nd non-covered area
15‧‧‧貫通孔(通孔) 15‧‧‧through holes (through holes)
15c‧‧‧內周面 15c‧‧‧ inner circumference
19‧‧‧貫通電極 19‧‧‧through electrodes
20‧‧‧介電體氧化皮膜 20‧‧‧Dielectric oxide film
21‧‧‧固態電解質層 21‧‧‧Solid electrolyte layer
22a(22)‧‧‧電極層(陰極層) 22a (22) ‧ ‧ electrode layer (cathode layer)
22b(22)‧‧‧電極層(陰極層) 22b (22) ‧ ‧ electrode layer (cathode layer)
31‧‧‧第1機能層 31‧‧‧1st functional layer
32‧‧‧第2機能層 32‧‧‧2nd functional layer
33‧‧‧第3電容器機能層(機能層) 33‧‧‧3rd Capacitor Functional Layer (Functional Layer)
35‧‧‧周緣 35‧‧‧ Periphery
36‧‧‧周緣 36‧‧‧ Periphery
41‧‧‧第1絶緣層 41‧‧‧1st insulation layer
42‧‧‧第2絶緣層 42‧‧‧2nd insulation layer
42e‧‧‧端部 42e‧‧‧ end
50‧‧‧電容器單元 50‧‧‧ capacitor unit
51‧‧‧陽極部 51‧‧‧Anode
60‧‧‧塑模體 60‧‧‧ mould body
62‧‧‧內部空間 62‧‧‧Internal space
63a‧‧‧右側面(一部份) 63a‧‧‧right side (part of)
71‧‧‧端面 71‧‧‧ end face
81‧‧‧電極層 81‧‧‧Electrode layer
90‧‧‧基板 90‧‧‧Substrate
90a‧‧‧搭載側的面 90a‧‧‧Side side
90b‧‧‧安裝側的面 90b‧‧‧Face on the side of the installation
90e‧‧‧端部 90e‧‧‧ end
91‧‧‧陽極端子(陽極連接電極、第1外部連接用電極) 91‧‧‧Anode terminal (anode connection electrode, first external connection electrode)
92‧‧‧陰極端子(陰極連接用電極、第2外部連接用電極) 92‧‧‧ cathode terminal (electrode for cathode connection, electrode for second external connection)
92a,92b‧‧‧電極層 92a, 92b‧‧‧ electrode layer
92c‧‧‧核心層 92c‧‧‧ core layer
95‧‧‧電極(通孔) 95‧‧‧electrodes (through holes)
99‧‧‧壓模樹脂 99‧‧‧Molded resin
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