TW201315824A - Method of manufacturing component and component - Google Patents

Method of manufacturing component and component Download PDF

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Publication number
TW201315824A
TW201315824A TW101129395A TW101129395A TW201315824A TW 201315824 A TW201315824 A TW 201315824A TW 101129395 A TW101129395 A TW 101129395A TW 101129395 A TW101129395 A TW 101129395A TW 201315824 A TW201315824 A TW 201315824A
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TW
Taiwan
Prior art keywords
alloy film
substrate
film
component
alloy
Prior art date
Application number
TW101129395A
Other languages
Chinese (zh)
Other versions
TWI495739B (en
Inventor
Yuu Nakamuta
Masahiro Matsumoto
Takayuki Inagaki
Daisuke Hiramatsu
Noriaki Tani
Original Assignee
Ulvac Inc
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Publication date
Application filed by Ulvac Inc filed Critical Ulvac Inc
Publication of TW201315824A publication Critical patent/TW201315824A/en
Application granted granted Critical
Publication of TWI495739B publication Critical patent/TWI495739B/en

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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14—Metallic material, boron or silicon
    • C23C14/16—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon
    • C23C14/165—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon by cathodic sputtering
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
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Abstract

This method of manufacturing a component includes in this order at least: a process A1 of using a substrate with a surface of one side made of nickel and forming an alloy film, which is composed mainly of tin, on the surface of one side by sputtering; a process A3 of disposing a part, which has at least a contact portion with the alloy film, on the alloy film, the contact portion being made of any one of copper and nickel-coated aluminum; and a process A4 of executing a heat treatment to enable respective bonds between the substrate and the alloy film and between the alloy film and the part. At the process A1, when a cathode electrode which is provided with an alloy target composed mainly of tin is arranged to face an anode electrode which is provided with the substrate within a decompressed space and the alloy film is formed on the surface of one side of the substrate, a DC voltage is applied to the cathode electrode.

Description

零件之製造方法及零件 Parts manufacturing method and parts

本發明係關於零件之製造方法及零件。更詳細而言，本發明係關於一種可一方面確保機械特性、電性特性，且藉由焊錫層之薄膜化，亦可謀求低成本化及薄型化之零件之製造方法及零件。 The present invention relates to a method of manufacturing a part and a part. More specifically, the present invention relates to a method and a part for manufacturing a part which can ensure the mechanical properties and the electrical characteristics, and which can be reduced in thickness and thickness by the thinning of the solder layer.

本案係基於且主張2011年08月16日於日本提交申請之專利申請案第2011-177893號之優先權，其內容以引用之方式併入本文中。 The present application is based on and claims the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the benefit of the present disclosure.

半導體裝置等之安裝時，使用Sn-Pb(錫-鉛)合金或Sn-Au(錫-金)合金等之焊錫材料。尤其，Sn系焊錫向鋁等之電極層中之錫成份之擴散顯著，對焊錫接合部之可靠性造成較大之影響。因此，使用Sn系焊錫時，對底層之電極層，不直接形成焊錫層，而經由用於防止錫成份之擴散之屏障層、用以提高接合強度之密著層形成焊錫層(例如，參照專利文獻1)。 When mounting a semiconductor device or the like, a solder material such as a Sn-Pb (tin-lead) alloy or a Sn-Au (tin-gold) alloy is used. In particular, the Sn-based solder diffuses significantly into the tin component in the electrode layer of aluminum or the like, and has a large influence on the reliability of the solder joint portion. Therefore, when the Sn-based solder is used, the solder layer is not directly formed on the electrode layer of the underlayer, and the solder layer is formed by the barrier layer for preventing the diffusion of the tin component and the adhesion layer for improving the bonding strength (for example, refer to the patent) Document 1).

圖10A~10F係模式性顯示先前之零件製造方法之工序剖面圖。先前之零件製造方法係以下述之程序10a至程序10f之順序進行。 10A to 10F are schematic cross-sectional views showing the steps of the conventional part manufacturing method. The previous part manufacturing method was carried out in the order of the following procedures 10a to 10f.

(程序10a) (Procedure 10a)

如圖10A所示，在基板100上，作為底層膜101，利用濺鍍法依序積層形成Au膜(密著層)、Ni膜(屏障層)、Ti膜、及Al膜。 As shown in FIG. 10A, on the substrate 100, an Au film (adhesive layer), a Ni film (barrier layer), a Ti film, and an Al film are formed in this order by a sputtering method as the underlayer film 101.

(程序10b) (Procedure 10b)

如圖10B所示，於相當於後置工序中裝載零件之區域之部分，將具備通孔102a之帶狀之抗蝕劑102設於上述底層膜101上。 As shown in FIG. 10B, a strip-shaped resist 102 having a through hole 102a is provided on the underlying film 101 at a portion corresponding to a region where the component is mounted in the subsequent step.

(程序10c) (Procedure 10c)

如圖10C所示，於通過上述抗蝕劑102之通孔102a可見之上述底層膜101上，至少塗佈焊錫膏103。 As shown in FIG. 10C, at least the solder paste 103 is applied onto the underlying film 101 which is visible through the via 102a of the resist 102.

(程序10d) (Program 10d)

如圖10D所示，在通過上述抗蝕劑之通孔102a可見之上述底層膜101上，經由焊錫膏103而載置零件104。 As shown in FIG. 10D, the component 104 is placed on the underlying film 101 which is visible through the via hole 102a of the resist described above via the solder paste 103.

(程序10e) (Procedure 10e)

如圖10E所示，實施熱處理，而分別接合上述基板100與上述底層膜101之間、上述底層膜101與焊錫膏103之間、及上述焊錫膏103與上述零件104之間。 As shown in FIG. 10E, heat treatment is performed to bond between the substrate 100 and the underlayer film 101, between the underlayer film 101 and the solder paste 103, and between the solder paste 103 and the component 104.

(程序10f) (Program 10f)

最後，如圖10F所示，除去上述抗蝕劑102。 Finally, as shown in FIG. 10F, the above resist 102 is removed.

然而，作為底層膜之材料而使用之金(Au)價高，而會導致成本增加。 However, gold (Au) used as a material of the underlayer film is expensive, resulting in an increase in cost.

再者，在使用於基板上安裝零件而成之安裝品之組件中，組件整體之小型化之要求亦日益強烈，安裝品自體之薄型化要求亦變得嚴格。 Further, in the assembly of the mounted article in which the component is mounted on the substrate, the miniaturization of the entire assembly is also increasingly demanded, and the thinning requirements of the mounting article itself are also strict.

如先前般，若藉由塗佈焊錫膏形成焊錫層，則會導致焊錫層之厚度變厚，例如為50 μm。若使焊錫層變薄，則有機械特性、電性特性降低之問題，進而安裝品成為組件薄 型化之阻礙。 As before, if the solder layer is formed by applying a solder paste, the thickness of the solder layer becomes thick, for example, 50 μm. If the solder layer is made thin, there is a problem that the mechanical properties and electrical properties are lowered, and the mounted product becomes a thin component. The obstacle to the formation.

[先前技術文獻] [Previous Technical Literature] [專利文獻] [Patent Literature]

[專利文獻1]日本特開2006-269458號公報 [Patent Document 1] Japanese Patent Laid-Open Publication No. 2006-269458

本發明係鑒於如此之先前之實際情況而設計者，目的在於提供一種可一方面確保與先前同等之機械特性、電性特性，並可將焊錫層薄膜化，而可實現低成本化、薄型化之零件之製作方法及零件。 The present invention has been made in view of such a conventional situation, and it is an object of the present invention to provide a mechanical layer and an electrical property which are equivalent to the prior art, and which can reduce the thickness of the solder layer, thereby achieving cost reduction and thinning. The manufacturing method and parts of the parts.

(1)本發明之第一態樣之零件之製造方法，至少依序包含：工序A1，其係使用一面包含鎳之基板，而在上述一面上，利用濺鍍法形成以錫為主要成份之合金膜；工序A3，其係在上述合金膜上載置零件，該零件之至少與上述合金膜之接觸部位包含銅及被覆鎳之鋁之任一者；及工序A4，其係實施熱處理，以分別接合上述基板與上述合金膜之間、及上述合金膜與上述零件之間；且在上述工序A1中，於減壓環境之空間內，將設有以錫為主要成份之合金靶材之陰極電極、與設有上述基板之陽極電極對向配置，在上述基板之上述一面上，於形成上述合金膜時，對上述陰極電極施加DC電壓。 (1) A method of manufacturing a part according to a first aspect of the present invention, comprising at least a step A1, which uses a substrate containing nickel on one side, and on the one side, a tin-based composition is formed by sputtering. An alloy film; the step A3, wherein the component is placed on the alloy film, and at least a portion of the component that is in contact with the alloy film includes copper and aluminum coated with nickel; and the step A4 is performed by heat treatment to separate a bonding electrode between the substrate and the alloy film, and between the alloy film and the component; and in the step A1, a cathode electrode provided with an alloy target containing tin as a main component in a space of a reduced pressure environment And being disposed opposite to the anode electrode provided with the substrate, and applying a DC voltage to the cathode electrode on the one surface of the substrate when the alloy film is formed.

(2)上述(1)中揭示之製造方法亦可於上述工序A1與上述工序A3之間進而包含工序A2，其係於相當於後置工序中裝 載上述零件之區域之部分，將形成有通孔之帶狀之抗蝕劑設於上述合金膜上。 (2) The manufacturing method disclosed in the above (1) may further include a step A2 between the step A1 and the step A3, which is equivalent to the post-process A portion of the region where the above-mentioned components are placed is provided with a strip-shaped resist having through holes formed thereon.

(3)上述(2)中揭示之製造方法亦可於上述工序A2與上述工序A3之間進而包含工序A6，其係於通過上述抗蝕劑之上述通孔而可見之上述合金膜上塗佈焊劑，而除去成為上述合金膜之表層之氧化膜。 (3) The manufacturing method disclosed in the above (2) may further include a step A6 between the step A2 and the step A3, which is applied to the alloy film which is visible through the through hole of the resist. The flux is removed to remove the oxide film which is the surface layer of the above alloy film.

(4)上述(2)或(3)中揭示之製造方法亦可進而包含工序A5，其係除去上述抗蝕劑。 (4) The production method disclosed in the above (2) or (3) may further include the step A5 of removing the resist.

(5)本發明之第二態樣之零件之製造方法，至少依序包含：工序B1，其係使用一面包含鎳之基板，而在上述一面上，利用濺鍍法形成以錫為主要成份之合金膜；工序B3，其係在上述合金膜上，至少塗佈焊錫膏；工序B4，其係在上述合金膜上，經由上述焊錫膏而載置零件，該零件之至少接觸部位包含銅及被覆鎳之鋁之任一者；及工序B5，其係實施熱處理，以分別接合上述基板與上述合金膜之間、上述焊錫膏與上述合金膜之間、及上述焊錫膏與上述零件之間；且在上述工序B1中，於減壓環境之空間內，將設有以錫為主要成份之合金靶材之陰極電極、與設有上述基板之陽極電極對向配置，在上述基板之上述一面上，於形成上述合金膜時，對上述陰極電極施加DC電壓。 (5) A method of manufacturing a second aspect of the present invention, comprising, at least in sequence, a step B1 of using a substrate containing nickel on one side, and forming tin as a main component by sputtering on the one side. An alloy film; a step B3 of applying at least a solder paste to the alloy film; and a step B4 of placing the component on the alloy film via the solder paste, wherein at least a contact portion of the component includes copper and a coating And a step B5 of performing heat treatment to bond between the substrate and the alloy film, between the solder paste and the alloy film, and between the solder paste and the component; In the step B1, a cathode electrode provided with an alloy target containing tin as a main component is disposed opposite to an anode electrode provided with the substrate in a space of a reduced pressure environment, and is disposed on the one surface of the substrate When the alloy film is formed, a DC voltage is applied to the cathode electrode.

(6)上述(5)中揭示之製造方法亦可於上述工序B1與上述工序B3之間進而包含工序B2，其係於相當於後置工序中裝載上述零件之區域之部分，將形成有通孔之帶狀之抗蝕劑設於上述合金膜上。 (6) The manufacturing method disclosed in the above (5) may further include a step B2 between the step B1 and the step B3, and a portion corresponding to a region in which the component is mounted in the post-process, and a pass is formed. A strip-shaped resist of the holes is provided on the above alloy film.

(7)上述(5)或(6)中揭示之製造方法在上述工序B3中，上述焊錫膏可使用可含有焊劑之含焊劑之上述焊錫膏。 (7) The manufacturing method disclosed in the above (5) or (6), in the step B3, the solder paste containing a flux-containing flux may be used as the solder paste.

(8)上述(6)或(7)中揭示之製造方法可進而包含工序B6，其係除去上述抗蝕劑。 (8) The production method disclosed in the above (6) or (7) may further comprise a step B6 of removing the resist.

(9)本發明之第三態樣之零件，於一面包含鎳之基板上，在上述一面上，利用濺鍍法形成以錫為主要成份之合金膜，在上述合金膜上載置零件，該零件之至少與上述合金膜之接觸部位包含銅及被覆鎳之鋁之任一者。 (9) A third aspect of the present invention is characterized in that, on a substrate containing nickel on one side, an alloy film containing tin as a main component is formed on the one surface by sputtering, and the part is placed on the alloy film. At least a portion of the contact portion with the alloy film includes copper and aluminum coated with nickel.

根據上述(1)至(9)中揭示之零件之製造方法及零件，利用濺鍍法形成以錫為主要成份之合金膜時，於減壓環境之空間內，將設有以錫為主要成份之合金靶材之陰極電極、與設有上述基板之陽極電極對向配置。且，在上述基板之一面上形成上述合金膜時，對上述陰極電極施加DC電壓，藉此，可成膜即使薄膜化仍確保與先前同等之機械特性、電性特性之合金膜。因此，根據上述之零件之製造方法及零件，可提供一方面確保與先前同等之機械特性、電性特性，並可將焊錫層薄膜化，而可實現低成本化、薄型化之零件之製造方法及零件。 According to the manufacturing method and the parts of the parts disclosed in the above (1) to (9), when an alloy film containing tin as a main component is formed by a sputtering method, tin is mainly contained in a space of a reduced pressure environment. The cathode electrode of the alloy target is disposed opposite to the anode electrode provided with the substrate. When the alloy film is formed on one surface of the substrate, a DC voltage is applied to the cathode electrode, whereby an alloy film having the same mechanical properties and electrical properties as those of the prior art can be formed even if the film is formed. Therefore, according to the manufacturing method and the parts of the above-described parts, it is possible to provide a method for manufacturing a part which can reduce the thickness and thickness of the solder layer by ensuring the same mechanical characteristics and electrical characteristics as before. And parts.

以下，基於圖式說明本發明之零件之製造方法之一實施形態。 Hereinafter, an embodiment of a method of manufacturing a component of the present invention will be described based on the drawings.

在後述之各實施形態中，針對作為以錫(Sn)為主要成份之合金靶材，使用含有銀(Ag)、錫(Sn)、及銅(Cu)之合金 靶材，而形成含有銀(Ag)、錫(Sn)、及銅(Cu)之合金膜之例進行詳述。然而，本發明並非完全限定於含有銀(Ag)、錫(Sn)、及銅(Cu)之合金靶材。作為適於本發明之以錫(Sn)為主要成份之合金靶材，例如可舉出以Sn為主要成份而包含銀(Ag)、銅(Cu)、鋅(Zn)、鉍(Bi)、銦(In)、銻(Sb)、鎳(Ni)等者。 In each of the embodiments described later, an alloy containing silver (Ag), tin (Sn), and copper (Cu) is used as an alloy target containing tin (Sn) as a main component. An example of forming an alloy film containing silver (Ag), tin (Sn), and copper (Cu) as a target will be described in detail. However, the present invention is not completely limited to an alloy target containing silver (Ag), tin (Sn), and copper (Cu). Examples of the alloy target containing tin (Sn) as a main component in the present invention include silver (Ag), copper (Cu), zinc (Zn), and bismuth (Bi) as a main component of Sn. Indium (In), antimony (Sb), nickel (Ni), and the like.

(第一實施形態) (First embodiment)

圖1A~1F係說明根據本發明之零件之製造方法之工序剖面圖。 1A to 1F are cross-sectional views showing the steps of a method of manufacturing a component according to the present invention.

(程序1a) (Procedure 1a)

首先，如圖1A所示，使用一面10a由鎳(Ni)形成之基板10，而在一面10a上，利用濺鍍法形成含有銀(Ag)、錫(Sn)、及銅(Cu)之合金膜11(工序A1)。 First, as shown in FIG. 1A, a substrate 10 made of nickel (Ni) on one side 10a is used, and an alloy containing silver (Ag), tin (Sn), and copper (Cu) is formed on one surface 10a by sputtering. Film 11 (step A1).

基板10只要一面由鎳形成即可，例如，適宜使用於矽(Si)基板10之一面形成有鎳(Ni)膜者。以下，將設為該構成者稱為具Ni膜之基板10。 The substrate 10 may be formed of nickel, for example, and is preferably used for forming a nickel (Ni) film on one surface of the bismuth (Si) substrate 10. Hereinafter, the composition is referred to as a substrate 10 having a Ni film.

尤其本實施形態，於減壓環境之空間內，將設置有含有銀(Ag)、錫(Sn)、及銅(Cu)之合金靶材之陰極電極60(參照圖3)、與設置有上述基板10之陽極電極70(參照圖3)對向配置，而於上述基板10之一面上形成上述合金膜11時，對上述陰極電極60施加DC脈衝電壓。 In particular, in the present embodiment, the cathode electrode 60 (see FIG. 3) provided with an alloy target containing silver (Ag), tin (Sn), and copper (Cu) is provided in the space of the reduced pressure environment, and the above-described The anode electrode 70 (see FIG. 3) of the substrate 10 is disposed to face each other, and when the alloy film 11 is formed on one surface of the substrate 10, a DC pulse voltage is applied to the cathode electrode 60.

此處，圖2係顯示本實施形態中使用之濺鍍裝置110之構成之模式平面圖，其係用以於基板10上積層形成焊錫合金膜11者。 Here, FIG. 2 is a schematic plan view showing the configuration of the sputtering apparatus 110 used in the present embodiment, which is used to laminate the solder alloy film 11 on the substrate 10.

在圖2中，濺鍍裝置110包含：基板(晶圓)10之搬送室T0；進行濺鍍處理之濺鍍室S1、S2；加載互鎖室L/UL；及基板10之移載機T1。 In FIG. 2, the sputtering apparatus 110 includes: a transfer chamber T0 of a substrate (wafer) 10; a sputtering chamber S1, S2 for performing a sputtering process; a load lock chamber L/UL; and a transfer machine T1 of the substrate 10. .

在濺鍍裝置110中，濺鍍室S1係於Si基板10之一面上形成Ni膜之成膜室，濺鍍室S2係形成焊錫合金膜11之成膜室。因2個濺鍍室S1、S2係以經由後述之閥機構而與搬送室T0連通之方式構成，故可使濺鍍室S1中形成有Ni膜之矽(Si)基板10通過減壓環境中而向形成焊錫合金膜11之濺鍍室S2移動。藉此，因Ni膜表面不會氧化，故，於Ni膜上形成有焊錫合金膜11時，可良好地保持Ni膜與焊錫合金膜11之濡濕性。即，為良好地保持焊錫合金膜11相對於Ni膜之濡濕性，期望Ni膜與焊錫膜於真空中一貫地成膜。 In the sputtering apparatus 110, the sputtering chamber S1 is a film forming chamber in which a Ni film is formed on one surface of the Si substrate 10, and the sputtering chamber S2 forms a film forming chamber of the solder alloy film 11. Since the two sputtering chambers S1 and S2 are configured to communicate with the transfer chamber T0 via a valve mechanism to be described later, the crucible (Si) substrate 10 in which the Ni film is formed in the sputtering chamber S1 can be passed through a reduced pressure environment. On the other hand, it moves to the sputtering chamber S2 where the solder alloy film 11 is formed. Thereby, since the surface of the Ni film is not oxidized, when the solder alloy film 11 is formed on the Ni film, the wettability of the Ni film and the solder alloy film 11 can be favorably maintained. That is, in order to satisfactorily maintain the wettability of the solder alloy film 11 with respect to the Ni film, it is desirable that the Ni film and the solder film are uniformly formed in a vacuum.

另，作為濺鍍裝置110，適宜使用例如磁控濺鍍裝置。 Further, as the sputtering apparatus 110, for example, a magnetron sputtering apparatus is suitably used.

在圖2之濺鍍裝置110中，搬送室T0具有機械手H0。機械手H0係在保持基板10之狀態下移動，且在濺鍍室間或濺鍍室S1、S2與加載互鎖室L/UL之間搬送基板10。又，移載機T1具有機械手H1、及基板(晶圓)10之晶匣C1、C2。機械手H1係在保持基板10之狀態下移動，將固著於晶匣C1之基板10搬入加載互鎖室L/UL，並將經濺鍍處理之基板10自加載互鎖室L/UL搬出而返回至晶匣C1。 In the sputtering apparatus 110 of Fig. 2, the transfer chamber T0 has a robot H0. The robot H0 moves while holding the substrate 10, and transports the substrate 10 between the sputtering chambers or between the sputtering chambers S1 and S2 and the load lock chamber L/UL. Further, the transfer machine T1 has the robots H1 and the wafers C1 and C2 of the substrate (wafer) 10. The robot H1 moves while holding the substrate 10, carries the substrate 10 fixed to the wafer C1 into the load lock chamber L/UL, and carries the sputtered substrate 10 out of the load lock chamber L/UL. Return to the crystal C1.

另，在濺鍍裝置110中，於搬送室T0與各濺鍍室S1、S2之間、搬送室T0與加載互鎖室L/UL之間、及加載互鎖室L/UL與移載機T1之間，分別設有閥機構，而成為可切斷室間之真空度．環境氣體之構成。 Further, in the sputtering apparatus 110, between the transfer chamber T0 and each of the sputtering chambers S1 and S2, between the transfer chamber T0 and the load lock chamber L/UL, and the load lock chamber L/UL and the transfer machine Between T1, there is a valve mechanism, which can cut the vacuum between the chambers. The composition of environmental gases.

(藉由濺鍍裝置110中之DC脈衝濺鍍及靜電吸盤之焊錫合金膜11之形成) (Formation of the solder alloy film 11 by DC pulse sputtering and electrostatic chuck in the sputtering apparatus 110)

在如此之濺鍍裝置110中，在濺鍍室S2中，藉由對電極不施加DC電壓(直流電壓)而施加DC脈衝電壓之DC脈衝濺鍍，將合金膜11形成於預先形成有Ni膜之基板10上。又，在濺鍍室S2中，於固著基板10之靜電吸盤中設有溫度控制部，利用該靜電吸盤，抑制基板10之溫度上升，而形成合金膜11。設於靜電吸盤中之溫度控制部可調整控制基板10之溫度，於濺鍍處理時使基板10冷卻且保持於特定之溫度。 In the sputtering apparatus 110, in the sputtering chamber S2, the DC film is applied by applying a DC pulse voltage without applying a DC voltage (DC voltage) to the electrode, and the alloy film 11 is formed on the Ni film previously formed. On the substrate 10. Further, in the sputtering chamber S2, a temperature control portion is provided in the electrostatic chuck of the fixed substrate 10, and the temperature rise of the substrate 10 is suppressed by the electrostatic chuck to form the alloy film 11. The temperature control unit provided in the electrostatic chuck adjusts the temperature of the control substrate 10 to cool and maintain the substrate 10 at a specific temperature during the sputtering process.

(DC脈衝電源單元) (DC pulse power unit)

圖3係顯示對濺鍍室S3內所配置之電極施加DC脈衝電壓之DC脈衝電源單元50之構成之模式方塊圖。在圖3中，DC脈衝電源單元50具備DC電源51、OFF脈衝電源52、施加電壓產生部53、及控制部54。 Fig. 3 is a schematic block diagram showing the configuration of a DC pulse power supply unit 50 for applying a DC pulse voltage to electrodes disposed in the sputtering chamber S3. In FIG. 3, the DC pulse power supply unit 50 includes a DC power supply 51, an OFF pulse power supply 52, an applied voltage generating unit 53, and a control unit 54.

該DC脈衝電源單元50之輸出電壓係施加於濺鍍室S3內之陰極電極60。又，濺鍍室S3內之陽極電極70係接地。因此，陽極電極70之電位Ea為基準電位(0電位)，陰極電極60之電位Ek為DC脈衝電源單元50之輸出電位。 The output voltage of the DC pulse power supply unit 50 is applied to the cathode electrode 60 in the sputtering chamber S3. Further, the anode electrode 70 in the sputtering chamber S3 is grounded. Therefore, the potential Ea of the anode electrode 70 is the reference potential (zero potential), and the potential Ek of the cathode electrode 60 is the output potential of the DC pulse power supply unit 50.

(DC脈衝) (DC pulse)

圖4A、圖4B係說明DC脈衝電源單元50之輸出電壓波形之時序圖。圖4A係DC脈衝濺鍍時施加於電極之DC脈衝電壓。圖4B係DC濺鍍時施加於電極之DC電壓。 4A and 4B are timing charts showing the output voltage waveform of the DC pulse power supply unit 50. Figure 4A is a DC pulse voltage applied to an electrode during DC pulse sputtering. Figure 4B is the DC voltage applied to the electrodes during DC sputtering.

如圖4A所示，由DC脈衝電源單元50產生之DC脈衝之週 期係t0。該週期t0內，期間t1係DC脈衝之OFF期間，剩餘之期間t2係DC脈衝之ON期間。在ON期間t2，陰極電位Ek為負電位Ek1。但，在OFF期間t1，陰極電位Ek為正或0之OFF脈衝電位Ek0(在圖4A中，電位Ek0係正電位)。另一方面，如圖4B所示，使DC脈衝電源單元50作為DC電源51發揮功能之情形時，陰極電位Ek成為負固定電位Ek2。 As shown in FIG. 4A, the circumference of the DC pulse generated by the DC pulse power supply unit 50 The period is t0. In the period t0, the period t1 is an OFF period of the DC pulse, and the remaining period t2 is an ON period of the DC pulse. In the ON period t2, the cathode potential Ek is a negative potential Ek1. However, in the OFF period t1, the cathode potential Ek is positive or 0, and the OFF pulse potential Ek0 (in FIG. 4A, the potential Ek0 is a positive potential). On the other hand, when the DC pulse power supply unit 50 functions as the DC power supply 51 as shown in FIG. 4B, the cathode potential Ek becomes the negative fixed potential Ek2.

針對圖3之DC脈衝電源單元50之動作進行說明。DC電源51依照自控制部54發送之波峰值控制信號，而產生負電位Ek1。OFF脈衝電源52依照自控制部54發送之波峰值控制信號，而產生OFF脈衝電位(正電位或0(零)電位)Ek0，並將該等電位Ek1、Ek0分別輸出至施加電壓產生部53。另，電位Ek1、Ek0之值可根據上述波峰值控制信號而可變設定。 The operation of the DC pulse power supply unit 50 of Fig. 3 will be described. The DC power source 51 generates a negative potential Ek1 in accordance with the peak value control signal transmitted from the control unit 54. The OFF pulse power supply 52 generates an OFF pulse potential (positive potential or 0 (zero) potential) Ek0 in accordance with the peak value control signal transmitted from the control unit 54, and outputs the equal potentials Ek1 and Ek0 to the applied voltage generating unit 53, respectively. Further, the values of the potentials Ek1 and Ek0 can be variably set in accordance with the above-described peak value control signal.

施加電壓產生部53依照自控制部54發送之切換控制信號，在ON期間t2，將電位Ek1切換輸出，在OFF期間t1，將電位Ek0進行切換而輸出。藉此，對陰極電極60施加DC脈衝Ek(參照圖4A)。另，DC脈衝Ek之OFF占空率t1/t0係根據上述切換控制信號，而可在例如0%~50%之間進行可變設定。在圖4A中，將OFF占空率t1/t0設定為20%。且，期望該OFF占空率t1/t0設定在10%~30%之範圍內。又，DC脈衝Ek之頻率(1/t0)亦根據上述切換控制信號，而可在例如50 Hz~250 Hz之間進行可變設定。 The applied voltage generating unit 53 switches the potential Ek1 in the ON period t2 in accordance with the switching control signal transmitted from the control unit 54, and switches the potential Ek0 to be output during the OFF period t1. Thereby, a DC pulse Ek is applied to the cathode electrode 60 (refer to FIG. 4A). Further, the OFF duty ratio t1/t0 of the DC pulse Ek is variably set between, for example, 0% to 50% in accordance with the above-described switching control signal. In FIG. 4A, the OFF duty ratio t1/t0 is set to 20%. Further, it is desirable that the OFF duty ratio t1/t0 is set in the range of 10% to 30%. Further, the frequency (1/t0) of the DC pulse Ek is also variably set between, for example, 50 Hz to 250 Hz in accordance with the above-described switching control signal.

另一方面，將DC脈衝電源單元50作為DC電源51使用時，施加電壓產生部53僅繼續DC電源51中所產生之電位 Ek2(參照圖4B)，而作為陰極施加電位Ek進行輸出。 On the other hand, when the DC pulse power source unit 50 is used as the DC power source 51, the applied voltage generating portion 53 continues only the potential generated in the DC power source 51. Ek2 (refer to FIG. 4B) is applied as a cathode application potential Ek.

(濺鍍裝置110之Ni膜及焊錫合金膜11之形成程序) (Formation Procedure of Ni Film and Solder Alloy Film 11 of Sputtering Device 110)

(基板10之搬入) (Moving the substrate 10)

首先，將由矽(Si)形成之基板(晶圓)10固著於移載機T1內之晶匣C1。接著，彎曲加載互鎖室L/UL，而打開與移載機T1之間之閥機構後，利用機械手H1將固著於上述晶匣C1之基板10自晶匣C1移送至加載互鎖室L/UL內。 First, a substrate (wafer) 10 formed of tantalum (Si) is fixed to the wafer C1 in the transfer machine T1. Then, after the load lock chamber L/UL is bent and the valve mechanism between the load transfer machine T1 is opened, the substrate 10 fixed to the wafer C1 is transferred from the wafer C1 to the load lock chamber by the robot H1. L/UL.

接著，關閉加載互鎖室L/UL與移載機T1之間之閥機構，且將加載互鎖室L/UL進行真空排氣，直至10-3 Pa台。接著，打開加載互鎖室L/UL與搬送室T0之間之閥機構，利用搬送室T0內之機械手H0，將基板10搬入至搬送室T0內，而關閉與加載互鎖室L/UL之間之閥機構。 Next, the valve mechanism between the load lock chamber L/UL and the transfer machine T1 is closed, and the load lock chamber L/UL is evacuated to 10 -3 Pa. Next, the valve mechanism between the load lock chamber L/UL and the transfer chamber T0 is opened, and the substrate 10 is carried into the transfer chamber T0 by the robot H0 in the transfer chamber T0, and the lock chamber L/UL is closed and loaded. The valve mechanism between.

(Ni膜之形成，濺鍍室S1) (Formation of Ni film, sputtering chamber S1)

接著，打開搬送室T0與濺鍍室S1之間之閥機構，利用機械手H0將Ni基板10自搬送室T0搬送至濺鍍室S1內。且，在濺鍍室S1中，形成Ni膜。在使濺鍍室S1之成膜壓力為0.1 Pa~1.0 Pa，Ar流量為5 sccm~50 sccm之減壓環境中，使用Ni靶材，利用DC濺鍍法，形成例如膜厚0.2 μm~4.0 μm之Ni膜。且，形成Ni膜後，打開與搬送室T0之間之閥機構，利用機械手H0使於背面(被成膜面)形成有Ni之具Ni膜之基板10由濺鍍室S1返回至搬送室T0，而關閉與濺鍍室S1之間之閥機構。 Next, the valve mechanism between the transfer chamber T0 and the sputtering chamber S1 is opened, and the Ni substrate 10 is transferred from the transfer chamber T0 to the sputtering chamber S1 by the robot H0. Further, in the sputtering chamber S1, a Ni film is formed. In a reduced pressure environment in which the deposition pressure in the sputtering chamber S1 is 0.1 Pa to 1.0 Pa and the Ar flow rate is 5 sccm to 50 sccm, a Ni target is used, and a film thickness of 0.2 μm to 4.0 is formed by DC sputtering. Ni film of μm. After the Ni film is formed, the valve mechanism between the transfer chamber and the transfer chamber T0 is opened, and the substrate 10 having the Ni film formed on the back surface (film formation surface) by the robot H0 is returned from the sputtering chamber S1 to the transfer chamber. T0, and closes the valve mechanism between the sputtering chamber S1.

(合金膜11之形成、濺鍍室S2) (Formation of Alloy Film 11, Sputtering Room S2)

接著，打開搬送室T0與濺鍍室S2之間之閥機構，利用機 械手H0將具Ni膜之基板10自搬送室T0搬送至濺鍍室S2內。且，在濺鍍室S2中，將以Sn及Cu為主要成分而含有Ag之合金膜11成膜。在使濺鍍室S2之成膜壓力為0.1 Pa~1.0 Pa，Ar流量為5 sccm~50 sccm之減壓環境中，使用Ag-Sn-Cu合金之焊錫靶材(Ag-Sn-Cu合金靶材)，藉由DC脈衝濺鍍(磁控濺鍍)而將例如膜厚2 μm~10 μm之焊錫合金膜11成膜。且，成膜結束後，打開與搬送室T0之間之閥機構，利用機械手H0使於背面(被成膜面)形成有合金膜11之具Ni膜之基板10由濺鍍室S2返回至搬送室T0，並關閉與濺鍍室S2之間之閥機構。 Next, the valve mechanism between the transfer chamber T0 and the sputtering chamber S2 is opened, and the machine is utilized. The robot H0 transports the substrate 10 having the Ni film from the transfer chamber T0 to the sputtering chamber S2. Further, in the sputtering chamber S2, an alloy film 11 containing Ag as a main component of Sn and Cu is formed into a film. Ag-Sn-Cu alloy target (Ag-Sn-Cu alloy target) is used in a decompression environment in which the deposition pressure of the sputtering chamber S2 is 0.1 Pa to 1.0 Pa and the Ar flow rate is 5 sccm to 50 sccm. A solder alloy film 11 having a film thickness of 2 μm to 10 μm is formed by DC pulse sputtering (magnetron sputtering). After the film formation is completed, the valve mechanism between the transfer chamber and the transfer chamber T0 is opened, and the substrate 10 having the Ni film on which the alloy film 11 is formed on the back surface (film formation surface) is returned from the sputtering chamber S2 to the sputtering chamber S2. The chamber T0 is transferred and the valve mechanism between the chamber and the sputtering chamber S2 is closed.

在成膜上述合金膜11之DC脈衝濺鍍中，例如，將DC脈衝之OFF占空率t1/t0(參照圖4A)設定為20%，DC脈衝之頻率1/t0設定為250 kHz。又，藉由利用靜電吸盤之溫度控制部冷卻Ni基板10，保持Ni基板10之溫度為150℃以下，而成膜焊錫合金膜11。對Ag-Sn-Cu合金靶材，可使用例如成為主要成分之Sn與Cu之重量%比率為Sn：Cu=60：40，且於其中添加有3重量%之Ag之合金靶材(Sn-Cu(60：40)-Ag(97：3)重量%靶材)。Ag-Sn-Cu合金靶材係設於濺鍍室S3內之陰極電極60(參照圖3)之陽極電極70側之面上。又，具Ni膜之基板10於陽極電極70(參照圖3)之陰極電極60側之面上，將被成膜面即背面(形成有Ni膜之面)朝向陰極電極60側而設置。 In the DC pulse sputtering in which the alloy film 11 is formed, for example, the OFF duty ratio t1/t0 (see FIG. 4A) of the DC pulse is set to 20%, and the frequency 1/t0 of the DC pulse is set to 250 kHz. Moreover, the Ni alloy substrate 10 is cooled by the temperature control unit of the electrostatic chuck, and the temperature of the Ni substrate 10 is kept at 150 ° C or lower to form the solder alloy film 11. For the Ag-Sn-Cu alloy target, for example, an alloy target in which the weight % ratio of Sn to Cu as a main component is Sn:Cu=60:40, and 3% by weight of Ag is added thereto (Sn- Cu (60:40)-Ag (97:3) wt% target). The Ag-Sn-Cu alloy target is provided on the surface of the cathode electrode 60 (see FIG. 3) on the anode electrode 70 side in the sputtering chamber S3. Further, the substrate 10 having the Ni film is provided on the surface of the anode electrode 70 (see FIG. 3) on the side of the cathode electrode 60, and the back surface (the surface on which the Ni film is formed) which is the film formation surface is provided toward the cathode electrode 60 side.

(經成膜之基板10之搬出) (moving out the film-formed substrate 10)

此後，打開與加載互鎖室L/UL之間之閥機構，利用機械 手H0，將形成有合金膜11之具Ni膜之基板10自搬送室T0搬出，並關閉搬送室T0與加載互鎖室L/UL之間之閥機構。接著，彎曲加載互鎖室L/UL，而打開與移載機T1之間之閥機構後，利用移載機T1之機械手H1，使加載互鎖室L/UL內之上述具Ni膜之基板10返回至晶匣C2。 Thereafter, the valve mechanism between the load lock chamber L/UL is opened, using the machine In the hand H0, the substrate 10 having the Ni film on which the alloy film 11 is formed is carried out from the transfer chamber T0, and the valve mechanism between the transfer chamber T0 and the load lock chamber L/UL is closed. Then, after the load lock chamber L/UL is bent and the valve mechanism between the load transfer machine T1 is opened, the above-mentioned Ni film in the load lock chamber L/UL is made by the robot H1 of the transfer machine T1. The substrate 10 is returned to the wafer C2.

(基板10之冷卻) (cooling of substrate 10)

DC濺鍍雖一般比RF濺鍍濺鍍速率高，但若基板10之溫度上升，則附著於基板10之金屬易遊離，故，濺鍍速率下降。因此，若冷卻基板10，則附著於基板10之金屬不易遊離，故可抑制濺鍍速率下降。在本實施形態之焊錫合金膜11之DC脈衝濺鍍中，由於可在DC脈衝之OFF期間t1(參照圖4A)冷卻基板10，而抑制基板10之溫度上升，故可抑制濺鍍速率下降，從而可確保比RF濺鍍更高之濺鍍速率。 Although DC sputtering is generally higher than the RF sputtering rate, if the temperature of the substrate 10 rises, the metal adhering to the substrate 10 is easily released, so that the sputtering rate is lowered. Therefore, when the substrate 10 is cooled, the metal adhering to the substrate 10 is not easily released, so that the sputtering rate can be suppressed from being lowered. In the DC pulse sputtering of the solder alloy film 11 of the present embodiment, since the substrate 10 can be cooled during the OFF period t1 (see FIG. 4A) of the DC pulse, the temperature rise of the substrate 10 can be suppressed, so that the sputtering rate can be suppressed from being lowered. This ensures a higher sputtering rate than RF sputtering.

再者，在本實施形態之焊錫合金膜11之DC脈衝濺鍍中，因利用靜電吸盤之溫度控制部冷卻基板10，而將基板溫度保持在150℃以下之特定溫度，故可有效抑制濺鍍速率下降。此處，使基板溫度為150℃以下係因為一般之焊錫之熔點為150℃，若為150℃以上之溫度，則薄膜之焊錫會蒸發。 Further, in the DC pulse sputtering of the solder alloy film 11 of the present embodiment, since the substrate 10 is cooled by the temperature control unit of the electrostatic chuck, the substrate temperature is maintained at a specific temperature of 150 ° C or lower, so that sputtering can be effectively suppressed. The rate drops. Here, the substrate temperature is 150 ° C or lower because the melting point of the general solder is 150 ° C. If the temperature is 150 ° C or higher, the solder of the film evaporates.

如以上般，根據本實施形態，藉由對陰極電極60施加DC脈衝電壓之DC脈衝濺鍍，使含有低熔點金屬Cu之合金膜11成膜，藉此，不會產生合金膜11之含有金屬組成之偏移，且不會降低成膜率而進行成膜。因此，無需設置先前技術中作為用於焊錫層成膜之基板10之大氣暴露時之防氧 化膜而必要之底層膜。藉此，可減少為成膜焊錫合金膜11而將基板10自濺鍍裝置110取出而固著於真空蒸鍍裝置時之工夫或基板10之破損等，且可減少作為底層膜之金屬材料而使用之貴金屬(例如Au等)之成本。 As described above, according to the present embodiment, the alloy film 11 containing the low-melting-point metal Cu is formed by DC pulse sputtering by applying a DC pulse voltage to the cathode electrode 60, whereby the metal containing the alloy film 11 is not generated. The composition is shifted, and film formation is performed without lowering the film formation rate. Therefore, it is not necessary to provide the oxygen prevention in the prior art as the exposure of the substrate 10 for the solder layer film formation. An underlying film that is necessary for film formation. Thereby, it is possible to reduce the work of removing the substrate 10 from the sputtering apparatus 110 and fixing it to the vacuum vapor deposition apparatus, or the damage of the substrate 10, etc., and to reduce the metal material as the underlying film. The cost of the precious metals used (eg Au, etc.).

如上所述，DC脈衝濺鍍中雖存在優點，但本發明並非限定於DC脈衝濺鍍。藉由設定適當之構成之成膜裝置及適當之成膜條件等，即使取代DC脈衝濺鍍而使用DC濺鍍，仍可實現本發明。 As described above, although there are advantages in DC pulse sputtering, the present invention is not limited to DC pulse sputtering. The present invention can be realized by DC sputtering instead of DC pulse sputtering by setting a film forming apparatus having an appropriate configuration, appropriate film forming conditions, and the like.

又，如後述之實施例所示，形成由焊錫形成之合金膜11時，藉由對陰極電極60施加DC脈衝電壓，可成膜即使薄膜化仍確保與先前同等之機械特性、電性特性之合金膜。尤其，即使不形成先前作為密著層而使用之Au膜，仍可確保充分之接合強度，而可謀求成本之降低。 Further, when the alloy film 11 formed of solder is formed as shown in the later-described embodiment, by applying a DC pulse voltage to the cathode electrode 60, it is possible to form a film and ensure the same mechanical properties and electrical characteristics as before. Alloy film. In particular, even if the Au film used as the adhesion layer is not formed, sufficient bonding strength can be secured, and the cost can be reduced.

作為以如此之方式形成之合金膜11之厚度，雖並非特別限定者，但較好為例如2 μm以上、10 μm以下。 The thickness of the alloy film 11 formed in this manner is not particularly limited, but is preferably, for example, 2 μm or more and 10 μm or less.

如後所述，於形成於具Ni膜之基板(或Ni基板10)10上之合金膜11之上載置零件14，進行熱處理(回焊)而接合三者。此時，於合金膜11中與基板10相接之側，基板10所含之Ni侵入，而形成該Ni與Sn之合金區域α。又，於合金膜11中與零件14相接之側，零件14所含之Cu或Ni侵入，而形成該Cu或Ni與Sn之合金區域β。本發明者們已確認該等之合金區域α、合金區域β皆為1 μm左右之厚度。因此，作為合金膜11之厚度，較好為至少(1 μm+1 μm=)2 μm。另一方面，若合金膜11厚於10 μm，則有膜上產生龜裂之虞。 As will be described later, the component 14 is placed on the alloy film 11 formed on the substrate (or the Ni substrate 10) 10 having the Ni film, and heat treatment (reflow) is performed to bond the three. At this time, on the side of the alloy film 11 that is in contact with the substrate 10, Ni contained in the substrate 10 intrudes to form the alloy region α of Ni and Sn. Further, on the side of the alloy film 11 that is in contact with the component 14, Cu or Ni contained in the component 14 intrudes to form the alloy region β of the Cu or Ni and Sn. The inventors have confirmed that the alloy regions α and the alloy regions β are all about 1 μm thick. Therefore, the thickness of the alloy film 11 is preferably at least (1 μm + 1 μm =) 2 μm. On the other hand, if the alloy film 11 is thicker than 10 μm, cracks may occur on the film.

(程序1b) (Procedure 1b)

接著，根據需要，如圖1B所示般，於相當於後置工序中裝載零件14之區域之部分，將具備通孔12a之帶狀之抗蝕劑12設於上述合金膜11上(工序A2)。後置工序係指進行組裝、檢查之工序。 Then, as shown in FIG. 1B, a strip-shaped resist 12 having a through hole 12a is provided on the alloy film 11 in a portion corresponding to a region where the component 14 is mounted in the post-process (step A2). ). The post-process refers to the process of assembly and inspection.

於合金膜11上，貼合特定厚度之帶狀之抗蝕劑12。對帶狀之抗蝕劑12，於相當於後置工序中裝載零件14之區域之部分設有通孔12a(開口部)。 On the alloy film 11, a strip-shaped resist 12 of a specific thickness is bonded. The strip-shaped resist 12 is provided with a through hole 12a (opening) in a portion corresponding to the region where the component 14 is mounted in the post-process.

作為帶狀之抗蝕劑12，並非特別限定者，可使用例如聚醯亞胺膠帶。 The strip-shaped resist 12 is not particularly limited, and for example, a polyimide tape can be used.

(程序1c) (Procedure 1c)

接著，如圖1C所示，於(已形成抗蝕劑12之情形時，通過抗蝕劑12之通孔12a可見之)上述合金膜11上，塗佈焊劑13，而除去構成上述合金膜11之表層之氧化膜(工序A6)。 Next, as shown in FIG. 1C, the flux 13 is applied to the alloy film 11 (which is visible through the via hole 12a of the resist 12 when the resist 12 is formed), and the alloy film 11 is removed. The oxide film on the surface layer (step A6).

於合金膜11上，與零件14之接合面接觸時，為化學性地除去合金膜11表面所殘留之氧化膜，塗佈焊劑13。於該焊劑13中，與該金屬氧化物反應，而含有具有將其溶解除去之作用之活性化學物種。此後，藉由進行洗淨處理，除去氧化膜。 When the alloy film 11 is brought into contact with the joint surface of the component 14, the oxide film remaining on the surface of the alloy film 11 is chemically removed, and the flux 13 is applied. The flux 13 reacts with the metal oxide to contain an active chemical species having a function of dissolving and removing the metal oxide. Thereafter, the oxide film is removed by performing a cleaning treatment.

(程序1d) (Program 1d)

接著，如圖1D所示，於(已形成抗蝕劑12之情形時，通過抗蝕劑12之通孔12a可見之)上述合金膜11上，載置至少其接觸部位由銅(Cu)或被覆鎳(Ni)之鋁(Al)組成之零件14(工序A3)。 Next, as shown in FIG. 1D, (on the case where the resist 12 is formed, the through-hole 12a of the resist 12 is visible), the alloy film 11 is placed on at least the contact portion thereof by copper (Cu) or A part 14 made of aluminum (Al) coated with nickel (Ni) (step A3).

(程序1e) (Program 1e)

接著，如圖1E所示，為了分別接合上述基板10與上述合金膜11、及上述合金膜11與上述零件14之間，實施熱處理(工序A4)。 Next, as shown in FIG. 1E, heat treatment is performed between the substrate 10 and the alloy film 11, and the alloy film 11 and the component 14, respectively (step A4).

藉由使用遠紅外線加熱器及熱風實施熱處理(回焊)，基板10與合金膜11、及合金膜11與零件14之間各自接合，藉此，基板10、合金膜11及零件14三者被接合。 By performing heat treatment (reflow) using a far-infrared heater and hot air, the substrate 10 and the alloy film 11, and the alloy film 11 and the component 14 are bonded to each other, whereby the substrate 10, the alloy film 11, and the component 14 are Engage.

本發明者們發現，此時，僅是載置基板10與合金膜11、及零件14，雖不會產生任何變化，但藉由進行熱處理，在接合界面會產生如下變化。 The present inventors have found that at this time, only the substrate 10, the alloy film 11, and the component 14 are placed without any change, but by heat treatment, the following changes occur at the joint interface.

此處，圖5係將基板10、合金膜11及零件14之部分放大而模式性顯示之圖。 Here, FIG. 5 is a view showing a schematic display of a portion of the substrate 10, the alloy film 11, and the component 14.

在於相當於基板10之「構件a」之上，依序設置相當於合金膜11之「焊錫(Sn系)」、相當於零件14之「構件b」，在經回焊(熱處理)之物品中，「構件a」所含之元素X侵入「焊錫(Sn系)」之「構件a」側，而形成該元素X與Sn之合金區域α。又，「構件b」所含之元素Y侵入「焊錫(Sn系)」之「構件b」側，而形成與該元素Y之合金區域β。「焊錫」係於被2個合金區域α、β包夾之區域中，存在與靶材組成相同之合金區域γ(Sn-Ag-Cu)。 In the "component a" corresponding to the substrate 10, "solder (Sn)" corresponding to the alloy film 11 and "member b" corresponding to the component 14 are sequentially disposed, and in the article subjected to reflow (heat treatment) The element X contained in the "member a" is invaded into the "member a" side of the "solder (Sn system)", and the alloy region α of the element X and Sn is formed. Further, the element Y contained in the "member b" enters the "member b" side of the "solder (Sn system)", and forms an alloy region β with the element Y. The "solder" is in the region sandwiched between the two alloy regions α and β, and has an alloy region γ (Sn-Ag-Cu) having the same composition as the target.

即，在本實施形態中，如圖5所示，首先，在下方之基板10(Ni)與合金膜11(Sn-Ag-Cu)之接合界面，Ni侵入焊錫中，而形成(Sn-Ni)合金區域α。合金區域α為1 μm左右之厚度。 That is, in the present embodiment, as shown in Fig. 5, first, at the joint interface between the lower substrate 10 (Ni) and the alloy film 11 (Sn-Ag-Cu), Ni is intruded into the solder to form (Sn-Ni). ) alloy area α. The alloy region α has a thickness of about 1 μm.

另一方面，在上方之合金膜11(Sn-Ag-Cu)與零件14(Cu或塗敷有Ni之Ag)之接合界面，Cu或Ni侵入焊錫中，而形成(Sn-Cu)或(Sn-Ni)合金區域β。合金區域β為1 μm左右之厚度。 On the other hand, in the joint interface between the upper alloy film 11 (Sn-Ag-Cu) and the part 14 (Cu or Ag coated with Ni), Cu or Ni intrudes into the solder to form (Sn-Cu) or Sn-Ni) alloy region β. The alloy region β has a thickness of about 1 μm.

且，焊錫合金膜11中被2個合金區域α、β包夾之區域中，存在與靶材組成相同之合金區域γ(Sn-Ag-Cu)。 Further, in the region of the solder alloy film 11 which is sandwiched by the two alloy regions α and β, there is an alloy region γ (Sn-Ag-Cu) having the same composition as the target.

該等合金區域α(Sn-Ni)、合金區域β(Sn-Cu或Sn-Ni)成為比合金區域γ(Sn-Ag-Cu)更硬之部分。藉此，即使薄化焊錫合金膜11，仍可確保充分之機械強度。 These alloy regions α (Sn-Ni) and alloy regions β (Sn-Cu or Sn-Ni) become harder than the alloy region γ (Sn-Ag-Cu). Thereby, even if the solder alloy film 11 is thinned, sufficient mechanical strength can be ensured.

作為熱處理(回焊)之溫度，雖並非特別限定，但較好為例如240~250℃。藉由在比通常更高之240~250℃下進行熱處理，可良好地進行接合。 The temperature of the heat treatment (reflow) is not particularly limited, but is preferably, for example, 240 to 250 °C. The bonding can be favorably performed by heat treatment at 240 to 250 ° C higher than usual.

(程序1f) (Program 1f)

最後，如圖1F所示，(已形成抗蝕劑12之情形時，)除去上述抗蝕劑12(工序A5)。 Finally, as shown in FIG. 1F, (in the case where the resist 12 has been formed), the above-described resist 12 is removed (step A5).

最後，藉由除去(剝離)帶狀之抗蝕劑12，於基板10上，可獲得介隔由焊錫形成之合金膜11而安裝有零件14之安裝品。 Finally, by removing (removing) the strip-shaped resist 12, an attached article in which the alloy film 11 formed of the solder is interposed and the component 14 is attached is obtained on the substrate 10.

另，當然，無需形成抗蝕劑12之情形時，無需上述之「工序A2」及「工序A5」。 Further, of course, in the case where the resist 12 is not required to be formed, the above-mentioned "Step A2" and "Step A5" are not required.

如以上所說明般，在本發明中，形成由焊錫形成之合金膜11時，對上述陰極電極60施加DC脈衝電壓，藉此，可成膜即使薄膜化仍確保與先前同等之機械特性、電性特性之合金膜11。因此，在本發明中，可一方面確保與先前同 等之機械特性、電性特性，並可使合金膜11薄膜化，而可實現低成本化、薄型化。 As described above, in the present invention, when the alloy film 11 formed of solder is formed, a DC pulse voltage is applied to the cathode electrode 60, whereby the film can be formed into a film, and even if it is thinned, the same mechanical properties and electricity as before can be ensured. Alloy film 11 of a property. Therefore, in the present invention, it is possible to ensure the same as before. By the mechanical properties and electrical properties, the alloy film 11 can be made thinner, and the cost can be reduced and the thickness can be reduced.

在藉此所獲得之安裝品中，由焊錫形成之合金膜11(Sn-Ag-Cu)分別於基板10(Ni層)附近、零件(Cu零件或塗敷有Ni之Al零件)14附近，包含(Sn-Ni)合金區域α、(Sn-Cu)合金或(Sn-Ni)合金區域β。 In the thus obtained mounting article, the alloy film 11 (Sn-Ag-Cu) formed of solder is in the vicinity of the substrate 10 (Ni layer), and the parts (Cu parts or Al parts coated with Ni) 14 respectively. The (Sn-Ni) alloy region α, the (Sn-Cu) alloy or the (Sn-Ni) alloy region β is contained.

<第二實施形態> <Second embodiment>

接著，就本發明之第二實施形態進行說明。 Next, a second embodiment of the present invention will be described.

另，在以下之說明中，主要針對與上述第一實施形態不同之部分進行說明，對於與第一實施形態相同之部分，有省略其說明之情形。 In the following description, portions that are different from the above-described first embodiment will be mainly described, and the description of the same portions as those of the first embodiment will be omitted.

圖6A~圖6F係說明根據本實施形態之零件之製造方法之工序剖面圖。 6A to 6F are cross-sectional views showing the steps of a method of manufacturing a component according to the embodiment.

(程序2a) (Procedure 2a)

首先，如圖6A所示，使用一面由鎳(Ni)形成之基板10，而於上述一面上，利用濺鍍法形成含有銀(Ag)、錫(Sn)、及銅(Cu)之合金膜11(工序B1)。 First, as shown in FIG. 6A, a substrate 10 made of nickel (Ni) is used, and an alloy film containing silver (Ag), tin (Sn), and copper (Cu) is formed on the one surface by sputtering. 11 (Process B1).

使用如圖2所示之裝置，於減壓環境之空間內，將設有含有銀(Ag)、錫(Sn)、及銅(Cu)之合金靶材之陰極電極60、與設有上述基板10之陽極電機70對向配置，而於上述基板10之一面上形成上述合金膜11時，對上述陰極電極60施加DC脈衝電壓。 Using the apparatus shown in FIG. 2, a cathode electrode 60 containing an alloy target of silver (Ag), tin (Sn), and copper (Cu) is provided in a space of a reduced pressure environment, and the substrate is provided. When the anode motor 70 of 10 is opposed to each other and the alloy film 11 is formed on one surface of the substrate 10, a DC pulse voltage is applied to the cathode electrode 60.

(程序2b) (Procedure 2b)

接著，如圖6B所示，根據需要，將相當於後置工序中裝 載零件14之區域之部分中具備通孔12a之帶狀之抗蝕劑12設於上述合金膜11上(工序B2)。 Next, as shown in FIG. 6B, if necessary, it will be equivalent to the post-process loading. A strip-shaped resist 12 having a through hole 12a in a portion of the region of the carrier member 14 is provided on the alloy film 11 (step B2).

(程序2c) (Procedure 2c)

接著，如圖6C所示，於(已形成抗蝕劑12之情形時，通過抗蝕劑12之通孔12a可見之)上述合金膜11上，至少塗佈焊錫膏15(工序B3)。 Next, as shown in FIG. 6C, at least the solder paste 15 is applied to the alloy film 11 (which is visible through the via hole 12a of the resist 12 when the resist 12 is formed) (step B3).

此時，作為焊錫膏15，使用含有焊劑13之焊錫膏15為佳。 At this time, it is preferable to use the solder paste 15 containing the flux 13 as the solder paste 15.

(程序2d) (Program 2d)

接著，如圖6D所示，於(已形成抗蝕劑12之情形時，通過抗蝕劑12之通孔12a可見之)上述合金膜11上，介隔上述焊錫膏15，載置至少其接觸部位由銅(Cu)或被覆鎳(Ni)之鋁(Al)形成之零件14(工序B4)。 Next, as shown in FIG. 6D, (on the case where the resist 12 is formed, the through-hole 12a of the resist 12 is visible), the solder film 15 is interposed on the alloy film 11, and at least the contact is placed thereon. The part 14 is made of copper (Cu) or aluminum (Al) coated with nickel (Ni) (step B4).

(程序2e) (Procedure 2e)

接著，如圖6E所示，為分別接合上述基板10與上述合金膜11、上述合金膜11與上述焊錫膏15、及上述焊錫膏15與上述零件14之間，而實施熱處理(回焊)(工序B5)。 Next, as shown in FIG. 6E, heat treatment (reflow) is performed by bonding the substrate 10 and the alloy film 11, the alloy film 11 and the solder paste 15, and the solder paste 15 and the component 14 respectively. Process B5).

(程序2f) (Program 2f)

最後，如圖6F所示，(已形成抗蝕劑12之情形時，)除去上述抗蝕劑12(工序B6)。 Finally, as shown in FIG. 6F, (in the case where the resist 12 has been formed), the above-described resist 12 is removed (step B6).

另，當然，無需形成抗蝕劑12之情形時，無需上述之「工序B2」及「工序B6」。 Further, of course, in the case where the resist 12 is not required to be formed, the above-described "Step B2" and "Step B6" are not required.

在本實施形態中，亦於形成由焊錫形成之合金膜11時，對上述陰極電極60施加DC脈衝電壓，藉此，可成膜即使 薄膜化仍確保與先前同等之機械特性、電性特性之合金膜11。因此，在本發明中，一方面可確保與先前同等之機械特性、電性特性，並可使合金膜11薄膜化，而可實現低成本化、薄型化。 In the present embodiment, when the alloy film 11 formed of solder is formed, a DC pulse voltage is applied to the cathode electrode 60, whereby even a film can be formed. The thin film is still alloy film 11 which ensures the same mechanical properties and electrical properties as before. Therefore, in the present invention, on the one hand, the mechanical properties and electrical properties equivalent to those in the prior art can be ensured, and the alloy film 11 can be made thinner, and the cost can be reduced and the thickness can be reduced.

在藉此所獲得之安裝品中，合金膜11、及焊錫膏15(Sn-Ag-Cu)分別於基板(Ni層)10附近、零件(Cu零件或塗敷有Ni之Al零件)14附近，包含(Sn-Ni)合金區域α、(Sn-Cu)合金或(Sn-Ni)合金區域β。 In the mounted article obtained thereby, the alloy film 11 and the solder paste 15 (Sn-Ag-Cu) are in the vicinity of the substrate (Ni layer) 10 and the parts (Cu parts or Al parts coated with Ni) 14 respectively. Containing (Sn-Ni) alloy region α, (Sn-Cu) alloy or (Sn-Ni) alloy region β.

[實施例1] [Example 1]

針對為確認本發明之效果而進行之實施例進行說明。 An embodiment for confirming the effects of the present invention will be described.

(實施例1) (Example 1)

使用圖2所示之裝置，於具Ni膜之基板10上形成焊錫(Sn-Ag-Cu)合金膜。 A solder (Sn-Ag-Cu) alloy film was formed on the substrate 10 having a Ni film by using the apparatus shown in FIG.

首先，在濺鍍室S1中，於矽(Si)基板10上形成Ni膜。在使濺鍍室S1之成膜壓力為0.1 Pa~1.0 Pa，Ar流量為5 sccm~50 sccm之減壓環境中，使用Ni靶材，利用DC濺鍍法使膜厚0.7 μm之Ni膜成膜。 First, a Ni film is formed on the germanium (Si) substrate 10 in the sputtering chamber S1. In a reduced pressure environment in which the deposition pressure in the sputtering chamber S1 is 0.1 Pa to 1.0 Pa and the Ar flow rate is 5 sccm to 50 sccm, a Ni target is used to form a Ni film having a thickness of 0.7 μm by DC sputtering. membrane.

接著，將具Ni膜之基板10自濺鍍室S1向濺鍍室S2移動後，在使濺鍍室S2之成膜壓力為0.1 Pa~1.0 Pa，Ar流量為5 sccm~50 sccm之減壓環境中，使用Ag-Sn-Cu合金之焊錫靶材(Ag-Sn-Cu合金靶材)，利用DC脈衝濺鍍(磁控濺鍍)，將膜厚10 μm之焊錫合金膜11形成於具Ni膜之基板10上。 Next, after the substrate 10 having the Ni film is moved from the sputtering chamber S1 to the sputtering chamber S2, the film forming pressure in the sputtering chamber S2 is 0.1 Pa to 1.0 Pa, and the Ar flow rate is 5 sccm to 50 sccm. In the environment, a solder target (Ag-Sn-Cu alloy target) of Ag-Sn-Cu alloy is used, and a solder alloy film 11 having a film thickness of 10 μm is formed by DC pulse sputtering (magnetron sputtering). On the substrate 10 of the Ni film.

於焊錫合金膜11上，載置Cu零件14，其後藉由進行熱處理(回焊)，接合具Ni膜之基板10、焊錫合金膜11、及零件 14三者。 The Cu component 14 is placed on the solder alloy film 11, and then the substrate 10 having the Ni film, the solder alloy film 11, and the components are bonded by heat treatment (reflow). 14 three.

(實施例2) (Example 2)

與實施例1相同，於具Ni膜之基板10上成膜膜厚5 μm之焊錫合金膜11。於焊錫合金膜11上載置Cu零件14，其後藉由進行熱處理(回焊)，接合具Ni膜之基板10、焊錫合金膜11、及零件14三者。 In the same manner as in the first embodiment, a solder alloy film 11 having a film thickness of 5 μm was formed on the substrate 10 having a Ni film. The Cu component 14 is placed on the solder alloy film 11, and then the substrate 10 having the Ni film, the solder alloy film 11, and the component 14 are bonded by heat treatment (reflow).

(比較例1) (Comparative Example 1)

於具Ni膜之基板10上利用濺鍍法成膜Au膜，於Au膜上塗佈焊錫而形成焊錫膜。於焊錫膜上載置Cu零件14，其後藉由進行熱處理(回焊)，接合具Ni膜之基板10、焊錫膜、及零件14三者。 An Au film was formed on the substrate 10 having a Ni film by a sputtering method, and solder was applied onto the Au film to form a solder film. The Cu component 14 is placed on the solder film, and then the substrate 10 having the Ni film, the solder film, and the component 14 are bonded by heat treatment (reflow).

在實施例1中，於圖7顯示此時之回焊溫度曲線。 In Embodiment 1, the reflow temperature profile at this time is shown in FIG.

自圖7獲知，相較於通常(標準)，在高溫條件(200-220秒之區域=240~250℃)下進行回焊時可獲得良好之結果。 It is known from Fig. 7 that good results can be obtained when reflowing under high temperature conditions (area of 200-220 seconds = 240 to 250 ° C) compared to the usual (standard).

又，分別於圖8顯示實施例1中合金膜11與Ni基板10之接合界面之SEM照片，於圖9顯示焊錫合金膜11與Cu零件14之接合界面之SEM照片。 Further, an SEM photograph of the joint interface between the alloy film 11 and the Ni substrate 10 in the first embodiment is shown in Fig. 8, and an SEM photograph of the joint interface between the solder alloy film 11 and the Cu member 14 is shown in Fig. 9 .

自圖8獲知，自設於Si晶圓上之Ni層，Ni侵入焊錫(Sn-Ag-Cu)中，而局部(不均一)形成有(Sn-Ni)合金之區域。又，自圖9獲知，自Cu零件14，Cu侵入焊錫合金膜(Sn-Ag-Cu)11中，而局部(氣泡狀地)形成有(Sn-Cu)合金之區域。 As is apparent from Fig. 8, Ni is intruded into the solder (Sn-Ag-Cu) from the Ni layer provided on the Si wafer, and a region of (Sn-Ni) alloy is locally (non-uniform). Further, as is apparent from Fig. 9, from the Cu member 14, Cu is intruded into the solder alloy film (Sn-Ag-Cu) 11, and a region of (Sn-Cu) alloy is partially (bubble-like) formed.

自該等結果確認：本發明之焊錫合金膜(Sn-Ag-Cu)11分別於具Ni膜基板(Ni膜)10附近、Cu零件(塗敷有Ni之Al零件)14附近，包含有(Sn-Ni)合金區域、(Sn-Cu)合金(或(Sn- Ni)合金)區域。 From these results, it was confirmed that the solder alloy film (Sn-Ag-Cu) 11 of the present invention is contained in the vicinity of the Ni film substrate (Ni film) 10 and in the vicinity of the Cu component (Al component coated with Ni) 14 ( Sn-Ni) alloy region, (Sn-Cu) alloy (or (Sn- Ni) alloy) region.

接著，針對實施例1、2及比較例1中所獲得之安裝品，測定接合強度。其結果示於表1中。另，表1所示之結果係針對10樣品之平均值。 Next, the joint strengths of the mounting articles obtained in Examples 1 and 2 and Comparative Example 1 were measured. The results are shown in Table 1. In addition, the results shown in Table 1 are for the average of 10 samples.

自表1獲知，本發明之Sn-Ag-Cu系之焊錫具有與先前作為密著層而使用之Au膜同水準之接合強度。確認相較於Au膜之情形(比較例1)，焊錫合金膜11之厚度為5 μm之情形(實施例2)之接合強度稍低，而焊錫合金膜11之厚度為10 μm之情形(實施例1)時，可獲得超過Au膜之情形(比較例1)之接合強度。藉此，即使不形成作為密著層使用之Au膜，仍可確保充分之接合強度，而可謀求成本之降低。 As is apparent from Table 1, the Sn-Ag-Cu-based solder of the present invention has the same level of bonding strength as the Au film previously used as the adhesion layer. It is confirmed that the bonding strength of the solder alloy film 11 is slightly lower than that of the Au film (Comparative Example 1) when the thickness of the solder alloy film 11 is 5 μm (Example 2), and the thickness of the solder alloy film 11 is 10 μm (implementation) In the case of Example 1), the bonding strength exceeding the case of the Au film (Comparative Example 1) was obtained. Thereby, even if the Au film used as the adhesion layer is not formed, sufficient joint strength can be ensured, and the cost can be reduced.

以上，雖已說明本發明之零件之製造方法，但本發明並非限定於上述之例，在不偏離發明之主旨之範圍內，可進行適當變更。 The method of manufacturing the component of the present invention has been described above, but the present invention is not limited to the above-described examples, and can be appropriately modified without departing from the gist of the invention.

[產業上之可利用性] [Industrial availability]

根據本發明，可提供一種一方面可確保與先前同等之機械特性、電性特性，並可使焊錫層薄膜化，而可實現低成本化、薄型化之零件之製造方法及零件。 According to the present invention, it is possible to provide a method and a part for manufacturing a part which can reduce the thickness and thickness of the solder layer by ensuring the same mechanical properties and electrical characteristics as those of the prior art.

10‧‧‧基板 10‧‧‧Substrate

10a‧‧‧一面 10a‧‧‧ side

11‧‧‧焊錫合金膜 11‧‧‧ Solder alloy film

12‧‧‧抗蝕劑 12‧‧‧Resist

12a‧‧‧通孔 12a‧‧‧through hole

13‧‧‧焊劑 13‧‧‧Solder

14‧‧‧零件 14‧‧‧ Parts

15‧‧‧焊錫膏 15‧‧‧ solder paste

50‧‧‧DC脈衝電源單元 50‧‧‧DC pulse power unit

51‧‧‧DC電源 51‧‧‧DC power supply

52‧‧‧OFF脈衝電源 52‧‧‧OFF pulse power supply

53‧‧‧施加電壓產生部 53‧‧‧Applying voltage generation department

54‧‧‧控制部 54‧‧‧Control Department

60‧‧‧陰極電極 60‧‧‧Cathode electrode

70‧‧‧陽極電極 70‧‧‧Anode electrode

100‧‧‧基板 100‧‧‧Substrate

101‧‧‧底層膜 101‧‧‧Underground film

102‧‧‧抗蝕劑 102‧‧‧Resist

102a‧‧‧通孔 102a‧‧‧through hole

103‧‧‧焊錫膏 103‧‧‧ solder paste

104‧‧‧零件 104‧‧‧ Parts

110‧‧‧濺鍍裝置 110‧‧‧ Sputtering device

C1‧‧‧晶匣 C1‧‧‧ wafer

C2‧‧‧晶匣 C2‧‧‧Crystal

Ea‧‧‧電位 Ea‧‧‧ potential

Ek‧‧‧電位 Ek‧‧‧ potential

Ek0‧‧‧OFF脈衝電位 Ek0‧‧‧OFF pulse potential

Ek1‧‧‧電位 Ek1‧‧‧ potential

Ek2‧‧‧負固定電位 Ek2‧‧‧negative fixed potential

H0‧‧‧機械手 H0‧‧‧Robot

H1‧‧‧機械手 H1‧‧‧ robot

L/UL‧‧‧加載互鎖室 L/UL‧‧‧Load lock room

S1‧‧‧濺鍍室 S1‧‧‧ Sputtering room

S2‧‧‧濺鍍室 S2‧‧‧ Sputtering room

S3‧‧‧濺鍍室 S3‧‧‧ Sputtering room

T0‧‧‧搬送室 T0‧‧‧Transport room

T1‧‧‧移載室 T1‧‧‧Transfer room

t0‧‧‧週期 T0‧‧ cycle

t1‧‧‧期間 During the period of t1‧‧

t2‧‧‧期間 During the period of t2‧‧

圖1A係說明本發明之零件之製造方法(第1實施形態)之 程序1a之工序剖面圖。 Fig. 1A is a view showing a method of manufacturing a part according to the present invention (first embodiment); A cross-sectional view of the procedure of the procedure 1a.

圖1B係說明本發明之零件之製造方法(第1實施形態)之程序1b之工序剖面圖。 Fig. 1B is a cross-sectional view showing the procedure of the procedure 1b of the manufacturing method (first embodiment) of the component of the present invention.

圖1C係說明本發明之零件之製造方法(第1實施形態)之程序1c之工序面圖。 Fig. 1C is a plan view showing a procedure 1c of the method for manufacturing a part (first embodiment) of the present invention.

圖1D係說明本發明之零件之製造方法(第1實施形態)之程序1d之工序剖面圖。 Fig. 1D is a cross-sectional view showing the procedure of the procedure 1d of the manufacturing method (first embodiment) of the component of the present invention.

圖1E係說明本發明之零件之製造方法(第1實施形態)之程序1e之工序剖面圖。 Fig. 1E is a cross-sectional view showing the procedure of the procedure 1e of the manufacturing method (first embodiment) of the component of the present invention.

圖1F係說明本發明之零件之製造方法(第1實施形態)之程序1f之工序剖面圖。 Fig. 1F is a cross-sectional view showing the procedure of the procedure 1f of the method for manufacturing a part (first embodiment) of the present invention.

圖2係顯示本發明中使用之濺鍍裝置之構成之模式平面圖。 Fig. 2 is a schematic plan view showing the constitution of a sputtering apparatus used in the present invention.

圖3係顯示在圖2所示之濺鍍裝置中對配置於濺鍍室內之電極施加DC脈衝電壓之DC脈衝電源單元之構成之模式方塊圖。 Fig. 3 is a schematic block diagram showing the configuration of a DC pulse power supply unit for applying a DC pulse voltage to electrodes disposed in a sputtering chamber in the sputtering apparatus shown in Fig. 2.

圖4A係說明圖3之DC脈衝電源單元之輸出電壓波形之時序圖(DC脈衝電壓)。 4A is a timing chart (DC pulse voltage) illustrating an output voltage waveform of the DC pulse power supply unit of FIG. 3.

圖4B係說明圖3之DC脈衝電源單元之輸出電壓波形之時序圖(DC電壓)。 4B is a timing chart (DC voltage) illustrating an output voltage waveform of the DC pulse power supply unit of FIG. 3.

圖5係將基板、合金膜、及零件之部分放大而模式性顯示之圖。 Fig. 5 is a view showing a schematic display of a portion of a substrate, an alloy film, and a part.

圖6A係說明本發明之零件之製造方法(第2實施形態)之程序2a之工序剖面圖。 Fig. 6A is a cross-sectional view showing the procedure of the procedure 2a of the method for manufacturing a part (second embodiment) of the present invention.

圖6B係說明本發明之零件之製造方法(第2實施形態)之程序2b之工序剖面圖。 Fig. 6B is a cross-sectional view showing the procedure of the program 2b of the method for manufacturing a part (second embodiment) of the present invention.

圖6C係說明本發明之零件之製造方法(第2實施形態)之程序2c之工序剖面圖。 Fig. 6C is a cross-sectional view showing the procedure of the program 2c of the method for manufacturing a part (second embodiment) of the present invention.

圖6D係說明本發明之零件之製造方法(第2實施形態)之程序2d之工序剖面圖。 Fig. 6D is a cross-sectional view showing the procedure of the procedure 2d of the manufacturing method (second embodiment) of the component of the present invention.

圖6E係說明本發明之零件之製造方法(第2實施形態)之程序2e之工序剖面圖。 Fig. 6E is a cross-sectional view showing the procedure of the procedure 2e of the method for manufacturing a part (second embodiment) of the present invention.

圖6F係說明本發明之零件之製造方法(第2實施形態)之程序2f之工序剖面圖。 Fig. 6F is a cross-sectional view showing the procedure of the procedure 2f of the method for manufacturing a part (second embodiment) of the present invention.

圖7係顯示回焊溫度曲線之圖。 Figure 7 is a graph showing the reflow temperature profile.

圖8係顯示焊錫合金膜與Ni基板之接合界面之SEM照片之圖。 Fig. 8 is a view showing an SEM photograph of a joint interface between a solder alloy film and a Ni substrate.

圖9係顯示焊錫合金膜與Cu零件之接合界面之SEM照片之圖。 Fig. 9 is a view showing an SEM photograph of a joint interface between a solder alloy film and a Cu part.

圖10A係說明先前之零件之製造方法之程序10a之工序剖面圖。 Fig. 10A is a cross-sectional view showing the procedure of the procedure 10a of the manufacturing method of the prior art.

圖10B係說明先前之零件之製造方法之程序10b之工序剖面圖。 Fig. 10B is a cross-sectional view showing the procedure of the procedure 10b of the manufacturing method of the prior art.

圖10C係說明先前之零件之製造方法之程序10c之工序剖面圖。 Fig. 10C is a cross-sectional view showing the procedure of the procedure 10c of the manufacturing method of the prior art.

圖10D係說明先前之零件之製造方法之程序10d之工序剖面圖。 Fig. 10D is a cross-sectional view showing the procedure of the procedure 10d of the manufacturing method of the prior art.

圖10E係說明先前之零件之製造方法之程序10e之工序剖 面圖。 Fig. 10E is a cross-sectional view showing the procedure 10e of the manufacturing method of the prior part. Surface map.

圖10F係說明先前之零件之製造方法之程序10f之工序剖面圖。 Fig. 10F is a cross-sectional view showing the procedure of the procedure 10f of the method of manufacturing the prior art.

10‧‧‧Ni晶圓 10‧‧‧Ni Wafer

10a‧‧‧一面 10a‧‧‧ side

11‧‧‧濺鍍膜 11‧‧‧Sputter film

12‧‧‧抗蝕劑 12‧‧‧Resist

12a‧‧‧通孔 12a‧‧‧through hole

13‧‧‧焊劑 13‧‧‧Solder

14‧‧‧Cu 14‧‧‧Cu

Claims (10)

一種零件之製造方法，其特徵為至少依序包含：工序A1，其係使用一面包含鎳之基板，而在上述一面上，利用濺鍍法形成以錫為主要成份之合金膜；工序A3，其係在上述合金膜上載置零件，該零件之至少與上述合金膜之接觸部位包含銅及被覆鎳之鋁之任一者；及工序A4，其係實施熱處理，以分別接合上述基板與上述合金膜之間、及上述合金膜與上述零件之間；且在上述工序A1中，於減壓環境之空間內，將設有以錫為主要成份之合金靶材之陰極電極、與設有上述基板之陽極電極對向配置，在上述基板之上述一面上，於形成上述合金膜時，對上述陰極電極施加DC電壓。 A method of manufacturing a part, comprising: at least a step A1, wherein a substrate containing nickel on one side is used, and an alloy film containing tin as a main component is formed on the one surface by sputtering; and the step A3 is Providing a component on the alloy film, wherein at least a portion of the component in contact with the alloy film includes copper and aluminum coated with nickel; and a step A4 of performing heat treatment to bond the substrate and the alloy film, respectively Between the alloy film and the above-mentioned component, and in the step A1, a cathode electrode provided with an alloy target containing tin as a main component and a substrate provided with the substrate are provided in a space of a reduced pressure environment. The anode electrode is disposed to face each other, and a DC voltage is applied to the cathode electrode when the alloy film is formed on the one surface of the substrate. 如請求項1之零件之製造方法，其中於上述工序A1與上述工序A3之間進而包含工序A2，其係於相當於後置工序中裝載上述零件之區域之部分，將形成有通孔之帶狀之抗蝕劑設於上述合金膜上。 The method of manufacturing a part according to claim 1, further comprising a step A2 between the step A1 and the step A3, which is a portion corresponding to a region in which the component is mounted in the post-process, and a via hole is formed A resist is provided on the above alloy film. 如請求項2之零件之製造方法，其中於上述工序A2與上述工序A3之間進而包含工序A6，其係於通過上述抗蝕劑之上述通孔而可見之上述合金膜上塗佈焊劑，而除去成為上述合金膜之表層之氧化膜。 The method of manufacturing a part according to claim 2, further comprising a step A6 of applying a flux to the alloy film visible through the through hole of the resist, between the step A2 and the step A3, and The oxide film which becomes the surface layer of the above alloy film is removed. 如請求項2或3之零件之製造方法，其中進而包含：工序A5，其係除去上述抗蝕劑。 The method of producing a part according to claim 2 or 3, further comprising the step A5 of removing the resist. 一種零件之製造方法，其特徵為至少依序包含： 工序B1，其係使用一面包含鎳之基板，而在上述一面上，利用濺鍍法形成以錫為主要成份之合金膜；工序B3，其係在上述合金膜上至少塗佈焊錫膏；工序B4，其係在上述合金膜上，介隔上述焊錫膏而載置零件，該零件之至少接觸部位包含銅及被覆鎳之鋁之任一者；及工序B5，其係實施熱處理，以分別接合上述基板與上述合金膜之間、上述焊錫膏與上述合金膜之間、及上述焊錫膏與上述零件之間；且在上述工序B1中，於減壓環境之空間內，將設有以錫為主要成份之合金靶材之陰極電極、與設有上述基板之陽極電極對向配置，在上述基板之上述一面上，於形成上述合金膜時，對上述陰極電極施加DC電壓。 A method of manufacturing a part, characterized by at least sequentially: In the step B1, a substrate containing nickel is used, and an alloy film containing tin as a main component is formed on the one surface by a sputtering method, and a solder paste is applied to the alloy film at a step B3; Provided on the alloy film, the component is placed via the solder paste, at least the contact portion of the component includes any of copper and aluminum coated with nickel; and the step B5 is performed by heat treatment to bond the above Between the substrate and the alloy film, between the solder paste and the alloy film, and between the solder paste and the component; and in the step B1, tin is mainly provided in a space of a reduced pressure environment. The cathode electrode of the alloy target of the component is disposed opposite to the anode electrode provided with the substrate, and a DC voltage is applied to the cathode electrode on the one surface of the substrate when the alloy film is formed. 如請求項5之零件之製造方法，其中於上述工序B1與上述工序B3之間進而包含工序B2，其係於相當於後置工序中裝載上述零件之區域之部分，將形成有通孔之帶狀之抗蝕劑設於上述合金膜上。 The method of manufacturing a part according to claim 5, further comprising a step B2 between the step B1 and the step B3, which is a portion corresponding to a region in which the component is mounted in the post-process, and a via hole is formed A resist is provided on the above alloy film. 如請求項5或6之零件之製造方法，其中於上述工序B3中，上述焊錫膏含有焊劑。 The method of manufacturing a part according to claim 5 or 6, wherein in the step B3, the solder paste contains a flux. 如請求項6之零件之製造方法，其中進而包含：工序B6，其係除去上述抗蝕劑。 The method of manufacturing a part according to claim 6, further comprising the step B6 of removing the resist. 如請求項7之零件之製造方法，其中進而包含：工序B6，其係除去上述抗蝕劑。 A method of producing a part according to claim 7, further comprising the step B6 of removing the resist. 一種零件，其特徵為： 於一面包含鎳之基板上，於上述一面上，利用濺鍍法形成以錫為主要成份之合金膜；且在上述合金膜上載置零件，該零件之至少與上述合金膜之接觸部位包含銅及被覆鎳之鋁之任一者。 A part characterized by: Forming an alloy film containing tin as a main component on the one surface of the substrate containing nickel on the one surface; and placing a part on the alloy film, at least the contact portion of the part with the alloy film contains copper and Any of the nickel-coated aluminum.
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