TW201314878A - Semiconductor substrate for solid state imaging element and method for manufacturing solid state image element by using the same - Google Patents

Abstract

The present invention provides a semiconductor substrate for solid state imaging element of which an end detecting part will not be left on the manufactured solid state imaging element, problem such as diffusion forward to a semiconductor element part is not occurred, and a thinning treatment carried out in high accuracy becomes possible in case of being applied in manufacturing the solid state imaging element. The semiconductor substrate for solid state imaging element is applicable in a back processing from an inner side of an outer layer portion of a surface side formed as an element part-forming area, and is characterized by comprising the outer layer portion of the surface side formed as the element part-forming area; a first bulk layer which is formed in an inner portion in the direction of the inner side deeper than the outer layer portion, and is applicable in back processing of a BMD density from 1x10<SP>10</SP>/cm<SP>3</SP> to 1x10<SP>12</SP>/cm<SP>3</SP>; and a second bulk layer which is formed in a inner portion in the direction of the inner side deeper than the first bulk layer, and is applicable in back processing of BMD density smaller than that of the first bulk layer, wherein the said density ranges from 1x10<SP>9</SP>/cm<SP>3</SP> to 1x10<SP>10</SP>/cm<SP>3</SP>.

Description

Semiconductor substrate for solid-state imaging device and method of manufacturing solid-state imaging device using the same

The present invention relates to a semiconductor substrate for a solid-state image sensor and a method of manufacturing a solid-state image sensor using the same.

The solid-state imaging device used in the imaging device is composed of a light-emitting diode that is a light-receiving portion in an imaging field of a semiconductor substrate made of germanium or the like, and a MOS transistor that reads a signal charge of the light-emitting diode. The unit pixel is formed into a plurality of arrays. Further, in the peripheral region of the semiconductor substrate, a peripheral circuit portion composed of a plurality of CMOS transistors (hereinafter referred to as a transistor combined with a MOS transistor) is formed (hereinafter, the light-receiving portion and the peripheral circuit portion are collectively referred to as a semiconductor device). unit). Further, a wiring portion having a wiring having a multilayer structure in which an interlayer insulating film is interposed is formed on the semiconductor element portion. In such a solid-state imaging device, light is irradiated from the surface side on which the wiring portion is formed, and the light-emitting diode is received.

However, in such a solid-state imaging device, since the optical path of the incident light exists in the wiring portion, the incident light is reflected or scattered in accordance with the wiring of the multilayer structure. Therefore, the sensitivity as a solid-state imaging device is reduced.

In the case of such a case, a solid-state image sensor in which light is incident from the back side of the semiconductor substrate in which the wiring portion is formed on the surface side is known (for example, Japanese Laid-Open Patent Publication No. Hei 9-45886).

However, in the case where light is incident from the back side, when the thickness of the semiconductor substrate is thick, light is not transmitted. Therefore, it is necessary to thin the semiconductor substrate into a semiconductor layer of several μm by performing polishing or the like from the back side. Also, at this time, through the film in the plane of the semiconductor substrate When the film thickness of the semiconductor layer is uneven, there is a fear that light incident intensity unevenness and color deviation may occur.

In order to solve such a problem, a technique of using a SOI (Silicon on insulator) substrate as a semiconductor substrate has been disclosed in Japanese Laid-Open Patent Publication No. 2006-66710. In this technique, the above-described thinning is performed from the back side of the SOI substrate, and the thin film formation is terminated in the oxide film of the intermediate layer of the SOI substrate, whereby unevenness in the in-plane thickness of the semiconductor layer can be suppressed. However, the price of the SOI substrate is much higher than that of a conventional semiconductor substrate, so the manufacturing cost is increased.

For this reason, JP-A-2005-353996 discloses a semiconductor substrate which is cheaper than an SOI substrate, and forms a buried layer made of a material different from the semiconductor substrate as an end point detecting portion. By using such a semiconductor substrate, when thinning is performed from the back side, end point detection becomes easy, and a solid-state image sensor can be manufactured with good cost and high precision.

However, in the technique described in Japanese Laid-Open Patent Publication No. 2005-353996, after the solid-state image sensor is manufactured, the end point detecting portion remains. Therefore, the semiconductor element portion cannot be formed in the remaining region of the end point detecting portion, and the field of forming the semiconductor element portion is reduced to cause high integration. Further, since the end point detecting portion is formed of a buried layer of a material different from the semiconductor substrate, the buried material (impurity) is formed during the heat treatment in forming the semiconductor element portion or forming the wiring portion. The diffusion from the buried layer may adversely affect the semiconductor characteristics of the semiconductor element portion.

The present invention has been made to solve the above problems, and an object of the invention is to provide a semiconductor substrate for a solid-state imaging device which does not remain on a solid-state imaging device after manufacture when applied to a solid-state imaging device. In the end point detecting unit, there is no problem that impurities are diffused into the semiconductor element portion, and the film can be formed with high precision.

Moreover, an object of the present invention is to provide a method of manufacturing a solid-state image sensor, which does not have an end point detecting portion remaining on a semiconductor substrate after manufacturing a solid-state image sensor, and which has no impurity to be different from a semiconductor substrate. Further, problems such as diffusion of the semiconductor element portion can further reduce the thickness of the semiconductor substrate with high precision.

The semiconductor substrate for a solid-state image sensor of the present invention is applied to a semiconductor substrate for a solid-state image sensor which is used as a surface layer portion on the surface side of the surface of the element portion and is back-processed from the back side, and is characterized in that it is a field for forming the element portion. The surface layer portion on the surface side and the first surface which is formed in the inner side of the surface layer portion and has a BMD density of 1 × 10 ¹⁰ /cm ³ or more and 1 × 10 ¹² /cm ³ or less is suitable for the first back processing. a bulk layer and a second body layer formed in the back side of the first body layer and applied to the second body layer having a lower BMD density than the first body layer, and the density is 1 × 10 ⁹ /cm ³ or more and 1 × 10 ¹⁰ /cm ³ or less.

In the semiconductor substrate for a solid-state imaging device, it is preferable that the surface layer portion has a thickness of 3 μm or more and 5 μm or less from the surface, and the first main layer has a thickness of 500 nm or more and 1 μm or less from an interface with the surface layer portion. .

A method of manufacturing a solid-state imaging device according to the present invention is a method of manufacturing a solid-state imaging device using the semiconductor substrate for a solid-state imaging device, characterized in that the surface of the semiconductor substrate for a solid-state imaging device is formed with a light-emitting diode and a transistor. a process of forming a semiconductor element portion, a process of forming a wiring portion having a multilayer structure on a surface including the surface layer portion of the semiconductor element portion, and bonding a support substrate to the semiconductor substrate The wiring unit works, and the back surface processing is performed from the back surface side of the semiconductor substrate, the interface between the surface layer portion and the first body layer is used as an end point, and the semiconductor substrate is thinned until the first portion is removed. And the construction of the thickness of the second body layer.

In the method of manufacturing the solid-state imaging device, it is preferable that the means for removing the first main layer in the back processing is mirror-polished, and the detection of the load current value of the polishing pad in the mirror polishing is performed. The interface between the surface layer portion of the end point and the first body layer is polished.

According to the present invention, it is possible to provide a semiconductor substrate for a solid-state image sensor, which is capable of forming a solid-state image sensor after production, which does not have an end point detecting portion, and which has no problem that impurities are diffused into the semiconductor element portion, and can be formed into a thin film with high precision. .

Moreover, according to the present invention, it is possible to provide a method of manufacturing a solid-state image sensor, which is a semiconductor element which does not have an end point detecting portion remaining on a semiconductor substrate after the solid-state image sensor is manufactured, and which has no impurity to a material different from the semiconductor substrate. The problem of diffusion, etc., can achieve high-precision thinning of the semiconductor substrate.

Hereinafter, a semiconductor substrate for a solid-state imaging device according to an embodiment of the present invention will be described in detail with reference to the drawings.

1 is a schematic cross-sectional view showing a semiconductor substrate for a solid-state imaging device according to the embodiment.

The semiconductor substrate 1 for a solid-state image sensor is applied to the surface layer portion 3a on the surface 2a side in the field of forming the element portion, and is processed from the back surface 2b side. The semiconductor substrate 1 for a solid-state imaging device includes a surface layer portion 3a on the surface 2a side in the field of forming the element portion, and a first body layer 4a formed inside the second surface side of the surface layer portion 3a. The second main body layer 5 inside the second side in the second side of the first main body layer 4a. The BMD density of the first main body layer 4a is 1 × 10 ¹⁰ /cm ³ or more and 1 × 10 ¹² /cm ³ or less. Further, the BMD density of the second main body layer 5 is lower than that of the first main body layer 4a, and the density thereof is 1 × 10 ⁹ /cm ³ or more and 1 × 10 ¹⁰ /cm ³ or less.

The first body layer 4a and the second body layer 5 are subjected to the aforementioned back processing.

Specifically, the surface layer portion 3a, the first body layer 4a, and the second body layer 5 are formed in a layered manner on the entire surface of the semiconductor substrate 1.

The semiconductor substrate 1 for a solid-state imaging device has, for example, a surface layer portion 3b similar to the surface layer portion 3a on the side of the back surface 2b, and further has a first body layer 4a inside the surface 2a side of the surface layer portion 3b. The same first body layer 4b. Further, the back surface processing is also performed on the surface layer portion 3b and the first body layer 4b. However, the configuration of the inner side 2b side is a member added to the manufacturing method described later, but the semiconductor substrate for a solid-state imaging element according to the present invention is not limitedly explained.

2 shows the distribution of BMD density in the surface layer portion 3a, the first body layer 4a, and the second body layer 5 in the depth direction (arrow 0) from the surface 2a of the solid-state imaging device semiconductor substrate 1 shown in FIG. Conceptual illustration.

In other words, in the semiconductor substrate 1 for a solid-state imaging device according to the embodiment, the BMD density of the surface layer portion 3a is small (the BMD hardly exists). The BMD density of the first body layer 4a adjacent to the inside of the inner surface 2b direction of the surface layer portion 3a is the highest. Moreover, the BMD density of the second main body layer 5 adjacent to the inside of the inner surface 2b of the first main body layer 4a is higher than the surface layer portion 3a and lower than the BMD density of the first main body layer 4a.

In this manner, by designing the BMD density between the surface layer portion 3a and the first body layer 4a and between the first body layer 4a and the second body layer 5 to be different, it is possible to provide a hardness difference in each interface. Specifically, by setting the BMD density of the first main body layer 4a to 1 × 10 ¹⁰ /cm ³ or more and 1 × 10 ¹² /cm ³ or less, the first main body layer 4a can have high hardness and the surface layer portion 3a. There is a sufficient difference in hardness between the two. In addition, when the BMD density of the second main body layer 5 is lower than that of the first main body layer 4a and the density thereof is 1 × 10 ⁹ /cm ³ or more and 1 × 10 ¹⁰ /cm ³ or less, the first main body layer 4a is formed. There can be a difference in hardness between them.

Therefore, the processing end point can be detected at the two interfaces of the interface between the surface layer portion 3a and the first body layer 4a and the interface between the first body layer 4a and the second body layer 5. Therefore, it is possible to perform two-stage additional processing in the back processing. Therefore, it is possible to achieve high-precision thinning of the semiconductor substrate more than in the case of one stage.

Further, as described above, since the first main body layer 4a and the second main body layer 5 are subjected to back processing, they are completely removed in the back working. Therefore, the solid-state imaging element after the manufacture does not have the end point detecting portion remaining, and thus there is no problem that impurities are diffused into the semiconductor element portion.

In addition, by setting the BMD density of the first main body layer 4a and the second main body layer 5 to the above-described range, it is possible to diffuse heat during heat treatment in forming a semiconductor element portion and a wiring portion of a multilayer structure to be described later. The impurities such as copper (Cu) and aluminum (Al) in the surface layer portion 3 are subjected to gettering. Therefore, a solid-state imaging element having a high-quality semiconductor element portion and a wiring portion can be manufactured.

Hereinafter, an example of a method of manufacturing a semiconductor substrate for a solid-state imaging device according to the embodiment will be described.

First, at least the surface 2a of the surface layer portion 3a in the field of forming the element portion is prepared as a mirror-polished semiconductor substrate.

Such a semiconductor substrate can be cut into a wafer by a single crystal ingot which is drawn by a Tchaikovsky (single crystal growth) method, and can be subjected to lapping, polishing, grinding, and polishing through the outer peripheral portion. After processing such as etching, mirror polishing is performed.

Then, the semiconductor substrate is subjected to, for example, a first heat treatment for 5 minutes or more and 1 time or less at a temperature of 1,250 ° C to 1390 ° C in an inert gas or a reducing gas atmosphere.

As the first heat treatment, a known vertical heat treatment device (a device for performing a temperature rise and fall heat treatment) can be used. The surface layer portion 3a and the second body layer 5 having a predetermined thickness are formed by adjusting the temperature and time of the first heat treatment. In the meantime, in the field of the first main body layer 4a, a BMD having the same density as that of the second main body layer 5 is formed.

Then, the semiconductor substrate subjected to the first heat treatment is maintained at a temperature of, for example, 1100 ° C to 1200 ° C for 1 second or more and 90 seconds in an inert gas, a reducing gas, a nitriding gas, or an oxidizing gas atmosphere. The second heat treatment below.

This second heat treatment can be carried out by using a well-known Rapid Thermal Process (RTP) apparatus. By performing the second heat treatment, pores for increasing the BMD density are introduced into the field of the first body layer 4a.

In the second heat treatment, for example, it is preferable that the temperature is lowered (cooling) from a temperature of 1100 ° C to 1200 ° C to 25 ° C / sec or more.

By performing rapid cooling like this, it is possible to suppress the occurrence of voids which occur at a temperature of, for example, 1100 ° C or more and 1200 ° C or less at the time of temperature drop. Elephant.

In the inert gas, the reducing gas, the nitriding gas, or the oxidizing gas atmosphere, for example, the semiconductor substrate subjected to the second heat treatment is maintained at a temperature of 700 ° C or more and 1100 ° C or lower for 5 minutes or more and 1 time. The third heat treatment below.

This third heat treatment can be carried out using a known vertical heat treatment apparatus. By performing the third heat treatment, it is possible to form and grow a high-density BMD in the field of the first main body layer 4a by using the pores introduced by the second heat treatment.

By performing such a process, it is possible to manufacture a semiconductor substrate for a solid-state imaging device according to the above-described embodiment.

Further, the BMD density of the first and second body layers can be adjusted by appropriately selecting the oxygen concentration of the semiconductor substrate, the heat treatment temperature of the heat treatment, the heat treatment time, the gas atmosphere, and the like.

Hereinafter, a method of manufacturing a solid-state imaging device according to an embodiment of the present invention will be described in detail with reference to FIGS. 3 to 8.

First, the semiconductor substrate 1 as shown in FIGS. 1 and 2 described above is prepared.

Next, a part of the light-emitting diode and the transistor is formed on the surface layer portion 3a of the semiconductor substrate 1 by using a known semiconductor process. That is, in the imaging field of the semiconductor substrate 1, a portion of the light-emitting diode 11 and the MOS transistor corresponding to each pixel (source/drain region 12a) is formed, and a CMOS transistor is further formed in the peripheral region. Part (source/drainage field 13a) (shown in Figure 3).

Next, the gate electrode 12b of the MOS transistor is formed on the surface 2a of the surface layer portion 3a via the gate insulating film 14 by a known method. The gate electrode 13b of the CMOS transistor.

The MOS transistor 12 is configured via the source/drain region 12a, the gate insulating film 14, and the gate electrode 12b. Further, the CMOS transistor 13 is configured via the source/drain region 13a, the gate insulating film 14, and the gate electrode 13b. Next, on the gate insulating film 14 including the gate electrodes 12b and 13b, the wiring portion 17 (shown in FIG. 4) having the wiring 16 having a multilayer structure is formed via the interlayer insulating film 15. Continuing, a support substrate (for example, a tantalum substrate) 18 is bonded to the interlayer insulating film 15 by a known method (illustrated in FIG. 5).

Then, for example, a vermiculite grinding stone is used, and the back surface processing is performed from the inner surface 2b side of the semiconductor substrate 1 by grinding, whereby the surface layer portion 3b and the first body layer 4b are removed. At the same time, in the second main body layer 5, the above-mentioned grinding process is performed in the direction from the interface with the first main body layer 4a toward the inner side 2b side, and the replacement portion of the mirror polishing after the subsequent processing is performed ( It is about 5 to 15 μm) (Fig. 6).

Next, the second main body layer 5 and the first main body layer 4a (shown in FIG. 7) remaining in the semiconductor substrate 1 are removed by mirror polishing using a known mirror polishing apparatus.

FIG. 9 is a conceptual diagram showing an example of a mirror polishing apparatus used in the manufacturing process of the solid-state imaging element according to the embodiment.

The mirror polishing apparatus 30 is a device for mirror-polishing a single surface (the inner surface 2b side) of the semiconductor substrate 1 to be processed. The mirror polishing apparatus 30 is, for example, a polishing surface 32 on the inner surface 2b side of the ground semiconductor substrate 1 and has a polishing pad 32 that holds the inner surface side (the support substrate 18 side). Below the polishing pad 32, a rotatable fixed disk 34 is disposed in the horizontal direction, and a polishing cloth 36 is disposed thereon. Further, the mirror polishing apparatus 30 is provided with load current measurement for measuring the load current of the polishing pad 32 during polishing. Part 42.

At the time of the mirror polishing, the polishing pad 32 is lowered (not shown) to press the polished surface of the semiconductor substrate 1 held on the polishing pad 32. The polishing cloth 36 supplies the polishing agent 40 to the polishing cloth 36 from the polishing nozzle 38 disposed above the polishing cloth 36, and performs mirror polishing of the polishing surface while rotating the polishing pad 32 and the fixed disk 34 in the horizontal direction.

At this time, the interface between the surface layer portion 3a and the first body layer 4a is detected as a grinding by the change in the load current value measured by the load current measuring unit 42 of the polishing pad 32 in the mirror polishing. end.

That is, as described above, the semiconductor substrate 1 according to the embodiment has a large difference in strength between the surface layer portion 3a and the first body layer 4a. That is, the first body layer 4a having a high BMD density has a high strength, and the surface portion 3a has a low strength. This is because BMD is caused by SiO ₂ blocks.

In the mirror polishing as described above, when the first main body layer 4a is polished, the friction coefficient between the polishing surface of the semiconductor substrate 1 and the polishing cloth 36 is small, so that the load current value of the polishing pad 32 is small. In addition, when the surface layer portion 3a is polished, the friction coefficient between the polishing surface of the semiconductor substrate 1 and the polishing cloth 36 is increased, so that the load current value of the polishing pad 32 is increased.

Therefore, by detecting the change in the load current value and using it as the polishing end point, the semiconductor substrate can be thinned with high precision.

In more detail, mirror polishing is carried out by a well-known three-stage three-stage polishing (primary polishing, secondary polishing, final polishing).

The primary polishing is performed by mirror polishing for the purpose of correcting the flatness of the semiconductor substrate, and the polishing rate is large. One-time grinding generally uses a hard abrasive cloth and uses an alkaline solution containing a relatively large particle size colloidal vermiculite (pH=10.5). Left and right) as an abrasive.

The secondary polishing and the final polishing are mirror polishing for the purpose of correcting the surface roughness and the haze of the semiconductor substrate, and the polishing rate is small. The secondary polishing and the final polishing are generally performed by using a soft abrasive cloth and using an alkaline solution (pH = about 10.5) containing a colloidal vermiculite having a small particle diameter as an abrasive. The secondary polishing and the final polishing were carried out with a maximum substitution of less than 1 μm.

The removal of the first body layer in the reverse processing is performed by one polishing, and the interface between the surface layer portion and the first body layer is detected as the polishing end point, and the polishing is terminated once. Then, it is preferred to carry out the aforementioned two-time grinding and final grinding.

Since the first bulk layer 4a has a high BMD density and a higher hardness than an ordinary crucible, the polishing rate is greatly lowered. Therefore, the removal of the first main body layer 4a by the primary polishing at the highest polishing rate can suppress the decrease in productivity. Further, in the secondary polishing and the final polishing, although the surface layer portion 3a is polished, the polishing is not less than 1 μm because of polishing, so that no problem occurs.

By performing mirror polishing, the semiconductor substrate can be thinned reliably and with high precision.

In consideration of the above, the surface layer portion of the semiconductor substrate according to the embodiment preferably has a thickness of 3 μm or more and 5 μm or less from the surface, and the first body layer preferably has a thickness of 500 nm from the interface of the surface layer portion. Above 1 μm thickness.

Thereby, the removal of the first body layer 4a which reduces the polishing rate for high strength can be minimized. In addition, it is possible to set the secondary polishing and the final polishing of the surface layer portion 3a in a range where the semiconductor element portion forming region is a region having a depth of approximately 2 μm from the surface.

Next, a passivation film 21 is formed on the polished surface of the surface layer portion 3a by a known method, for example, by depositing the tantalum nitride film 19 and the tantalum oxide film 20 in this order. Then, a pad opening portion is formed from the passivation film 21 at a desired position of the surface layer portion 3a, and a terminal portion (not shown) that is continuous with the wiring 16 of the multilayer structure of the interlayer insulating film 15 is formed. Further, on the passivation film 21 facing the light-emitting diode 11, the filter 22 and the wafer lens 23 are formed to manufacture a solid-state image sensor (illustrated in Fig. 8).

According to such an embodiment, it is possible to manufacture a solid-state image sensor in which the end point detecting portion remains after the solid-state image sensor is manufactured as in the conventional case. Further, there is no problem such as diffusion into a semiconductor element portion of a material different from the semiconductor substrate, and the semiconductor substrate can be thinned with good precision to produce a solid-state imaging device.

Hereinafter, the present invention will be more specifically described based on the examples, but the present invention is not limited by the examples.

(Example 1)

At least the surface of the element forming region was prepared to be a mirror-polished 矽 substrate having a diameter of 8 Å and a thickness of 725 μm. This ruthenium substrate was placed in a reaction tube of a known vertical heat treatment apparatus, and the first heat treatment was carried out for 1 hour at a temperature of 1,350 ° C under an argon gas atmosphere. Next, the ruthenium substrate subjected to the first heat treatment is placed in a reaction tube of a known rapid temperature rise and temperature heat treatment apparatus, and held at a temperature of 1200 ° C for 60 seconds in an oxidizing gas atmosphere (oxygen 100% gas). The second heat treatment. Then, the tantalum substrate subjected to the second heat treatment was placed in a reaction tube of a known vertical heat treatment apparatus, and a third heat treatment was carried out for 30 minutes at a temperature of 1,100 ° C under an argon gas atmosphere.

Performing BMD precipitation heat treatment on the obtained tantalum substrate (780 ° C × 3 After the time + 1000 ° C × 16 time), the above-mentioned ruthenium substrate was opened, and the cleavage surface was observed by SEM. As a result, the BMD of the field (surface layer portion 3a) having a depth of 5 μm from the surface of the ruthenium substrate is hardly recognizable, and a high-density BMD (first body layer 4a) is formed from the surface layer portion 3a to a depth of 1 μm. . Furthermore, it was confirmed that the BMD (second body layer 5) having a lower density than the first main body layer 4a was formed in the depth region from the first main body layer 4a to the inner side 2b side.

The BMD density of the first body layer 4a and the second body layer 5 was measured by an IR optical tomography (MO-411 manufactured by Raytex Co., Ltd.), and as a result, the first body layer 4a was 1 ×10 ¹¹ /cm ³ , and the second body layer 5 is 1 × 10 ¹⁰ /cm ³ .

Next, using the above-described ruthenium substrate, a solid-state image sensor is manufactured from the surface to a depth of 2 μm in the field of semiconductor element portion formation in accordance with the above-described processes shown in FIGS. 3 to 8.

In such a project, a tantalum substrate having a diameter of 8 Å and a thickness of 725 μm is used as a supporting substrate (矽 substrate) 18.

In the back processing of the tantalum substrate, a vitrified grinding stone having #335 abrasive grains and a resin having #2000 abrasive grains were used to grind the grinding stone from the inner side 2b side of the crucible substrate. Grinding is performed until the second main body layer 5 has a thickness of 10 μm.

Next, the dummy polishing is performed by detecting the interface between the first body layer 4a and the second body layer 5 as the end point by one polishing. Further, the semiconductor substrate is subjected to additional polishing until the thickness of the first body layer is removed by the interface between the surface layer portion 3a and the first body layer 4a at the end of the primary polishing detection. Thin film.

Then, the surface of the exposed surface layer portion 3a is replaced by a total It is 2 times of grinding and final grinding of less than 1 μm.

By performing the above method, the solid-state imaging element in which the first body layer 4a is completely removed can be obtained. Furthermore, the film thickness of the semiconductor layer (the remaining surface layer portion 3a) on the semiconductor element portion was evaluated by FT-IR, and as a result, the in-plane unevenness of the semiconductor layer was 2 μm ± 0.3 μm, and it was confirmed that high-precision thin film formation can be realized. .

‧‧‧‧ arrow

1‧‧‧Semiconductor substrate for solid-state imaging device

2a‧‧‧ surface

2b‧‧‧ inside

3a, 3b‧‧‧ surface layer

4a, 4b‧‧‧1st body layer

5‧‧‧2nd body layer

11‧‧‧Lighting diode

12‧‧‧MOS transistor

12a‧‧‧Source/Bungee Field

12b‧‧‧gate electrode

13‧‧‧CMOS transistor

13a‧‧‧Source/Bungee Field

13b‧‧‧gate electrode

14‧‧‧Gate insulation film

15‧‧‧Interlayer insulating film

16‧‧‧ wiring

17‧‧‧Wiring Department

18‧‧‧Support substrate (矽 substrate)

19‧‧‧矽 nitride film

20‧‧‧矽Oxide film

21‧‧‧ Passivation film

22‧‧‧Filter

23‧‧‧ wafer lens

30‧‧‧Mirror grinding device

32‧‧‧ polishing pad

34‧‧‧ Fixed disk

36‧‧‧ polishing cloth

38‧‧‧ Grinding nozzle

40‧‧‧Abrasive

42‧‧‧Load current measurement department

1 is a schematic cross-sectional view showing a semiconductor substrate for a solid-state imaging device according to an embodiment of the present invention.

2 shows the distribution of BMD density in the surface layer portion 3a, the first body layer 4a, and the second body layer 5 in the depth direction (arrow α) from the surface 2a of the semiconductor device 1 for solid-state imaging device shown in FIG. Conceptual map.

3 is a schematic cross-sectional view showing a first step of a manufacturing process of a solid-state image sensor according to an embodiment of the present invention.

4 is a schematic cross-sectional view showing a second step of the manufacturing process of the solid-state imaging device according to the embodiment of the present invention.

Fig. 5 is a schematic cross-sectional view showing a third step of the manufacturing process of the solid-state imaging device according to the embodiment of the present invention.

Fig. 6 is a schematic cross-sectional view showing a fourth step of the manufacturing process of the solid-state imaging device according to the embodiment of the present invention.

Fig. 7 is a schematic cross-sectional view showing a fifth step of the manufacturing process of the solid-state imaging device according to the embodiment of the present invention.

8 is a schematic cross-sectional view showing a sixth step of the manufacturing process of the solid-state imaging device according to the embodiment of the present invention.

FIG. 9 is a conceptual diagram showing an example of a mirror polishing apparatus used in a manufacturing process of a solid-state image sensor according to an embodiment of the present invention.

‧‧‧‧ arrow

1‧‧‧Semiconductor substrate for solid-state imaging device

2a‧‧‧ surface

2b‧‧‧ inside

3a, 3b‧‧‧ surface layer

4a, 4b‧‧‧1st body layer

5‧‧‧2nd body layer

Claims (4)

A semiconductor substrate for a solid-state imaging device, which is a semiconductor substrate for a solid-state imaging device which is used for the surface layer portion on the surface side of the surface region in which the element portion is formed, and which is back-processed from the back side, and is characterized in that it is a field for forming the element portion. The surface layer portion on the front surface side and the first main body layer applied to the back surface processing are formed in the inner side of the surface layer portion and have a BMD density of 1 × 10 ¹⁰ /cm ³ or more and 1 × 10 ¹² /cm ³ or less; and the second body layer applied to the back processing, which is formed inside the inner side of the first body layer and has a BMD density lower than that of the first body layer, and the density It is 1 × 10 ⁹ /cm ³ or more and 1 × 10 ¹⁰ /cm ³ or less. The semiconductor substrate for a solid-state imaging device according to the first aspect of the invention, wherein the surface layer portion has a thickness of 3 μm or more and 5 μm or less from a surface, and the first main layer has a thickness of 500 nm or more from an interface of the surface layer portion. Thickness of 1 μm or less. A method of producing a solid-state imaging device, which is a method of manufacturing a solid-state imaging device using a semiconductor substrate for a solid-state imaging device according to the first or second aspect of the invention, characterized in that: the surface layer portion of the semiconductor substrate for a solid-state imaging device is provided a process of forming a semiconductor element portion including a light-emitting diode and a transistor, a process of forming a wiring portion having a multilayer structure on a surface of the surface layer portion including the semiconductor element portion, and bonding a support substrate to the semiconductor substrate The wiring portion is processed, and the back surface of the semiconductor substrate is back-processed, and the interface between the surface layer portion and the first body layer as the end point is detected, and the semiconductor is guided. The process of thinning the bulk substrate until the thickness of the first and second body layers is removed. The method of manufacturing a solid-state imaging device according to claim 3, wherein the means for removing the first main layer from the back processing is mirror-polished, and the load current value of the polishing pad in the mirror polishing is changed. The interface between the surface layer portion as the polishing end point and the first body layer is detected.