KR20120074859A - Method of manufacturing for silicon substrate - Google Patents

Method of manufacturing for silicon substrate Download PDF

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Publication number
KR20120074859A
KR20120074859A KR1020100136823A KR20100136823A KR20120074859A KR 20120074859 A KR20120074859 A KR 20120074859A KR 1020100136823 A KR1020100136823 A KR 1020100136823A KR 20100136823 A KR20100136823 A KR 20100136823A KR 20120074859 A KR20120074859 A KR 20120074859A
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South Korea
Prior art keywords
silicon substrate
oxygen
ion implantation
depth
implantation layer
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KR1020100136823A
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Korean (ko)
Inventor
이상현
Original Assignee
에스케이하이닉스 주식회사
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Priority to KR1020100136823A priority Critical patent/KR20120074859A/en
Publication of KR20120074859A publication Critical patent/KR20120074859A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a silicon substrate capable of improving a thinning process when manufacturing a semiconductor device such as a high resolution CMOS image sensor (CIS) using a back side illumination (BSI) process technology. A method of manufacturing a substrate, comprising: preparing a silicon substrate; Forming a buffer oxide film on an edge of the silicon substrate; A first oxygen having a higher oxygen concentration distribution at an edge of the silicon substrate than at a center of the silicon substrate by ion implanting oxygen ions into a first depth inside the silicon substrate and a second depth deeper than the first depth Forming an ion implantation layer and a second oxygen ion implantation layer; Removing the buffer oxide film; And forming an epitaxial layer on the silicon substrate and simultaneously diffusing oxygen ions of the first oxygen ion implantation layer and the second oxygen ion implantation layer to form a first oxygen precipitate and a second oxygen precipitate. The present invention has the advantage of reducing the thickness variation and precise thickness control of the silicon substrate during the thinning process by forming a thinning control film inside the silicon substrate. In particular, by increasing the thinning control film density of the edge of the silicon substrate, the removal rate of the edge and the center is artificially formed to form a polished silicon substrate with a uniform thickness.

Description

Method of manufacturing silicon substrate {METHOD OF MANUFACTURING FOR SILICON SUBSTRATE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing technology, and more particularly, to a silicon substrate manufacturing method, and more specifically, to manufacturing a semiconductor device such as a high resolution CMOS image sensor (CIS) using back side illumination (BSI) process technology. Thinning) relates to a method for manufacturing a silicon substrate capable of process improvement.

A semiconductor device is manufactured by forming a circuit in a silicon substrate (or silicon wafer) sliced from a silicon single crystal pulled up by the Czochralski (CZ) method or the like. However, when impurities such as heavy metals are mixed in the silicon substrate, particularly in semiconductor devices such as CMOS image sensors, white spots are generated due to dark current, which causes a problem of deterioration in device characteristics. When the silicon substrate is contaminated by impurities such as metal, not only crystal defects are caused, but also insulation defects are caused on the oxide film formed on the silicon substrate, and thus the yield and reliability of the semiconductor device are deteriorated.

On the other hand, the conventional front side illumination (FSI) process technology has a disadvantage in reducing the sensitivity of the sensor because of the wiring or transistor located on the image sensor. In particular, there has been a problem in that the light receiving efficiency is further lowered due to the reduction in the pixel size of the image sensor. To compensate for this, a backside irradiation (BSI) process technology has been proposed. The back-illumination process technology exposes an image sensor directly to the light-receiving portion (surface). The back-illumination process fabricates a substrate to be used as a light-receiving portion that receives image information of a subject and a substrate to be used as a circuit portion on a different substrate. After forming the image sensor on one silicon substrate, there is a process of shaving the bottom surface of the silicon substrate to use the bottom surface of the silicon substrate as the light receiving portion. In the latter case, a thinning process is essential, in which the bottom surface of the silicon substrate is cut to allow light to pass through, so that the silicon substrate can be used as a light receiving unit, and the thickness and thickness variation of the remaining silicon substrate after the thinning process, etc. It is a factor influencing the characteristic efficiency of this backside irradiation type process. As a method for reducing the thickness variation of the remaining silicon substrate during the thinning process, a method of using an SOI wafer using an insulator layer as a thinning control layer has been proposed. There is a problem that an expensive SOI wafer must be used.

SUMMARY OF THE INVENTION The present invention has been proposed to solve the above-mentioned problems, and has a sufficient gettering effect in manufacturing a semiconductor device such as a CMOS image sensor, and a thinning process for manufacturing a semiconductor device such as a CMOS image sensor with a backside irradiation process technology. It is an object of the present invention to provide a method for manufacturing a silicon substrate capable of providing a flat polished light receiving surface.

In order to achieve the above object, the present invention provides a method of manufacturing a silicon substrate, comprising: preparing a silicon substrate; Forming a buffer oxide film on an edge of the silicon substrate; A first oxygen having a higher oxygen concentration distribution at an edge of the silicon substrate than at a center of the silicon substrate by ion implanting oxygen ions into a first depth inside the silicon substrate and a second depth deeper than the first depth Forming an ion implantation layer and a second oxygen ion implantation layer; Removing the buffer oxide film; And forming an epitaxial layer on the silicon substrate and simultaneously diffusing oxygen ions of the first oxygen ion implantation layer and the second oxygen ion implantation layer to form a first oxygen precipitate and a second oxygen precipitate. Characterized in that.

The present invention described above has the advantage of reducing the thickness variation and precise thickness control of the silicon substrate during the thinning process by forming a thinning control film inside the silicon substrate. In particular, by increasing the thinning control film density of the edge of the silicon substrate, the removal rate of the edge and the center is artificially formed to form a polished silicon substrate with a uniform thickness.

In addition, the present invention forms a gettering site of oxygen precipitates inside the silicon substrate, thereby enabling close gettering in the vicinity of the active region of the semiconductor device, thereby reducing the thickness of the semiconductor device for the multi-chip package (MCP) according to the high integration. It can respond to the gettering effect required for.

As a result, when the above-described silicon substrate is used in manufacturing a semiconductor device such as a CMOS image sensor, there is an effect of improving the yield and reliability of the semiconductor device.

1A to 1H are cross-sectional views sequentially illustrating a method of fabricating a silicon substrate for manufacturing a CMOS image sensor semiconductor device using a backside irradiation (BSI) process technology according to an embodiment of the present invention.
2 is a diagram showing the concentration distribution of oxygen ions in a silicon substrate
3 is a view showing an implantation depth of oxygen ions in a silicon substrate

Hereinafter, embodiments of the present invention will be introduced in order to enable those skilled in the art to more easily implement the present invention. However, embodiments of the present invention may be modified in many different forms, and the scope of the present invention should not be construed as being limited to the embodiments described below. In addition, the size or thickness of the film or regions in the drawings are exaggerated for clarity of the specification, elements denoted by the same reference numerals in the drawings means the same element.

1A to 1H are cross-sectional views sequentially illustrating a method of manufacturing a silicon substrate for manufacturing a CMOS image sensor semiconductor device using a backside irradiation (BSI) process technology according to an embodiment of the present invention, and FIG. It is a figure which shows the concentration distribution of oxygen ion, and FIG. 3 is a figure which shows the injection depth of oxygen ion in a silicon substrate.

First, referring to FIG. 1C, a structure of a silicon substrate applied to the semiconductor device will be described. As shown in FIG. 1, a first oxygen precipitate 120A is formed inside the P + type silicon substrate 100, and the first structure The second oxygen precipitate 130A is formed below the oxygen precipitate 120A. The P-type epitaxial layer 140 is formed on the silicon substrate 100. Here, the primary purpose of the formation of the first oxygen precipitates 120A is to serve as a gettering site for proximity gettering, and the second oxygen precipitates 130A may have a flat silicon during a thinning process, particularly a rough polishing process. It is formed for use as a thinning control film for polishing a substrate.

Here, the P + type silicon substrate 100 is a substrate formed by doping a high concentration of boron to an initial silicon substrate, and has a resistivity of about 0.005 to 0.02 μm · cm.

The first oxygen precipitate 120A is formed at a depth of about 10 μm from the surface of the silicon substrate 100 (see FIG. 3), and has a higher concentration distribution at the edge than at the center of the silicon substrate 100 ( 2).

The second oxygen precipitate 130A is formed at a depth of about 50 μm to 100 μm from the surface of the silicon substrate 100 (see FIG. 3), and has a higher concentration distribution at the edge than at the center of the silicon substrate 100. (See FIG. 2). In particular, the second oxygen precipitate 130A has a higher oxygen ion concentration than the first oxygen precipitate 120A. In addition, the epitaxial layer 14 is formed in the thickness of 3-7 micrometers.

As such, the first oxygen precipitates 120A are formed inside the P + silicon substrate 100 into which the high concentration of P-type impurities, that is, boron, is formed, and the first oxygen precipitates 120A form the edges of the silicon substrate 100. With higher concentration distributions at, the excellent gettering effect is exhibited in the manufacture of semiconductor devices such as CMOS image sensors.

In addition, the second oxygen precipitate 130A having a higher concentration distribution is formed at the edge of the silicon substrate 100 so that the removal rate between the edge and the center of the silicon substrate 100 may be artificially different during the thinning process. The precise thickness control and thickness variation of the silicon substrate can be reduced.

Next, the manufacturing method of the silicon substrate mentioned above is demonstrated.

Referring to FIG. 1A, a P + type silicon substrate 100 is formed by doping a high concentration of P type impurities into an initial silicon substrate.

Here, the initial silicon substrate is sliced from the silicon single crystal pulled up by the CZ method or the like, and the concentration of oxygen injected during crystal growth by the CZ method is adjusted to about 8 to 12 ppma (4E17 to 6E17 atoms / cm 3).

Boron is used as a high concentration P-type impurity, and boron performs gettering using the solubility of metal impurities, and particularly has excellent gettering capability for Cu.

In addition, since the oxygen precipitates increase as the resistivity of the silicon substrate 100 is lower, the concentration of boron is appropriately adjusted so that the resistivity of the silicon substrate 100 is about 0.005 to 0.02 Pa · cm.

Subsequently, a buffer oxide film 110 is formed at the edge of the silicon substrate 100.

Here, the buffer oxide film 110 is subsequently formed to control auto doping. That is, auto doping is a phenomenon in which impurity atoms evaporated through the back surface or the edge portion of the silicon substrate 100 are doped during the growth of the P-type epitaxial layer, which degrades the resistivity uniformity of the silicon substrate on which the P-type epitaxial layer is grown. When the buffer oxide film 110 is formed at the edge of the silicon substrate 100, the doping of such impurity atoms can be blocked, so that the auto doping can be controlled.

In addition, since the buffer oxide film 110 can act as a buffer layer to mitigate damage to the silicon substrate 100 by ion implantation during subsequent ion implantation, the buffer oxide film 110 may be formed to a thickness of about 2000 to 6000 microns for a sufficient function as a buffer layer. It is preferable.

Referring to FIG. 1B, oxygen ions (O + ) are ion-implanted twice into the silicon substrate 100, so that the first oxygen ion implantation layer 120 and the second oxygen ion implantation layer 130 are inside the silicon substrate 100. ). In FIG. 1B, the oxide film 110 illustrated in FIG. 1A is omitted for convenience of description.

At this time, the concentration of the ion implanted oxygen ion is adjusted so that the concentration of the edge of the silicon substrate 100 is higher than the center, as shown in FIG. That is, the concentration of oxygen ions (O + ) injected into the first oxygen ion injection layer 120 is preferably set to 1E16 to 1E18 atoms / cm 3 to facilitate formation of oxygen precipitates. At this time, the implantation depth of the oxygen ions (O + ) injected into the first oxygen ion implantation layer 120 is preferably set to about 10㎛ from the surface of the silicon substrate 100, as shown in FIG.

In addition, the concentration of oxygen ions (O + ) injected into the second oxygen ion injection layer 130 is preferably set to 1E19 to 1E21 atoms / cm 3 to facilitate formation of oxygen precipitates. At this time, the implantation depth of oxygen ions (O + ) injected into the first oxygen ion implantation layer 120 is preferably set to about 50 to 100㎛ from the surface of the silicon substrate 100, as shown in FIG. Do.

As such, when the first oxygen ion implantation layer 120 and the second oxygen ion implantation layer 130 are formed in the silicon substrate 100, the injected oxygen enters the lattice position of the silicon bonding, and then a process such as subsequent heat treatment. Facilitate the formation of oxygen precipitates during

Referring to FIG. 1C, the buffer oxide layer (not shown) is removed by wet or dry etching.

Thereafter, the surface of the silicon substrate 100 is cleaned to facilitate the growth of subsequent P-type epitaxial layers.

Subsequently, the P-type epitaxial layer 140 is formed on the surface of the silicon substrate 100 by epitaxial growth to form a P + / P structure.

Here, epitaxial growth is to form an epitaxial layer 140 to a thickness of 3 to 7㎛ using an epitaxial reactor, wherein the first oxygen ion implanted into the silicon substrate 100 by the accompanying high temperature heat treatment process Oxygen of the injection layer 120 and the second oxygen ion implantation layer 130 is thermally diffused to generate the first oxygen precipitates 120A and the second oxygen precipitates 130A.

As described above, the concentrations of the first oxygen precipitates 120A and the second oxygen precipitates 130A become high at the edges of the silicon substrate 100, which is an impurity such as a metal at the edge of the silicon substrate 100. The gettering effect is further increased, so that the gettering effect is excellent in the subsequent device fabrication process.

Referring to FIG. 1D, the image sensor device 150 is formed on the silicon substrate 100 on which the epitaxial layer 140 is formed.

Referring to FIG. 1E, after the handle substrate 160 is bonded to the silicon substrate 100 on which the image sensor device 150 is formed, the silicon substrate 100 is turned upside down to perform the thinning process. Here, the back surface B1 of the silicon substrate 100 is an opposite surface to the surface on which the image sensor element 150 is formed in the silicon substrate 100, and the thickness of the silicon substrate 100 must be thinned to be used as a light receiving surface. .

Referring to FIGS. 1F-1H, the thinning process is performed by a rough polishing process (FIG. 1F) having a fast removal rate (FIG. 1F) and a soft polishing process (FIG. 1G) capable of precise polishing process (FIG. 1G). The silicon substrate 100 which can be used as the light receiving surface of the sensor element can be formed.

As shown in FIG. 1F, it is preferable that a rough polishing process uses a back grinder wheel having a roughness of about 400 to 2000 meshes. Through the rough polishing process, the back surface of the silicon substrate 100 is polished to the second oxygen precipitate 130A formed in the silicon substrate 100. In this case, the general rough polishing process causes a thickness variation in which the center and the edges of the silicon substrate 100 are polished. In the silicon substrate 100 according to the exemplary embodiment, the second oxygen precipitate 130A is formed. There is an advantage that can reduce the thickness variation. That is, as described above, the concentration of the second oxygen precipitate (130A) is formed at a relatively high concentration of the edge of the silicon substrate 100 than the center, which is the removal rate at the edge of the silicon substrate 100 during the rough polishing process ( The removal rate is relatively reduced than the removal rate in the center of the silicon substrate 100. That is, since the polishing rate is slow at the edge portion and the polishing rate is relatively high at the center portion when polishing by the second oxygen precipitate 130A, the edge portion of the silicon substrate 100 is further polished during the general polishing process. This can solve the problem that the thickness uniformity of the silicon substrate 100 is deteriorated.

Subsequently, as shown in FIG. 1G, in the fine polishing process, it is preferable to use a polisher having a bite number of 20,000 or more. At this time, the first oxygen precipitates 120A are also polished and removed, and since the first oxygen precipitates 120A also have concentration variations in the center and the edges, the silicon substrate 100 can be polished flat.

As shown in Fig. 1H, a silicon substrate 100 that can be used as a light receiving surface of a CMOS image sensor element can be formed. In this case, the thickness of the polished silicon substrate 100 is about 10 μm since the first oxygen precipitates 120A are formed at about 10 μm from the surface of the silicon substrate 100 according to a preferred embodiment of the present invention. A thickness of about 10 mu m can be used as the light receiving surface of the CMOS image sensor. This can provide a flat polished silicon substrate 100 to be used as the light receiving surface of the CMOS image sensor.

When the above-described silicon substrate is used for manufacturing a semiconductor device such as a CMOS image sensor, the yield and reliability of the semiconductor device can be improved. In addition, there is also an economical advantage because it is not necessary to use expensive SOI wafers when manufacturing the semiconductor device.

Although the technical spirit of the present invention has been described in detail according to the above-described preferred embodiment, it should be noted that the above embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

100 silicon substrate 110 buffer oxide film
120: first oxygen ion implantation layer 130: second oxygen ion implantation layer
140: epitaxial layer 150: image sensor device

Claims (10)

Preparing a silicon substrate;
Forming a buffer oxide film on an edge of the silicon substrate;
Oxygen ions are ion implanted into a first depth inside the silicon substrate and a second depth deeper than the first depth, so that the first oxygen has a higher oxygen concentration distribution at the edge of the silicon substrate than at the center of the silicon substrate. Forming an ion implantation layer and a second oxygen ion implantation layer;
Removing the buffer oxide film; And
Forming an epitaxial layer on the silicon substrate and simultaneously diffusing oxygen ions of the first oxygen ion implantation layer and the second oxygen ion implantation layer to form a first oxygen precipitate and a second oxygen precipitate;
Method for producing a silicon substrate.
The method of claim 1,
After the step of forming the second oxygen precipitate,
Forming an image sensor element on the silicon substrate;
Bonding the silicon substrate to a handle wafer; And
Performing a thinning process on the back surface of the silicon substrate to form a silicon substrate as a light receiving surface of the image sensor element;
Method of manufacturing a silicon substrate.
The method of claim 2,
The thinning process
Polishing the back surface of the silicon substrate; And
Fine polishing the back side of the roughly polished silicon substrate;
Method for producing a silicon substrate.
The method of claim 3,
The rough polishing step
Polishing the second oxygen precipitate in the silicon substrate.
Method for producing a silicon substrate.
The method of claim 3,
The fine polishing step
Polishing the first oxygen precipitate in the silicon substrate.
Method for producing a silicon substrate.
The method of claim 1,
The first depth is a depth of about 10㎛ from the surface of the silicon substrate
Method for producing a silicon substrate.
The method of claim 1,
The second depth is about 50 to 100 ㎛ depth from the surface of the silicon substrate
Method for producing a silicon substrate.
The method of claim 1,
The concentration of oxygen ions implanted into the first depth is higher than that of oxygen ions implanted into the second depth.
Method for producing a silicon substrate.
The method of claim 1,
Ion implantation of the first oxygen ion implantation layer is performed at an oxygen ion concentration of 1E16 to 1E18 atoms / cm 3
Method for producing a silicon substrate.
The method of claim 1,
The ion implantation of the second oxygen ion implantation layer is performed at an oxygen ion concentration of 1E19 to 1E21 1E18 atoms / cm 3.
Method for producing a silicon substrate.
KR1020100136823A 2010-12-28 2010-12-28 Method of manufacturing for silicon substrate KR20120074859A (en)

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