200929535 六、發明說明： 【發明所屬之技術領域】 本發明是有關於一種影像感測器及其製造方法，且特別是提 供一種整合電路系統與光電二極體之方法。 【先前技術】 影像感測器是用以將光學影像轉換成電子訊號之一半導體裝 ❹置。影像感測器通常被分類成電荷耦合裝置(charge coupied device ’ CCD)影像感測器或互補式金屬氧化物半導體 (complementary metal oxide semiconductor，CMOS)影像感測器 ’ (CIS)。 在影像感測的製造過程中，光電二極體係使用離子植入而 形成於基板中。在不需要增加晶片之尺寸大小的情況下，可減少 光電二極體的尺寸大小，藉明加-些像飾_。如此一來，光 ❿ 接收部位的區域將會減少，而影像品質也會因此降低。 由於堆璧的尚度係無法像光接收部位的區域一樣減少，一些 光子入射於光接收部位會因為糾衍射域少，這種現象稱為艾 瑞盤(Aiiy disk)。 為了解決此限制光電_極體可利用非晶石夕(am〇rph〇us siHc〇n) 而形成。另夕卜，由於讀取電路系統可利用如晶圓對晶圓的接合方 . 式形成於，基板中，而摘二極體係因此職於讀取電路系統 -(可詩二維(3D)影像❹⑻之上，而光電二極體健由金屬内連 線而與讀取電路系統相連接。 200929535 .、根據相關的先前技術，將光電2極體與讀取電路系統相互電 陡連接疋相w困難的，也就是說，金屬内連線係形成於讀取電路 系統之上’並且以晶圓對晶_接合方式形成，而使金屬内連線 接觸於光電二極體。因此，在金屬内連線之間的接觸，以及金屬 内連線與光電一極體之間的歐姆接觸(〇hmic c_ct)係相當地困 難。 ❿ 由於在轉移電晶體兩_源極與汲極係大量摻轉N型雜 質，因而發生電荷分享的縣。t電荷分享的現象發生時，可能 會降低輸出影像的感光度，且會產生影像錯誤。另外，由於光電 荷(photo Charge)無法隨時移動於光電二極體與讀取電路系統之 間如此-來’可能會產生暗電流(dark咖㈣，且因而降健和 度與感光度。 【發明内容】 鬱 依據本發明所揭露之影像感測器及其製造方法係於填充係數 增加時，可防止電荷分享(charge sharing)的發生。 依據本發賴揭露之影像❹指及其製造方法係將—暗電流 (dark c刪!t)源極減至最小’以及#由在光電二極體與讀取電路系 統之間提供一光電荷(photo charge)快速的移動路徑，以防止飽和度 與感光度降低。 依據本發明所揭露之影像感測器包括有一第一基板，於其上 形成具有一金屬内連線之一電路系統、一先電二極體，與金屬内 '連線相接觸，並設置於第一基板上，其中電路系統包括一電接面 200929535 設置於電接面區上， 區，係設置於第-基板上、一第一傳導型區 並與金屬内連線相連接。200929535 VI. Description of the Invention: [Technical Field] The present invention relates to an image sensor and a method of fabricating the same, and in particular to a method of integrating a circuit system and a photodiode. [Prior Art] An image sensor is a semiconductor device for converting an optical image into an electronic signal. Image sensors are typically classified into a charge coupled device (CCD) image sensor or a complementary metal oxide semiconductor (CMOS) image sensor (CIS). In the manufacturing process of image sensing, a photodiode system is formed in a substrate using ion implantation. In the case where it is not necessary to increase the size of the wafer, the size of the photodiode can be reduced, and the image is added. As a result, the area of the receiving area of the light ray will be reduced, and the image quality will be reduced. Since the stacking is not as reduced as the area of the light receiving portion, some photons are incident on the light receiving portion because of the small number of diffraction fields. This phenomenon is called Aiiy disk. In order to solve this limitation, the photo-electrode body can be formed by using an amorphous stone (am〇rph〇us siHc〇n). In addition, since the reading circuit system can be formed by using a wafer-to-wafer bonding method in the substrate, the dipole system is used to read the circuit system - (2D image can be translated Above the ❹(8), the photodiode is connected to the read circuit system by a metal interconnect. 200929535 . According to the related prior art, the photodiode and the read circuit are electrically connected to each other. Difficult, that is, the metal interconnect is formed on the read circuit system' and is formed by wafer-to-wafer bonding, so that the metal interconnect is in contact with the photodiode. Therefore, in the metal The contact between the wires and the ohmic contact (〇hmic c_ct) between the metal interconnect and the photodiode are quite difficult. ❿ Due to the large amount of N-source and drain in the transfer transistor Type impurity, thus the county where charge sharing occurs. When the phenomenon of charge sharing occurs, the sensitivity of the output image may be lowered, and image errors may occur. In addition, photocharge cannot be moved to the photodiode at any time. And reading circuit Between the systems, there may be a dark current (dark coffee (4), and thus the degree of health and sensitivity. [Invention] The image sensor and its manufacturing method according to the present invention are based on the fill factor. When added, the charge sharing can be prevented. According to the disclosure, the image finger and its manufacturing method reduce the dark current (dark c delete! t) source to the minimum 'and the light source A photo charge rapid moving path is provided between the diode and the read circuit to prevent saturation and sensitivity reduction. The image sensor according to the present invention includes a first substrate, Forming a circuit system having a metal interconnect, a first electric diode, contacting the metal inner wire, and disposed on the first substrate, wherein the circuit system includes an electrical interface 200929535 disposed on the electrical connection The surface area is disposed on the first substrate, a first conductive type region, and connected to the metal interconnect.
接觸 依據本發明所揭露之影像感測器更包括有—第—基板，於盆 上形成具有-金屬内連線之—電路系統、—光電二極體，與金屬 内連線相接觸，並設置於第—基板上，其中第—基板具有一上層 部’係摻財-第二傳_。依據本㈣所賊之祕板包財 =晶體，做置於第—基板内、―電接祕，係形成於電晶體 、側帛傳導型區，連接於金屬内連線，且與電接面區相 .依據本剌·露之影«難及其製造枝包括以下步 形成包括有-金屬内連線之—電路系統於第—基板上、形成 極體於金勒連線上。依據本發明所揭露之影像感測器 二衣化方法’形成電路祕包括以下步驟：形成―電接面區於 ⑩’基板内，以及形成_第—傳導龍與金屬内連線相連接，並 且設置於電接面區上。 I本發㈣特徵與貫作，兹配合圖式作最佳實施例詳 明如下。 【實施方式】 、據本么明所揭露之影像感測器及其製造方法將詳細描述如 下’錢目時錢11扣利綱。 - 社表第「1圖」為根據本發明所揭露之影像感測器之剖面示意圖。 月多考第1圓」’本發明所揭露之影像感測器包括一第一基板 200929535 ⑽。-金如魏⑽與—電路魏12Q_成 上。影像感測器亦包括—光電二極體21〇，係接觸於弟 =反⑽ 150。光電二極體21〇係 、屬内連線 镇u , 成弟基板100上。根據本實施例， 一土反GG之電路系統12G包含—電接面區14q，係形成於第一 基板獅，而高濃度第—傳導囊147係形成於電接面區140上， 並且電路系統12〇電性連接於金屬内連線⑼。The image sensor according to the present invention further includes a first substrate, and a circuit system having a metal interconnection is formed on the basin, and the photodiode is in contact with the metal interconnection. On the first substrate, wherein the first substrate has an upper layer portion, which is a mixture of the second and the second. According to the (4) thief's secret board Baocai = crystal, placed in the first substrate, the "electrical connection secret", formed in the transistor, side conduction type, connected to the metal interconnect, and the electrical junction According to the 剌···················································································· According to the image sensor of the present invention, the method for forming a circuit includes the following steps: forming an "electrical junction region" in the 10' substrate, and forming a _first conduction dragon connected to the metal interconnection, and Set on the electrical junction area. I. The characteristics and cooperation of the present invention are described in detail below with reference to the drawings. [Embodiment] The image sensor and its manufacturing method disclosed in the present invention will be described in detail as follows. - "Table 1" is a schematic cross-sectional view of an image sensor according to the present invention. The image sensor disclosed in the present invention includes a first substrate 200929535 (10). - Jin Ruwei (10) and - Circuit Wei 12Q_ are on. The image sensor also includes a photodiode 21〇, which is in contact with the brother = anti (10) 150. The photodiode 21 is a lanthanum, an internal interconnect, and a tanned substrate 100. According to the present embodiment, the earth-anti-GG circuit system 12G includes an electrical junction region 14q formed on the first substrate lion, and a high-concentration first-conduction balloon 147 is formed on the electrical junction region 140, and the circuit system 12〇 is electrically connected to the metal interconnect (9).
依據本發日_揭露之影像制ϋ及其製造方法，光電二極體 別係形成於結晶半導體層黯内（如「第3圖」所示）。在本實 施例中’由於影像_雜以垂直魏電二極體設置於電路系二 上，且光電二極體係形成於結晶半導體層内，因而可防止光電二 極體内部產生缺陷。 「第2圖」至「第6圖」為根據本發明所揭露影像感測器之 袭k方法示思圖。請參考「第2圖」，依據本發明所揭露影像感測 為之方法的步驟係包括準備一第一基板，於其上形成有一 金屬内連線150與一電路系統120。在本實施例中，第一基板1〇〇 可以疋一弟二傳導型基板。在其他實施例中，第一基板1〇〇也可 以是任何一種傳導型基板。 依據本發明所揭露之影像感測器及其製造方法，裝置絕緣層 110係形成於第二傳導塑第一基板100内’因而定義出一主動區 (aetive region)。包括至少一電晶體之電路系統12〇係形成於主動 區内。依據本發明所揭露之實施例，電路系統120更包括一轉移 電晶體(Tx)121、一重設電晶體(Rx)l23、一驅動電晶體(Dx)125以 200929535 及一選擇電晶體(Sx)127。依據本發明所揭露之實施例，之後，離 子植入區130的浮動擴散區(floating diffusion，FD) 131係形成。 浮動擴散&(FD) 131包括各別電晶體的源極/沒極區133、135、137。 依據本發明所揭露之影像感測器及其製造方法，形成讀取電 路系統120於第一基板1〇〇上的步驟，包括形成電接面區ι4〇於 第一基板1〇〇内，以及形成第一傳導型連接區147於電接面區14〇 的一上層區内。第一傳導型連接區147係電性連接於金屬内連線 150。在本實施例中，電接面區14〇可以是—pN接面。在其他實 施例中，電接面區140也可以是任何一接面型式。 依據本發明所揭露之影像感測器及其製造方法，電接面區14〇 包括第一傳導型離子植入層143,並形成於一第二傳導型井141 上或者形成於一第二傳導型磊晶層上。電接面區14〇可更包括形 成於第-傳導型離子植人層上之—第二傳導型離子植入層 145 在本貫知例中，pn 接面 140 可為一 p〇(i45)/N-(143)/P-(141) 接面。 P0/N-/P-接面〗40係形成於第一基板〗〇〇内，且其作用如光電 二極體於4T互補式金屬氧化物半導體結構。不同於浮動擴散區 _131的節點可以是一 Ν+接面，ρ/Ν/ρ接面14〇可以是一電接 面區，且應用在電接面的電塵係不會完全地轉換。Ρ/Ν/Ρ接面140 在一既定電壓（predetennined v〇ltage)下，會使通道截止 恤細，。此種電壓係被稱作為，位電壓(pinning voltage)， 且其取決於;P〇區145與N—區143的摻雜濃度。 200929535 依據本發明所揭露之影像感測器及其製造方法，藉由光電二 極體210所產生的電子會移動至p/N/p接面14〇，並且轉換至浮動 擴散區(FD)131的節點，且當轉移電晶體(Τχ)121開啟時，電子會 轉換成電壓。 Ρ0/Ν-/Ρ-接面140之最大電壓數值係變為一箱位雷愿加“g voltage)，以及浮動擴散區(FD)之節點的最大電壓數值係變為vdd_ 重設電晶體123的臨界電壓㈣)。因此，在―晶片之上層部的光 電二極體210所產生的電子會完全地轉儲至浮動擴散區(F卯^的 節點’不會因為轉移電晶體(Tx)121 S端的電位差而造成電荷分 享。 依據本發明所揭露之影像感測器及其製造方法，在不同的例 子中，光電二極體21〇可以僅連接於—Ν+接面，以避免飽和度與 感光度降低的限制。在本實施例中，Ν+層147係形成於 ❹ 接面140的一表面上。然而，N+層147係變為一滲透#(leakage source)。一插塞植入係於第一金屬接點151蝕刻之後執行， 以減少滲透源。如此，N+層147的區域係減至最小，以促使垂直 〇整5型互補式金屬氧化物半導體影像感測器之暗電流減少。 、 依據本發明所揭露之影像感測器及其製造方法，層間介電質 160係形成於第一基板1〇〇上。在本實施例中，金屬内連線15〇 包括有~第一金屬接點151a、一第一金屬151、一第二金屬152、 一第三金屬以及一第四金屬接點154a。 明參考「第3圖」，結晶半導體層210a係形成於一第二基板 10 200929535 • 200上。在本實施例中’光電二極體係形成於結晶半導體層内。如 此’可防止光電二極體内之缺陷產生。 依據本發賴之雜及其製造方法，結晶半導體 層遍係藉由-屋晶成長法形成於第二基板上。在本實施例 中’氫離子植入層207a係藉由植入氫離子於第二基板與結晶 半導體層施之間而形成。根據本實_，在離子植人以形成光 ❹電二極體的步驟之後’可進行氫離子的植入步驟。 6月參考「第4圖」，雜質離子被植入結晶半導體層21〇&中， 以形成光電二極體210。在本實施例中，第二傳導型傳導層216 係形成於結晶半導體層逃之—上層部巾。此外，高濃度p型傳 導層216係形成於結晶半導體層之上層部。舉例而言，在不需要 光罩下，於第二基板200的整個表面進行第一毯覆式植入法 (blanket-ion implantation)。在本實施例中，第二傳導型傳導層216 〇 係形成約小於〇.5微米(μιη)的接面深度。 依據本發明所揭露之影像感測器及其製造方法，第一傳導型 傳導層214係形成於第二傳導型傳導層216下方。在本實施例中， 低濃度Ν型傳導層214係不使用光罩，藉由在第二基板綱的整 個表面進行第二毯覆式植入法，而形成於第二傳導型傳導層216 下低;辰度Ν型傳導層214係形成有約〗〇微米(^m)至2·〇微米(μιη) 之接面深度。 依據本發明所揭露之影像感測器及其製造方法，高濃度第一 傳V型傳導層加係形成於第一傳導型傳導層別下。高濃度第 11 200929535 一傳導型傳導層212可以是一高濃度N型傳導層，以達到歐姆接 觸(ohmic contact)。 請參考「第5圖」，第一基板1 〇〇與第二基板2〇〇係互相結合。 在本實施例中，光電二極體210與金屬内連線15〇相接觸。根據 本實施例，於第一基板100與第二基板2〇〇互相結合的步驟之前， 藉由電漿之活化作用(activation)以增加表面的能量使其結合。According to the image forming method and the manufacturing method thereof, the photodiode is formed in the crystalline semiconductor layer (as shown in Fig. 3). In the present embodiment, since the image is mixed with the vertical ferroelectric diode on the circuit board 2, and the photodiode system is formed in the crystalline semiconductor layer, defects can be prevented from occurring inside the photodiode. Fig. 2 to Fig. 6 are diagrams showing the method of attacking the image sensor according to the present invention. Referring to Fig. 2, the method of image sensing according to the present invention comprises the steps of preparing a first substrate on which a metal interconnect 150 and a circuitry 120 are formed. In this embodiment, the first substrate 1 〇〇 can be a two-conducting substrate. In other embodiments, the first substrate 1 can also be any of the conductive substrates. According to the image sensor and the method of fabricating the same disclosed in the present invention, the device insulating layer 110 is formed in the second conductive first substrate 100 and thus defines an aetive region. A circuit system 12 including at least one transistor is formed in the active region. In accordance with an embodiment of the present disclosure, the circuit system 120 further includes a transfer transistor (Tx) 121, a reset transistor (Rx) 132, a drive transistor (Dx) 125 to 200929535, and a select transistor (Sx). 127. In accordance with an embodiment of the present invention, a floating diffusion (FD) 131 of the ion implantation region 130 is formed. Floating diffusion & (FD) 131 includes source/nomogram regions 133, 135, 137 of the respective transistors. According to the image sensor disclosed in the present invention and the method of manufacturing the same, the step of forming the read circuit system 120 on the first substrate 1 includes forming an electrical contact region ι4 in the first substrate 1〇〇, and A first conductive type connection region 147 is formed in an upper layer region of the electrical junction region 14A. The first conductive type connection region 147 is electrically connected to the metal interconnect 150. In this embodiment, the electrical junction region 14A may be a -pN junction. In other embodiments, the electrical junction region 140 can also be of any junction type. According to the image sensor and the method of fabricating the same, the electrical junction region 14 includes a first conductive ion implantation layer 143 and is formed on a second conduction well 141 or formed in a second conduction. On the epitaxial layer. The electrical junction region 14〇 may further comprise a second conductivity type ion implantation layer 145 formed on the first conductivity type ion implant layer. In the present example, the pn junction 140 may be a p〇(i45) /N-(143)/P-(141) junction. The P0/N-/P-junction 40 is formed in the first substrate, and functions as a photodiode in a 4T complementary metal oxide semiconductor structure. The node different from the floating diffusion region _131 may be a Ν+ junction, and the ρ/Ν/ρ junction 14〇 may be an electrical junction region, and the electric dust applied to the electrical interface will not be completely converted. The Ρ/Ν/Ρ junction 140 will make the channel cut-off shirt thin at a predetermined voltage (predetennined v〇ltage). This voltage is referred to as the pinning voltage and depends on the doping concentration of the P region 145 and the N region 143. According to the image sensor and the manufacturing method thereof, the electrons generated by the photodiode 210 are moved to the p/N/p junction 14〇 and converted to the floating diffusion (FD) 131. The node, and when the transfer transistor (Τχ) 121 is turned on, the electrons are converted into a voltage.最大0/Ν-/Ρ-the maximum voltage value of the junction 140 becomes a tank with a "g voltage", and the maximum voltage value of the node of the floating diffusion (FD) becomes vdd_ reset transistor 123 The threshold voltage (4)). Therefore, the electrons generated by the photodiode 210 in the upper layer of the wafer are completely dumped to the floating diffusion region (the node of F卯^ is not due to the transfer transistor (Tx) 121 According to the image sensor disclosed in the present invention and the method of manufacturing the same, in different examples, the photodiode 21 can be connected only to the -Ν+ junction to avoid saturation and In the present embodiment, the Ν+ layer 147 is formed on one surface of the splicing surface 140. However, the N+ layer 147 becomes a leak source. Execution is performed after the first metal contact 151 is etched to reduce the source of the permeation. Thus, the region of the N+ layer 147 is minimized to cause a reduction in dark current of the vertical trim type 5 complementary metal oxide semiconductor image sensor. Image sensor and manufacturing thereof according to the present invention The interlayer dielectric 160 is formed on the first substrate 1 . In the embodiment, the metal interconnect 15 15 includes a first metal contact 151 a , a first metal 151 , and a second metal . 152, a third metal and a fourth metal contact 154a. Referring to "Fig. 3", the crystalline semiconductor layer 210a is formed on a second substrate 10 200929535 • 200. In the present embodiment, the photodiode system It is formed in the crystalline semiconductor layer. Thus, it is possible to prevent defects in the photodiode. According to the present invention, the crystalline semiconductor layer is formed on the second substrate by a house growth method. In the present embodiment, the hydrogen ion implantation layer 207a is formed by implanting hydrogen ions between the second substrate and the crystalline semiconductor layer. According to the present invention, ions are implanted to form a photodiode. After the step of 'the hydrogen ion implantation step can be performed. Referring to "Fig. 4" in June, impurity ions are implanted into the crystalline semiconductor layer 21 〇 & to form the photodiode 210. In this embodiment, The second conductive type conduction layer 216 is formed in the crystal The conductor layer escapes from the upper layer. Further, the high concentration p-type conductive layer 216 is formed on the upper layer of the crystalline semiconductor layer. For example, the first surface of the second substrate 200 is first performed without a mask. Blanket-ion implantation. In the present embodiment, the second conductive type conduction layer 216 is formed to have a junction depth of less than about 0.5 micrometers. The image disclosed in accordance with the present invention The sensor and the method of manufacturing the same, the first conductive type conduction layer 214 is formed under the second conductive type conduction layer 216. In the embodiment, the low concentration Ν type conductive layer 214 is not using a photomask, The entire surface of the second substrate is subjected to a second blanket implantation method, and is formed under the second conductive type conduction layer 216; the Ν-type conductive layer 214 is formed to have a thickness of about 〇μm (^m) to 2· The junction depth of 〇 micron (μιη). According to the image sensor and the method of fabricating the same disclosed in the present invention, a high concentration first pass V-type conductive layer is formed under the first conductive type conduction layer. High Concentration 11 200929535 A conductive type conduction layer 212 may be a high concentration N-type conductive layer to achieve an ohmic contact. Referring to FIG. 5, the first substrate 1 and the second substrate 2 are coupled to each other. In the present embodiment, the photodiode 210 is in contact with the metal interconnect 15 turns. According to this embodiment, before the step of bonding the first substrate 100 and the second substrate 2 to each other, the activation of the plasma is performed to increase the energy of the surface to bond them.
依據本發明所揭露之影像感測器及其製造方法，氫離子植入 層係形成於第二基板2〇〇上，且藉由對第二基板2〇〇進行熱處理， 使氫離子植入層轉換為氫氣層。在本實施例中，第二基板2⑻之 下層部係使用-切割裝置，例如刀片，而相當容易地從氫氣層上 移除。如此一來，光電二極體21〇係暴露出。 依據本發明所揭露之影像及魏造方法，進行一侧 製程謂光電—極體分離成每—個單位像素，祕刻的部 分可用-像素間(inter-pixel)電介質填滿。根據本實施例，進行形成 一上層電極以及一彩色濾光片的製程。 「第7圖」為根據本發明所揭露影像感測器—實施例之剖面 不意圖。根據本實施例，「第7圖」之實施例係為「第i圖」至「第 6圖」實施例之整合。不同於「第1圖」至「第6圖」之實施例’ 之一光電二極體According to the image sensor and the method of fabricating the same, the hydrogen ion implantation layer is formed on the second substrate 2, and the hydrogen ion implantation layer is performed by heat-treating the second substrate 2 Converted to a hydrogen layer. In the present embodiment, the lower portion of the second substrate 2 (8) is relatively easily removed from the hydrogen layer using a - cutting device such as a blade. As a result, the photodiode 21 is exposed. According to the image and the manufacturing method disclosed in the present invention, one side of the process is said to be separated into each unit pixel, and the secret portion can be filled with an inter-pixel dielectric. According to this embodiment, a process of forming an upper layer electrode and a color filter is performed. Fig. 7 is a cross-sectional view of an embodiment of an image sensor according to the present invention. According to the present embodiment, the embodiment of "Fig. 7" is an integration of the "i" to "figure" embodiments. A photodiode different from the embodiment of "Fig. 1" to "Fig. 6"
「第7圖」之實施例更具有形成於一非晶層内 220 〇 B ’光電二極體220係包括一 線150。光電二極體220更 5月參考「第7圖」，根據本實施例 本質層223，且其電性連接於金屬内連 12 200929535 包括一第二傳導型傳導層225，係設置於本質層223上。根據本實 施例’影像感測器包括一第一傳導型傳導層Π，係形成於金屬内 連線150與本質層223之間。 依據本發明賴露之影像制肢其製造方法，以下將詳細 描述形成光電二極體220之製造方法。請參考「第7圖」，光電二 極體220係藉由沉殿而形成於第一基板100上，而電路系統120 〇 包括金屬内連線150，係形成於第一基板100之上。在本實施例 中，並不藉由結合程序來進行。 依據本發崎揭露之影像❹m及其製造方法，第—傳導塑 傳導層221係形成於第一基板1〇〇上。根據本實施例，第—傳導 型傳導層221與金屬内連線⑼接觸。根據本實_，進行一後 續製程’係不形成第—傳導型傳導層221。在本實施例巾，第一傳 魯 導型傳導層221係可用來當作一正負二極體 (Pos竭ntrinsic_Negative di〇de ’ 聰 _⑽ 例’第-傳導型傳導層如可以是一 N型傳導層。根據本實施例， 第一傳導型傳導層功也可以是任何型態之傳導層。 第-傳導型傳導層221係形成於N掺雜非晶卿 rphous siIiC〇n)。根據本實施例，製程並未加以限制。根據本實 加例第-傳導型傳導層切係由至少一個非晶石夕氯㈣丑)、非 晶錯化錢㈣Ge:H)、非晶碳切恤配）、非減化石夕氮 ㈣贿)以及非晶化石夕㈣〇:H)而形成。藉由增加至少一個鍺 人(c)氮(N)以及氧(〇)至非晶石夕而形成。根據本實施例， 200929535 第一傳導型傳導層221也可由其他相似的複合物形成。 根據本實施例’第-傳導型傳導層如係藉由—化學氣相冗 積法(CVD)以形成。根據本貫施例，第—傳導型傳導層a〗j系藉由 -電漿化學氣械積法(PECVD_彡成。根據本實_，第 導型傳導層221可藉由電漿化學氣柏沉積法形成於非晶梦中，其 中雜氫’）、五氧化二礙卿5)或其他相似的複合物係與石夕燒 (silane，S1H4)氣體混合。 疋 根據本實施例，本質層223係形成於第_傳導型傳導層功 上。在本實施例中，本質層223係可用來當作一正負二極^取 diode)的I層。根據本實施例，N摻雜非晶矽係形成本質層223。 根據本貫施例，本質層223係藉由一化學氣相沉積法(CVD)以形 成。根據本實施例，本質層223係藉由一電漿化學氣相沉積法 (PECVD)而形成。根據本實施例，本質層223係藉由電漿化學氣 相沉積法使用矽烷氣體而形成。 根據本實施例’第二傳導型傳導層225係形成於本質層223 上’第二傳導型傳導層225與本質層223係形成於原位如_8如）。 在本實施例中’第二傳導型傳導層225係可用來當作一正負二極 體的P層。在本實施例中，第二傳導型傳導層225可以是一 p型 傳導層。根據本實施例，第二傳導型傳導層225也可以是任何型 態之傳導層。 根據本實施例，磷(P)摻雜非晶矽（ph0SphOT0US_d()ped amorphous silicon)係形成第二傳導型傳導層225。根據本實施例， 14 200929535 其他製程係可使用。第二傳導型傳導層225係藉由—化學氣相沉 積法(CVD)而形成。根據本實施例，第二傳導型傳導層奶係藉由 -電椠化學氣相沉積法(PECVD)而形成。根據本實施例，第:傳 導型傳導層2M可藉由電衆化學氣相沉積法形成於非晶秒中，其 中硼(B)或其他相似的元素係可與矽烷(SiH4)氣體混合。 根據本貫施例，上電極240係形成於第二傳導型傳導層 上。上電極24〇係以具有高光透射及高傳導性之一透明電極材料 形成。根據本實施例，上電極240係由氧化錫銦(indium如〇χί^， ITO)、氧化錫槲cadmium tin oxide，CTO)或者其他相似的複合物 所形成。 ° 依據本發明所揭露之影像感測器及其製造方法係提供電路系 統與光電二極_垂直整合。根據本實施例，暗電絲可減至最 小，以及藉由結合具有電晶體半導體與光電二極體的矽基板，以 防止飽和度與感光度降低。 根據本實施例’電路系統與光電二極體的垂直整合可使填充 係數接近百分之百。相較於習知技術使用相等像素尺寸大小，根 據本發明之電路系統與光電二極體的垂直整合係可提供更高的威 光度。 ^ " 雖然，根據本發明所揭露之影像感測器及其製造方法係以互 補式金屬氧化物半導體(CM〇s)影像感測器為例。然而，本實施例 亚不以互補式金屬氧化物半導體影像感測器(CIS)為限制。根據本 貫施例’其可應用於任何有光電二極體的影像感測器上。 15 200929535 、1 乾隹嘴'施例揭露如上，恭实生非两以限 々表發η钟紹彳陳贿者，料峰树岭料和範凰 =====：r_圍須視 【圖式簡單說明】 '' 第】圖至第7 造方法之示意圖。 圖為根據本剌—實施綱f彡像❹彳器及其製The embodiment of Fig. 7 is further formed in an amorphous layer. 220 〇 B ’ Photodiode 220 includes a line 150. The photodiode 220 is further referred to as "figure 7" in May. According to the embodiment, the intrinsic layer 223 is electrically connected to the metal interconnect 12 200929535, and includes a second conductive type conductive layer 225 disposed on the intrinsic layer 223. on. According to this embodiment, the image sensor includes a first conductive type conductive layer 形成 formed between the metal interconnect 150 and the intrinsic layer 223. According to the method of manufacturing the image limb of Lai Lu of the present invention, a method of manufacturing the photodiode 220 will be described in detail below. Referring to FIG. 7, the photodiode 220 is formed on the first substrate 100 by the sink, and the circuit system 120 includes a metal interconnect 150 formed on the first substrate 100. In this embodiment, it is not performed by a combination of programs. According to the image disclosed by the present invention, the first conductive plastic conductive layer 221 is formed on the first substrate 1A. According to this embodiment, the first conductive type conduction layer 221 is in contact with the metal interconnection (9). According to the present invention, a subsequent process is performed, and the first conductive conduction layer 221 is not formed. In the towel of the present embodiment, the first pass-through conductive layer 221 can be used as a positive and negative diode (Pos exhaust ntrinsic_Negative di〇de ' Cong_(10) case 'the first conductive conduction layer can be an N type Conductive layer. According to this embodiment, the first conductive type conduction layer work may also be any type of conductive layer. The first conductive conductive layer 221 is formed on the N-doped amorphous rphous siIiC〇n). According to this embodiment, the process is not limited. According to the present embodiment, the first-conducting type conduction layer is made up of at least one amorphous stone (four) ugly, amorphous mis-formed money (four) Ge: H), amorphous carbon cuts, and non-reduced Shishi nitrogen (four) bribes. And amorphous fossil eve (four) 〇: H). It is formed by adding at least one of the human (c) nitrogen (N) and oxygen (〇) to the amorphous stone. According to the present embodiment, the 200929535 first conductive type conduction layer 221 can also be formed of other similar composites. According to this embodiment, the first conductive type conduction layer is formed by chemical vapor phase depletion (CVD). According to the present embodiment, the first conductive conduction layer a is formed by a plasma chemical mechanical method (PECVD). According to the present invention, the conductive layer 221 can be made of a plasma chemical gas. The cypress deposition method is formed in an amorphous dream in which hydrogen ('hydrogen'), pentoxide bismuth 5) or other similar complex is mixed with silane (S1H4) gas. According to the present embodiment, the intrinsic layer 223 is formed on the first conductive type conduction layer. In the present embodiment, the intrinsic layer 223 can be used as an I layer of a positive and negative dipole. According to the present embodiment, the N-doped amorphous lanthanum forms the intrinsic layer 223. According to the present embodiment, the intrinsic layer 223 is formed by a chemical vapor deposition (CVD) process. According to this embodiment, the intrinsic layer 223 is formed by a plasma chemical vapor deposition (PECVD) process. According to this embodiment, the intrinsic layer 223 is formed by a plasma chemical vapor deposition method using decane gas. According to the present embodiment, the second conductive type conduction layer 225 is formed on the intrinsic layer 223. The second conductive type conduction layer 225 and the intrinsic layer 223 are formed in the same position as in the case of _8. In the present embodiment, the second conductive type conduction layer 225 can be used as a P layer of a positive and negative diode. In the present embodiment, the second conductive type conduction layer 225 may be a p-type conductive layer. According to this embodiment, the second conductive type conduction layer 225 may also be a conductive layer of any type. According to the present embodiment, the phosphorus (P) doped amorphous germanium (ph0SphOT0US_d() ped amorphous silicon) forms the second conductive type conduction layer 225. According to this embodiment, 14 200929535 other processes can be used. The second conductive type conduction layer 225 is formed by chemical vapor deposition (CVD). According to this embodiment, the second conductive type conduction layer milk system is formed by electro-chemical vapor deposition (PECVD). According to the present embodiment, the first conductive type conduction layer 2M can be formed in amorphous seconds by electric chemical vapor deposition, in which boron (B) or other similar elements can be mixed with silane (SiH4) gas. According to the present embodiment, the upper electrode 240 is formed on the second conductive type conduction layer. The upper electrode 24 is formed of a transparent electrode material having high light transmission and high conductivity. According to this embodiment, the upper electrode 240 is formed of indium tin oxide (indium such as ITO), cadmium tin oxide (CTO), or other similar composite. An image sensor and method of fabricating the same according to the present invention provides a circuit system that is vertically integrated with a photodiode. According to this embodiment, the dark wire can be minimized, and the saturation and sensitivity are prevented from being lowered by combining the germanium substrate having the transistor semiconductor and the photodiode. According to the present embodiment, the vertical integration of the circuit system with the photodiode allows the fill factor to be close to one hundred percent. The vertical integration of the circuit system and the photodiode according to the present invention provides a higher degree of power than the use of equal pixel sizes in the prior art. ^ " Although the image sensor and the method of fabricating the same according to the present invention are exemplified by a complementary metal oxide semiconductor (CM?s) image sensor. However, this embodiment is not limited by a complementary metal oxide semiconductor image sensor (CIS). According to the present embodiment, it can be applied to any image sensor having a photodiode. 15 200929535 , 1 dry mouth 'examples to expose the above, respectful to the two to limit the number of 々 钟 彳 彳 彳 彳 彳 彳 η η η η η η η η η η η η η η η η , η η η , 料 料 料 料 料 料 料 料 料 料 料 料 料 料 料 料Explanation] The schematic diagram of the ''th) to the seventh method. The picture shows the system according to the basics-implementation
【主要元件符號說明】 100第一基板 110 裝置絕緣層 120 電路系統 121 轉移電晶體 123 重設電晶體 125 驅動電晶體 127 選擇電晶體 130 離子植入區 131 浮動擴散區 ' 135、137源極/汲極區 140 電接面區 第二傳導型井 143 第一傳導型離子植入層 145 第二傳導型離子植入層 16 200929535[Main component symbol description] 100 first substrate 110 device insulating layer 120 circuit system 121 transfer transistor 123 reset transistor 125 drive transistor 127 select transistor 130 ion implantation region 131 floating diffusion region '135, 137 source/ Bungee region 140 electrical junction region second conductivity type well 143 first conductivity type ion implantation layer 145 second conductivity type ion implantation layer 16 200929535
147 高濃度第一傳導型區 150 金屬内連線 151 第一金屬 151a 第一金屬接點 152 第二金屬 153 第三金屬 154a 第四金屬接點 160 層間介電質 200 第二基板 207a 氫離子植入層 210 光電二極體 210a 結晶半導體層 212 高濃度第一傳導型傳導層 214 第一傳導型傳導層 216 第二傳導型傳導層 220 光電二極體 221 第一傳導型傳導層 223 本質層 225 第二傳導型傳導層 240 上電極 17147 high concentration first conductivity type region 150 metal interconnection line 151 first metal 151a first metal contact 152 second metal 153 third metal 154a fourth metal contact 160 interlayer dielectric 200 second substrate 207a hydrogen ion implantation Incoming layer 210 photodiode 210a crystalline semiconductor layer 212 high concentration first conduction type conduction layer 214 first conduction type conduction layer 216 second conduction type conduction layer 220 photodiode 221 first conduction type conduction layer 223 essence layer 225 Second conductive type conduction layer 240 upper electrode 17