TW201312794A - Semiconductor light emitting device - Google Patents

Abstract

A semiconductor light emitting device has a semiconductor laminate including first and second conductivity type semiconductor layers respectively providing first and second main surfaces and an active layer. The semiconductor laminate is divided into first and second regions. At least one contact hole is formed to pass through the active layer from the second main surface of the first region. A first electrode is formed on the second main surface to be connected to the first conductivity type semiconductor layer of the first region and the second conductivity type semiconductor layer of the second region. A second electrode is formed on the second main surface of the first region to be connected to the second conductivity type semiconductor layer of the first region and the first conductivity type semiconductor layer of the second region.

Description

Semiconductor light emitting device

The present invention relates to a semiconductor light-emitting device, and more particularly to a semiconductor light-emitting device having a protective diode for preventing electrostatic discharge, such as.

A practical semiconductor light-emitting device has a high output and excellent light efficiency, and is a light source with high reliability. Therefore, research has been conducted on replacing a backlight and a display device with a semiconductor light-emitting device having high output and high light efficiency.

Generally, a semiconductor light-emitting device includes an active layer in which a semiconductor p-n junction electron and a hole are combined to emit light. Semiconductor light-emitting devices can be classified according to electrode position or current path. Although not particularly limited, the classification method may depend on whether or not the main substrate for the semiconductor light-emitting device is electrically conductive.

For example, when the substrate is electrically isolated, it is necessary to form an n-type electrode on the n-type semiconductor by mesa etching. That is, a portion of the p-type semiconductor layer and the active layer are partially removed to expose a portion of the n-type semiconductor region, and the p-type electrode and the n-type electrode are respectively formed on the top surface of the p-type semiconductor layer and the n-type semiconductor layer. On the top surface.

In the above electrode structure, the mesa etching may reduce the light-emitting area and form it in a direction perpendicular to the current, so that it is difficult to increase the uniformity of the current distribution in the entire area, resulting in a decrease in luminous efficiency.

At the same time, a conductive substrate is used as the side electrode. In the semiconductor light-emitting structure, compared with the foregoing structure, there is less light loss, and the current is relatively uniform and stable, so that the luminous efficiency can be improved.

However, in the case where the light-emitting device is constructed to have a large area to achieve a high output, the current of the entire light-emitting area is uniformly distributed by providing an electrode structure such as an electrode. However, if such a conductive substrate is used, the luminous efficiency is degraded because of the limitation of light extraction by the electrodes of the light-emitting or light-absorbing surface.

In addition, the semiconductor light emitting device may be exposed to an instantaneous high voltage such as electrostatic discharge (ESD) during operation, so that the function of the device may be damaged.

Therefore a design that needs to avoid damage. The method of adding a protective diode is mainstream, and thus, the separated diode should be packaged in a single package space, which causes an obstacle to product miniaturization.

The invention provides a semiconductor light emitting device with a diode structure package with electrostatic discharge protection.

A light emitting diode according to the present invention, comprising: a semiconductor laminate comprising opposite first and second major surfaces, and first and second conductive types (conductivity) respectively including the first and second major surfaces a semiconductor layer, wherein an active layer is formed between the two major surfaces and is divided into first and second regions by the isolation trench; at least one contact hole is formed to traverse the active layer from the second major surface of the first region, a first conductive semiconductor layer connected to the first conductive semiconductor layer And connecting to the second conductive semiconductor layer of the second region through at least one contact hole; the second electrode is formed on the second main surface of the first region and connected to the second conductive region of the first region And a second conductive semiconductor layer connected to the second region through the at least one contact hole; and an electrode connection unit connecting the second electrode to the first conductive semiconductor layer of the second region.

The semiconductor light emitting device further includes a support substrate electrically connected to the first main surface of the semiconductor stack. As such, the support substrate can be formed by a plating process. In addition, the semiconductor light emitting device further includes a solder pad formed on the first conductive semiconductor of the first region.

The semiconductor light emitting device further includes a support substrate on the first main surface of the semiconductor stack, and first and second electrode lead units respectively connected to the first and second electrodes and extending to the outside.

The second electrode has a region exposed in the isolation trench, and the electrode connection unit is formed along a side of the second region of the semiconductor stack to be connected to the exposed region of the second electrode.

The semiconductor light emitting device further includes a passivation layer formed on a side of the second region of the semiconductor stack to electrically isolate the electrode connection unit from the second region of the semiconductor stack.

The semiconductor light emitting device further comprises an insulating isolation layer formed on the second main surface of the semiconductor stack to isolate the first electrode and the second electrode.

The insulating isolation layer extends between an inner wall of the contact hole and a portion of the first electrode filled in the contact hole.

The first electrode comprises a highly reflective ohmic contact layer. The highly reflective ohmic contact layer comprises a material selected from the group consisting of silver, nickel, aluminum, ruthenium, palladium, rhodium, iridium, magnesium, zinc, platinum, gold, and mixtures thereof.

The area of the first region of the semiconductor stack as the light-emitting region is greater than the area of the second region of the semiconductor stack. Here, the area of the second region of the semiconductor stack is equal to or less than twenty percent of the total area of the semiconductor stack. At least one set of contact holes is included.

A semiconductor light emitting device according to the present invention includes: a semiconductor stack including opposite first and second main surfaces, wherein the first and second conductive semiconductor layers respectively include first and second main surfaces, and the active layer is formed on In the meantime, the first and second regions are defined by the isolation trench; at least one first contact hole is formed to pass through the active layer from the second main surface of the first region, thereby connecting a region of the first conductive semiconductor layer And at least one second contact hole is formed to pass through the active layer from the second main surface of the second region, thereby connecting one region of the first conductive semiconductor layer; the first electrode is formed on the semiconductor laminate And connecting, on the two main surfaces, the first conductive semiconductor layer of the first region, the second conductive semiconductor layer of the second region, and the second electrode through the at least one first contact hole to the semiconductor stack The second main surface of the layer is connected to the first conductive semiconductor layer of the second region and the second conductive semiconductor layer of the first region through at least one second contact hole.

The semiconductor light emitting device further includes a supporting substrate electrically connected to the first main surface of the semiconductor stack to the second electrode. In this case, the support substrate is formed by a plating process. In addition, the semiconductor light emitting device further includes a bonding pad formed on the first conductive semiconductor layer of the first region, and an electrode connecting unit electrically connecting the first electrode to the bonding pad.

The first electrode has a region exposed to the isolation trench, and the electrode connection unit is formed along a side of the second region of the semiconductor stack to be connected to the exposed region of the second electrode.

In this case, the semiconductor light emitting device further includes a passivation layer to electrically isolate the electrode connection unit from the second region of the semiconductor stack.

The semiconductor light emitting device further includes an insulating isolation layer formed on the second main surface of the semiconductor stack to isolate the first electrode and the second electrode. In this case, the insulating isolation layer extends between the first contact holes, the inner walls of the second contact holes, and the portions of the first electrodes that fill the first and second contact holes.

The embodiments of the present invention will be described in conjunction with the drawings, and can be easily understood by those having ordinary knowledge in the technical field of the present invention. However, the well-known functions and structures of the embodiments of the present invention will be omitted to avoid redundancy.

In addition, in the drawings, like reference numerals refer to the

Unless expressly stated otherwise, the words "including" and "comprises" and "comprises" and "comprising", "comprising", "comprising", "comprising", "include"

Hereinafter, embodiments of the present invention will be described in conjunction with a chart.

Fig. 1 is a plan view showing a semiconductor light emitting device according to a first embodiment of the present invention. Fig. 2 is a cross-sectional view of the semiconductor light emitting device taken along line I-I of Fig. 1.

Referring to FIGS. 1 and 2, a semiconductor light emitting device 10 according to a first embodiment of the present invention includes a semiconductor laminate 15 having first and second conductive semiconductor layers 15a and 15c, and an active layer 15b. Sandwiched in between. The first and second conductive semiconductor layers 15a, 15c of the semiconductor stack 15 may have opposite first and second major surfaces, respectively.

The semiconductor stack 15 can be a Group III-VI compound comprising a nitride semiconductor. In the present embodiment, in the formation of the first conductive semiconductor layer 15a, the active layer 15b, and the second conductive semiconductor layer 15c, after the individual substrates are formed, the semiconductor laminate 15 has the first main body formed on the semiconductor laminate 15. The surface structure of the surface and the support substrate 11.

Here, the support substrate 11 used in the present embodiment may be a conductive substrate formed by a plating process. Therefore, the growth substrate can be removed from the semiconductor laminate 15 to obtain the device structure in FIG. In general, the first and second conductive semiconductor layers 15a, 15c may each be an n-type semiconductor layer and a p-type semiconductor layer.

The semiconductor stack 15 can be divided into a first region A and a second region B by the isolation trench g. The first region A can serve as a light emitting diode unit driven by a light emitting diode, and the second region B can be an electrostatic discharge (ESD) protective diode unit. In the present embodiment, the second area B serves as a wiring area for connecting an external circuit.

The semiconductor laminate 15 is divided into two regions A and B, each of which is a light-emitting diode unit and an electrostatic discharge protection unit, and is connected by the following circuit.

According to an embodiment of the present invention, the second electrode 14 is formed on the second main surface of the semiconductor laminate 15 and is connected to the second conductive semiconductor layer 15c of the first region A.

The second electrode 14 can be a highly reflective ohmic contact layer that reflects the light generated by the active layer 15b. For example, the highly reflective ohmic contact layer may be formed by mixing one or more of the following elements: silver, nickel, ruthenium, palladium, rhodium, iridium, magnesium, zinc, platinum, gold.

The second main surface of the semiconductor laminate 15 has a first conductive semiconductor layer 15a on which the first electrode 15 is formed and connected to the first region A. As described in this embodiment, the connection between the first electrode 12 and the first semiconductor layer 15a of the first region A can be performed by the contact hole H.

As shown in FIG. 2, at the first region A of the semiconductor laminate 15, at least one contact hole H is formed, extends from the second main surface of the semiconductor laminate 15, passes through the second conductive semiconductor layer 15c and the active layer 15b, Until a portion of the first conductive semiconductor layer 15a is exposed. The first conductive semiconductor layer 15a may be exposed to the contact hole H.

The first electrode 12, i.e., an electrode unit 12', is connected to the exposed region of the first conductive semiconductor layer 15a through the contact hole H. Therefore, the first electrode 12 is electrically connected to the first conductive semiconductor layer 15a to be placed on the second main surface of the semiconductor laminate 15.

The contact hole H may be formed after the semiconductor laminate 15 is formed on the growth substrate, but the wiring structure is formed on the growth substrate before. According to the present embodiment of the invention, the contact hole H has the form of a through hole, but may have various shapes to expose a portion of the first conductive type semiconductor layer 15a.

In the present embodiment, as shown in Fig. 1, a plurality of contact holes can be formed in the first region A, thereby obtaining a uniform current distribution, a practical large-area and high-output semiconductor light-emitting device.

An insulating spacer 13 is formed to electrically isolate the first electrode 12 and the second electrode 14 on the second major surface of the semiconductor stack 15. The insulating spacer 13 is formed to extend between the inner wall of the contact hole H and one of the electrode units 12' of the first electrode 12.

The first electrode 12 is electrically connected to the first conductive semiconductor layer 15a of the first region A and the second conductive semiconductor layer 15c of the second region B. At the same time, the second electrode 14 of the second conductive semiconductor layer 15c connected to the first region A is electrically connected to the first conductive semiconductor layer 15c of the second region B.

As shown in FIG. 2, the second electrode 14 has a exposed region T extending and exposed outside the semiconductor laminate 15. In this embodiment, the exposed area T may be located in the isolation trench g to connect the isolation trench g and the electrode pad 18 located in the second region B.

The second electrode 14 is connected to the electrode pad 18 through an electrode connection unit 17. The electrode connection unit 17 can be formed along the semiconductor stack 15 of the second region B while being electrically isolated from the passivation layer 16.

The electrode connection can be understood by the equivalent circuit in Figure 5. The first region A serves as a light emitting diode unit, and the second region B serves as an electrostatic discharge (ESD) protective diode.

Electrostatic discharge (ESD) protects the diode from reverse bias when the LED is in normal operation and does not conduct electricity; when the high voltage is turned on at the moment when the breakdown voltage is exceeded, a large current flows into the electrostatic discharge (ESD) to protect the diode. The light-emitting diode unit is protected.

The support substrate 11 is located on the second main surface of the semiconductor laminate 15 to form a wiring structure of the first and second electrodes 12, 14 and the insulating spacer 13 interposed therebetween.

The support substrate 11 in this embodiment has a conductive substrate. As shown in FIG. 2, the insulating isolation layer 13 electrically isolates the support substrate 11 from the second electrode 14 and is connectable to the first electrode 12 to form an electrode structure of the first conductive semiconductor layer 15a and the first electrode 12. . That is, the conductive support substrate 11 can be placed in an external circuit on the mounting surface of the semiconductor light emitting device 10.

As described above, the electrode pad 18 connecting the second electrode 14 is formed on the first conductive semiconductor layer 15a of the second region B. The wire bonding region of the semiconductor light emitting device 10 can serve as the upper surface of the second region B, that is, the first major surface relative to the second major surface.

Thus, the second electrode 14 at the bottom of the isolation trench g can extend through the electrode layer 18 to the electrode pad 18 of the semiconductor stack 15 located in the second region B. Therefore, the wire bonding unit 19 can be formed in approximately the light emitting device 10. The height of the upper surface.

Different from the embodiment, if the wire bonding area is placed at the bottom of the isolation trench g, unnecessary contact with the side surface of the light emitting region may occur during the wire bonding process; or the second electrode 14 and/or the insulating layer (passivation layer) ), it will be damaged by the thermal energy or mechanical shock caused by the wire processing, resulting in a defect in the connection. According to the wire bonding structure of the present embodiment, the occurrence of defects can be prevented.

Since the first region A of the semiconductor laminate 15 can serve as a light-emitting region, the area larger than the second region B as the protection diode unit and the wiring region is reserved. The second region B of the semiconductor stack 15 has an area equal to or less than 20% of the total area of the semiconductor stack 15.

The light-emitting device 10 may further include a passivation layer 16 formed of an insulating material, as shown in FIG. 2, formed on at least a side surface of the semiconductor laminate 15.

Fig. 3 is a cross-sectional view of the 6-conductor light-emitting device taken along line II-II' of Fig. 1. Fig. 4 is a cross-sectional view showing the semiconductor light-emitting device taken along line III-III' of Fig. 1.

Referring to Fig. 3, the light-emitting device 10 is stacked, and the first electrode 12, the insulating spacer 13, the second electrode 14, and the semiconductor laminate 15 are sequentially formed on the conductive substrate 11 having conductivity.

Meanwhile, referring to FIG. 4, the light-emitting device 10 is stacked, and the first electrode 12, the insulating spacer 13, the second electrode 14, the semiconductor laminate 15, and the like are sequentially formed on the support substrate 11 having conductivity as shown in FIG. In addition to the area formed by a hole.

However, according to the light-emitting device 10 of the embodiment of the present invention, the current distribution characteristic can be increased by forming a plurality of equally spaced contact holes H, and the structure in which the first electrode 12 can directly contact the first conductive semiconductor layer 15a is formed. .

According to the light-emitting device of the present embodiment, the first and second electrodes 12, 14 are each directly connected to the first and second conductive semiconductor layers 15a, 15c on the surface. That is, the first external contact structure, the first contact structure, and the first conductive semiconductor layer 15a connected to the first region A of the light-emitting device 10 can be formed through the support substrate 11 in the direction of the second main surface. The second contact structure, the second conductive semiconductor layer 15c connected to the first region A of the light emitting device 10, may be formed in a first main surface direction with respect to the second main surface.

In a final external circuit connection of the second embodiment of the present invention, the first contact structure, the first conductive semiconductor layer 15a connected to the first region A of the light emitting device 10, may be formed in the first main surface direction. And a second contact structure, the second conductive semiconductor layer 15c connected to the first region A of the light emitting device 10, may be formed on the second main surface of the support substrate 11.

Figure 6 is a plan view of a semiconductor light emitting device in accordance with a second embodiment of the present invention. Fig. 7 is a cross-sectional view showing the semiconductor light-emitting device taken along line I-I' of Fig. 6.

Referring to FIGS. 6 and 7, a semiconductor light emitting device 60 according to a second embodiment of the present invention includes a semiconductor laminate 65 having first and second conductive semiconductor layers 65a and 65c and an active layer. 65b is sandwiched between them. The first and second conductive semiconductor layers 65a, 65c of the semiconductor stack 65 may have opposing first and second major surfaces, respectively.

The support substrate 61 used in this embodiment may be a conductive substrate formed by a plating process. In general, the first and second conductive semiconductor layers 65a, 65c may each be an n-type semiconductor layer and a p-type semiconductor layer.

Similar to the first embodiment described above, the semiconductor stack 65 can be divided into a first region A and a second region B by the isolation trenches g. The first region A can serve as a light emitting diode unit driven by a light emitting diode, and the second region B can be an electrostatic discharge (ESD) protective diode unit. In the present embodiment, the second area B serves as a wiring area for connecting an external circuit.

The semiconductor laminate 65 is divided into two regions A and B as a connection between the light-emitting unit and the electrostatic discharge (ESD) protection diode unit, and this connection is different from the equivalent circuit shown in FIG. 5 in the above embodiment.

As shown in FIG. 7, the semiconductor light-emitting device 60 may include first and second contact holes H1 and H2, which are formed on the first region A and the second region B, respectively. The first and second contact holes H1, H2 are each formed to be connected to one region of the first conductive semiconductor layer 65a through the active layer 65b from the second main surface. Each of the first and second contact holes H1 and H2 may be plural. For example, as in the present embodiment, the first contact hole H1 is plurally formed in the first region A, a total of 12, so as to achieve a uniform current distribution in a relatively wide light-emitting area, and only a second contact hole H2 is formed in consideration of a relatively small area.

The first electrode 62 may be formed on the second main surface of the semiconductor stack 65, the first conductive semiconductor layer 65a of the first region A, and the second conductive semiconductor layer 65c of the second region B. As shown in FIG. 7, the first electrode 62 is connected to the first conductive semiconductor layer 65a of the first region A through the contact hole H. That is, the electrode unit 62' extends from the first electrode 62 and is coupled to the exposed region of the first conductive semiconductor layer 65a through the contact hole H, thereby realizing the first conductive type semiconductor layer 65a of the first electrode 62 and the first region A. Link.

The second electrode 64 may be formed on the second main surface of the semiconductor stack 65, connected to the first conductive semiconductor layer 65a of the first region A and the second conductive semiconductor layer 65c of the first region A. As shown in Fig. 7, the connection of the second electrode 64 to the first conductive semiconductor layer 65a of the second region B is realized by the contact hole H. That is, the electrode unit 64' extends from the second electrode 64 and is transmitted through the contact hole H to be coupled to the exposed region of the first conductive semiconductor layer 65a, thereby realizing the first conductive semiconductor layer 65a of the second electrode 64 and the second region B. Link.

An insulating spacer 63 may be formed to electrically isolate the first electrode 62 and the second electrode 64 on the second major surface of the semiconductor stack 65. The insulating spacer 63 may form an electrode unit 62' extending from the inner walls of the first and second contact holes H1, H2 and the first electrode 62.

As shown in FIG. 7, the first electrode 62 has a exposed region T extending and exposed on the outer side of the semiconductor laminate 65. In the present embodiment, the exposed area T can be placed in the isolation trench g.

In the present embodiment, the electrode pad 69 is formed on the second region B, similar to the form in FIG. 2, but unlike the second embodiment, the electrode pad 69 and the first conductivity type can be prevented by a passivation layer 66. The semiconductor layer 65a is connected.

The exposed area of the first electrode 62 and the electrode pad 68 are connectable through an electrode connection unit 67. The electrode connection unit 67 can be formed along the side of the semiconductor stack 65 of the second region B and electrically isolated by the passivation layer 66.

Thus, the light-emitting diode region A and the protective diode region B can be realized by the above-described electrode connection, such as the equivalent circuit in FIG.

The support substrate 61 can be placed on the second main surface of the semiconductor laminate 65 and has a wiring structure formed by sandwiching the insulating isolation layer 63 by the first and second electrodes 62, 64.

The support substrate 61 of this embodiment is a substrate having conductivity. As shown in FIG. 7, the support substrate 61 is electrically isolated from the first electrode 62 through the insulating spacer 63, and is connected to the second electrode 64, so that the electrodes of the second conductive semiconductor layer 65c and the second electrode 64 are formed. structure.

That is, the conductive support substrate 61 can be placed in an external circuit and placed on and connected to the mounting surface of the semiconductor light emitting device 60.

As described above, the electrode pad 68 is connected to the second electrode 64 and formed on the first conductive type semiconductor layer 65a of the second region B. The first conductive semiconductor layer 65a is insulated from the electrode pad 68 by a passivation layer 66.

Therefore, the wire bonding region of the light-emitting device 60 can serve as the upper surface of the second region B, that is, the first major surface relative to the second major surface. In addition, as described above, the first electrode 62 located at the bottom of the isolation trench g can be connected to the second region B located in the semiconductor stack 65 by the electrode connection layer 68, and the wire bonding unit 69 can be formed in approximately the light-emitting device 60. The height of the upper surface.

Fig. 8 is a cross-sectional view of the semiconductor light-emitting device 60 taken along line II-II' of Fig. 6. Fig. 9 is a cross-sectional view of the semiconductor light-emitting device 60 taken along line III-III' of Fig. 6.

Referring to Fig. 8, a light-emitting device 60 having a stacked state in which a conductive second electrode 64 and a semiconductor laminate 65 are sequentially stacked on a support substrate 61. The first electrode 62 as shown in FIG. 8 may be a portion having a coupling of the first contact hole H1, and the insulating isolation layer 63 surrounds the outside thereof to be electrically isolated from the second electrode 64.

Referring to Fig. 9, a light-emitting device 60 having a stacked state in which the first electrode 62, the second electrode 64, and the semiconductor laminate 65 are sequentially formed on the support substrate 61 except for the region where the holes are formed. The first electrode 62 may have a portion 62' extending to be connected to the first conductive semiconductor layer 65a through the first contact hole H1. As described in FIG. 8, the first electrode 62 is insulated from the support substrate 61 by the insulating spacer 63.

As such, according to the present embodiment, the first contact structure is formed to be connected to the external circuit, and is connectable to the first conductive semiconductor layer 65a of the light emitting diode region A along the first main surface, that is, the upper surface direction of the device. A second contact structure, the second conductive semiconductor layer 65c connected to the light emitting diode region A, is formed by supporting only the substrate 61 on the second main surface.

Figure 10 is a cross-sectional view showing a semiconductor light emitting device according to another embodiment of the present invention.

Referring to FIG. 10, a semiconductor light emitting device 100 according to the present embodiment may include a semiconductor laminate 105 having first and second conductive semiconductor layers 105a, 105c and an active layer 105b interposed between the two semiconductor layers 105a, 105c. . The semiconductor stack 105 may have opposing first and second conductive semiconductor layers 105a, 105c.

The semiconductor stack 105 can be isolated from the trench g and divided into a first region A and a second region B. The first region A serves as a light-emitting diode unit that is driven together with a light-emitting diode (LED), and the first region A serves as a protective diode unit for electrostatic discharge (ESD). In this embodiment, the second zone B can serve as a wire bonding zone to provide a wire connection to an external circuit.

In the present embodiment, the second electrode 104 may be formed on the second main surface of the semiconductor stack 105 to connect the second conductive semiconductor layer 105c of the first region A. The first electrode 102 is connected to the first conductive semiconductor layer 105a of the first region A on the second main surface of the semiconductor stack 105. As in the present embodiment, the first electrode 102 may be connected to the first conductive semiconductor layer 105a of the first region A by the contact hole H.

As shown in FIG. 10, at the first region A of the semiconductor stack 105, at least one contact hole H is formed and extends from the second main surface while passing through the second conductive semiconductor layer 105c and the active layer 105b until the exposed portion The first conductive semiconductor layer 105a. The first conductive semiconductor layer 105a is exposed through the contact hole H.

The exposed region of the first electrode 102 and the first conductive semiconductor layer 105a is coupled via a contact hole H through one of the electrode units 102' extending from the first electrode 102. Therefore, the first electrode 102 disposed on the second main surface can be realized by electrical connection with the first conductive semiconductor layer 105a.

The insulating isolation layer 103 may be formed on the second main surface of the semiconductor stack 105 to simply electrically isolate the first electrode 102 from the second electrode 104. The insulating spacer 103 may be formed and extended between the inner wall of the contact hole H and the electrode unit 102' of the first electrode 102.

As such, the first electrode 102 can be electrically connected to the first conductive semiconductor layer 105a of the first region A and the second conductive semiconductor layer 105c of the second region B. At the same time, the second electrode 104 is connected to the second conductive semiconductor layer 105c of the first region A, and may also be connected to the first conductive semiconductor layer 105a of the second region B.

Additionally, the second electrode 104 can have an extended exposed area T to be exposed outside of the semiconductor stack 105. The exposed region T can be placed in the isolation trench g according to the embodiment to electrically connect the second electrode 104 and the first conductive semiconductor layer 105a of the second region B.

As shown in FIG. 10, the second electrode 104 is connected to the electrode pad 108 through the electrode connection unit 107. The electrode connection unit 107 is formed along the side of the semiconductor laminate 105 of the second region B and is electrically insulated by the passivation layer 106.

The support substrate 101 is disposed on the second main surface of the semiconductor stack 105 such that a wiring structure is formed between the first and second electrodes 102, 104 and the insulating spacer 103.

The support substrate 101 used in this embodiment may include first and second electrode lead units 112, 114 which are respectively connected to the first and second electrodes 102, 104 and extend to the outside. The contact structure is coupled to the first and second conductive semiconductor layers 105a and 105c of the light-emitting diode region A extending outside the support substrate 101, respectively.

As described above, the electrode external connection can be formed by the support substrate form having the first and second electrode lead units instead of the electrode pad structure as shown in FIGS. 6 and 7.

As described above, according to an embodiment of the present invention, an electrostatic discharge (ESD) protection diode implementation method can be integrated with a light emitting diode (LED) into a new semiconductor light emitting device. The light-emitting diode can be integrated not only with the electrostatic discharge (ESD) protection diode, but also without forming an electrode on the surface of the semiconductor layer, but the contact hole can be formed on the opposite surface, so that the improvement scheme can greatly increase the luminous efficiency and greatly increase the light-emitting area. In addition, the plurality of contact holes can be distributed in a suitable location or even a large area, thereby increasing the current distribution to a relatively high efficiency.

In one embodiment, an electrostatic discharge (ESD) protects the diode as a wire bonding region, thereby reducing defects such as damage caused by surges during wire bonding.

The present invention has been described in the above embodiments, and modifications and changes can be made without departing from the spirit and scope of the invention as defined by the appended claims.

10. . . Semiconductor light emitting device

11. . . Support substrate

12. . . First electrode

12’. . . Electrode unit

13. . . Insulation barrier

14. . . Second electrode

15. . . Semiconductor stack

15a. . . First conductive semiconductor layer

15b. . . Active layer

15c. . . Second conductive semiconductor layer

16. . . Passivation layer

17. . . Electrode connection

18. . . Electrode pad

19. . . Wire unit

60. . . Semiconductor light emitting device

61. . . Support substrate

62. . . First electrode

62’. . . Electrode unit

63. . . Insulation barrier

64. . . Second electrode

64’. . . Electrode unit

65. . . Semiconductor stack

65a. . . First conductive semiconductor layer

65b. . . Active layer

65c. . . Second conductive semiconductor layer

66. . . Passivation layer

67. . . Electrode connection unit

68. . . Electrode pad

69. . . Electrode pad

100. . . Semiconductor light emitting device

101. . . Support substrate

102. . . First electrode

102’. . . Electrode unit

103. . . Insulation barrier

104. . . Second electrode

105. . . Semiconductor stack

105a. . . First conductive semiconductor layer

105b. . . Active layer

105c. . . Second conductive semiconductor layer

106. . . Passivation layer

107. . . Electrode connection unit

112. . . First electrode lead unit

114. . . Second electrode lead unit

A. . . First district

B. . . Second district

g. . . Isolation ditch

H. . . Contact hole

H1. . . First contact hole

H2. . . Second contact hole

T. . . Exposure area

I-I’. . . Cut line

II-II’. . . Cut line

III-III’. . . Cut line

1 is a plan view of a semiconductor light emitting device according to a first embodiment of the present invention;

Figure 2 is a cross-sectional view of the semiconductor light-emitting device taken along line I-I' of Figure 1;

Figure 3 is a cross-sectional view of the semiconductor light-emitting device taken along line II-II' of Figure 1;

Figure 4 is a cross-sectional view of the semiconductor light-emitting device taken along line III-III' of Figure 1;

Figure 5 is an equivalent circuit diagram illustrating the semiconductor light-emitting device of Figure 1;

Figure 6 is a plan view showing a semiconductor light emitting device according to a second embodiment of the present invention;

Figure 7 is a cross-sectional view of the semiconductor light-emitting device taken along line I-I' of Figure 6;

Figure 8 is a cross-sectional view of the semiconductor light-emitting device taken along line II-II' of Figure 6;

Figure 9 is a cross-sectional view of the semiconductor light-emitting device taken along line III-III' of Figure 6;

Figure 10 is a cross-sectional view showing a semiconductor light emitting device according to another embodiment of the present invention.

15. . . Semiconductor stack

15a. . . First conductive semiconductor layer

16. . . Passivation layer

17. . . Electrode connection

18. . . Electrode pad

19. . . Wire unit

A. . . First district

B. . . Second district

H. . . Contact hole

T. . . Exposure area

I-I’. . . Cut line

II-II’. . . Cut line

III-III’. . . Cut line

Claims (27)

A semiconductor light emitting device comprising: a semiconductor stack comprising first and second conductive semiconductor layers opposite to the first and second major surfaces, respectively providing the first and second major surfaces, and formed on the first And an active layer between the second major surfaces and separated by the isolation trench into the first and second regions; at least one contact hole formed to traverse the active layer from the second major surface of the first region, thereby connecting to the a first conductive semiconductor layer; a first electrode formed on the second main surface of the semiconductor stack, connected to the first conductive semiconductor layer of the first region through at least one contact hole, and Connecting to the second conductive semiconductor layer of the second region through the at least one contact hole; the second electrode is formed on the second main surface of the first region and connected to the second portion of the first region a conductive semiconductor layer; and an electrode connection unit connecting the second electrode to the first conductive semiconductor layer of the second region. The device of claim 1, further comprising a support substrate having electrical conductivity provided to the first major surface of the semiconductor stack for connection to the first electrode. The device of claim 2, wherein the support substrate is formed by an electroplating process. The device of claim 2, further comprising a solder pad formed on the first conductive semiconductor layer of the first region. The device of claim 1, further comprising a support substrate disposed on the first major surface of the semiconductor stack and having first and second electrodes respectively connected to the first and second electrodes Second electrode lead unit. The device of claim 1, wherein the second electrode has a region exposed in the isolation trench, and the electrode connection unit is formed along a side of the second region of the semiconductor laminate to be connected to the The exposed area of the second electrode. The device of claim 6, further comprising a passivation layer formed on a side of the second region of the semiconductor stack to electrically connect the second region of the semiconductor stack to the electrode connection unit isolation. The device of claim 1, further comprising an insulating spacer formed on the second major surface of the semiconductor stack and formed to isolate the first electrode from the second electrode. The device of claim 8, wherein the insulating spacer extends between an inner wall of the contact hole and a portion of the first electrode filled in the contact hole. The device of claim 1, wherein the first electrode comprises a highly reflective ohmic contact layer. The device of claim 10, wherein the highly reflective ohmic contact layer is selected from the group consisting of silver, nickel, aluminum, rhodium, palladium, iridium, ruthenium, magnesium, zinc, platinum, gold, and mixtures thereof. The materials that make up the group. The device of claim 1, wherein the at least one contact hole is a plurality of contact holes. The device of claim 1, wherein the area of the first region of the semiconductor stack is greater than the area of the second region of the semiconductor stack. The device of claim 13 wherein the area of the second region of the semiconductor stack is equal to or less than twenty percent of the total area of the semiconductor stack. A semiconductor light emitting device comprising: a semiconductor stack comprising first and second conductive semiconductor layers opposite to the first and second major surfaces, respectively providing the first and second major surfaces, and formed on the first And an active layer between the second major surfaces and separated by the isolation trench into the first and second regions; at least one first contact hole formed to traverse the active layer from the second major surface of the first region to connect to the a region of the first conductive semiconductor layer; at least one second contact hole formed to traverse the active layer from the second major surface of the second region, thereby connecting a region of the first conductive semiconductor layer; a first electrode formed on the second main surface of the semiconductor stack, connected to the first conductive semiconductor layer of the first region through at least one first contact hole, and connected through the at least one first contact hole a second conductive semiconductor layer to the second region; and a second electrode formed on the second major surface of the semiconductor stack, connected to the first region of the second region through at least one second contact hole Conduction Semiconductor layer, and connected to the second conductive type semiconductor layer through the first region of the at least one second contact hole. The device of claim 15 further comprising a support substrate having electrical conductivity provided to the first major surface of the semiconductor stack for connection to the second electrode. The device of claim 16, wherein the support substrate is formed by an electroplating process. The device of claim 16, further comprising a solder pad formed on the first conductive semiconductor layer of the first region. The device of claim 18, wherein the first electrode has a region exposed in the isolation trench, and the electrode connection unit is formed along a side of the second region of the semiconductor laminate to be connected to the The exposed area of the second electrode. The device of claim 19, further comprising a passivation layer formed on a side of the second region of the semiconductor stack to electrically connect the second region of the semiconductor stack to the electrode connection unit isolation. The device of claim 15 further comprising an insulating isolation layer formed on the second major surface of the semiconductor stack and formed to isolate the first electrode from the second electrode. The device of claim 21, wherein the insulating spacer extends between an inner wall of the first and second contact holes and a portion of the first and second contact holes that are filled in the first electrode . The device of claim 15 wherein the first electrode comprises a highly reflective ohmic contact layer. The device of claim 23, wherein the highly reflective ohmic contact layer is selected from the group consisting of silver, nickel, aluminum, rhodium, palladium, iridium, ruthenium, magnesium, zinc, platinum, gold, and mixtures thereof. The materials that make up the group. The device of claim 15, wherein the at least one first and second contact holes are a plurality of contact holes. The device of claim 15 wherein the area of the first region of the semiconductor stack is greater than the area of the second region of the semiconductor stack. The device of claim 26, wherein the area of the second region of the semiconductor stack is equal to or less than twenty percent of the total area of the semiconductor stack.