201236965 六、發明說明： 【發明所屬之技術領域】 本發明是有關於一種製造微機電裝置的方法。 【先前技術】 隨著半導體製程技術的進步，已推動微機電系統 (MEMS)的蓬勃發展。在傳統微機械系統的製造方法中，主 動元件製程與微機電製程是分開進行，在分別完成主動元 件電路與微機電裝置後，再將兩者整合在同一基材上而完 成微機電系統。上述的製造方法又稱為「System In Package」 (SIP)。 另一種習知的製造方式是在形成主動元件電路中諸如 金屬氧化物半導體元件(MOS)及雙載子接面電晶體(BJT)等 半導體元件後，再進行形成微機電結構的製程，然後再進 行主動兀件電路的金屬化製程而完成晶圓層級(wafer levd) 的微機電系、統。隨後將晶圓士刀割成晶片（Die)，最後再進行 晶片的封裝。 中，SC製造方式’在微機電裝置的製造過程 :成丄裝之電漿肅 ===Γ置的輪―二:、= 置::移通常，由-研磨 微機電裝置中的某些細：構::伴隨震動發生’而導致 因此’目前亟需一種新的製造方法，期能改善上述問 201236965 題。 【發明内容】 本發明之一目的係提供一種製造微機電裝置的方法， 俾能改善上述問題。 根據本發明一實施方式，此方法包含以下步驟：（a)形 成一電路層於一基材之一上表面，其中電路層包含一微結 構以及一主動元件，且微結構電性連接主動元件；（b)形成 一凹槽貫穿電路層並深入基材，使凹槽之一底部低於基材 之上表面，其中凹槽圍繞微結構之周邊的一部分；（c)形成 一犧牲層填充於凹槽内；（d)配置一上蓋體於電路層上方， 以覆蓋微結構；（e)由基材之下表面一側移除基材的部分， 以露出犧牲層；⑴移除犧牲層以釋放微結構；以及(g)配置 一下蓋體於基材下方。 根據本發明一實施例，步驟(a)之電路層更包括一連接 墊以及一保護層，其中連接墊電性連接主動元件，保護層 位於電路層之一外表面，且覆蓋連接墊。在一實施例中， 於步驟(g)後更包括：（h)移除上蓋體之部分，以露出位於連 接墊上方之保護層的部分；以及(g)移除保護層之部分，以 露出連接墊。 根據本發明一實施例，步驟(a)之主動元件為一互補式 金屬氧化物半導體元件或雙極互補式金屬氧化物半導體元 件。 根據本發明一實施例，步驟(b)之底部與上表面間之一 垂直距離為約5 至約100 //m 201236965 根據本發明一實施例，步驟(C)之犧牲層為一高分子材 料，且覆蓋微結構之一上表面。 根據本發明一實施例，步驟（e)包含研磨基材之下表 面，以露出犧牲磨。 根據本發明一實施例，步驟（e)包含研磨基材之下表 面，以及以深式反應離子蝕刻經研磨之基材，以露出犧牲 層。 根據本發明一實施例，步驟(f)係以一氧電漿移除犧牲 層。 根據本發明另一實施方式，製造微機電裝置的方法包 含以下步驟。形成電路層於基材之上表面，電路層包含特 徵結構以及微結構；其中特徵結構圍繞微結構之周邊的一 部分並貫穿電路層，特徵結構包含一介電結構貫穿電路層 以及一金屬結構貫穿電路層並環繞介電結構。接著，移除 特徵結構以露出基材；其中移除特徵結構包含依序以乾式 蝕刻移除介電結構以及濕式蝕刻移除金屬結構。然後，移 除露出基材之一部分，以形成一凹槽；此凹槽貫穿電路層 並具有一底部低於基材之上表面，凹槽圍繞微結構周邊的 部分。隨後，形成一犧牲層填充於凹槽内，再配置一上蓋 體於電路層上方以覆蓋微結構。接著，再由基材之下表面 一側移除基材的部分，以露出犧牲層。然後，移除犧牲層 以釋放微結構，並配置一下蓋體於基材下方。 【實施方式】 請參照第1圖，其為本發明一實施方式之微機電裝置 201236965 的上視示意圖。微機電裝置可應用在例如加速度债測器 (accelerometer)或陀螺儀（gyroscope)等之微機電慣性感測 裝置。第1圖係繪示一微機電加速度偵測器，但本發明以 下所揭露的製造方法可適用在其他的微機電裝置中，並不 限於微機電加速度偵測器。 如第1圖所示，微機電加速度偵測器〗〇〇主要包括可 動的微結構110、半導體電路120、複數個連接墊13()以及 電路層140。半導體電路12〇大致配置在可動的微結構11〇 之外圍。連接墊130通常可配置在半導體電路12〇的外圍。 微結構110容置在電路層140的貫穿空間142中，且 微結構包括中心部112、至少一彈性支撐件114以及至少一 第一電極110。彈性支撐件114連接中心部112與電路層 140，且使中心部112呈現可移動狀態。當一外力作用在中 心部112時’中心部112可產生位移；當外力消失時，中 心部112可以回到原來的位置。彈性支撐件114的寬度可 例如為約0.5/zm至約10/Wm。第一電極116由中心部112 向外延伸至貫穿空間142中。第一電極116的寬度可例如 為約〇.l//m至約lOym。 電路層140包含有一第二電極144，第二電極144向 貫穿空間142延伸，並與第—電極116形成一電容。 半導體電路120電性連接第二電極144及第一電極 =了㈣兩電極116、144之間的電容值，並將所量測 勺谷讀變為—電壓或電流訊號。半導體電路可 互補式金屬氧化物半導體裝置。半導體電路120可 及由連接塾13G而電性連接一外部電路(未繪示）。 201236965 在操作時，當微機電加速度偵測器 100受到一加速度 時，第二電極144與第一電極116之間的距離改變，使其 間的電容值發生變化。半導體電路120量測上述電容值或 電容值的變化量’而得以估算微機電加速度偵測器1〇〇所 受到的加速度。 上述微機電加速度偵測器100僅為示範性例子，以易 於瞭解本發明下文揭露的製造方法，本發明下文揭露的製 造方法可用以製造其他的微機電裝置。再者，以下所揭露 的各實施例’在有益的情形下可相互組合或取代，也可在 一實施例中附加其他的實施例，而無須進一步的記載或說 明。 第2圖為本發明一實施方式之製造微機電裝置之方法 200的流程圖。第3至16圖係繪示本發明實施方式之製造 方法中各製程階段的剖面示意圖，其大致為第丨圖中線段 3-3’的剖面示意圖。 進行步驟210’形成電路層32〇於基材310的上表面， 如第3圖所示。基材310可例如為矽晶圓或其他適合用以 製造半導體元件的基材。電路層320包含微結構330以及 主動元件322。微結構電性連接主動元件。主動元件322 可例如為互補式金屬氧化物半導體元件（CMOS)或雙極互 補式金屬氧化物半導體元件(BiCMOS)。 在一實施方式中’電路層320更包含特徵結構340填 充於區域A中。特徵結構340圍繞微結構33〇之周邊的一 部分，並貫穿電路層320。在後續的步驟中，特徵結構340 將會被移除而形成第1圖繪示的貫穿空間142的一部分。 201236965 換5之’特徵結構340縣填充在後續欲移除的區域a中。 特徵結構34G包含介電結構S42以及金屬結構344。 "電》。構342貫穿電路層MO，並接觸下方的基材训。介 電結構342可例如為氣切或氮切，或由氧切及氣化 夕隹疊而構成。金屬結構344也同樣貫穿電路層，並 且環繞介電結構342。換言之，金屬結構344形成在特徵 結構340的外緣。更詳細而言，金屬結構344可包含344a 及344b兩邛刀。金屬結構的34知部分實體連接電路層Μ。 與介電結構342;金屬、结構的3條部分實體連接微結構33〇 與介電結構342。 在上述電路層320包含有特徵結構340的實施方式 :’形成電路層320的步驟包括形成CM〇s或的 在CMOS元件的標準製程中，可包括4道的金屬化 程以及2道的多晶梦化製程(2P4M製程），亦可包括5道 的金屬化製程以及i道的多晶♦化製程⑽❶製程）。因 此’在一實施例中’當形成CMOS元件322時，可藉由適 當的光罩設計’同時形成特徵結構34G。舉例而言，當形 ^入^〇S疋件322中的介電層時’可同時形成特徵結構340 ^電結構342 °當形成CM〇S元件322的金屬層時，可 :日，、形成特徵結構34〇中部分的金屬結構344。當填充金 ^MOSS件的連接孔(via)時，可同時形成金屬結構州 ==分。因此’能夠在形成C M 〇 s元件3 22的同時，逐 :系二从特徵結構34G。在—實施例中，填充在CM0S元件 :、金屬為鶴’ CMOS元件322的金屬層為在呂。因此， 金屬、洁構344可由銘層及鶴層堆疊而成。亦即，金屬結構 201236965 344為多層結構，且至少由兩種金屬材料所構成。 在另-實施方式中，電路層320可不包含特徵結構 340 ’微結構330周邊(如第3圖所示的區域A)填充諸如氧 化矽或氮化矽等介電材料以取代特徵結構。 ' 在又一實施方式中，電路層320可更包括一連接墊324 • 以及一保護層326。連接墊324電性連接主動元件322。保 護層326位於電路層320的外表面，且覆蓋連接墊324'。' 保護層326的材料可例如為氧化矽。 在步驟220中，形成凹槽312貫穿電路層32〇並深入 基材310，如第4圖所示。凹槽312的底部3m低於基材 =上表面3l0a，且凹槽312圍繞微結構330之周邊的一部 分。在後續步驟中，凹槽312將形成第i圖繪示的貫穿空 間142。以下將示例性地敘述兩種形成凹槽η〕的實施方 ，在電路層32〇包含有特徵結構34〇的實施方式中，先 形成=光阻層35〇於電路層32〇及微結構33〇上，如第4A =示：光阻層350具有開口 352，以露出特徵結構34〇。 史4紅以諸如反應性離子蝕刻（reaCtWe i〇n etchinS，RIE)之 子6^,^法移除介電結構342 ’如第4B圖所示。反應性離 刻金2會㈣諸如氧化⑦及氮切之介電材料，不會钱 構^料。在騎反隸料侧的過財，由於微結 蓋，所的側壁以及電路層320的侧壁被金屬結構344覆 路屏反應性離子蝕刻不會傷害或蝕刻微結構330及電 以〇的側壁’而使微結構330及電路層320的侧壁得 ”哥原本的輪廟外觀。隨後，再以濕式姓刻移除金屬結 201236965 構344 ’如第4C圖所示。移除金屬結構344後，在電路層 320中形成第4C圖繪示的開口 B，並使開口 B中的基材 310暴露出來。濕式蝕刻採用的触刻劑對於金屬材料與氧 化物材料（或氮化物）具有高的蝕刻選擇比，例如高於15 : ! . 或高於20 : 1或高於30: 1或更高。因此，在移除金屬結 構344時，幾乎不會損害微結構330及電路層32〇原本的 側壁輪廓外觀。例如，蝕刻劑中包含硫酸和過氧化氫，硫 酸與過氧化氫的重量比為約2 : 1。當然其他商品化的金屬 触刻劑也可適用於本發明中。最後，在藉由例如深式反應 離子餘刻（Deep Reactive Ion Etching, DRIE)移除露出的基 材310的一部分，而形成第4圖繪示的凹槽312。上述實 施方式，可使微結構330的側壁與基材310上表面之間的 夾角Θ為約85度至約95度。此外，間隙d兩侧的微結構 330侧壁及電路層32〇侧壁的表面平整。因此，可以提升 微機電裝置的性能以及品質穩定性。 在電路層320不包含特徵結構340的實施方式中，電 路層320的區域A中為介電材料。可使用RIE移除區域A 中的介電材料，而在電路層320中形成第4C圖繪示的開口 B。接著，在藉由例如深式反應離子钱刻（Deep Reactive Ion Etching，DRIE)移除露出的基材310的一部分，而形成第4 圖繪示的凹槽312。 * 在一實施例中，上述底部312b與上表面310a間之一 . 垂直距離d為約5 am至約100 //m，如第4圖所示。 在步驟230中，形成一犧牲層360填充於凹槽312内， 如第5圖所示。犧牲層可例如為高分子材料所製成。舉例 201236965 生Γ為一光阻材料，經旋轉塗佈、乾燥、曝光 ，、員充在凹槽312 t。犧牲層的材料可例如為酴 酿樹脂型光阻、丙烯酸樹脂型光阻或其他有機材料。在一 實施例中’犧牲層360除了填充於凹槽312中，並覆蓋微 結構330的上表面332。 在步驟240中，配置上蓋體37〇於電路層32〇上方， •以覆蓋微結構330 ’如第6圖所示。上蓋體37〇用以保護 最終形成的微機電裝置，上蓋體37〇可例如為玻璃或矽基 板所製成。在一實施例中，上蓋體37〇可藉由一黏著層372 而固定於電路層320上方。 在步驟250中，由基材310的下表面31〇b 一侧移除基 材310的。卩分，以露出犧牲層36〇。以下示例性地敘述兩 種完成此步驟的方式。 在一實施方式中，可先研磨基材31〇的下表面3i〇b， 使基材310的厚度減少至一定厚度，如第7八圖所示。例 如’可將基材310的厚度研磨至約150/zm。隨後，再以 DRIE對基材31〇的下表面進行蝕刻，使基材31〇的下表面 升y成凹陷314。凹陷314的深度足以使犧牲層36〇暴露 出來’如第7B圖所示。 另實施方式中’直接研磨基材310之下表面直到 犧牲層露出為止。此實施方式並不使用DRIE製程。如第 * 7C圖所示。 ^头技術中，在研磨基材的下表面時’常伴隨發生震 動而，致微結構中的細微結構因震動而受損。例如，第 1圖繪不的彈性支撐件114或電極110、144的寬度通常僅 12 201236965 為約0.1 /2 m至約10/z m，很容易因震動而受損。本發明之 實施方式中，形成凹槽312後，再於凹槽312内填入犧牲 層360，可以有效防止微結構因震動而受損壞。此外，填 充在於凹槽312的犧牲層360,也可以避免在進行步驟240 時，黏著層372或其他污染物進入凹槽312中。從而，根 據本發明之實施方式，可以有效提高微機電裝置的良率。 在步驟260中，移除犧牲層360以釋放微結構330， 如第8A及8B圖所示。第8A圖係對應第7B圖的實施方式， 第8B圖係對應第7C圖的實施方式。在一實施方式中，可 利用氧電漿移除犧牲層360。在其他實施方式中，可利用 其他化學溶劑來移除犧牲層360。換言之，可根據犧牲層 360的材料性質或製程需求來改變或調整移除犧牲層360 的方法。本文中，「釋放微結構」係指使微機電裝置產生具 有可相對移動的構造或部件。具體而言，移除犧牲層360 後，微結構330可相對電路層320而發生位移。 在步驟270中，配置下蓋體380於基材310的下方， 而形成微機電裝置300,如第9A及9B圖所示（第9A及9B 圖分別對應第8A及8B圖的實施方式）。下蓋體380以及 上蓋體370形成一封閉空間C圍繞微結構330。微結構330 可在封閉空間C中發生相對位移，而使微機電裝置產生預 定的功能。上蓋體370及下蓋體380用以保護微結構330， 同時可防止污染物進入封閉空間C中。下蓋體380的材料 可與上蓋體370相同或不同。在一實施例中，下蓋體380 可藉由一黏著層382而固定於基材310的下方。 微機電裝置300可藉由各式的連接方式而電性連接至 13 201236965 一外部電路或系統。微機電裝置與外部電路或系統的連接 方式通常與微機電裝置的封裝形式有關。以下係以四方扁 平無引腳封裝(Quad Flat Non-leaded package, QFN)為例， 說明微機電裝置如何與外部電路連接。本發明所屬技術領 域具通常知識者應可理解，其他的連接方式亦可適用於本 發明中，因此本發明並不限於以下所揭露的方法或步驟。 • &一實施方式中，於步驟27〇後，移除部分的上蓋體 370而露出位於連接塾326上方部分的保護層奴 圖所示（第10A及聰圖分別對應第 第 5的=式)。此步驟可藉由雷射切割或機械式切割來完 成，其為本領域技術人員所習知。 』术凡 製程來移除露出部分的保護層326枯:藉由例如RIE 的連接墊似露出，如第11A及^而使保護層似下方 接塾裝置與外邹電路:連=露出的連 雖然本發明已以實施方式揭 、 定本發明，任何熟習此技藝者， 、，然其並非用以限 護範 圍 範圍内，當可作各種之更動與_不脫離本發明之精神和 當視後附之申請專利範圍所界定者^二匕本發明之保 圖 圖式簡單說明】 。第1圖係繪示本發明1施方式之微機 電裝置的上視 微機電裴置之 方法示本發明〜式之製造 第3至11Β圖係繪示本發明 之製造微機電裝置的方法 201236965 中各製程階段的剖面示意圖。 【主要元件符號說明】 100微機電加速度偵測器 110微結構 112中心部 114彈性支撐件 116第一電極 120半導體電路 130連接墊 140基材 142貫穿空間 144第二電極 200方法 210、220、230、240、250、260、270 步驟 300微機電裝置 310基材 310a上表面 310b下表面 312凹槽 312b底部 314凹陷 320電路層 15 201236965 322主動元件 324連接墊 326保護層 330微結構 332上表面 340特徵結構 342介電結構 344金屬結構 3 5 0光阻層 352 開口 360犧牲層 370上蓋體 372黏著層 380下蓋體 382黏著層 A區域 B開口 C封閉空間 d距離 (9夾角 16201236965 VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a method of manufacturing a microelectromechanical device. [Prior Art] With the advancement of semiconductor process technology, the development of microelectromechanical systems (MEMS) has been promoted. In the manufacturing method of the conventional micromechanical system, the active component process and the microelectromechanical process are performed separately, and after the active component circuit and the microelectromechanical device are respectively completed, the two are integrated on the same substrate to complete the MEMS system. The above manufacturing method is also called "System In Package" (SIP). Another conventional manufacturing method is to form a microelectromechanical structure after forming semiconductor elements such as a metal oxide semiconductor device (MOS) and a bipolar junction transistor (BJT) in an active device circuit, and then A wafer-level MEMS micro-electromechanical system is implemented by performing a metallization process of the active component circuit. The wafer is then cut into wafers and finally wafers are packaged. In the SC manufacturing method, in the manufacturing process of the micro-electromechanical device: the electrode of the armored device === the wheel of the device-two:, = set:: shifting, usually - some of the details in the grinding micro-electromechanical device: Construction:: With the occurrence of vibrations, 'there is a need for a new manufacturing method, which can improve the above question 201236965. SUMMARY OF THE INVENTION One object of the present invention is to provide a method of fabricating a microelectromechanical device that can improve the above problems. According to an embodiment of the invention, the method comprises the steps of: (a) forming a circuit layer on an upper surface of a substrate, wherein the circuit layer comprises a microstructure and an active component, and the microstructure is electrically connected to the active component; (b) forming a recess through the circuit layer and deep into the substrate such that one of the bottoms of the recess is lower than the upper surface of the substrate, wherein the recess surrounds a portion of the periphery of the microstructure; (c) a sacrificial layer is formed to fill the recess (d) arranging an upper cover over the circuit layer to cover the microstructure; (e) removing a portion of the substrate from a side of the lower surface of the substrate to expose the sacrificial layer; (1) removing the sacrificial layer to release Microstructure; and (g) arranging the cover below the substrate. According to an embodiment of the invention, the circuit layer of step (a) further comprises a connection pad and a protective layer, wherein the connection pad is electrically connected to the active component, and the protection layer is located on an outer surface of the circuit layer and covers the connection pad. In an embodiment, after the step (g), the method further comprises: (h) removing a portion of the upper cover to expose a portion of the protective layer above the connection pad; and (g) removing a portion of the protective layer to expose Connection pad. According to an embodiment of the invention, the active component of step (a) is a complementary metal oxide semiconductor device or a bipolar complementary metal oxide semiconductor device. According to an embodiment of the invention, the vertical distance between the bottom and the upper surface of step (b) is from about 5 to about 100 //m 201236965. According to an embodiment of the invention, the sacrificial layer of step (C) is a polymer material. And covering one of the upper surfaces of the microstructure. According to an embodiment of the invention, step (e) comprises grinding the underlying surface of the substrate to expose the sacrificial mill. According to an embodiment of the invention, step (e) comprises grinding the underlying surface of the substrate and etching the ground substrate by deep reactive ion etching to expose the sacrificial layer. According to an embodiment of the invention, step (f) removes the sacrificial layer with an oxygen plasma. According to another embodiment of the present invention, a method of fabricating a microelectromechanical device includes the following steps. Forming a circuit layer on the upper surface of the substrate, the circuit layer comprising the characteristic structure and the microstructure; wherein the feature structure surrounds a portion of the periphery of the microstructure and penetrates the circuit layer, the feature structure comprises a dielectric structure penetrating the circuit layer and a metal structure penetrating circuit Layer and surround the dielectric structure. Next, the feature is removed to expose the substrate; wherein removing the feature comprises sequentially removing the dielectric structure by dry etching and wet etching to remove the metal structure. Then, a portion of the exposed substrate is removed to form a recess; the recess extends through the circuit layer and has a bottom portion that is lower than the upper surface of the substrate, the recess surrounding the periphery of the microstructure. Subsequently, a sacrificial layer is formed to fill the recess, and an upper cover is disposed over the circuit layer to cover the microstructure. Next, a portion of the substrate is removed from the lower surface side of the substrate to expose the sacrificial layer. The sacrificial layer is then removed to release the microstructure and the cover is placed under the substrate. [Embodiment] Please refer to Fig. 1, which is a top plan view of a microelectromechanical device 201236965 according to an embodiment of the present invention. The microelectromechanical device can be applied to a microelectromechanical inertial sensing device such as an acceleration accelerometer or a gyroscope. Fig. 1 is a diagram showing a microelectromechanical acceleration detector, but the manufacturing method disclosed in the present invention can be applied to other microelectromechanical devices, and is not limited to a microelectromechanical acceleration detector. As shown in FIG. 1, the MEMS acceleration detector 〇〇 mainly includes a movable microstructure 110, a semiconductor circuit 120, a plurality of connection pads 13 (), and a circuit layer 140. The semiconductor circuit 12A is disposed substantially at the periphery of the movable microstructure 11A. The connection pads 130 are typically configurable on the periphery of the semiconductor circuit 12A. The microstructure 110 is received in the through space 142 of the circuit layer 140, and the microstructure includes a central portion 112, at least one elastic support member 114, and at least one first electrode 110. The elastic support member 114 connects the central portion 112 with the circuit layer 140 and causes the central portion 112 to assume a movable state. When an external force acts on the center portion 112, the center portion 112 can be displaced; when the external force disappears, the center portion 112 can return to the original position. The width of the resilient support member 114 can be, for example, from about 0.5/zm to about 10/Wm. The first electrode 116 extends outwardly from the central portion 112 into the through space 142. The width of the first electrode 116 may be, for example, from about 0.1/m to about 10 μm. The circuit layer 140 includes a second electrode 144 extending toward the through space 142 and forming a capacitance with the first electrode 116. The semiconductor circuit 120 is electrically connected to the second electrode 144 and the first electrode = (four) the capacitance value between the two electrodes 116, 144, and reads the measured valley into a voltage or current signal. The semiconductor circuit can be a complementary metal oxide semiconductor device. The semiconductor circuit 120 can be electrically connected to an external circuit (not shown) by the connection port 13G. 201236965 In operation, when the MEMS acceleration detector 100 is subjected to an acceleration, the distance between the second electrode 144 and the first electrode 116 changes, and the capacitance value between them changes. The semiconductor circuit 120 measures the amount of change in the capacitance value or the capacitance value to estimate the acceleration received by the MEMS acceleration detector 1 。. The above described microelectromechanical acceleration detector 100 is merely an illustrative example, to facilitate understanding of the manufacturing methods disclosed herein below, and the manufacturing methods disclosed herein below may be used to fabricate other microelectromechanical devices. Furthermore, the embodiments disclosed below may be combined or substituted with each other in an advantageous manner, and other embodiments may be added to an embodiment without further description or description. 2 is a flow chart of a method 200 of fabricating a microelectromechanical device in accordance with an embodiment of the present invention. 3 to 16 are schematic cross-sectional views showing respective process stages in the manufacturing method of the embodiment of the present invention, which is roughly a schematic cross-sectional view of the line segment 3-3' in the second drawing. Step 210' is performed to form circuit layer 32 on the upper surface of substrate 310, as shown in FIG. Substrate 310 can be, for example, a germanium wafer or other substrate suitable for use in fabricating semiconductor components. Circuit layer 320 includes microstructures 330 and active components 322. The microstructure is electrically connected to the active component. The active device 322 can be, for example, a complementary metal oxide semiconductor device (CMOS) or a bipolar complementary metal oxide semiconductor device (BiCMOS). In an embodiment, circuit layer 320 further includes feature structure 340 that is filled in region A. Feature 340 surrounds a portion of the periphery of microstructure 33 and extends through circuit layer 320. In a subsequent step, feature structure 340 will be removed to form a portion of through space 142 depicted in FIG. 201236965 The 5 characteristic structure 340 county is filled in the area a to be removed later. The feature structure 34G includes a dielectric structure S42 and a metal structure 344. "Electricity. The structure 342 penetrates the circuit layer MO and contacts the substrate training below. The dielectric structure 342 can be, for example, a gas cut or a nitrogen cut, or an oxygen cut and a gasification stack. Metal structure 344 also extends through the circuit layer and surrounds dielectric structure 342. In other words, the metal structure 344 is formed on the outer edge of the feature structure 340. In more detail, the metal structure 344 can include two files 344a and 344b. The 34 portion of the metal structure is physically connected to the circuit layer. And the dielectric structure 342; the metal, the three parts of the structure are physically connected to the microstructure 33 〇 and the dielectric structure 342. The circuit layer 320 described above includes an embodiment of the feature structure 340: 'The step of forming the circuit layer 320 includes forming a CM〇s or a standard process in a CMOS device, which may include four metallization processes and two channels of polycrystals. The dream process (2P4M process) can also include 5 metallization processes and i-channel poly-crystallization process (10) process). Thus, in an embodiment, when the CMOS component 322 is formed, the feature 34G can be formed simultaneously by a suitable reticle design. For example, when forming a dielectric layer in the 322 element 322, the feature structure 340 can be simultaneously formed. When the metal layer of the CM 〇 S element 322 is formed, it can be formed. A portion of the metal structure 344 in the feature structure 34. When the via of the gold ^MOSS device is filled, the metal structure state == minutes can be formed at the same time. Therefore, it is possible to form the C M 〇 s element 3 22 at the same time as the second feature structure 34G. In the embodiment, the metal layer filled in the CMOS element:, the metal is the crane' CMOS element 322 is in Lv. Therefore, the metal and the decorative 344 can be stacked by the inscription layer and the crane layer. That is, the metal structure 201236965 344 is a multilayer structure and is composed of at least two metal materials. In another embodiment, circuit layer 320 may comprise a dielectric material such as hafnium oxide or tantalum nitride instead of the feature structure 340' (the area A as shown in FIG. 3). In yet another embodiment, the circuit layer 320 can further include a connection pad 324 and a protective layer 326. The connection pad 324 is electrically connected to the active component 322. The protective layer 326 is located on the outer surface of the circuit layer 320 and covers the connection pads 324'. The material of the protective layer 326 may be, for example, cerium oxide. In step 220, a recess 312 is formed through the circuit layer 32 and deep into the substrate 310, as shown in FIG. The bottom 3m of the recess 312 is lower than the substrate = upper surface 301a, and the recess 312 surrounds a portion of the periphery of the microstructure 330. In a subsequent step, the groove 312 will form a through space 142 as depicted in Fig. i. Hereinafter, two embodiments for forming the recess η] will be exemplarily described. In the embodiment in which the circuit layer 32 includes the characteristic structure 34, the formation = photoresist layer 35 and the circuit layer 32 and the microstructure 33 are formed first. As shown in Fig. 4A =, the photoresist layer 350 has an opening 352 to expose the features 34". The history of the dielectric structure 342' is removed as shown in Fig. 4B by a method such as reactive ion etching (RIEC). The reactive etched gold 2 will (4) a dielectric material such as oxidized 7 and nitrogen cut, which will not be used as a material. In the anti-collision side, due to the micro-junction, the sidewalls and the sidewalls of the circuit layer 320 are covered by the metal structure 344. The reactive ion etching does not damage or etch the microstructures 330 and the sidewalls of the electrical structure. 'When the microstructures 330 and the side walls of the circuit layer 320 are obtained, the appearance of the original temple of the brothers. Then, the metal junction 201236965 structure 344' is removed by wetness as shown in Fig. 4C. The metal structure 344 is removed. Thereafter, the opening B shown in FIG. 4C is formed in the circuit layer 320, and the substrate 310 in the opening B is exposed. The contact agent used in the wet etching has a metal material and an oxide material (or nitride). The high etch selectivity ratio is, for example, higher than 15:. or higher than 20:1 or higher than 30:1 or higher. Therefore, when the metal structure 344 is removed, the microstructure 330 and the circuit layer 32 are hardly damaged. The appearance of the original sidewall profile. For example, the etchant contains sulfuric acid and hydrogen peroxide, and the weight ratio of sulfuric acid to hydrogen peroxide is about 2: 1. Of course, other commercially available metal etchants are also suitable for use in the present invention. Finally, by using, for example, deep reactive ion remnants (Deep Reactive Ion Etching, DRIE) removes a portion of the exposed substrate 310 to form a recess 312 as shown in FIG. 4. In the above embodiment, the angle between the sidewall of the microstructure 330 and the upper surface of the substrate 310 may be It is about 85 degrees to about 95 degrees. In addition, the sidewalls of the microstructures 330 on both sides of the gap d and the surface of the side walls of the circuit layer 32 are flat. Therefore, the performance and quality stability of the microelectromechanical device can be improved. In an embodiment that does not include the feature structure 340, the dielectric material is in the region A of the circuit layer 320. The dielectric material in the region A can be removed using the RIE, and the opening B shown in FIG. 4C is formed in the circuit layer 320. Next, a portion of the exposed substrate 310 is removed by, for example, Deep Reactive Ion Etching (DRIE) to form a recess 312 as shown in FIG. 4. * In an embodiment, One of the above-mentioned bottom 312b and the upper surface 310a. The vertical distance d is from about 5 am to about 100 //m, as shown in Fig. 4. In step 230, a sacrificial layer 360 is formed to be filled in the recess 312, such as As shown in Fig. 5, the sacrificial layer can be made, for example, of a polymer material. Example 201236965 is produced as a photoresist material, which is spin-coated, dried, exposed, and filled in a recess 312 t. The material of the sacrificial layer can be, for example, a resin resin type resist, an acrylic type resist or other organic In one embodiment, the sacrificial layer 360 is filled in the recess 312 and covers the upper surface 332 of the microstructure 330. In step 240, the upper cover 37 is disposed over the circuit layer 32, to cover the micro Structure 330' is shown in Figure 6. The upper cover 37 is for protecting the finally formed microelectromechanical device, and the upper cover 37 can be made, for example, of a glass or a slab. In an embodiment, the upper cover 37 is fixed to the circuit layer 320 by an adhesive layer 372. In step 250, the substrate 310 is removed from the side of the lower surface 31〇b of the substrate 310. Divide to expose the sacrificial layer 36〇. Two ways of accomplishing this step are exemplarily described below. In one embodiment, the lower surface 3i〇b of the substrate 31〇 may be first ground to reduce the thickness of the substrate 310 to a certain thickness, as shown in FIG. For example, the thickness of the substrate 310 can be ground to about 150/zm. Subsequently, the lower surface of the substrate 31 is etched by DRIE to raise the lower surface of the substrate 31 to the recess 314. The depth of the recess 314 is sufficient to expose the sacrificial layer 36' as shown in Fig. 7B. In another embodiment, the lower surface of the substrate 310 is directly ground until the sacrificial layer is exposed. This embodiment does not use a DRIE process. As shown in figure * 7C. In the head technique, when the lower surface of the substrate is ground, the vibration is often accompanied by vibration, and the fine structure in the microstructure is damaged by vibration. For example, the width of the resilient support member 114 or electrodes 110, 144 depicted in Figure 1 is typically only about 0.1 /2 m to about 10/z m at 12 201236965 and is easily damaged by vibration. In the embodiment of the present invention, after the recess 312 is formed, the sacrificial layer 360 is filled in the recess 312, so that the microstructure can be effectively prevented from being damaged by vibration. In addition, filling the sacrificial layer 360 in the recess 312 also prevents the adhesive layer 372 or other contaminants from entering the recess 312 when step 240 is performed. Thus, according to an embodiment of the present invention, the yield of the microelectromechanical device can be effectively improved. In step 260, the sacrificial layer 360 is removed to release the microstructures 330, as shown in Figures 8A and 8B. Fig. 8A corresponds to the embodiment of Fig. 7B, and Fig. 8B corresponds to the embodiment of Fig. 7C. In one embodiment, the sacrificial layer 360 can be removed using oxygen plasma. In other embodiments, other chemical solvents may be utilized to remove the sacrificial layer 360. In other words, the method of removing the sacrificial layer 360 can be changed or adjusted depending on the material properties or process requirements of the sacrificial layer 360. As used herein, "release microstructure" refers to the creation of a microelectromechanical device having a relatively movable structure or component. In particular, after the sacrificial layer 360 is removed, the microstructures 330 can be displaced relative to the circuit layer 320. In step 270, the lower cover 380 is disposed below the substrate 310 to form the microelectromechanical device 300 as shown in FIGS. 9A and 9B (the 9A and 9B drawings correspond to the embodiments of FIGS. 8A and 8B, respectively). The lower cover 380 and the upper cover 370 form a closed space C surrounding the microstructures 330. The microstructures 330 can be relatively displaced in the enclosed space C to cause the MEMS device to produce a predetermined function. The upper cover 370 and the lower cover 380 serve to protect the microstructures 330 while preventing contaminants from entering the enclosed space C. The material of the lower cover 380 may be the same as or different from the upper cover 370. In an embodiment, the lower cover 380 can be fixed under the substrate 310 by an adhesive layer 382. The MEMS device 300 can be electrically connected to an external circuit or system by means of various connection methods. The manner in which the MEMS device is connected to an external circuit or system is typically related to the package form of the MEMS device. The following is an example of a Quad Flat Non-leaded Package (QFN) to illustrate how a microelectromechanical device can be connected to an external circuit. It should be understood by those skilled in the art that other methods of connection are also applicable to the present invention, and thus the present invention is not limited to the methods or steps disclosed herein. • In one embodiment, after step 27, a portion of the upper cover 370 is removed to expose the protective layer on the upper portion of the port 326 (the 10A and the Cong map correspond to the 5th== ). This step can be accomplished by laser cutting or mechanical cutting, which is well known to those skilled in the art. The process is to remove the exposed protective layer 326: it is exposed by a connection pad such as RIE, such as the 11A and ^, so that the protective layer is like the lower connection device and the external Zou circuit: even = exposed even though The present invention has been described in terms of the embodiments of the present invention, and it is not intended to limit the scope of the invention. The definition of the patent application scope is a simple description of the map of the present invention. 1 is a view showing a method of fabricating a microelectromechanical device according to the present invention. FIG. 3 to FIG. Schematic diagram of the cross-section of each process stage. [Major component symbol description] 100 MEMS acceleration detector 110 microstructure 112 center portion 114 elastic support member 116 first electrode 120 semiconductor circuit 130 connection pad 140 substrate 142 through space 144 second electrode 200 methods 210, 220, 230 240, 250, 260, 270 Step 300 Microelectromechanical device 310 Substrate 310a Upper surface 310b Lower surface 312 Groove 312b Bottom 314 Recessed 320 Circuit layer 15 201236965 322 Active element 324 Connection pad 326 Protective layer 330 Microstructure 332 Upper surface 340 Characteristic structure 342 dielectric structure 344 metal structure 3 50 photoresist layer 352 opening 360 sacrificial layer 370 upper cover 372 adhesive layer 380 lower cover 382 adhesive layer A region B opening C closed space d distance (9 angle 16