1360177 九、發明說明： 【發明所屬之技術領域】 本發明係提供-麵米結構職置及製造方法，特別是指 -種全新_料導體元叙微型祕結構及絲造方法，其 能有效結合織電結難半導體元件，且獅賴電結構不當 侵蝕及曝露。 【先前技術】 按，現今半導體微機電系統包含各種不同的微型結構，例 如：不可動的探針、流道、孔穴結構，或是-些可動的彈簧、 連桿、齒輪(剛體運動或是撓性形變）等結構。 ’ 將上述不同的微型結構和相關的半導體電路(例如·c職) 相互整合，即可構成各種不_半導體翻；藉由製造方法與 結構設計提昇微機械結構各種不同的魏，是未來半導體微機 電系統的_指標，也是未來進—步研究晶片時的嚴峻挑戰； 若能研發改進習知的技術，未來的發展性實無法預估。 目前製作微機電裝置(MEMS)中的感測器及致動器皆獨立 於半導體元件（例如：CM0S)i外製造，且需要在矽基底上製作 出懸浮式結構；前述製程必須採用了先進的半導體技術，例 如.濕钱刻、乾餘刻和犧牲層（sacrificial_layer)去除等專 6 ^〇U177 用的微機電作業_s : MiCr〇-EleCtro-Mechanical ^mems);前述濕姓刻是一健速有效钱刻而且不致侧其 匕材料的『蝕刻劑』(etchant) ’因此，通常濕蝕刻對不同材 2會具有相當高的『選擇性』（selectivity)，至於龜刻（電 ，刻）是制部分解_氣體來進行，乾働彳最大優點即是 非等向性敍刻』（anisotropic etching)。 然而，前述習知技術出現了下述幾種問題： 其-’無論是採用何種侧方式，都是分別製作微機電農 置(MEMS)與半導體元件(例如：CM〇s)，二種製程無法相容整 ° ’僅能分別於ic前製程各自生產，再於IC後製程之中連接相 容二如此透斬_產生的寄生效細及·的料會令成本 居高不下，更會增加未來後製縣的複雜性； 其二，濕蝕刻不但會在縱向進行蝕刻，而且也會有橫向的 钱刻效果；橫向餘刻會導致所謂『侧钱』（imdeixut)缺陷； 其二，乾蝕刻可以非等向性蝕刻，但是乾餘刻的選擇性卻 比濕钱刻來得低。 前述技術的發展十分迅速，為了改進受紐刻技術的諸多 問題，美國專利6 ’ 712 ’ 983B2專利則提出了使用離子濕姓刻 (Reactive I〇n Etching，以下簡難IE)的技術，此種技術雖 7 1360177 然能大幅降低側钱現象（under cut)，但是由於其同樣是由上 而下逐層進行钱刻，且最後一次的石夕基底大量餘刻工作必須運 用橫向働i技财能賴’故狀狀_技術爐過於麻須 複雜，且多次的蝕刻過程會通過該微機電結構，此微機電結構 在進行大量侧及橫向蝴舰容#會有纖現象（㈣打 cut) ’重要的是，^賴機電結構製程結束後曝露、影響良率 的問題仍然未獲得改善。1360177 IX. Description of the invention: [Technical field to which the invention pertains] The present invention provides a surface-structured structure and a manufacturing method, and particularly refers to a novel _ material conductor element micro-secret structure and a wire-making method, which can be effectively combined The woven electric junction is difficult to be a semiconductor component, and the structure of the lion's electric ram is improperly eroded and exposed. [Prior Art] According to the current semiconductor MEMS, various micro structures are included, such as: immovable probes, runners, hole structures, or some movable springs, connecting rods, gears (rigid body motion or scratching) Sexual deformation) and other structures. 'Incorporating the above different micro-structures and related semiconductor circuits (for example, c jobs) into each other can constitute various kinds of non-semiconductor turn; the manufacturing method and structural design enhance the micro-mechanical structure of various kinds of Wei, which is the future semiconductor micro The _ indicator of electromechanical systems is also a serious challenge in the future research and development of wafers; if the development of improved techniques can be developed, the future development cannot be predicted. The sensors and actuators currently fabricated in microelectromechanical devices (MEMS) are manufactured independently of semiconductor components (eg, CMOS) and require a floating structure on the germanium substrate; the aforementioned processes must be advanced. Semiconductor technology, such as wet money engraving, dry remnant and sacrificial_layer removal, etc. _s : MiCr〇-EleCtro-Mechanical ^mems); the aforementioned wet surname is a health The etchant is effective and does not cause the etchant of the material. Therefore, wet etching usually has a relatively high selectivity for different materials. As for the engraving (electricity, engraving) Partial solution _ gas to carry out, the biggest advantage of cognac is anisotropic etching (anisotropic etching). However, the above-mentioned prior art has several problems as follows: - - Regardless of the side mode, the micro-electromechanical farm (MEMS) and semiconductor components (for example, CM〇s) are separately produced, and the two processes are Incompatible with the whole °' can only be produced separately in the ic pre-process, and then connected to the IC after the process is compatible with the second, so the resulting parasitic effect and the material will make the cost high, and will increase In the future, the complexity of the county; second, wet etching will not only etch in the longitudinal direction, but also have a horizontal money engraving effect; lateral remnant will lead to the so-called "edge money" (imdeixut) defects; second, dry etching It can be anisotropically etched, but the selectivity of dryness is lower than that of wet money. The development of the aforementioned technology is very rapid. In order to improve the problems of the etched technology, the U.S. Patent No. 6 '712 '983B2 proposes a technique using Reactive I〇n Etching (IE). Although technology 7 1360177 can greatly reduce the undercut phenomenon, but because it is also from the top to the bottom of the layer of money engraving, and the last time the Shi Xi base a lot of engraving work must use the horizontal 働 i skills Lai's _ _ technology furnace is too numb complicated, and multiple etching processes will pass through the MEMS structure, this MEMS structure in the implementation of a large number of side and horizontal butterfly ship capacity # will have fiber phenomenon ((four) hit cut) What is important is that the problem of exposure and affecting yield after the completion of the electromechanical structure process has not been improved.
重要的是，現今各種技術無法解決的問題在於，如何整合 相容微機電裝置_S)與半導體元件(例如：⑽s)，現今職 電技術的設計愈來愈精細，造成前航件之_後製程連接愈 來愈不谷^ ’後製程再連接的枝不但增加生產成本，而且在 不同衣私之中會有㈣、誤差、成本及殘留的各種挑戰出現； =問題在制技術内仍然無法解決，也是目前半導體微型結構 〜十、製造及封裝業界不斷尋得突破的關鍵點。 有鑑於斯’本㈣日狀乃經詳思細索，並積多年從事各種 織賴梅職f跡開發出一種 相= 機電裝置與半導體元件、聽微機電結構曝露的 相合+導體元件讀贿雜财其製造方法。 【發明内容】 8 1360177 雜在於提供—種相容半導體元件之微型懸 ’、缺方法，其整合姆微機钱置解導體元件在 同一衣程=完成，能有效簡化製程及降低成本。 構係14目的’本㈣之相料導體元件之_懸浮結 '、、4上方的絕緣相形成至少—半導體元件及至少 一微機電結構，該微機電結構包含彼此獨立的至少—微結構、 =相♦連接件與金屬電路，軸容連接件紐連接該半導 對^额機電結構，且該半導體元件與該微機電結構的相 夕基底之間切割隔離做電性絕緣，故相容連接件等同於前 衣程喊成了該铸體元件聽微機魏制相容連接； 猎此本發財效結合微機電結構與半導體元件，且大幅 少1C後製程的複雜性及成本。 ' 制2達成前述目的，本發明相容料體元件之微型懸浮結構 之製造方法是： 逐層钱刻步驟，逐層钱刻絕緣層内微機電結構；What is important is that the problems that cannot be solved by various technologies today are how to integrate compatible micro-electromechanical devices (S) and semiconductor components (for example, (10)s). The design of today's vocational power technology is becoming more and more refined, resulting in the former The process connection is getting worse and worse. 'The post-process reconnecting branch not only increases the production cost, but also has various challenges in the different clothing and private (4), error, cost and residue; = the problem still cannot be solved in the technology It is also the key point for the current semiconductor micro-structures~10, manufacturing and packaging industry to continuously find breakthroughs. In view of the fact that Si's (four) day shape has been meticulously detailed, and has been engaged in various kinds of weaving meimei's work for many years to develop a phase = electromechanical device and semiconductor components, listening to the micro-electromechanical structure exposed + conductor component reading bribe How to make it. SUMMARY OF THE INVENTION 8 1360177 Hybrid is to provide a micro-suspension method for a compatible semiconductor component, which integrates the micro-computer to disassemble the conductor component in the same clothing process = complete, which can effectively simplify the process and reduce the cost. The structure 14 is intended to have at least a semiconductor element and at least one microelectromechanical structure comprising at least a micro-electromechanical structure independent of each other. The connecting member is connected with the metal circuit, and the shaft-capable connecting member is connected to the semi-conductive mechanical structure, and the semiconductor device is electrically insulated from the phase separation substrate of the micro-electromechanical structure, so that the compatible connecting member Equivalent to the former clothing process shouted into the casting component to listen to the micro-machine Wei system compatible connection; hunting this financial effect combined with micro-electromechanical structure and semiconductor components, and significantly less complexity and cost of the 1C post-process. In order to achieve the foregoing object, the method for manufacturing the micro-suspended structure of the compatible material element of the present invention is as follows: a layer-by-layer etching step, engraving the microelectromechanical structure in the insulating layer;
矽基底第-次姓刻步驟，利用絕緣層的相對面進行第—A 姓刻，且第-她财姉應在織電結構財導體元件之^ 產生預設深度的切割空間； 石夕基底第二次侧步驟，在絕緣層的相對面進行第二次飯 刻，利用魏底第二次綱產生義浮空間與第—:欠侧的切 9 割空間相通，此時，該矽基底容許該微機電結構懸浮，且該微 機電結構與半導體元件下方的矽基底被分割絕緣，並利用絕緣 層内的相容連接件達成該微機電結構與該半導體元件的電性 連接。 本發明目的之二在於提供一種相容半導體元件之微型懸 浮結構製造方法，可有效避免不當侵蝕及結構殘留。 為達成前述目的，本發明之製造方法係於一矽基底上表面 形成至少一内具微機電結構的絕緣層，逐層蝕刻絕緣層内微機 電結構之後，在微機電結構上方罩設保護層，並且矽基底在絕 緣層的相對面進行蝕刻； 藉此，在矽基底蝕刻過程時，其根本不會影響絕緣層内的 微機電結構，而且該微機電結構在保護層罩蓋之下不會直接外 露於細m，故能受縣份的碰’有效避級機電結構不 當侵餘及曝露。 值得一提的是，本發明之微結構在微機電結構钱刻過程之 中，可以依設計朝矽基底蝕刻預設深度的保留空間，且在矽基 底第二次蝴步料，利时絲第二次侧產生的懸浮空間 與保留空m目通’此時，繩浮的微機電結構下方會隔離出相 對應的保留矽基底； 1360177 且 另該微機料設収彻 生的懸浮空間達成，但在該微機電結構内可以利=== 刻後產生内部局部微彡士槿自 ，.为蝕 應用領域及功效 仃⑼喊果，細增加本發明的 有=發:月為達成上述目的'所採用之高度技術思想、 舉-触可實_並配合料詳崎明 =明之目㈣崎颂.《，當可由之得_深入而具體 【實施方式】 請參閱第1至10圖之實施例，本發明相容料體元件之 相容半導體元件之微㈣浮結構製造方法之詳細說明如下； 如第1圖所示，首級-魏底1G上表面u形成内具微 機電結構21與半導體元件22的絕緣層2()，該微機電結制 包含彼此獨立的至少-微結構2U、至少一相容連接件212與 金屬電路213，該微結構211上方的金屬電路213邊緣較盆他 元件寬大’該相容連接件212電性連接在該半導體元件&與 11 1360177 該微機電結構21之間，並且在該微結構211的週側製作有金 屬插銷214 ; 前述矽基底10、絕緣層20、微結構211、金屬電路213 及金屬插銷214 #設計為習見標準半導體製造技術，相關之配 合細節在此不多做贅述。 如第2圖所示，該絕緣層20表面製作有一罩層3〇，該罩 層30表面外露’且罩層30相對應微機電結構21之預期爛 空間設有通孔31。 ★如第3圖所示，以最上層金屬電路213為姓刻抵擔層，接 著伙縣層3G的通孔31向下進行離子乾侧⑽），在絕缘 層2〇内會形成侧空間謝，由於綱空間謝僅到達最上 層金屬電路213邊緣，故_空間2Q1 *會到達内部微結構 21K微結構211受到絕緣層2〇包裹），故本發明的微機電結構 21不會曝露内部的微結構211或金屬電路213。 乐4圖所示，接著利用金 人印a a丨肝厂挪則取澧蝕刻將第一岸 盃屬電路213與金屬插銷214制、、心* 9 松產生局部懸浮空間 而達成該微機電結構21之部份微結構2ιι懸浮。 12 1360177 測深反麟子勤κ_)__空間 夕基底10 _，並且應用選擇比的設物 深度的保留空間101.，卫垃装收从+ ”―致 去除）。 域讀mwo絲（圖中尚未 一 wα衣面罩蓋一保護蓋40,葬The base-first-sequence engraving step uses the opposite side of the insulating layer to perform the first-A surname, and the first-her financial account should produce a predetermined depth of cutting space in the woven electrical structure of the conductor element; In the secondary side step, a second meal is performed on the opposite side of the insulating layer, and the second floating space of the Wei's bottom is used to communicate with the cut-cut space of the first: under-side, at which time the base is allowed to The microelectromechanical structure is suspended, and the microelectromechanical structure is separated from the germanium substrate under the semiconductor element, and the microelectromechanical structure is electrically connected to the semiconductor element by using a compatible connecting member in the insulating layer. Another object of the present invention is to provide a method for fabricating a micro-suspension structure compatible with a semiconductor element, which can effectively avoid improper erosion and structural residue. In order to achieve the foregoing objective, the manufacturing method of the present invention is to form at least one insulating layer having a microelectromechanical structure on the upper surface of a substrate, and after etching the microelectromechanical structure in the insulating layer layer by layer, a protective layer is disposed over the microelectromechanical structure. And the germanium substrate is etched on the opposite side of the insulating layer; thereby, during the etching process of the germanium substrate, it does not affect the microelectromechanical structure in the insulating layer at all, and the microelectromechanical structure is not directly under the protective layer cover Exposed to the fine m, it can be affected by the county's effective 'avoidance of the electromechanical structure improperly invaded and exposed. It is worth mentioning that the microstructure of the present invention can etch a predetermined depth of the ruthenium substrate in accordance with the design of the MEMS structure, and the second step of the ruthenium substrate, Lishisi The suspended space generated by the secondary side is separated from the reserved space. At this time, the corresponding 矽 substrate is isolated under the gyro-hydro-mechanical structure of the rope float; 1360177 and another micro-machine material is provided for the complete suspension space, but In the micro-electromechanical structure, the internal micro-small gem can be generated after the engraving ===, and the application field and the effect of the eclipse (9) are screamed, and the invention is added with a slight increase: the month is to achieve the above purpose. Adopting the high-tech idea, the touch-and-touch is _ and the materials are detailed, the details are clear, the head of the Ming (four) is rugged. "When it can be obtained _ deep and specific [implementation] Please refer to the embodiment of Figures 1 to 10, The detailed description of the micro (four) floating structure manufacturing method of the compatible semiconductor element of the compatible material element of the present invention is as follows; as shown in FIG. 1, the upper surface of the first-weidi 1G surface is formed with the microelectromechanical structure 21 and the semiconductor element 22 insulation layer 2 (), the micro-electromechanical The at least one microstructure 2U, the at least one compatible connector 212 and the metal circuit 213 are independent of each other, and the edge of the metal circuit 213 above the microstructure 211 is wider than the pot element. The compatible connector 212 is electrically connected to the semiconductor. A metal plug 214 is formed between the component & and 11 1360177, and a peripheral side of the microstructure 211 is formed; the germanium substrate 10, the insulating layer 20, the microstructure 211, the metal circuit 213, and the metal plug 214 # Designed to meet standard semiconductor manufacturing technology, the relevant details of the cooperation will not be repeated here. As shown in Fig. 2, a surface of the insulating layer 20 is formed with a cap layer 3, the surface of the cap layer 30 is exposed, and the cap layer 30 is provided with a through hole 31 corresponding to the expected rotten space of the microelectromechanical structure 21. ★ As shown in Fig. 3, the uppermost metal circuit 213 is used as the surname layer, and then the through hole 31 of the 3D layer of the gangxian layer is down to the ion dry side (10), and a side space is formed in the insulating layer 2〇. Since the space space only reaches the edge of the uppermost metal circuit 213, the _space 2Q1* will reach the inner microstructure 21K and the microstructure 211 is wrapped by the insulating layer 2), so the microelectromechanical structure 21 of the present invention does not expose the internal micro Structure 211 or metal circuit 213. As shown in the music diagram 4, the micro-electromechanical structure 21 is achieved by using the gold man-printing aa 丨 丨 丨 则 澧 澧 澧 第一 第一 第一 第一 第一 第一 第一 第一 第一 、 、 、 、 、 、 产生 产生 产生 产生 产生 产生 产生 产生 产生 产生 产生 产生Part of the microstructure 2 ιι suspended. 12 1360177 Sounding anti-Linzi κ ____ space 夕 base 10 _, and the application of the choice of the depth of the design of the depth of the space 101., the waste collection from + "- to remove". Field read mwo silk (in the figure Not yet a wα clothing cover cover a protective cover 40, buried
保護盍4_内部懸浮的微結構211及其他微機電結構f 至此’本發明的微機電結構21獲得充份的保護，不會内 部的微結構211或金屬電路213造成污染。 此步驟之保護蓋40為選擇性設計，並非本發明必備之唯 一實施技術。 乍 第7圖所不，攸石夕基底1〇的底面12製作罩層，並 ^該罩層5〇上製作開口 51，該開口 51相對應朝向該微機電 結構21與半導體元件22之間，利綠51朝向絲底10進 仃冰反應離子敍刻（_)，並且應用選擇比的設計敍刻出具一 致深度的切割空間102。 如第8圓所示，將罩層50去除，再於底面旋佈一罩声犯， 柄目對應該微機電結觀的罩層52 (切割空間ι〇2而圍繞的 範圍及切割空間102邊緣）。 1360177 如第9圖所示，最後，從矽基底ι〇的底面12已去除罩層 52的部位進行深反應離子蝕刻（DRIE)，並且含蓋切割空間1〇2 一併蝕刻，此時，應用選擇比的設計蝕刻出一懸浮空間1〇3， 由於切割空間102同樣會被餘刻出一致懸浮空間的深度， 故本發明控制選擇比讓切割空間102到達絕緣層2〇表面，進 而令矽基底10第二次蝕刻產生的懸浮空間1〇3與第一次蝕刻 的切割空間102及前述保留空間1Q1相通，此時，其餘微機電 結構21的微結構211達成懸浮，且該矽基底1〇被分隔而使該 微機電結構21與半導體元件22絕緣，並利用絕緣層2〇内的 相容連接件212達成該微機電結構21與該半導體元件烈的電 性連接； 以上所述即為本發明的製造方法詳細說明，其中諸多單一 技術屬習用（例如：罩層、姓刻），但是本發明之順序、步驟及 蝕刻之技巧全然不同，故確具充份之可專利性。 本發明的特徵結構，請參閱第9、10圖，實施例相容半導體 元件之Μ型懸浮結構，說明如下； 本實施例結構特徵處在於： 至少一石夕基底10 ’其下方蝕刻（DRΙΕ)應用選擇比製作出懸 浮工間1G3’且於懸浮空間⑽的内壁凹陷钱刻出切割空間 14 1360177 102，該矽基底10的懸浮空間1〇3與切割空間1〇2相通； 至少一絕緣層20，設置在矽基底1〇上，而該矽基底1〇 的切割空間102到達絕緣層2〇表面，另絕緣層2〇内具微機電 結構21與半導體元件22,該微機電結構21包含彼此獨立的至 少一微結構211、至少一相容連接件212，且切割空間1〇2相 對應該微機電結構21與半導體元件22之間，其令矽基底1〇 被分隔而使該微機電結構21與半導體元件22絕緣，而該相容 連接件212電性連接在該半導體元件22與該微機電結構21之 間；該微機電結構21的微結構211利用該矽基底1〇之懸浮空 間103達成懸浮。 前述相容半導體元件之微型懸浮結構之中，在該絕緣層 20可以在表面罩蓋-保護蓋40，藉此保護蓋4〇保護内部懸浮 的微結構211及其他微機電結構21 ;至此，本發明的微機電 結構21獲得充份的保護，不會曝露内部的微結構21 ^。 藉剞述相容半導體元件之微型懸浮結構及其製造方法本 發明產生的效果在於： 1.其能降低微機電曝露、降低損傷機率 '有效避免側蝕， 微機電結構21受到絕緣層20包裹，根本不會曝露，故本發明 能夠防止钱_的損害，並讓微機電結構21根本不被曝露， 15 1360177 有效增加產品良率。 —2.綠的保護：其絕緣層2()表面也製作—保護蓋4〇， 稭此保護i 40保護内部懸浮的微結構211及其他微機電結構 2=;至此’本發明的微機電結構21獲得充份的保護，不會曝 路内部的微結構211或金屬電路213造成污染。 3.同h製作微機電裝置(MEMS)與半導體元件：該石夕基底 1〇被分隔而使該微機電結構21與半導體元件22絕緣，並利 用、”巴緣層2G内的相容連接件212達成該微機電結構21與該半 導體元件22的電性連接；故本發明可以直接在IC前製程同時 製作出微機電裝置_S)與轉體元件(例如：G喝，且彼此 相容而電性連接精確。 綜上所述’本案之創新設計係於矽基底上方的絕緣層内形 成至少-半導體元件及至少—微機電結構’該微機電結構包含 彼此獨立的至少—微結構、至少—相容連接件與金屬電路，該 相容連接件電性連接該半導體元件與該微機電結構； 而前述矽基底藉由第一次蝕刻產生的切割空間，再利用矽 基底第二次蝕刻產生的懸浮空間與切割空間相通，此時，該矽 基底容許該微機電結構懸浮且與半導體元件絕緣，並利用絕緣 層内的相容連接件達成該微機電結構與該半導體元件的電性 連接； 16 1360177 藉此本發财效結合職電結構財導體元㈣製程，有 效簡化製程騎低縣，且觀微機魏構不#錢及曝露； 所以本毛明< 具有產業之可利用性』應已毋庸置疑，除 此之外’在本案實施綱揭㈣邮徵赫，於申請之前並未 曾見於削物，絲曾被公開使用，柿具杨上所述功效增 進之事實，更具有何輕忽_加功效，是故，本發明的『新 穎性』以及『進步性』都已符合專利法規，爰依法提出發明專 利之申請，祈請惠作查並早日賜料利，實感德便。 17 1360177 【圖式簡單說明】 第1圖至第9圖 本發明方法步驟進程示意說明圖 第10圖 本發明結構示意圖。 【主要元件符號說明】 矽基底10 保留空間101 切割空間102 懸浮空間103 上表面11 底面12 絕緣層20 局部懸浮空間202 微機電結構21 蝕刻空間201 微結構211 相容連接件212 金屬電路213 半導體元件22 金屬插銷214 罩層30 保護蓋40 通孔31 罩層50 罩層52 開口 51 18The protective structure 4_ internal suspended microstructure 211 and other microelectromechanical structures f to this point the microelectromechanical structure 21 of the present invention is sufficiently protected from contamination by the internal microstructure 211 or the metal circuit 213. The protective cover 40 of this step is an optional design and is not the only implementation technique necessary for the present invention. In the seventh figure, a cover layer is formed on the bottom surface 12 of the base of the 攸 夕 ,, and an opening 51 is formed on the cover layer 5, and the opening 51 corresponds to the microelectromechanical structure 21 and the semiconductor element 22, Li Green 51 enters the ice-reaction ion characterization (_) toward the silk bottom 10, and the design of the selection ratio is used to scribe a cutting space 102 having a uniform depth. As shown in the 8th circle, the cover layer 50 is removed, and then a cover is placed on the bottom surface. The handle corresponds to the cover layer 52 of the microelectromechanical view (the area surrounded by the cutting space ι 2 and the edge of the cut space 102) ). 1360177 As shown in Fig. 9, finally, deep reactive ion etching (DRIE) is performed from the portion of the bottom surface 12 of the crucible substrate ι from which the cap layer 52 has been removed, and the lid-containing cutting space 1 〇 2 is etched together. The design of the selection ratio etches a floating space 1〇3. Since the cutting space 102 is also left to the depth of the uniform floating space, the present invention controls the selection ratio to allow the cutting space 102 to reach the surface of the insulating layer 2, thereby making the substrate The floating space 1〇3 generated by the second etching is in communication with the first etching etching space 102 and the aforementioned reserved space 1Q1. At this time, the microstructure 211 of the remaining microelectromechanical structure 21 is suspended, and the germanium substrate 1 is Separating the microelectromechanical structure 21 from the semiconductor element 22, and using the compatible connecting member 212 in the insulating layer 2 to achieve a strong electrical connection between the microelectromechanical structure 21 and the semiconductor element; The manufacturing method is described in detail, in which many single technologies are used (eg, cover layer, surname), but the sequence, steps and etching techniques of the present invention are completely different, so it is fully patentable. Sex. For the characteristic structure of the present invention, please refer to FIGS. 9 and 10, the Μ-type suspension structure of the compatible semiconductor device of the embodiment is described as follows; the structural feature of the embodiment is: at least one lithography substrate 10' underlying etching (DRΙΕ) application The cutting space 14 1360177 102 is selected to be recessed than the inner wall of the suspension space (10), and the floating space 1〇3 of the crucible substrate 10 communicates with the cutting space 1〇2; at least one insulating layer 20, It is disposed on the crucible substrate 1 , and the cutting space 102 of the crucible substrate 1A reaches the surface of the insulating layer 2 , and the insulating layer 2 has a microelectromechanical structure 21 and a semiconductor element 22 , and the microelectromechanical structure 21 includes independent of each other. At least one microstructure 211, at least one compatible connector 212, and the cutting space 1〇2 corresponds to between the microelectromechanical structure 21 and the semiconductor element 22, which separates the germanium substrate 1 to make the microelectromechanical structure 21 and the semiconductor The component 22 is insulated, and the compatible connector 212 is electrically connected between the semiconductor component 22 and the microelectromechanical structure 21; the microstructure 211 of the microelectromechanical structure 21 utilizes the floating space 103 of the substrate 1 As a suspension. In the micro-suspended structure of the foregoing compatible semiconductor element, the insulating layer 20 may be covered on the surface cover-protective cover 40, thereby protecting the inner suspended microstructure 211 and other micro-electromechanical structures 21 by protecting the cover 4; The inventive microelectromechanical structure 21 is sufficiently protected from exposure to the internal microstructures 21 ^. The micro-suspended structure of the compatible semiconductor component and the manufacturing method thereof have the following effects: 1. The utility model can reduce the micro-electromechanical exposure and reduce the probability of damage, effectively avoiding the side etching, and the micro-electromechanical structure 21 is wrapped by the insulating layer 20. It is not exposed at all, so the invention can prevent the damage of the money, and the micro-electromechanical structure 21 is not exposed at all, 15 1360177 effectively increases the product yield. - 2. Green protection: the surface of the insulating layer 2 () is also made - protective cover 4 〇, this protection i 40 protects the internal suspended microstructure 211 and other micro-electromechanical structures 2 =; thus the 'micro-electromechanical structure of the present invention 21 is fully protected and does not expose the internal microstructure 211 or metal circuit 213 to cause contamination. 3. Producing a microelectromechanical device (MEMS) and a semiconductor device in the same manner: the stone substrate 1 is separated to insulate the microelectromechanical structure 21 from the semiconductor device 22, and utilizes a compatible connector in the edge layer 2G. The electrical connection between the microelectromechanical structure 21 and the semiconductor component 22 is achieved. Therefore, the present invention can simultaneously fabricate the microelectromechanical device_S) and the rotating component (for example, G drink, and are compatible with each other directly in the IC pre-process). The electrical connection is precise. In summary, the innovative design of the present invention forms at least a semiconductor component and at least a microelectromechanical structure in an insulating layer above the germanium substrate. The microelectromechanical structure comprises at least a micro-structure, at least - independent of each other. a compatible connector and a metal circuit, the compatible connector electrically connecting the semiconductor component and the microelectromechanical structure; and the germanium substrate is formed by a second etching of the germanium substrate by a first etching process The suspension space is in communication with the cutting space. At this time, the germanium substrate allows the microelectromechanical structure to be suspended and insulated from the semiconductor element, and the microelectromechanical structure is achieved by using a compatible connecting member in the insulating layer. The electrical connection of the semiconductor component; 16 1360177 By means of the present financial effect combined with the occupational structure structure of the conductor element (four) process, effectively simplifying the process of riding the low county, and the micro-computer Wei Wei does not #钱 and exposure; therefore Ben Maoming < There is no doubt about the availability of the industry. In addition to this, in the implementation of this case (4), the levy of the levy was not seen before the application, and the silk was used publicly. The fact that there is even more negligence _ plus effect, therefore, the "novelty" and "progressiveness" of the present invention have been in compliance with the patent regulations, and the application for invention patents has been filed according to law, praying for consideration and early delivery. 17 1360177 [Simple description of the drawings] Fig. 1 to Fig. 9 shows the process steps of the method of the present invention. Fig. 10 is a schematic view showing the structure of the present invention. [Description of main components] 矽 substrate 10 reserved space 101 cutting space 102 Suspension space 103 Upper surface 11 Bottom surface 12 Insulation layer 20 Partially suspended space 202 Microelectromechanical structure 21 Etched space 201 Microstructure 211 Compatible connector 212 Metal circuit 213 Semiconductor 214 metallic latch member 22 cover 40 cap layer 30 through holes 31 cover layer 52 cover layer 50 opening 5118