TW201234543A - Glass-embedded silicon substrate and method for manufacturing same - Google Patents

Glass-embedded silicon substrate and method for manufacturing same Download PDF

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TW201234543A
TW201234543A TW101102667A TW101102667A TW201234543A TW 201234543 A TW201234543 A TW 201234543A TW 101102667 A TW101102667 A TW 101102667A TW 101102667 A TW101102667 A TW 101102667A TW 201234543 A TW201234543 A TW 201234543A
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substrate
glass
glass material
embedding
heating
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TW101102667A
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Chinese (zh)
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Shin Okumura
Takumi Taura
Tomohiro Nakatani
Ryo Tomoida
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Panasonic Corp
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00349—Creating layers of material on a substrate
    • B81C1/00365—Creating layers of material on a substrate having low tensile stress between layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P15/00—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P15/00—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
    • G01P15/02—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
    • G01P15/08—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
    • G01P15/125—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values by capacitive pick-up
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/146—Mixed devices
    • H01L2924/1461—MEMS

Abstract

A method for manufacturing a glass-embedded silicon substrate, the method comprising: a step for forming a recess (11) in a silicon substrate (10); a step for filling the recess (11) with a glass material (20a) in the form of a powder, a paste, or a precursor solution; a step for heating and softening the glass material (20a); a step for sintering the softened glass material (20a); and a step for exposing the glass material (20a) and the silicon substrate (10) on the front and back surfaces of the silicon substrate (10) where the recess (11) is filled with the glass material (20a).

Description

201234543 六、發明說明 【發明所屬之技術領域】 本發明係關於在矽基板本體的內部被配置玻璃之埋入 玻璃之矽基板及其製造方法。 【先前技術】 從前，就製造具有細微構造的玻璃基板的目的而言， 例如記載於專利文獻1的技術係屬已知。 在被記載於此專利文獻1的玻璃材料所構成的平坦基 板的製造方法，首先，於平坦的矽基板的表面形成低窪， 於平坦的玻璃基板上重疊被形成矽基板的低窪之面。接 著，藉由加熱玻璃基板，使玻璃基板的一部分埋入此低窪 之中。之後，使玻璃基板再固化，硏磨平坦基板的表背 面，除去矽。 [先前技術文獻] [專利文獻] [專利文獻1]日本特許第4480939號公報 【發明內容】 [發明所欲解決之課題] 在記載於專利文獻1的製造方法，藉由加熱玻璃基扳 使其軟化，把此軟化玻璃埋入矽基板之低窪。然而，軟化 玻璃的黏度非常高，所以必須要長時間的燒結製程，此 外，在此製程必須要以高溫施加荷重。進而，無法往狹窄 -5- 201234543 空間埋入軟化玻璃。 本發明是爲了解決前述課題而完成之發明，目的在於_ 提供既爲簡便的方法而且容易往狹窄間隔埋入玻璃的埋人 玻璃之矽基板及其製造方法。 [供解決課題之手段] 本發明’係一種埋入玻璃之矽基板之製造方法，其特 徵爲具備：於砂基板形成凹部的步驟、於前述凹部塡充粉 末狀、糊狀或者即驅體溶液之玻璃材料的步驟、加熱前述 玻璃材料使其軟化的步驟、燒結使軟化的前述玻璃材料的 步驟、在前述凹部被塡充前述玻璃材料的前述矽基板的表 背面使前述玻璃材料與前述矽基板露出的步驟。 此外，在形成前述凹部的步驟，亦可以使前述矽基板 的兩端變薄的方式形成前述凹部，於前述變薄的部分重鹽 玻璃基板或LTCC基板。 此外’在形成前述凹部的步驟，亦可以使前述矽基板 的兩端變薄的方式形成前述凹部，於前述變薄的部分重疊 高電阻矽基板。 此外’塡充前述玻璃材料的步驟亦可在真空氛圍下進 行。 此外’加熱使前述玻璃材料軟化的步驟，在初期亦可 在真空氛圍下進行。 此外’加熱使前述玻璃材料軟化的步驟的初期，亦可 是開始加熱起算直到開始出現空孔爲止的期間。201234543 SUMMARY OF THE INVENTION [Technical Field] The present invention relates to a ruthenium substrate in which glass is embedded in a ruthenium substrate body and a method of manufacturing the same. [Prior Art] For the purpose of producing a glass substrate having a fine structure, for example, the technique described in Patent Document 1 is known. In the method for producing a flat substrate comprising the glass material described in Patent Document 1, first, a low 洼 is formed on the surface of the flat ruthenium substrate, and a low-lying surface on which the ruthenium substrate is formed is superposed on the flat glass substrate. Then, by heating the glass substrate, a part of the glass substrate is buried in the low side. Thereafter, the glass substrate was re-solidified, and the front and back surfaces of the flat substrate were honed to remove flaws. [PRIOR ART DOCUMENT] [Patent Document 1] Japanese Patent No. 4480939 [Draft of the Invention] [Problems to be Solved by the Invention] In the manufacturing method described in Patent Document 1, the glass substrate is heated to be used. Softening, the softened glass is buried in the lower side of the crucible substrate. However, the softened glass has a very high viscosity, so a long-term sintering process is required, and in this process, the load must be applied at a high temperature. Furthermore, it is not possible to embed softened glass into the narrow space -5 - 201234543. The present invention has been made to solve the above problems, and an object of the invention is to provide a substrate for burying a glass which is a simple method and which is easy to embed glass in a narrow space, and a method for producing the same. [Means for Solving the Problem] The present invention relates to a method for producing a substrate in which a glass is embedded, characterized in that it comprises a step of forming a concave portion on a sand substrate, and filling the concave portion with a powder, a paste or a body solution a step of heating the glass material to soften the glass material, a step of sintering the softened glass material, and a front surface of the tantalum substrate on which the concave portion is filled with the glass material to form the glass material and the tantalum substrate The steps that are exposed. Further, in the step of forming the concave portion, the concave portion may be formed to be thinner at both ends of the tantalum substrate, and the thinned portion of the heavy-salt glass substrate or the LTCC substrate may be formed. Further, in the step of forming the concave portion, the concave portion may be formed such that both ends of the tantalum substrate are thinned, and the high-resistance tantalum substrate is superposed on the thinned portion. Further, the step of filling the aforementioned glass material can also be carried out under a vacuum atmosphere. Further, the step of softening the glass material by heating can be carried out in a vacuum atmosphere at an initial stage. Further, the initial stage of the step of softening the glass material by heating may be a period from the start of heating until the start of the occurrence of voids.

S -6- 201234543 此外，加熱使前述玻璃材料軟化的步驟，在末期亦可 是在比大氣壓更高壓的氛圍下進行的。 此外，加熱使前述玻璃材料軟化的步驟的末期，亦可 是開始出現空孔起算直到空孔完全形成爲止的期間。 本發明係特徵爲於矽基板的內部埋入玻璃，其兩端爲 高電阻矽之埋入玻璃的矽基扳。 [發明之效果] 根據本發明，可以提供既爲簡便的方法同時也容易地 往狹窄間隔埋入玻璃的埋入玻璃之矽基板及其製造方法》 【實施方式】 以下，參照圖面詳細說明本發明之實施型態。以下， 作爲靜電電容式感測器，以加速度感測器爲例。此外，把 被形成錘部之可動電極之側定義爲矽基板的表面側。接 著，矽基板的短邊方向作爲X方向，矽基板的長邊方向 作爲Y方向，砂基板的厚度方向作爲Z方向而進行說 明。 此外，在以下之複數實施型態，包含同樣的構成要 素。因而，在以下，對同樣的構成要素賦予共通的符號， 省略重複的說明。 〔第1實施形態〕 相關於本實施型態的半導體裝置1，如圖1 (a)及圖 201234543 1(b)所示，具備作爲MEMS裝置之一例的加速度感測晶片 (半導體元件）A，與被形成處理由加速度感測晶片A輸出 的訊號之訊號處理電路的控制1C晶片B。此外，半導體 裝置1具備表面實裝型的封裝101，於此封裝1〇1，收容 著加速度感測晶片A及控制1C晶片B。 封裝101，具備：位於圖1(b)之上面的一面被開放之 箱形形狀的塑膠封裝本體102,及閉塞封裝101之被開放 的一面的封裝塞（蓋）1〇3。此外，塑膠封裝本體102，具備 被導電連接於加速度感測晶片A與控制1C晶片B的複數 導線1 1 2。 各導線112，具備由塑膠封裝本體102之外側面被導 出的外側導線112b，及由塑膠封裝本體102的內側面導 出的內側導線1 12a。 各內側導線1 1 2a，通過焊接線W被導電連接於控制 1C晶片B具備之各焊墊。 加速度感測晶片A，藉由被配置在對根據加速度感測 晶片A的外周形狀規定的假想三角形之3個頂點所對應 的3處所之黏接部104，固接於位在塑膠封裝本體102的 底部之搭載面l〇2a。此黏接部104，係以連續於塑膠封裝 本體102而一體突起設置的圓錐台形狀的突起部，與覆蓋 該突起部的黏接劑來構成。作爲黏接劑，例如可以使用彈 性率在1 MPa以下的矽樹脂等之矽系樹脂。S -6- 201234543 In addition, the step of softening the aforementioned glass material by heating may be carried out in an atmosphere at a higher pressure than atmospheric pressure at the end. Further, the end of the step of softening the glass material by heating may be a period from the start of the occurrence of the void until the void is completely formed. The invention is characterized in that the glass is embedded in the interior of the crucible substrate, and the two ends of the crucible are high-resistance crucibles. [Effects of the Invention] According to the present invention, it is possible to provide a substrate for embedding a glass which is easy to embed a glass at a narrow interval, and a method for producing the same. [Embodiment] Hereinafter, the present invention will be described in detail with reference to the drawings. An embodiment of the invention. Hereinafter, as the capacitance type sensor, an acceleration sensor is taken as an example. Further, the side of the movable electrode on which the weight portion is formed is defined as the surface side of the crucible substrate. Next, the short side direction of the ruthenium substrate is referred to as the X direction, the long side direction of the ruthenium substrate is referred to as the Y direction, and the thickness direction of the sand substrate is referred to as the Z direction. Further, in the following plural embodiments, the same constituent elements are included. Therefore, the same components are denoted by the same reference numerals, and the overlapping description will be omitted. [First Embodiment] The semiconductor device 1 of the present embodiment includes an acceleration sensing wafer (semiconductor element) A as an example of a MEMS device, as shown in Fig. 1 (a) and 201234543 (b). The 1C wafer B is controlled with a signal processing circuit formed to process the signal output by the acceleration sensing wafer A. Further, the semiconductor device 1 includes a surface mount package 101 in which the acceleration sensing wafer A and the control 1C wafer B are housed. The package 101 includes a box-shaped plastic package body 102 whose upper surface is opened on the upper side of Fig. 1(b), and a package plug (cover) 1〇3 which closes the open side of the package 101. Further, the plastic package body 102 is provided with a plurality of wires 1 1 2 electrically connected to the acceleration sensing wafer A and the control 1C wafer B. Each of the wires 112 includes an outer lead 112b that is led out from the outer side of the plastic package body 102, and an inner lead 112a that is led out from the inner side of the plastic package body 102. Each of the inner leads 1 1 2a is electrically connected to each of the pads included in the control 1C wafer B via a bonding wire W. The acceleration sensing wafer A is fixed to the plastic package body 102 by the bonding portion 104 disposed at three locations corresponding to the three vertices of the imaginary triangle defined by the outer peripheral shape of the acceleration sensing wafer A. The bottom mounting surface l〇2a. The adhesive portion 104 is formed by a truncated cone-shaped projection that is integrally formed in a continuous manner over the plastic package body 102, and an adhesive that covers the projection. As the binder, for example, a fluorene-based resin such as an anthracene resin having an elastic modulus of 1 MPa or less can be used.

此處，加速度感測晶片A具備的所有焊墊，於對向 於塑膠封裝本體1 〇2的開放的一面之加速度感測晶片AHere, all the pads provided in the acceleration sensing wafer A are sensed by the acceleration sensing wafer A on the open side facing the plastic package body 1 〇2.

S -8- 201234543 的主面，沿著此主面的1邊配置。黏接部1 0 4位於此1邊 之兩端的2處所與平行於該1邊的邊之1處所（例如，中 央部）等3處所具有頂點的假想三角形之各頂點。藉此， 可以安定地於各焊墊焊接上焊接線W。又，關於黏接部 104的位置，在平行於前述1邊的邊之1處所，不限於中 央部，例如，於兩端之一方亦可，而中央部可以更安定地 支撐加速度感測晶片A，同時安定地把焊接線w焊接於 各焊墊。 控制IC晶片B ’係由單晶矽等所構成的半導體基板 上形成的複數半導體元件、連接這些的配線，及保護半導 體元件或配線不受外部環境干擾的鈍化膜所構成的半導體 晶片。接著’控制1C晶片B的背面全體藉由矽系樹脂被 固接於塑膠封裝本體1 02的底面。被形成於控制ic晶片 B上的訊號處理電路，只要因應於加速度感測晶片a的功 能而適當設計即可，只要能與加速度感測晶片A協同工 作即可。例如，控制1C晶片B可以形成爲ASIC (Application Specific 1C)。 要製造圖1之半導體裝置，首先進行把加速度感測晶 片A及控制1C晶片C固接於塑膠封裝本體102的晶粒黏 著（die bonding)步驟。接著，在加速度感測晶片A與控制 1C晶片B之間，控制1C晶片B與內側導線1 1 2a之間， 分別進行透過焊接線W導電連接的導線焊接步驟。其 後，進行形成樹脂覆蓋部116之樹脂覆蓋部形成步驟，接 著，把封裝蓋（蓋）103的外周，接合於塑膠封裝本體102 -9 - 201234543 的密封步驟。藉此’塑膠封裝本體102的內部以氣密狀體 密封住。又，在封裝蓋103的適當部位’藉由雷射標記技 術，形成顯示製品名稱或製造日時等之標記113 ° 又，控制1C晶片B爲使用1枚矽基板形成的，而加 速度感測晶片A ’使用被層積之複數基板來形成。因而’ 加速度感測晶片A的厚度與控制1C晶片B的厚度相比是 比較厚的，所以於塑膠封裝本體102的底部使搭載加速度 感測晶片A的搭載面1 〇2 a比控制IC晶片B的搭載部位 更爲低窪。亦即，針對塑膠封裝本體102的底面，搭載加 速度感測晶片A的部位的厚度與其他部位相比變得比較 薄。 進而，在本實施型態，使塑膠封裝本體102的外型爲 10mmx7mmx3mm之長方體。然而，這樣的外型及數値僅 爲一例，塑膠封裝本體102的外型，可以因應於加速度感 測晶片A或控制1C晶片B的外型、導線Π 2的數目或間 距等而適當設定。 作爲塑膠封裝本體102的材料，採用熱塑性樹脂的一 種，且氧及水蒸氣的透過率極低的液晶性聚酯（L C P)。但 是’不限於LCP，例如亦可採用聚苯硫醚（p〇lyphenylene sulfi_de)(PPS)，聚雙醯胺三氮唑（pbt)等。 此外’作爲各導線1 1 2的材料，亦即成爲各導線1 1 2 的基礎之導線架的材料，採用銅合金中彈簧性高的磷青 銅。此處’作爲導線架’使用材質爲磷青銅板厚爲〇 2mm 的導線架’藉由電解電鍍法形成厚度爲2μπ1〜4μιη之鎳The main surface of S -8- 201234543 is arranged along one side of this main surface. The adhesive portion 104 is located at two vertices of an imaginary triangle having vertices at three positions on both sides of the one side and one side (for example, the center portion) parallel to the one side of the one side. Thereby, the weld line W can be welded to each of the pads in a stable manner. Further, the position of the adhesive portion 104 is not limited to the central portion at one side parallel to the one side, and may be, for example, one of the both ends, and the central portion may more stably support the acceleration sensing wafer A. At the same time, the welding wire w is welded to each of the pads in a stable manner. The control IC wafer B' is a semiconductor wafer composed of a plurality of semiconductor elements formed on a semiconductor substrate made of a single crystal germanium or the like, a wiring connecting these, and a passivation film for protecting the semiconductor element or the wiring from the external environment. Next, the entire back surface of the control 1C wafer B is fixed to the bottom surface of the plastic package body 102 by a silicone resin. The signal processing circuit formed on the control ic wafer B may be appropriately designed in accordance with the function of the acceleration sensing wafer a, as long as it can cooperate with the acceleration sensing wafer A. For example, the control 1C wafer B can be formed as an ASIC (Application Specific 1C). To fabricate the semiconductor device of Fig. 1, first, a die bonding step of fixing the acceleration sensing wafer A and the control 1C wafer C to the plastic package body 102 is performed. Next, between the acceleration sensing wafer A and the control 1C wafer B, a wire bonding step of electrically connecting the 1C wafer B and the inner wiring 1 1 2a through the bonding wire W is controlled. Thereafter, a resin covering portion forming step of forming the resin covering portion 116 is performed, and then the outer periphery of the package lid (cover) 103 is bonded to the sealing step of the plastic package body 102 -9 - 201234543. Thereby, the inside of the plastic package body 102 is hermetically sealed. Further, in the appropriate portion of the package lid 103, a mark 113 ° such as a display product name or a manufacturing date is formed by a laser marking technique, and the 1C wafer B is controlled to be formed using one germanium substrate, and the acceleration sensing wafer A is formed. 'Formed using a plurality of laminated substrates. Therefore, the thickness of the acceleration sensing wafer A is relatively thicker than the thickness of the control 1C wafer B. Therefore, the mounting surface 1 〇 2 a of the acceleration sensing wafer A is mounted on the bottom of the plastic package body 102 than the control IC wafer B. The mounting position is even lower. That is, the thickness of the portion on which the acceleration sensing wafer A is mounted on the bottom surface of the plastic package body 102 becomes thinner than other portions. Further, in the present embodiment, the outer shape of the plastic package body 102 is a rectangular parallelepiped of 10 mm x 7 mm x 3 mm. However, such an outer shape and number are merely examples, and the outer shape of the plastic package body 102 can be appropriately set in accordance with the shape of the acceleration sensing wafer A or the control 1C wafer B, the number or spacing of the wire turns 2, and the like. As the material of the plastic package body 102, a liquid crystalline polyester (L C P) having a very low transmittance of oxygen and water vapor is used. However, it is not limited to LCP, and for example, p〇lyphenylene sulfi_de (PPS), polybisguanamine triazole (pbt), or the like can be used. Further, as the material of each of the wires 1 12, that is, the material of the lead frame which is the basis of each of the wires 1 1 2, a phosphor bronze having a high spring property in a copper alloy is used. Here, as the lead frame, a lead frame made of phosphor bronze plate having a thickness of 〇 2 mm is used, and nickel having a thickness of 2 μπ 1 to 4 μm is formed by electrolytic plating.

S -10- 201234543 膜，厚度爲〇·2μιη〜0.3μιη之金膜之層積膜所構成的電鍍 膜。藉此，可以兼顧焊接線接合的接合可信賴性與焊接可 信賴性。此外，熱塑性樹脂成形品的塑膠封裝本體102, 與導線1 1 2同時被形成爲一體。但是，藉由熱塑性樹脂之 LCP形成的塑膠封裝本體102與導線112之金膜密接性很 低。亦即，藉由在前述之導線架之中被埋設塑膠封裝本體 1 02的部位設置穿孔穴防止各導線1 1 2鬆脫。 此外，圖1之半導體裝置，設置覆蓋內側導線1 1 2a 的露出部位及其周圍的樹脂覆蓋部116。樹脂覆蓋部 1 1 6，例如由胺系環氧樹脂等環氧系樹脂等之非透濕性樹 脂所構成。在導線焊接步驟後，使用分配器塗佈此非透濕 性的樹脂，藉由使其硬化而提高精密性。又，替代此非透 濕性樹脂而使用陶瓷亦可，使用陶瓷的場合，只要用電漿 熔射等技術局部噴吹即可。 此外，作爲焊接線，使用與鋁線相比耐腐蝕性高的金 線。此外，採用直徑25 μπι的金線，但不以此爲限，例 如，只要由直徑20 μιη〜5 Ομιη之金線來選出適當者即可。 其次，說明加速度感測晶片Α之槪略構成。加速度 感測晶片A，爲靜電電容型之加速度感測晶片，具備：使 用SOI絕緣層上覆矽（Silicon On Insulator)基板10形成的 感測器本體1，與使用玻璃基板20形成的第1固定基板 2 >與使用玻璃基板30形成的第2固定基板3。第1固定 基板2，被固接於感測器本體1之一表面側（圖2或圖3 之上面側），第2固定基板3，被固接於感測器本體1之 -11 - 201234543 另一表面側（圖2或圖3之下面側）》第1及第2固定基板 2，3被形成爲與感測器本體1相同的尺寸。 又，圖2顯示感測器本體1'第1固定基板2及第2 固定基板3之分別的構成，顯示感測器本體1、第1固定 基板2及第2固定基板3分離的狀態。此外，感測器本體 1，不限於SOI基板1〇，例如亦可使用不具備絕緣層的通 常的矽基板來形成。此外，第1及第2固定基板2，3, 分別被形成於矽基板及玻璃基板之哪一方皆無所謂。 感測器本體1，具備2個平面俯視爲矩形狀的開口窗 12沿著前述一表面倂設的框架部11，被配置於框架部11 的各開口窗1 2的內側之2個平面俯視爲矩形狀的測錘部 1 3，以及連接框架部1 1與測錘部1 3之間的一對支撐彈簧 部14。 2個平面俯視爲矩形狀的測錘部1 3，分別被配置爲離 開第1及第2固定基板2、3。於對向於第1固定基板2 的各測錘部1 3的主面上分別被配置可動電極1 5 A、1 5 B。 包圍測錘部13的周圍的框架部11的外周全體被接合於第 1及第2固定基板2、3。藉此，框架部11與第1及第2 固定基板2、3，構成收容測錘部13及後述的固定子16 之晶片尺寸封裝。 —對支撐彈簧部14，係在框架部11之各開口窗12 的內側沿著通過測錘部1 3的重心之直線以夾住測錘部1 3 的形式被配置。各支撐彈簧部1 4，爲可以扭轉變形的扭 轉彈簧（扭轉簧），與框架部1 1及測錘部1 3相比被形成爲S -10- 201234543 A plating film composed of a film of a gold film having a thickness of 〇·2μιη to 0.3μιη. Thereby, it is possible to achieve both the joint reliability and the solder reliability of the bonding of the bonding wires. Further, the plastic package body 102 of the thermoplastic resin molded article is integrally formed with the wire 1 12 at the same time. However, the plastic package body 102 formed by the LCP of the thermoplastic resin has a low adhesion to the gold film of the wire 112. That is, by providing a hole in the portion of the lead frame in which the plastic package body 102 is embedded, the wires 1 1 2 are prevented from coming loose. Further, the semiconductor device of Fig. 1 is provided with a resin covering portion 116 covering the exposed portion of the inner lead 1 1 2a and its surroundings. The resin covering portion 1 16 is made of, for example, a non-permeable resin such as an epoxy resin such as an amine epoxy resin. After the wire bonding step, the moisture impermeable resin is applied using a dispenser to improve precision by hardening it. Further, ceramics may be used instead of the non-hygroscopic resin, and when ceramics are used, they may be partially sprayed by a technique such as plasma spraying. Further, as the weld line, a gold wire having higher corrosion resistance than the aluminum wire is used. In addition, a gold wire having a diameter of 25 μm is used, but not limited thereto. For example, a gold wire having a diameter of 20 μm to 5 Ομιη may be selected as appropriate. Next, a schematic configuration of the acceleration sensing wafer 说明 will be described. The acceleration sensing wafer A is an electrostatic capacitance type acceleration sensing wafer, and includes a sensor body 1 formed using a SOI insulating layer overlying silicon (Silicon On Insulator) substrate 10, and a first fixing formed using the glass substrate 20. The substrate 2 > and the second fixed substrate 3 formed using the glass substrate 30. The first fixed substrate 2 is fixed to one surface side of the sensor body 1 (on the upper side of FIG. 2 or FIG. 3), and the second fixed substrate 3 is fixed to the sensor body 1 -11 - 201234543 On the other surface side (the lower side of FIG. 2 or FIG. 3), the first and second fixed substrates 2, 3 are formed to have the same size as the sensor body 1. Further, Fig. 2 shows a configuration of each of the first fixed substrate 2 and the second fixed substrate 3 of the sensor body 1', and shows a state in which the sensor body 1, the first fixed substrate 2, and the second fixed substrate 3 are separated. Further, the sensor body 1 is not limited to the SOI substrate 1 , and may be formed, for example, by using a normal ruthenium substrate which does not have an insulating layer. Further, it does not matter whether the first and second fixed substrates 2, 3 are formed on either of the ruthenium substrate and the glass substrate. The sensor body 1 includes two frame portions 11 that are formed in a rectangular shape in plan view and are provided along the one surface, and are disposed in two planes on the inner side of each of the opening windows 1 of the frame portion 11 in plan view. A rectangular hammer portion 13 and a pair of support spring portions 14 between the frame portion 1 1 and the hammer portion 13 are connected. The two hammer portions 13 having a rectangular plan view in plan view are disposed apart from the first and second fixed substrates 2, 3, respectively. The movable electrodes 15 A and 15 B are disposed on the main surfaces of the respective hammer portions 13 facing the first fixed substrate 2, respectively. The entire outer circumference of the frame portion 11 surrounding the hammer portion 13 is joined to the first and second fixed substrates 2, 3. Thereby, the frame portion 11 and the first and second fixed substrates 2, 3 constitute a wafer-sized package in which the hammer portion 13 and the stator 16 to be described later are housed. The support spring portion 14 is disposed inside the opening window 12 of the frame portion 11 along a line passing through the center of gravity of the hammer portion 13 so as to sandwich the hammer portion 13. Each of the support spring portions 14 is a torsion spring (torsion spring) that can be torsionally deformed, and is formed as compared with the frame portion 1 1 and the hammer portion 13

S -12- 201234543 較薄，測錘部1 3，成爲可藉著對框架部1 1以一對支撐彈 簧部14的旋轉而位移。 感測器本體1之框架部11，分別連通於各開口窗12 的平面俯視矩形狀的窗孔17在與2個開口窗12並排設置 於相同方向。於各窗孔17的內側，分別有2個固定子16 沿著一對支撐彈簧部14的併設方向配置。 各固定子6與窗孔17的內周面之間，各固定子16與 測錘部13的外周面之間，以及相鄰的固定子16彼此之 間，分別被形成間隙，相互被獨立分離而被電氣絕緣。各 固定子16，分別被接合於第1及第2固定基板2、3。此 外，於感測器本體1的一表面側，於各固定子1 6上，例 如被形成由鋁-矽膜等金屬薄膜所構成的圓形狀的電極墊 1 8。此外，同樣地，於框架1 1相鄰的窗孔17之間的部 位，也例如被形成由鋁-矽膜等金屬薄膜所構成的圓形狀 的電極墊18。 被形成於各固定子16的各電極墊18，分別被導電連 接於後述的各固定電極25，被形成於框架部11的電極墊 18，被導電連接於可動電極15A及可動電極15B。以上所 說明的複數之電極墊1 8，沿著加速度感測晶片A的矩形 狀的外周形狀的1邊配置。 第1固定基板2，具備貫通第1固定基板2之第1主 面及與此對向的第2主面（重疊於感測器本體1之面）之間 的複數配線28，與被形成於第2主面上的複數固定電極 25 -13- 201234543 固定電極25Aa及固定電極25 Ab，成對而與可動電極 15A對向配置。同樣地，固定電極 25Ba及固定電極 2 5 Bb，成對而與可動電極15B對向配置。各固定電極 25，例如由鋁-矽膜等金屬薄膜所構成。 各配線28，於第1固定基板2的第2主面，分別被 導電連接於感測器本體1之電極墊18。藉此，透過電極 墊18可以分別把各固定電極25的電位及可動電極15的 電位取出至加速度感測器A的外部。 第2固定基板3之一表面（重疊於感測器本體1的面） 且對應於測錘部1 3的位置，被配置著例如由鋁-矽膜等金 屬薄膜所構成的防附著膜3 5。防附著膜3 5，係防止位移 的測錘部1 3之往第2固定基板3之附著。 其次，說明加速度感測晶片A之構成。 感測器本體1是使用SOI基板10形成的。SOI基板 1〇，具有由單晶矽所構成的支撐基板l〇a、被配置於支撐 基板1 〇a上的矽氧化膜所構成的絕緣層1 Ob、以及被配置 於絕緣層10b上的η型之矽層（活性層）10c。 感測器本體1之中框架部11及固定子16，被接合於 第1固定基板2及第2固定基板3。對此，測錘部1 3，分 別被配置爲離開第1及第2固定基板2、3，藉由一對支 撐彈簧部1 4支撐於框架部1 1。 限制測錘部1 3的過度位移之微小的突起部1 3 c，由 測錘部13之第1及第2固定基板2、3之分別的對向面起 被突起設置。於測錘部1 3，分別被形成開口爲矩形狀的S -12- 201234543 is thin, and the hammer portion 13 is displaced by the rotation of the pair of supporting spring portions 14 of the frame portion 1 1 . The frame portion 11 of the sensor body 1 is connected to the opening windows 12 in a plan view, and the rectangular window holes 17 are arranged in the same direction along the two opening windows 12, respectively. Inside the respective window holes 17, two stators 16 are disposed along the direction in which the pair of support spring portions 14 are arranged. Between each of the stators 6 and the inner peripheral surface of the window hole 17, between the respective stators 16 and the outer peripheral surface of the hammer portion 13, and the adjacent stators 16 are respectively formed with a gap, and are separated from each other. It is electrically insulated. Each of the stators 16 is bonded to the first and second fixed substrates 2, 3, respectively. Further, on one surface side of the sensor body 1, on each of the stators 16, for example, a circular electrode pad 18 made of a metal thin film such as an aluminum-bismuth film is formed. Further, similarly, a portion of the window hole 17 adjacent to the frame 11 is formed, for example, by a circular electrode pad 18 made of a metal thin film such as an aluminum-iridium film. Each of the electrode pads 18 formed in each of the stators 16 is electrically connected to each of the fixed electrodes 25 to be described later, and is formed on the electrode pads 18 of the frame portion 11, and is electrically connected to the movable electrodes 15A and the movable electrodes 15B. The plurality of electrode pads 18 described above are arranged along one side of the rectangular outer peripheral shape of the acceleration sensing wafer A. The first fixed substrate 2 includes a plurality of wires 28 that penetrate between the first main surface of the first fixed substrate 2 and the second main surface (the surface that overlaps the sensor body 1) that faces the first fixed substrate 2, and are formed on The plurality of fixed electrodes 25 - 13 - 201234543 on the second main surface are fixed to the movable electrode 15A in a pair of the fixed electrode 25Aa and the fixed electrode 25 Ab. Similarly, the fixed electrode 25Ba and the fixed electrode 2 5 Bb are arranged in pairs and opposed to the movable electrode 15B. Each of the fixed electrodes 25 is made of, for example, a metal thin film such as an aluminum-iridium film. Each of the wirings 28 is electrically connected to the electrode pads 18 of the sensor body 1 on the second main surface of the first fixed substrate 2. Thereby, the potential of each of the fixed electrodes 25 and the potential of the movable electrode 15 can be taken out to the outside of the acceleration sensor A through the electrode pads 18. The surface of one of the second fixed substrates 3 (the surface superposed on the surface of the sensor body 1) and the position of the hammer portion 13 are disposed, for example, an anti-adhesion film 35 made of a metal thin film such as an aluminum-iridium film. . The adhesion preventing film 35 is attached to the second fixed substrate 3 by the hammer portion 13 that prevents displacement. Next, the configuration of the acceleration sensing wafer A will be described. The sensor body 1 is formed using the SOI substrate 10. The SOI substrate has an insulating substrate 1 Ob composed of a single crystal germanium, a germanium oxide film disposed on the support substrate 1a, and η disposed on the insulating layer 10b. A layer of ruthenium (active layer) 10c. The frame portion 11 and the stator 16 in the sensor body 1 are joined to the first fixed substrate 2 and the second fixed substrate 3. On the other hand, the hammer portions 13 are disposed apart from the first and second fixed substrates 2, 3, respectively, and are supported by the frame portion 1 1 by a pair of supporting spring portions 14. The minute projections 1 3 c that restrict excessive displacement of the hammer portion 13 are provided by projections on the opposing faces of the first and second fixed substrates 2, 3 of the hammer portion 13. The hammer portion 13 is formed into a rectangular shape.

S -14- 201234543 凹部 1 3 a，1 3 b。凹部 1 3 a，1 3 b，相互間大小不同，所以 以通過一對支撐彈簧部1 4的直線爲邊界，測錘部1 3的左 右的質量不同。 第1固定基板2的配線2 8，被導電連接於電極墊 18。電極墊18，通過固定子16、聯絡用導體部16d、金 屬配線26，被連接於固定電極25。 前述加速度感測晶片A，具有4對設於感測器本體1 的可動電極15與設於第1固定基板2的固定電極25之 對，於各可動電極15與固定電極25之對被構成可變容量 電容器。加速度感測晶片A，亦即對測錘部1 3施加加速 度的話，支撐彈簧部14扭轉，測錘部1 3位移。藉此，成 對的固定電極25與可動電極15之對向面積及間隔會改 變，使得可變容量電容器的靜電電容改變。因而，加速度 感測器A可以由此靜電電容的變化檢測出加速度。 其次，說明作爲使用於第1固定基板2的形成之玻璃 基板20之一例之埋入玻璃矽基板之製造方法。 首先，如圖4(a)所示，準備p型或者η型不純物被添 加至全體的低電阻之矽基板1〇。矽基板1〇的電阻例如爲 0.02Ω· cm程度就已經夠小。接著，藉由光學製程形成光 阻70，如圖4(b)所示，藉由反應性離子蝕刻RIE (Reactive Ion Etching)處理等，選擇性地除去矽基板 10 表面的特定區域形成複數之凹部11。形成凹部11後，如 圖4(c)所示，除去光阻70。在此，說明對矽基板10的全 體添加不純物的場合，但未對矽基板1 〇全體添加不純物 -15- 201234543 亦無妨。至少，作爲配線直到殘留部分的深度爲止有被添 加不純物即可。 其次’如圖5(a)所示，準備玻璃材料20a。玻璃材料 20a的型態’爲粉末狀、糊狀、或者溶膠凝膠前驅體溶 液。接著’如圖5(b)所示，對矽基板1〇的凹部n塡充玻 璃材料20a。此時，考慮玻璃的收縮量，預先多塡充—些 玻璃材料20a。在此時間點玻璃材料20a進入直到細微構 造體內部。如此般塡充玻璃材料20a的步驟，以在真空氛 圍下進行爲佳》藉由在真空中進行塡充可以除去粒子間的 空氣’在以後的步驟不容易產生空孔。 其次’如圖5(c)所示，加熱塡充了玻璃材料20a之砂 基板10’使玻璃材料20a軟化。如此般加熱而使玻璃材 料20a軟化的步驟’在初期以在真空氛圍下進行爲佳。所 謂初期’是指例如開始加熱起直到空孔開始形成爲止的期 間。藉此’可以減低咬入空氣所導致的空孔。此外，加熱 使前述玻璃材料20a軟化的步驟，在末期以在比大氣壓更 高壓的氛圍下進行爲較佳。所謂末期，是指例如從開始出 現空孔起算直到空孔完全形成爲止的期間。藉此，對空孔 施加的壓力提高，可以縮小空孔尺寸^ 其次’如圖5 (d)所示，藉由加熱燒結玻璃材料2 0 a而 成爲一體。接著’在玻璃材料2 0 a燒結的階段通以惰性氣 體’使壓力爲大氣壓以上。藉此，對玻璃燒結體中殘留的 空孔施加的壓力提高，可以縮小空孔尺寸。 其次’於在凹部11被塡充玻璃材料20a的矽基板1〇S -14- 201234543 Recession 1 3 a,1 3 b. Since the recesses 1 3 a, 1 3 b are different in size from each other, the masses of the hammer portion 13 are different in quality by a line passing through the pair of support spring portions 14 . The wiring 2 of the first fixed substrate 2 is electrically connected to the electrode pad 18. The electrode pad 18 is connected to the fixed electrode 25 via the stator 16, the communication conductor portion 16d, and the metal wiring 26. The acceleration sensing wafer A has four pairs of movable electrodes 15 provided on the sensor body 1 and a pair of fixed electrodes 25 provided on the first fixed substrate 2, and is configured to be opposed to each of the movable electrodes 15 and the fixed electrodes 25. Variable capacity capacitors. When the acceleration sensing wafer A, that is, the acceleration is applied to the hammer portion 13, the support spring portion 14 is twisted, and the hammer portion 13 is displaced. Thereby, the opposing areas and intervals of the pair of fixed electrodes 25 and movable electrodes 15 are changed, so that the capacitance of the variable capacitance capacitor is changed. Thus, the acceleration sensor A can detect the acceleration from the change in the electrostatic capacitance. Next, a method of manufacturing a buried glass substrate as an example of the glass substrate 20 used for forming the first fixed substrate 2 will be described. First, as shown in Fig. 4 (a), a p-type or n-type impurity is prepared to be added to the entire low-resistance germanium substrate 1A. The resistance of the ruthenium substrate 1 例如 is, for example, about 0.02 Ω·cm. Next, the photoresist 70 is formed by an optical process, and as shown in FIG. 4(b), a specific region of the surface of the ruthenium substrate 10 is selectively removed by a reactive ion etching RIE (Reactive Ion Etching) process or the like to form a plurality of recesses. 11. After the recess 11 is formed, as shown in Fig. 4(c), the photoresist 70 is removed. Here, the case where the impurity is added to the entire substrate 10 is described, but the impurity is not added to the entire substrate 1 - 15 - 201234543. At least, impurities may be added as wiring until the depth of the residual portion. Next, as shown in Fig. 5 (a), a glass material 20a is prepared. The type ' of the glass material 20a' is a powdery, paste-like, or sol-gel precursor solution. Next, as shown in Fig. 5 (b), the glass material 20a is filled with the concave portion n of the substrate 1〇. At this time, in consideration of the amount of shrinkage of the glass, some glass materials 20a are preliminarily charged. At this point in time, the glass material 20a enters into the interior of the fine structure. The step of filling the glass material 20a in this manner is preferably carried out under a vacuum atmosphere. The air between the particles can be removed by charging in a vacuum. In the subsequent steps, voids are not easily generated. Next, as shown in Fig. 5(c), the glass substrate 20' is softened by heating the sand substrate 10' filled with the glass material 20a. The step of heating in such a manner that the glass material 20a is softened is preferably carried out initially in a vacuum atmosphere. The term "initial" refers to, for example, the period from the start of heating until the formation of voids. This can reduce the voids caused by biting into the air. Further, the step of softening the glass material 20a by heating is preferably carried out in an atmosphere at a higher pressure than atmospheric pressure at the end. The term "final stage" refers to, for example, a period from the start of the occurrence of the hole until the hole is completely formed. Thereby, the pressure applied to the pores is increased, and the pore size can be reduced. Next, as shown in Fig. 5(d), the sintered glass material 20a is heated to be integrated. Then, the pressure is applied to the atmospheric pressure or more at the stage of sintering the glass material 20 a. Thereby, the pressure applied to the voids remaining in the glass sintered body is increased, and the pore size can be reduced. Next, the substrate 1 in which the glass material 20a is filled in the concave portion 11

S -16- 201234543 的表背面使玻璃材料20a與矽基板10露出。具體而言， 使用鑽石磨石進行硏削、化學機械硏磨（CMP)等硏磨，或 者RIE等乾蝕刻或使用hf之濕式蝕刻等方法，把玻璃基 板的主面均句地削取，使矽基板1 0露出於玻璃基板的主 面同樣地’使用硏削、硏磨或者蝕刻等方法，於矽基板 10的背面使玻璃材料2〇a露出。玻璃與矽之除去是不論 哪種在先皆可》藉此，如圖5(e)所示，製造在矽基板的內 部被埋入玻璃的埋入玻璃之矽基板。 藉由以上步驟所製造的埋入玻璃之矽基板，係於矽基 板10上埋入玻璃材料2〇a的一部分。因而，圖5之矽基 板10之部分充當配線28，圖5之玻璃材料20a的部分充 當玻璃基板2〇。藉此，可以於圖2及圖3所示之第1固 定基板2的形成使用的玻璃基板20適用埋入玻璃之矽基 板。 如以上所述，根據本實施型態，可以既簡便的方法同 時使往狹窄間隔之玻璃埋入變得容易。亦即，因爲在砂基 板10的凹部11塡充粉末狀、糊狀或者前驅體溶液之玻璃 材料20a，所以可縮短燒結製程所需要的時間。此外，在 此製程沒有必要在高溫下施加荷重。進而，往狹窄空間埋 入玻璃變得容易。 此外，在本實施型態，塡充玻璃材料20a的步驟在真 空氛圍下進行。藉此’可以減低在完成的埋入玻璃之砍基 板中的空孔。 此外，在本實施型態’加熱使玻璃材料2 0 a軟化的步 -17- 201234543 驟，在初期係在真空氛圍下進行。藉此，可以減低在完成 的埋入玻璃之矽基板中的空孔。 此外’在本實施型態，加熱使玻璃材料20a軟化的步 驟，末期係在比大氣壓更高壓的氛圍下進行的。藉此，可 以減小在完成的埋入玻璃之矽基板中的空孔尺寸。 〔第2實施形態〕 圖6係模式顯示相關於本發明之第2實施型態的埋入 玻璃之矽基板之製造方法的剖面圖。以下，使用圖6，以 與第1實施型態不同之處爲中心，說明相關於本發明的第 2實施型態之埋入玻璃之矽基板的製造方法。 首先’如圖6(a)所示，在形成凹部11的步驟，以使 矽基板10的兩端（後述）變薄的方式形成凹部11。接著， 如圖6(b)所示’對此變薄的部分重疊玻璃基板2 0b。 以後’與第1實施型態相同。亦即，如圖6(c)所示， 於凹部1 1塡充玻璃材料20a。其次，如圖6(d)所示，加 熱塡充了玻璃材料20a之矽基板1 〇，使玻璃材料2〇a軟 化後’如圖6 (e)所示，燒結玻璃材料2 0 a使成爲一體。最 後’如圖6(f)所示’於矽基板1〇的表背面，使玻璃材料 20a與矽基板1 〇與玻璃基板20b露出。 圖7係相關於本發明之第2實施型態的埋入玻璃之砂 基板的全體構成圖。具體而言’（a)爲玻璃基板2〇b之俯 視圖’（b)爲施以細微加工的砍基板1 〇之俯視圖，（^)爲在 變薄部分重疊玻璃基板20b的狀態之俯視圖，（d)爲（a)〜The front and back surfaces of S-16-201234543 expose the glass material 20a and the ruthenium substrate 10. Specifically, a diamond grindstone is used for honing, chemical mechanical honing (CMP) or the like, or dry etching such as RIE or wet etching using hf, and the main surface of the glass substrate is uniformly removed. Similarly, the ruthenium substrate 10 is exposed on the main surface of the glass substrate, and the glass material 2A is exposed on the back surface of the ruthenium substrate 10 by a method such as boring, honing, or etching. The glass and the ruthenium are removed in any case. Thus, as shown in Fig. 5(e), a ruthenium-embedded substrate in which a glass is buried inside the ruthenium substrate is produced. A portion of the glass material 2A is embedded in the ruthenium substrate 10 by the ruthenium-embedded substrate produced by the above steps. Thus, a portion of the ruthenium substrate 10 of Fig. 5 serves as the wiring 28, and a portion of the glass material 20a of Fig. 5 serves as the glass substrate 2''. Thereby, the glass substrate 20 for embedding the glass can be applied to the glass substrate 20 used for forming the first fixed substrate 2 shown in Figs. 2 and 3 . As described above, according to the present embodiment, it is possible to easily embed the glass in a narrow interval at the same time in a simple manner. That is, since the concave portion 11 of the sand substrate 10 is filled with the glass material 20a of a powdery, paste or precursor solution, the time required for the sintering process can be shortened. In addition, it is not necessary to apply a load at a high temperature in this process. Further, it is easy to embed the glass in a narrow space. Further, in the present embodiment, the step of filling the glass material 20a is carried out under a vacuum atmosphere. By this, it is possible to reduce the voids in the finished dicing substrate for burying the glass. Further, in the present embodiment, the step -17-201234543, in which the heating of the glass material 20 a is softened, is carried out in a vacuum atmosphere at an initial stage. Thereby, the voids in the completed substrate in which the glass is buried can be reduced. Further, in the present embodiment, the step of softening the glass material 20a by heating is carried out in an atmosphere at a higher pressure than atmospheric pressure. Thereby, the size of the voids in the completed substrate in which the glass is buried can be reduced. [Second Embodiment] Fig. 6 is a cross-sectional view showing a method of manufacturing a substrate for embedding a glass according to a second embodiment of the present invention. In the following, a method of manufacturing a buried glass substrate according to a second embodiment of the present invention will be described with reference to Fig. 6 focusing on differences from the first embodiment. First, as shown in Fig. 6(a), in the step of forming the concave portion 11, the concave portion 11 is formed such that both ends (described later) of the tantalum substrate 10 are thinned. Next, as shown in Fig. 6(b), the thinned portion overlaps the glass substrate 20b. Hereinafter, it is the same as the first embodiment. That is, as shown in Fig. 6(c), the glass material 20a is filled in the concave portion 1 1 . Next, as shown in Fig. 6(d), the crucible substrate 1 of the glass material 20a is heated and the glass material 2〇a is softened, as shown in Fig. 6(e), and the sintered glass material 20 a becomes One. Finally, as shown in Fig. 6 (f), the glass material 20a and the ruthenium substrate 1 〇 and the glass substrate 20b are exposed on the front and back surfaces of the ruthenium substrate 1A. Fig. 7 is a view showing the overall configuration of a buried glass sand substrate according to a second embodiment of the present invention. Specifically, (a) is a plan view of the glass substrate 2〇b, (b) is a plan view of the chopped substrate 1 施 which is subjected to fine processing, and (^) is a plan view showing a state in which the glass substrate 20b is superposed on the thinned portion, ( d) for (a)~

S -18- 201234543 (C)之剖面圖。如圖7(a)所示’於圓形的玻璃基板20b被 形成貫通孔31’如圖7(b)所示’於圓形的砂基板10被形 成凹部1 1。玻璃基板20b與矽基板1〇重疊時’如圖7(c) 所示，於貫通孔3 1嵌入凹部1 1。藉此’如圖7 (d)所示’ 對矽基板10的兩端之變薄的部分（不是凹部11的部分）重 疊玻璃基板20b。 圖8係將相關於本發明之第2實施型態的埋入玻璃之 矽基板應用於裝置的場合之剖面圖。此處’例示把埋入玻 璃之矽基板應用於加速度感測器 A等 MEMS(Micro Electro Mechanical Systems)裝置 50 的場合。符號 R1， 爲使用了粉末狀_、糊狀或前驅體溶液之玻璃材料20a的區 域，符號R2爲玻璃基板20b與MEMS裝置50之接合區 域。埋入玻璃之矽基板中的矽部分作爲配線發揮功能。 此處，考慮把玻璃基板20b陽極接合於MEMS裝置 5〇的矽部的情形。在此場合，只要是重疊於變薄部分之 玻璃基板20b爲可以陽極接合的材料的話，使用玻璃材料 20a的區域R1不是可陽極接合的材料亦可。藉此，有玻 璃材料20a的選擇自由度擴大，得到種種的效果。 例如’作爲玻璃材料20a選擇低溫燒結形式的熔塊 (frit)玻璃的場合，可以謀求低溫製程化。此外，選擇低 收縮率之熔塊玻璃的場合，可以謀求製程的安定化。進 而’選擇與砂相同熱膨脹係數之熔塊玻璃的場合，可以謀 求熱衝擊性的提高。而且，選擇高黏接性之熔塊玻璃的場 可以謀求提高氣密性。 -19- 201234543 如以上所述’在本實施型態，於矽基板1 〇的兩端之 變薄的部分重疊玻璃基扳20b。藉此，粉末狀、糊狀或前 驅體溶液之玻璃材料2 0 a的部分變少，進而可以縮短燒結 時間。 此外，把玻璃基板20b陽極接合於MEMS裝置50的 矽部的場合’在變薄的部分重疊的玻璃基板20b只要是可 以陽極接合的材料即可。藉此，也有玻璃材料20a的選擇 自由度擴大之效果》 又，在此’是在變薄的部分重叠玻璃基板20b，但本 實施型態不以此爲限。亦即，於變薄部分重盤LTCC(Low Temperature Co-fired Ceramics)基板也可以得到同樣的效 果。 〔第3實施形態〕 圖9係模式顯示相關於本發明之第3實施型態的埋人 玻璃之矽基板之製造方法的剖面圖。以下，使用圖9 ,以 與第1或2實施型態不同之處爲中心，說明相關於本發明 的第3實施型態之埋入玻璃之矽基板的製造方法。 首先，如圖9 (a)所示，在形成凹部1 1的步驟，以使 砂基板10的兩端變薄的方式形成凹部11。接著，如圖 9(b)所示，對此變薄的部分重疊高電阻矽基板4〇。在此， 作爲高電阻砂基板40，使用1000Ω·(；πι者。當然，電阻不 以此爲限，只要是不導通的程度者即可。 以後，與第1實施型態相同。亦即，如圖9(c)所示，S -18- 201234543 (C) Sectional view. As shown in Fig. 7(a), the through hole 31' is formed in the circular glass substrate 20b. As shown in Fig. 7(b), the concave portion 11 is formed in the circular sand substrate 10. When the glass substrate 20b overlaps the ruthenium substrate 1', as shown in Fig. 7(c), the recessed portion 11 is fitted into the through hole 31. Thereby, as shown in Fig. 7 (d), the glass substrate 20b is overlapped with the thinned portion of both ends of the substrate 10 (not the portion of the concave portion 11). Fig. 8 is a cross-sectional view showing a state in which a substrate for embedding a glass according to a second embodiment of the present invention is applied to a device. Here, the case where the immersed glass substrate is applied to a MEMS (Micro Electro Mechanical Systems) device 50 such as an acceleration sensor A is exemplified. Symbol R1 is a region of the glass material 20a in which a powdery_, paste or precursor solution is used, and symbol R2 is a bonding region of the glass substrate 20b and the MEMS device 50. The germanium portion buried in the glass substrate functions as a wiring. Here, a case where the glass substrate 20b is anodically bonded to the crotch portion of the MEMS device 5b is considered. In this case, the region R1 in which the glass material 20a is used may not be an anodic bonding material as long as the glass substrate 20b which is superposed on the thinned portion is a material which can be anodically bonded. Thereby, the degree of freedom of selection of the glass material 20a is expanded, and various effects are obtained. For example, when a frit glass of a low-temperature sintering type is selected as the glass material 20a, a low-temperature process can be achieved. Further, when a frit glass having a low shrinkage ratio is selected, the process can be stabilized. Further, when the frit glass having the same thermal expansion coefficient as that of sand is selected, the thermal shock resistance can be improved. Further, the field of the frit glass of high adhesion can be selected to improve airtightness. -19- 201234543 As described above, in the present embodiment, the glass base plate 20b is overlapped at the thinned portions of both ends of the 矽 substrate 1 。. Thereby, the portion of the glass material of the powdery, paste or precursor solution is reduced to 20 a, and the sintering time can be shortened. Further, when the glass substrate 20b is anodically bonded to the crotch portion of the MEMS device 50, the glass substrate 20b which is superposed on the thinned portion may be a material which can be anodically bonded. Therefore, the effect of increasing the degree of freedom of selection of the glass material 20a is also added. Here, the glass substrate 20b is overlapped in the thinned portion. However, the present embodiment is not limited thereto. That is, the same effect can be obtained also in the LTCC (Low Temperature Co-fired Ceramics) substrate. [Third Embodiment] Fig. 9 is a cross-sectional view showing a method of manufacturing a substrate for a buried glass according to a third embodiment of the present invention. Hereinafter, a method of manufacturing a buried glass substrate according to a third embodiment of the present invention will be described with reference to Fig. 9 focusing on differences from the first or second embodiment. First, as shown in Fig. 9 (a), in the step of forming the concave portion 11, the concave portion 11 is formed such that both ends of the sand substrate 10 are thinned. Next, as shown in Fig. 9(b), the thinned portion is superposed on the high-resistance germanium substrate 4A. Here, as the high-resistance sand substrate 40, 1000 Ω·(; πι is used. Of course, the resistance is not limited thereto, as long as it is not conductive. Hereinafter, it is the same as the first embodiment. As shown in Figure 9(c),

S -20- 201234543 於凹部η塡充玻璃材料20a。其次，如圖9(d)所示，加 熱塡充了玻璃材料20a之矽基板10，使玻璃材料2〇a軟 化後，如圖9(e)所示，燒結玻璃材料2〇a使成爲—體。最 後，如圖9(f)所示’於矽基板丨〇的表背面使玻璃材料 2 0a與矽基板1〇與高電阻矽基板4〇露出。 圖1〇係將相關於本發明之第3實施型態的埋入玻璃 之矽基板應用於裝置的場合之剖面圖。與圖8同樣，符號 R1’爲使用了粉末狀、糊狀或前驅體溶液之玻璃材料2〇a 的區域’符號R2爲高電阻矽基板4〇與MEMS裝置5〇之 接合區域。此處，考慮把高電阻砂基板4〇表面活性化而 接合於MEMS裝置50的矽部的情形。在此場合，只要是 重疊於變薄部分之高電阻矽基板40爲可以表面活性化接 合的材料的話’使用玻璃材料20a的區域R1不是可表面 活性化接合的材料亦可。藉此，有玻璃材料2〇a的選擇自 由度擴大，可得到如在第2實施型態所說明的種種效果。 此處’例示表面活性化接合的場合，但對低溫接合的場合 也同樣適用。 如以上所述，在本實施型態，於矽基板1 〇的兩端之 變薄的部分重疊高電阻矽基板40。藉此，粉末狀、糊狀 或前驅體溶液之玻璃材料20a的部分變少，進而可以縮短 燒結時間。 此外’使用根據表面活性化之常溫接合或低溫接合等 接合方法把高電阻矽基板40接合於MEMS裝置50的矽 部的場合，重疊於薄化部分的高電阻矽基板40只要是可 -21 - 201234543 以表面活性化接合或低溫接合的材料即可。藉此，也有玻 璃材料2 0a的選擇自由度擴大之效果。 此外’這樣的埋入玻璃之矽基板，其兩端爲高電阻 矽，所以可說其構成材料幾乎都是矽。因此，應用於 MEM S裝置的場合，裝置側也爲矽所以熱膨脹係數當然相 同’所以對於熱衝擊具有耐性。此外，即使不用陽極接合 也可以使用根據表面活性化之常溫接合或低溫接合等接合 方法。特別是使用常溫接合的場合可以減低熱應力的影 ，可以防止MEMS裝置之特性劣化。 以上’說明了本發明之適切的實施型態，但本發明並 不以前述實施型態爲限，可以實施種種變形。 例如，在前述實施型態，例示了檢測X方向與Z方 向之2方向的加速度之加速度感測器，但把錘部之一在 XY平面內旋轉90度而配置，成爲加上Y方向之檢測3 方向的加速度之加速度感測器亦可。 此外，在前述實施型態，作爲靜電電容裝置例示了加 速度感測器，但並不以此爲限，即使其他之靜電電容式裝 置亦可適用本發明。 此外，亦可適當變更錘部或固定電極等其他細部的規 格（形狀、大小 '配置等）》 [產業上利用可能性] 根據本發明，可以得到既爲簡便的方法而且容易往狹 窄間隔埋入玻璃的埋入玻璃之矽基板及其製造方法。S -20- 201234543 Fill the glass material 20a in the recess η. Next, as shown in Fig. 9(d), the crucible substrate 10 of the glass material 20a is heated to soften the glass material 2〇a, and as shown in Fig. 9(e), the sintered glass material 2〇a is made- body. Finally, as shown in Fig. 9 (f), the glass material 20a and the tantalum substrate 1A and the high-resistance germanium substrate 4 are exposed on the front and back surfaces of the tantalum substrate. Fig. 1 is a cross-sectional view showing a state in which a substrate for embedding a glass according to a third embodiment of the present invention is applied to a device. Similarly to Fig. 8, the symbol R1' is a region of the glass material 2〇a using a powdery, paste or precursor solution. The symbol R2 is a bonding region between the high-resistance germanium substrate 4A and the MEMS device 5A. Here, a case where the high-resistance sand substrate 4 is surface-activated and bonded to the crotch portion of the MEMS device 50 is considered. In this case, the region R1 in which the glass material 20a is used may not be a material which can be surface-bonded as long as the high-resistance tantalum substrate 40 which is superposed on the thinned portion is a material which can be surface-activated. Thereby, the degree of freedom of selection of the glass material 2〇a is expanded, and various effects as described in the second embodiment can be obtained. Here, the case of surface-activated bonding is exemplified, but the same applies to the case of low-temperature bonding. As described above, in the present embodiment, the high-resistance germanium substrate 40 is overlapped on the thinned portions of both ends of the germanium substrate 1 . Thereby, the portion of the glass material 20a of the powdery, paste or precursor solution is reduced, and the sintering time can be shortened. Further, when the high-resistance tantalum substrate 40 is bonded to the crotch portion of the MEMS device 50 by a bonding method such as surface activation or low-temperature bonding, the high-resistance germanium substrate 40 which is superposed on the thinned portion may be - 21 - 201234543 It is sufficient to use surface-activated bonding or low-temperature bonding. Thereby, there is also an effect of expanding the degree of freedom of selection of the glass material 20a. Further, such a substrate for embedding a glass has a high resistance 两端 at both ends, so that it can be said that the constituent materials are almost all ruthenium. Therefore, when applied to a MEM S device, the device side is also 矽, so the thermal expansion coefficient is of course the same', so it is resistant to thermal shock. Further, a bonding method such as room temperature bonding or low temperature bonding according to surface activation can be used even without anodic bonding. In particular, when a room temperature bonding is used, the influence of thermal stress can be reduced, and deterioration of characteristics of the MEMS device can be prevented. The above description has been made in terms of a suitable embodiment of the present invention, but the present invention is not limited to the above-described embodiment, and various modifications can be made. For example, in the above-described embodiment, an acceleration sensor that detects acceleration in two directions of the X direction and the Z direction is exemplified, but one of the weight portions is rotated by 90 degrees in the XY plane, and the Y direction is detected. Acceleration sensors for acceleration in 3 directions are also available. Further, in the foregoing embodiment, the acceleration sensor is exemplified as the electrostatic capacitance device, but it is not limited thereto, and the present invention can be applied to other electrostatic capacitance devices. In addition, the specifications (shape, size 'arrangement, etc.) of other details such as the hammer portion or the fixed electrode can be appropriately changed. [Industrial Applicability] According to the present invention, it is possible to obtain a simple method and to easily embed it in a narrow interval. A glass-embedded glass substrate and a method of manufacturing the same.

S -22- 201234543 【圖式簡單說明】 圖1爲相關於本發明的第1實施型態之半導體裝置， (a)爲封裝蓋的構成之立體圖，（b)顯示除了封裝蓋之構成 的立體圖。 圖2係顯示相關於本發明的第1實施型態之加速度感 測晶片之槪略構成的分解立體圖。 圖3係顯示相關於本發明的第1實施型態之加速度感 測晶片之槪略構成的剖面圖。 圖4(a)〜圖4(c)係模式顯示相關於本發明之第1實施 型態的埋入玻璃之矽基板之製造方法的剖面圖。 圖5(a)〜圖5(e)係模式顯示相關於本發明之第1實施 型態的埋入玻璃之矽基板之製造方法的剖面圖。 圖6(a)〜圖6(f)係模式顯示相關於本發明之第2實施 型態的埋入玻璃之矽基板之製造方法的剖面圖。 圖7係相關於本發明的第2實施型態的埋入玻璃之矽 基板的全體構成圖，（a)爲玻璃基板之俯視圖，（b)爲施以 細微加工的矽基板之俯視圖，（c)爲在變薄部分重疊玻璃 基板的狀態之俯視圖，（d)爲（a)〜（c)之剖面圖。 圖8係將相關於本發明之第2實施型態的埋入玻璃之 矽基板應用於裝置的場合之剖面圖。 圖9(a)〜圖9(f)係模式顯示相關於本發明之第3實施 型態的埋入玻璃之矽基板之製造方法的剖面圖。 圖1 〇係將相關於本發明之第3實施型態的埋入玻璃 -23- 201234543 之矽基板應用於裝置的場合之剖面圖。 【主要元件符號說明】 1 :半導體裝置 2 :第1固定基板 3 :第2固定基板 1 0 : SOI基板 1 2 :開口窗 1 1 :框架部 1 3 :測錘部 1 3a，1 3b :凹部 1 3 c :突起部 1 4 :支撐彈簧部 1 5 A、15 B :可動電極 1 6 :固定子 1 7 :窗孔 1 8 :電極墊 20 :玻璃基板 2 5 :固定電極 2 8 :配線 3 0 :玻璃基板 1 0 1 :封裝 102 :塑膠封裝本體 1 0 2 a :搭載面BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view of a semiconductor device according to a first embodiment of the present invention, (a) is a perspective view showing a configuration of a package cover, and (b) is a perspective view showing a configuration of a package cover. . Fig. 2 is an exploded perspective view showing a schematic configuration of an acceleration sensing wafer according to a first embodiment of the present invention. Fig. 3 is a cross-sectional view showing a schematic configuration of an acceleration sensing wafer according to a first embodiment of the present invention. 4(a) to 4(c) are cross-sectional views showing a method of manufacturing a substrate for embedding a glass according to a first embodiment of the present invention. Fig. 5 (a) to Fig. 5 (e) are cross-sectional views showing a method of manufacturing a substrate for embedding a glass according to a first embodiment of the present invention. Fig. 6 (a) to Fig. 6 (f) are cross-sectional views showing a method of manufacturing a substrate for embedding a glass according to a second embodiment of the present invention. Fig. 7 is a view showing the entire configuration of a substrate for embedding a glass according to a second embodiment of the present invention, wherein (a) is a plan view of the glass substrate, and (b) is a plan view of the finely processed germanium substrate, (c) A plan view showing a state in which the glass substrate is superposed on the thinned portion, and (d) is a cross-sectional view of (a) to (c). Fig. 8 is a cross-sectional view showing a state in which a substrate for embedding a glass according to a second embodiment of the present invention is applied to a device. Figs. 9(a) to 9(f) are cross-sectional views showing a method of manufacturing a substrate for embedding a glass according to a third embodiment of the present invention. Fig. 1 is a cross-sectional view showing a case where a substrate embedded in glass -23-201234543 according to a third embodiment of the present invention is applied to a device. [Description of main component symbols] 1 : Semiconductor device 2 : First fixed substrate 3 : Second fixed substrate 1 0 : SOI substrate 1 2 : Open window 1 1 : Frame portion 1 3 : Hammer portion 1 3a, 1 3b : Concave portion 1 3 c : protrusion 1 4 : support spring portion 1 5 A, 15 B : movable electrode 1 6 : stator 1 7 : window hole 18 : electrode pad 20 : glass substrate 2 5 : fixed electrode 2 8 : wiring 3 0 : Glass substrate 1 0 1 : Package 102 : Plastic package body 1 0 2 a : Mounting surface

S -24- 201234543 103 :封裝塞（蓋） 104 :黏接部 1 1 2 :導線 1 1 2 a :內側導線 1 12b :外側導線 1 1 6 :樹脂覆蓋部 1 1 3 :標記 A :加速度感測晶片 B :控制1C晶片 -25-S -24- 201234543 103 : package plug (cover) 104 : adhesive part 1 1 2 : wire 1 1 2 a : inner wire 1 12b : outer wire 1 1 6 : resin cover 1 1 3 : mark A: sense of acceleration Test wafer B: Control 1C wafer-25-

Claims (1)

201234543 七、申請專利範圍 1. 一種埋入玻璃之矽基板之製造方 備： 於矽基板形成凹部的步驟、 於前述凹部塡充粉末狀、糊狀或者前 材料的步驟、 加熱前述玻璃材料使其軟化的步驟、 燒結使軟化的前述玻璃材料的步驟、 在前述凹部被塡充前述玻璃材料的前 面使前述玻璃材料與前述矽基板露出的步 2 ·如申請專利範圍第1項之埋入玻 造方法’其中在形成前述凹部的步驟，以 兩端變薄的方式形成前述凹部，於前述變 璃基板或LTCC基板》 3 ·如申請專利範圍第1項之埋入玻 造方法’其中在形成前述凹部的步驟，以 兩端變薄的方式形成前述凹部，於前述變 電阻矽基板。 4. 如申請專利範圍第1至3項之任 之矽基板之製造方法，其中塡充前述玻璃 在真空氛圍下進行的。 5. 如申請專利範圍第1至3項之任 之矽基板之製造方法，其中加熱使前述玻 驟’在初期是在真空氛圍下進行的。 法，其特徵爲具 驅體溶液之玻璃 述矽基板的表背 驟。 璃之矽基板之製 使前述矽基板的 薄的部分重疊玻 璃之矽基板之製 使前述矽基板的 薄的部分重疊高 一項之埋入玻璃 材料的步驟，是 —項之埋入玻璃 璃材料軟化的步 S -26- 201234543 6. 如申請專利範圍第4項之埋入玻璃之矽基板之製 造方法，其中加熱使前述玻璃材料軟化的步驟，在初期是 在真空氛圍下進行的。 7. 如申請專利範圍第1至3項之任一項之埋入玻璃 之矽基板之製造方法，其中加熱使前述玻璃材料軟化的步 驟，在末期是在比大氣壓更高壓的氛圍下進行的。 8 .如申請專利範圍第4項之埋入玻璃之矽基板之製 造方法，其中加熱使前述玻璃材料軟化的步驟，在末期是 在比大氣壓更高壓的氛圍下進行的。 9.如申請專利範圍第5項之埋入玻璃之矽基板之製 造方法，其中加熱使前述玻璃材料軟化的步驟，在末期是 在比大氣壓更高壓的氛圍下進行的。 1 0.如申請專利範圍第6項之埋入玻璃之矽基板之製 造方法，其中加熱使前述玻璃材料軟化的步驟’在末期是 在比大氣壓更高壓的氛圍下進行的。 1 1 .如申請專利範圍第5項之埋入玻璃之矽基板之製 造方法，其中加熱使前述玻璃材料軟化的步驟的初期’是 開始加熱起算直到開始出現空孔爲止的期間。 1 2 ·如申請專利範圍第7項之埋入玻璃之矽基板之製 造方法，其中加熱使前述玻璃材料軟化的步驟的末期’是 開始出現空孔起算直到空孔完全形成爲止的期間° 13.—種埋入玻璃之矽基板，其特徵爲：係於砂基板 的內部埋入玻璃，其兩端爲高電阻矽。 -27-201234543 VII. Patent Application Area 1. A manufacturing method of a substrate for embedding a glass: a step of forming a concave portion on the tantalum substrate, a step of filling the concave portion with a powder, a paste or a front material, and heating the glass material a step of softening, a step of sintering the softened glass material, and a step of exposing the glass material and the ruthenium substrate to the front surface of the glass material before the concave portion is immersed in the front surface of the glass material. In the method of forming the concave portion, the concave portion is formed in such a manner that the both ends are thinned, and the glazing substrate or the LTCC substrate is as described in the first aspect of the invention. In the step of forming the concave portion, the concave portion is formed to be thinner at both ends, and is formed on the variable resistance tantalum substrate. 4. A method of manufacturing a substrate according to any one of claims 1 to 3, wherein the glass is filled in a vacuum atmosphere. 5. The method of manufacturing a substrate according to any one of claims 1 to 3, wherein the heating is performed in a vacuum atmosphere at an initial stage. The method is characterized in that the glass with the body solution is the surface of the substrate. The glass substrate is formed by laminating a thin portion of the tantalum substrate with a glass substrate. The step of laminating the thin portion of the tantalum substrate is a step of embedding the glass material. Softening step S -26-201234543 6. The method for producing a substrate for embedding a glass according to claim 4, wherein the step of softening the glass material by heating is performed in a vacuum atmosphere at an initial stage. 7. The method of producing a substrate for embedding a glass according to any one of claims 1 to 3, wherein the step of softening the glass material by heating is carried out in an atmosphere at a higher pressure than atmospheric pressure at the end. 8. The method of producing a substrate for embedding a glass according to claim 4, wherein the step of softening the glass material by heating is carried out in an atmosphere at a higher pressure than atmospheric pressure at the end. 9. The method of producing a substrate for embedding a glass according to claim 5, wherein the step of softening the glass material by heating is carried out in an atmosphere at a higher pressure than atmospheric pressure at the end. A method of producing a substrate for embedding a glass according to claim 6 wherein the step of heating to soften the glass material is carried out in an atmosphere at a higher pressure than atmospheric pressure at the end. 1 . The method for producing a substrate for embedding a glass according to claim 5, wherein the initial stage of the step of softening the glass material by heating is a period from the start of heating until the start of the occurrence of voids. 1 2 . The method of manufacturing a substrate for embedding a glass according to item 7 of the patent application, wherein the end period of the step of softening the glass material by heating is a period from the start of the occurrence of the void until the pore is completely formed. A substrate for embedding a glass, characterized in that a glass is embedded in a sand substrate, and both ends thereof are high-resistance crucibles. -27-
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WO2015032062A1 (en) * 2013-09-06 2015-03-12 Chang Yu-Chun Liquid glass application
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US8735199B2 (en) * 2012-08-22 2014-05-27 Honeywell International Inc. Methods for fabricating MEMS structures by etching sacrificial features embedded in glass
JP7129599B2 (en) 2017-01-17 2022-09-02 パナソニックＩｐマネジメント株式会社 sensor

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JP4023076B2 (en) * 2000-07-27 2007-12-19 富士通株式会社 Front and back conductive substrate and manufacturing method thereof

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WO2015032062A1 (en) * 2013-09-06 2015-03-12 Chang Yu-Chun Liquid glass application
CN105518824A (en) * 2013-09-06 2016-04-20 张于纯 Liquid glass application
CN104649221A (en) * 2015-01-19 2015-05-27 北京大学 Method for processing complex silica glass composite structure wafer
TWI720105B (en) * 2016-01-15 2021-03-01 法商索泰克公司 Method for fabricating semiconductor structures including a high resistivity layer, and related semiconductor structures

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