TW201222821A - Thin film transistor and method for fabricating the same - Google Patents

Abstract

A method for fabricating a thin film transistor is provided, including following steps. Form a gate on a substrate. Form a gate insulating layer, a semiconductor oxide material layer and a conductive layer on the substrate in sequence. Form a patterned photoresist layer on the conductive layer. The patterned photoresist layer includes two first parts, and a second part connecting between the first parts. Thickness of each first part is greater than that of the second part. Remove the conductive layer and the semiconductor oxide material layer that are not covered by the patterned photoresist layer by using the patterned photoresist layer as a mask, so that a semiconductor oxide channel layer and a patterned conductive layer between the semiconductor oxide channel layer and the patterned photoresist layer are formed. Remove a portion of the patterned photoresist layer so as to lower the thickness of the first parts until the second part. Remove the patterned conductive layer not covered by the remaining first parts by using the remaining first parts as a mask, so as to form a source and a drain on the semiconductor oxide channel layer.

Description

201222821

Υυυυ^υ02 36141twf.doc/I VI. Description of the Invention: [Technical Field] The present invention relates to a thin film transistor and a method of manufacturing the same, and more particularly to a method capable of preventing damage of an oxide semiconductor channel layer Thin film transistor and method of manufacturing the same. [Prior Art] With the advancement of display technology, people can make life more convenient by the aid of the display. In order to make the display light and thin, the flat panel display (FPD) has become the mainstream. Common flat displays include liquid crystal displays (LCDs), plasma displays, and electroluminescent displays. Taking the most popular liquid crystal display as an example, it is mainly composed of a thin film transistor array substrate, a color filter substrate, and a liquid crystal layer sandwiched therebetween. In particular, thin-film transistors that are widely used in displays have a structural design or material selection that directly affects the performance of the product. On a conventional thin film transistor array substrate, an amorphous smcon (a-Si) thin film transistor or a low temperature polycrystalline germanium thin film transistor is often used as a switching element of each sub-tenoxine. In recent years, it has been pointed out that an oxide semiconductor (oxide semicon (juct〇r) thin film transistor has higher carrier mobility than an amorphous thin crystal transistor]; and an oxide semiconductor thin film The transistor has a better threshold voltage (thresh〇ld v〇ltage, vth) than the low temperature polycrystalline germanium film transistor.

201222821 Λ〇ιυυ^υ02 36141twf.d〇cA =: = conductor thin _ body has the potential to become the next - the general will be the source of the search and the 汲 __ agent. However, the oxide semiconductor channel layer of the oxidized crystal film transistor is thin, and the source and the immersion of the _ bulk thin film transistor affect the oxide semiconducting fine crystal by the r: The invention provides a method for manufacturing a thin film transistor, using light, a process, and avoiding the oxide semiconductor channel layer being subjected to a subtraction to provide a thin film transistor having a prominent oxide semiconductor material layer and a conductive film. . In the insulating layer, the :: patterned photoresist layer comprises two second portions; the photoresist layer is used as a mask, and the material is not thick. The conductive layer covered with the oxide semiconductor material layer is located on the oxide semiconductor channel layer and the track layer and the patterned photoresist layer 2;

201222821 AU1009002 36141twf.doc/I Forms the source and the drain. In an embodiment of the invention, the patterned photoresist layer is formed by a Gray-Tone Mask (GTM) process or a Half_T曰 Mask (HTM) process. De In the embodiment of the invention, the above method of removing the conductive layer and the oxide half (four) (four) layer not covered by the patterned light comprises the following + steps. A first-wet etch process is performed to remove the conductive layer that is not covered by the patterned photoresist. A second wet process is performed to remove the oxide semiconductor material layer not covered by the photoresist layer, wherein the first wet process is used in conjunction with the second wet process (10). The method for removing the conductive layer and the oxide semiconductor material layer not covered by the patterned light includes performing an etching process to remove the conductive layer not covered by the patterned photoresist layer and == =:: wherein the conductive layer and the oxide semi-conductive material layer are layered =::: in the above-mentioned "removed portion of the patterned light - in the present invention - the implementation of the above method of forming the impurity and the bungee ^ The wet side is performed with the first portion not removed as a mask to remove the patterned conductive layer not covered by the first portion. In the implementation of this (four) - the implementation of the financial, after the face of the extremes, the manufacturing method of the thin film transistor further includes the removal of the first part. The invention further proposes a method for producing a transistor, which comprises a gamma step. The brew is formed on the substrate. Forming a gate insulating layer on the substrate in sequence 201222821

AU1UWU02 36141twf.doc/I Oxide semiconductor material layer and conductive layer. Forming a patterned photoresist layer on the conductive layer The patterned photoresist layer includes two first portions, a second portion connected to the first adjacent portion, and two third portions connected to the respective first portions. Each of the: ^ thickness is greater than the thickness of the second portion, and the thickness of the second portion is substantially equal to the thickness of each of the two portions. The intervening lining layer is a mask, and the conductive layer and the oxide semiconductor material layer not covered by the patterned layer are removed to form an oxide semiconductor channel layer and a patterned conductive layer located in the oxide semiconductor=1. The resulting == at the (4) of the guide layer, and at the bottom she lowers the photoresist layer in the third part to reduce the thickness of the first part until η!τ: ! The first part that is not removed is the mask. Oxide semiconducting Zhaotong; two cases of conductive layer, tone modulation:: the patterned soiled photoresist layer by the cover case, the above removal of the unpatterned photoresist layer. The method of conducting a layer of a semiconductor material includes the following step of conducting a conductive layer to remove an oxide semiconductor material that is not covered by the patterned photoresist layer, and is not covered by the photoresist layer. The above-mentioned and the top conductive layer are removed from the uncharged layer and the bottom conductive layer is processed to move the first wet-type dry rice-cutting potential, and the first conductive layer is covered by the first resist layer. The entrance is conductive except for the bottom that is not covered by the patterned photoresist layer

201222821 Αυιυυ^υ〇2 36141twf.d〇c/I layer. A second wet process is performed to remove the germanide semiconductor material layer that is not patterned. In the embodiment of the present invention, the method of removing a portion of the patterned photoresist layer described above includes an ashing process. In an embodiment of the invention, the method of forming the source and the pole includes performing a dry mode with the first portion that is not removed, to remove the pattern that is above the undercut and is not covered by the first portion. Conductive layer. In an embodiment of the invention, the method of fabricating the film transistor after forming the source and the drain further comprises removing the first portion. The invention further provides a method of fabricating a thin film transistor comprising the steps. Forming _ on the substrate. A gate insulating oxide semiconductor material layer, a bottom conductive layer, and a top conductive layer are sequentially formed on the substrate. Forming a patterned photoresist layer on the layer, the patterned photoresist layer comprises two second portions connected between the first portions and two portions connected to each of the first portions, the thickness of the portions being greater than the second portion The thickness is substantially equal to the thickness of each third portion. The patterned thin layer is used as a mask to remove the top conductive layer and the bottom conductive layer not covered by the acidified photoresist layer: the patterned photoresist layer is divided to reduce the thickness of the first portion until the second portion and the third portion Beveled. The first conductive layer and the partial oxide semiconductor material layer not covered by the first portion are removed by the first portion which is not removed, so as to form an oxide casting (four) between the bottom conductive layer and the _ edge layer. In the layer, the side (10) conduction undercut in the basin occurs at the top of the oxide semiconductor channel layer. The bottom conductive layer is not covered by the first portion and the bottom conductive layer is disposed above the undercut to form a source and a drain on the oxide channel layer. 201222821

AU1009002 36141twf.doc/I The patterned photoresist layer is described in the present invention. The method for removing the unpatterned photoresist acoustic conductive layer and the bottom conductive layer includes the following steps. : Process 'to remove the top conductive reed that is not covered by the patterned photoresist layer: g dry _ process to remove the bottom trace not covered by the patterned photoresist layer

In the present invention, the method of manufacturing the top conductive layer and the partial oxide semiconductor material which are not removed by the first portion includes a wet process to remove a top of the cover. a conductive layer and a portion of an oxide semiconductor material layer. In the present invention, the method of removing the bottom conductive layer not covered by the first portion and the bottom conductive layer above the undercut includes the unsettled one. To remove the bottom conductive layer not covered by the first portion and the bottom conductive layer above the undercut. In an embodiment of the invention, the method of removing a portion of the layer includes an ashing process. In an embodiment of the invention, after forming the source and the drain, the method of fabricating the thin film transistor further comprises removing the first portion. The invention further proposes a thin film transistor comprising a dummy, an insulating layer, an oxide semiconductor channel layer, a source and a drain. The gate insulation is on the gate. The oxide semiconductor channel layer is on the gate insulating layer. The source and the drain are on the oxide semiconductor channel layer. The horizontal distance between the bottom of the oxide semiconductor channel layer and the bottom of one of the poles is about 0.1 μm to 1 μm. 201222821

V2 36141twf.doc/I In one embodiment of the invention, the source includes a first conductive layer and a second conductive layer. The first conductive layer is on the oxide semiconductor channel layer. The second conductive layer is located on the first conductive layer, wherein the bottom of the first conductive layer protrudes from the bottom of the second conductive layer by a horizontal distance of about μ1 μηη to 15 μηη °. In one embodiment of the present invention, the source is There is further included a third conductive layer 'which is located on the second conductive layer. In an embodiment of the invention, the materials of the first conductive layer, the second conductive layer and the third conductive layer are respectively selected from the group consisting of copper (Cu), molybdenum (Mo), titanium (Ti), and aluminum (A1). At least one of a group consisting of tungsten (w), silver (Ag), gold (Au), and alloys thereof. Based on the above, the thin film transistor of the present invention and the method of fabricating the same, by forming a patterned photoresist layer having at least two different thicknesses, respectively forming an oxide semiconductor channel layer, a source and a drain of the thin film transistor, thereby contributing to Reduce process steps and costs. Further, the thin film transistor of the present invention and the method of manufacturing the same can prevent the structure of the oxide semiconductor channel layer from being damaged, and can improve the undercut caused by the side etching. The above-described features and advantages of the present invention will become more apparent from the following description. [Embodiment] FIG. 1A to FIG. 1D are schematic views showing a manufacturing process of a thin film transistor according to a first embodiment of the present invention. Referring to FIG. 1A, a substrate is provided and a drain 102 is formed on the substrate 100. The substrate 1 is, for example, a glass substrate 201222821

AU1009002 36141twf.doc/I's rigid substrate' or a flexible substrate such as a plastic substrate. The gate 1〇2 is, for example, a single-layer or multi-layer stacked conductive material, such as selected from the group consisting of copper (Cu), molybdenum (M〇), titanium (Ti), aluminum (A1), tungsten (W), silver (Ag), At least one of the group consisting of gold (Au) and its alloy, and the method of forming the gate 102 can be fabricated by patterning a conductive material through a photolithography and etching process. In addition, the fabrication of the gate 102 can also be integrated with the fabrication of scan lines (not shown) or common lines (not shown). Next, a gate insulating layer 104, an oxide semiconductor material layer 106, and a conductive layer 1〇8 are sequentially formed on the substrate 10A. The gate insulating layer 1〇4 covers the gate 102. The gate insulating layer 1〇4 may be a single-layer structure or a multi-layer stacked composite structure, and the material thereof is, for example, a dielectric material such as tantalum nitride, hafnium oxide or tantalum oxynitride. The oxide semiconductor material layer 106 covers the gate insulating layer 1〇4. The material of the oxide semiconductor material layer 106 is, for example, Indium-Gallium-Zinc Oxide (IGZO), Indium-Zinc Oxide (IZO), Gallium Zinc Oxide (GalHum_Zinc (10), for example, GZO). Oxidized zinc (Aiuminum_zinc 〇xide, AZ〇), zinc tin oxide (Zinc>Tin 〇xide, ZTO) or indium tin oxide (Indium-Tin 〇xide, ITO). The conductive layer i 8 covers the oxide semiconductor material layer i 〇 6 . The conductive layer 108 may be a single layer structure or a multilayer stacked composite structure, and is made of a metal material such as copper (m), molybdenum (Mo) or an alloy thereof. The material of the conductive layer '1〇8' may be the same as or different from the material of the gate 102. After the day, a patterned photoresist layer 11 is formed on the conductive layer 108. The patterned photoresist layer 110 includes two first portions 11〇a and a second portion li〇b, wherein the second portion 110b is connected between the two first portions 110a, and the thickness of each first portion is greater than the second portion 11 The thickness of 〇b. The patterned photoresist layer 201222821 AU1009002 36141twf.doc/I of the second portion 110b is, for example, located above the subsequent predetermined formation channel region. In one embodiment, the patterned photoresist layer 11 is formed by a step process or a process. For example, the present embodiment may be formed entirely on the conductive layer (10) to form a layer of material (not shown), and then the photoresist is patterned using a tone mask to form the patterned photoresist layer 110 described above. . The present embodiment is a gift or a genre = ming', but the invention is not limited thereto. Referring to FIG. 1B', the patterned photoresist layer 11G is used as a mask to cover the conductive layer (10) and the oxide body layer 106 covered by the photoresist layer 11G to form an oxide semiconductor channel layer and is located at 2 light. Resistance layer U. The patterning between the two: Inf== in the embodiment, the method of removing the unpatterned light is transparent, and the engraving process is performed to remove the unmasked photoresist layer 110. Insect =:. 6. The first wet paste process makes it possible to use the money engraving agent used in the wet etching process without selecting the ratio. Specifically, the first knife I has a different etched copper acid as a light · to remove the lead fH 2 oxide semi-conductive layer _ 106 has two:: selective conductivity (I electrical layer 1 〇 _ solution _ m selection ratio (conductive semiconductor material layer _. second wet paste 12 201222821

AU1009002 36141twf.doc/I has a high etching selectivity (oxide semiconductor material layer 106 / conductive layer 1 (10)) in the oxide semiconductor material layer 1 〇 6 and the conductive layer 1 , 8 , so that the conductive layer 108 is not easily etched, and The process can be well controlled. In addition, in another embodiment, the conductive layer 1 8 and the oxide semiconductor layer 106 not covered by the patterned photoresist layer 110 may be removed by a wet etching process. That is to say, the conductive layer 108 and the oxide semiconductor material 曰106 are removed by the same shoe polish, and the money engraving agent has a similar engraving rate for the conductive layer (10) and the oxide semiconductor material layer 106, and the button engraving agent With a concentration of more than 1 wt% of the mixture containing _ liquid, that is, a mixture of phosphoric acid, nitric acid and acetic acid). Therefore, the electric layer (10) and the oxide semiconductor material layer chamber. π f removal guide Referring to FIG. 1C, the removal portion of the 夕 第 第 第 nn nn 也 也 也 也 也 也 也 也 也 也 也 也 也 也 也 图案 图案 图案 图案 图案 图案 图案 图案 图案 图案 图案 图案 图案 图案 图案 图案 图案 图案 图案 图案 图案One part of the shift f exposes the way of the graph = 'make the graph == ^ -X. ί After the second i will not be completely moved, it will still be stunned. In addition, the first portion 11Ga' remains in the patterned conductive layer. Referring to FIG. 1D, after completely removing, the patterned conductive layer covered by the first portion, the second portion 110b, which is not removed, is removed. Layer & is the mask, removed from the first part of the electrical layer 1 〇 8 ' to the oxide semiconductor channel layer

201222821 AU100 卯02 36141twid0c/I 106' is formed on the source 112 盥 is formed in the oxide semiconductor =:: 112 and the drain 114, respectively, for example, the removal is not the first - Λ ": θ __. In the case of forming a source m-material red-plated patterned conductive layer, and adopting a method for patterning, the wet-type rhyme-forming layer can have a high sculpt selection ratio (nn oxide semiconductor channel layer channel layer __ After the rHO=108v oxide semiconductor and the dipole 114, the second stage is forming the source ^B^φ, . >, 邛U〇a' to complete the thin gas of the embodiment. , which can use oxygen (10) as a reaction

SiΪΊ process. Of course, the fabrication of source 112 and secret 114 can also be integrated with the production of a bead line (not shown). First consistent example

帝曰f2A to Fig. 2E are schematic views showing a manufacturing process of a film body according to a second embodiment of the present invention. It is to be noted that the phase_reference numerals are used in Figs. 2A to 2E' and Fig. 1A to ID phase_members, and the description thereof is omitted. Referring to Figure 2A, a substrate 100 is provided and a gate 102 is formed on the substrate 1A. Next, a gate insulating layer 104, an oxide semiconductor material layer 1〇6, and a conductive layer 1〇8 are sequentially formed on the substrate 100. Thereafter, a patterned photoresist layer 210 is formed on the conductive layer 1A8. The patterned photoresist layer 210 includes two 21st corners 21a, a second portion 21b, and a third portion 210c, wherein the second portion 210b is connected between the first portions 21a, and the third portion 210c is respectively First

201222821 Auiuuyu02 36141twf.d〇c/I 210a is connected to the outside of the first part 21〇a. The thickness of each of the first portions 21〇a is, for example, greater than the thickness of the second portion 21〇b and each of the third portions 210c, and the thickness of the second portion 210b is substantially equal to the thickness of each of the third portions 21〇c. Specifically, the second portion 210b of the patterned photoresist layer 210 is, for example, located above a predetermined predetermined channel region, and each of the third portions 21c is, for example, located opposite the two opposite sides of the source and the drain. Above. In one embodiment, the patterned photoresist layer 210 is formed by a tonal process or a half-tone process. Referring to FIG. 2B, the patterned photoresist layer 21 is used as a mask to remove the conductive layer 1〇8 not covered by the patterned photoresist layer 21 to form the oxide semiconductor material layer 106 and the patterned photoresist layer. A patterned conductive layer 108· is formed between 21 turns. In an embodiment, the removing is not covered by the patterned photoresist layer 21 ^ 电 电 电 = 包括 包括 包括 包括 包括 包括 包括 包括 包括 包括 包括 包括 包括 包括 包括 包括 包括 包括 , , , , , , , , , , = = = = = = = = = = = = = = = = = = = = On the contrary, the gas has a very high selectivity ratio (conductive layer·oxide semiconductor material layer 1〇6) to the conductive layer (10) and the oxide semiconductor material layer 1() 6. The pattern is lighted with reference to FIG. 2C. The resist layer 21 is a mask, and the oxide semiconductor material layer not covered by the photoresist layer 21 is removed to form a channel layer 2G6. In the embodiment, the uncovered, compound + conductor material is removed. The method of layer 1〇6 includes performing a wet side semiconductor==oxalic acid agent to remove the exposed oxides, and removing the half-receiving process to move in the wet atmosphere as a hard mask 15

201222821 au l uuy υ 02 36141twf.doc / I 108' under the oxide semiconductor channel layer 206 will cause an undercut 216 at the sidewall thereof due to the side, and the undercut 216 occurs, for example, on the opposite side. Below the third portion 210c. In this embodiment, the undercut 216 due to the side surname causes the patterned conductive layer to protrude from the sidewalls of the oxide semiconductor channel layer 206. Referring to FIG. 2D, a portion of the patterned photoresist layer 21A is removed to reduce the thickness of the first portion 210a until the second portion 2a and the third portion are removed: in an embodiment, the portion is removed. The method of patterning the photoresist layer 21A may employ an ashing process, such as the dry side of the money oxygen plasma, to reduce the overall thickness of the patterned photoresist layer 210. Due to the thickness of the second portion 21% and the third portion (four), after the second portion 210b 3 three portions 2H)c are completely removed, there is still not completely removed $ remaining on the patterned conductive layer (10), . At this time, the remaining first portion, the sub-patterned conductive layer 'is the portion of the second skin exposed to the light, so that "the pattern is not covered by the second technique - in the body: body =: =21 of 2 reaction gas Zhao ^ and ... as with the drain 214, can be ^, conductive I ° in the formation of the source 212 embodiment of the film electro-technical step to remove the first part 2l〇a, to complete this Use dry type to go: -, ^ pulp as reaction gas to carry out ash, which can be oxygen 201222821

Auiuuyu02 36141twf.doc/I It is explained that, as shown in FIG. 2D and FIG. 2E, the first portion 210a' is exposed to the undercut in addition to exposing a portion of the patterned conductive layer 1〇8 on the channel region. A protrusion of the patterned conductive layer 1〇8' above 216. Therefore, after the exposed patterned conductive layer 1?8 is removed, the protrusion of the patterned conductive layer 1?8' over the undercut 216 can be removed, so that the source is formed

The pole 212 and the drain 214 do not protrude from the side walls of the oxide semiconductor channel layer 2〇6. In one embodiment, the oxide semiconductor channel layer 2〇6, for example, protrudes from the source 212 and the drain 214 to form a two-stage sidewall profile. The bottom surface of the oxide semiconductor channel layer 206 protrudes from the source 212 and the bottom of one of the drains 214 by a horizontal distance D1 of about 1.1 μηι to ι.〇μιη. In addition, due to the patterned conductive layer 1〇8 located above the undercut 216, the protrusion is removed by using the remaining first portion 21〇& of the patterned photoresist layer 210, thus forming a pattern When the photoresist layer 21 is turned on, the layout of the third portion 21c can be further compared according to the degree of the undercut 216 of the oxide semiconductor channel layer 206, so that the patterned conductive layer is located above the bottom layer. Can be exposed (d) to facilitate removal, as shown in Figure 2D. Third Embodiment to Be Followed Figs. 3A to 3F are views showing a manufacturing process of a film transistor in accordance with a third embodiment of the present invention. It is to be noted that the same reference numerals are used for the same members as those of Figs. 2A to 2E, and the description thereof will be omitted. The manufacturing method of the third real complement is similar to the method described in the column, but the difference between the two is as follows: the configuration of the conductive layer and the formation of the patterned conductive layer.

201222821 AU1009002 36141twf.doc/I Referring to FIG. 3A, a substrate loo is provided, and the substrate 102 is formed on the substrate 1A. Next, a gate insulating layer 1?4, an oxide semiconductor material layer 106, and a conductive layer 3?8 are sequentially formed on the substrate 1?. In one embodiment, the electrical layer 308 includes a bottom conductive layer and a top conductive layer, and the bottom conductive layer and the top conductive layer have, for example, different etch selectivity. In detail, the method for forming the conductive layer 3〇8 is, for example, sequentially forming a first conductive layer 3_, a second conductive layer, and a third conductive layer fine c on the oxide semiconductor material layer 1%, wherein the first conductive portion The layer 3G8a is, for example, a bottom conductive layer, and the second conductive layer 3· and the third conductive layer 3〇8c thereon are, for example, a top conductive layer. ^ - Conductive layer 3G8a, second conductive layer b, third conductive layer · materials can be selected from copper (〇〇, key _), titanium (9), though, crane (five), silver (Ag), gold (Au) At least one of the groups consisting of its alloys. For example, the material of the first conductive layer 308a is, for example, the material of the second conductive layer 3_, for example, the material of the third conductive layer 3 is, for example, a surface, and a composite metal structure of a plurality of layers is formed. A patterned photoresist layer is then formed on the conductive layer 3〇8. The pattern resist layer 210 includes two first portions 21〇a, a second portion 21〇b, and a 21st 'c′ where the second portion 21% is connected between the first portion and the second portion, and the f 210c is Each of the first portions 21 is connected to be located at the first portion 210a: the thickness of the portion 210a is, for example, greater than the thickness of the second portion 210b and each of the second portions 210c; #,b结_. Each third part 2 is thicker. The thickness of the second employment is substantially equal to the thickness of the barrier layer. The barrier layer 210 is a mask to remove the top conductive layer that is not covered by the octagonal layer (ie, the third conductive layer 308c and

201222821 auiuuvu02 36141twf.doc/I The second conductive layer 308b)' forms a patterned third conductive layer 3?8c and a patterned resistive layer 3_ between the first conductive layer a and 210. In an embodiment, the exposed third conductive layer 1 is removed: the second conductive layer transfer method includes performing a first wet side process, =, : by alumina acid (ie, phosphoric acid, nitric acid, and acetic acid) As a etch, please refer to 3C' to pattern the photoresist layer as a mask patterned photoresist layer (4) to cover the bottom conductive layer (ie, the first conductive layer 3 = is used for the oxide semiconductor material layer 1 〇 6 Forming a second conductive layer 3°8a, thus forming a stack such as “layer 308. In one embodiment, the method of removing the exposed second 3〇8a includes performing a dry etching process, ^, BC13 is used as the reaction gas. 〇 〇 2 and please refer to FIG. 3D, the patterned photoresist layer 21 () is used as a mask to be patterned by the photoresist layer 21 〇 covered oxide half, more than unshaped, _ body channel layer 306. In one implementation: two: go: cover the oxide semiconductor material layer 1 〇 6 method package: break through the process ' ^ for example, by oxalic acid as a _ agent. - wet Φ ^ Μ 地 」 由于 由于 由于 由于f directional wet-like process to remove the turbulent 'semiconductor material layer 106, and patterned conductive layer 308, in the iff As a hard mask, the bottom ridge caused by the side etching is widely grown at the side wall of the oxide semiconductor channel layer 3〇6, and the bottom 316 is, for example, located below the third portion 2i〇c of the opposite outer side. , for example, from the oxide semiconductor channel layer _

201222821 aujuuvu02 36141twf.doc/I Referring to FIG. 3A, a portion of the patterned photoresist layer 21A is removed to reduce the thickness of the first portion 210a until the second portion 2· and the third portion 2c〇c are removed. A portion of the upper surface of the patterned third conductive layer 3〇8c is exposed. At this time, the first portion 21〇a' which is not completely removed may remain on the patterned conductive layer 308' and expose a portion of the patterned conductive layer 308' located above the subsequent predetermined formation channel region and at the undercut. A protrusion of patterned conductive layer 308' above 316. In an embodiment, the method of removing portions of the patterned photoresist 210 may employ an ashing process that reduces the overall thickness of the patterned photoresist layer 21G by, for example, using the dry side of the oxygen plasma. Referring to FIG. 3F, the first portion 210a that has not been removed is used as a mask to remove the patterned conductive layer that is above the undercut 316 and is not covered by the first portion, and is used for the oxide semiconductor channel. Source 312 and dipole 314 are formed on layer 306. In one embodiment, the method of forming the source 312 and the gate 314 includes performing a dry process, which uses, for example, a#Bcl3 as a reactive gas to remove the exposed patterned conductive layer 3〇8%, in addition to the source, After the 312 sister pole 314, the first portion 21〇&, can be further removed to complete the fabrication of the thin film transistor of the present embodiment. In the present embodiment, the conductive layer is exposed by the portion S below the third portion 210c, so that after the dry side process, the patterned conductive layer 3 above the undercut 316 is removed. The protrusions can be removed, and the oxide semiconductor channel layer 3〇6 is, for example, a source of protrusions, 314. Further, the layout of the patterned photoresist layer 21A can also be designed in the range of the third portion 21c of the opposite outer sides in accordance with the degree of undercut M6 of the oxide semiconductor channel layer 3?6. It is worth mentioning that, due to the patterning of the first conductive layer, the pattern 20 201222821

AU1009002 36141twf.doc/I

The second conductive layer 3〇8b, and the patterned third conductive layer 3〇8c, for example, have different etch selectivity, so a dry etching process is performed to remove the patterned conductive layer not covered by the first portion 210a' The degree of layer 308, when the patterned second conductive layer 308a1, the patterned second conductive layer 308b, and the patterned third conductive layer 308c' are removed may also vary. In addition, in an embodiment, the first conductive layer 308a is patterned, and the second conductive layer 3〇8b is patterned, for example, the stacked structure has substantially continuous sidewalls, which may be vertical sidewalls or inclined sides. Tapered sidewall. Therefore, the oxide semiconductor channel layer 306 and the source 312 and the drain 314 form a two-stage sidewall profile at opposite outer sides, and the source 312 and the drain 314 form a two-stage sidewall wheel at the channel region. extravagant. For example, as shown in a partially enlarged schematic view of region A of FIG. 3F, the bottom of the oxide semiconductor channel layer protrudes from the bottom of one of the source 312 and the gate 314 (ie, the patterned first conductive layer 3〇8a, The bottom horizontal distance D2 is about 0.1 μm to i μπι, and the patterned first conductive layer is applied, and the bottom portion of the second conductive layer b is protruded, and the horizontal distance D3 of the bottom is about Ohm to L5Hm. As shown in the partially enlarged schematic view of the region b of Fig. 3p, in the channel region, the horizontal distance Μ of the bottom of the patterned second conductive layer from the patterned first conductive layer is about 0.1 μπι to 1.5 μηι. The patterned conductive layer is not covered by the first portion 21Ga', and the undercut is caused by the (4) conductor channel layer.

201222821 AU1009002 36141twf.doc/I Fourth Embodiment FIG. 4A to FIG. 4C are schematic diagrams showing a manufacturing process of an active device array substrate according to a fourth embodiment of the present invention. It should be noted that the manufacturing flow shown in FIG. 4A to FIG. 4C is the step subsequent to FIG. 3C, and the same components as those in FIGS. 4a to 4C' and FIGS. 3A to 3F are denoted by the same reference numerals and the description thereof will be omitted. . The method of manufacturing the thin film transistor of the fourth embodiment is similar to that of the third embodiment, but the difference between the two mainly lies in the manner of forming the patterned conductive layer and forming the oxide semiconductor channel layer. Referring to FIG. 4A, after forming the patterned conductive layer 3〇8, a portion of the patterned photoresist layer 210 is removed to reduce the thickness of the first portion 21〇a until the second portion 210b and the third portion. 210c was removed. At this time, the first portion 210a which is not completely removed may remain on the patterned conductive layer 3〇8, exposing a portion of the patterned conductive layer 308 located above the subsequent predetermined formation channel region, and located at the undercut 316. A protruding portion of the patterned conductive layer 3〇8 above. In one embodiment, the method of removing a portion of the patterned photoresist layer 21A may employ an ashing process which reduces the overall thickness of the φ patterned photoresist layer 210 by, for example, dry etching using oxygen plasma. Referring to FIG. 4B, the first portion 210a' that has not been removed is used as a mask to remove the top conductive layer (ie, the patterned third conductive layer 308c' and the patterned layer that is not covered by the first portion 21A. The second conductive layer 308b, and a portion of the oxide semiconductor material layer 106, and the bottom conductive layer (ie, the patterned first conductive layer 308a>f column is not removed. Therefore, the first conductive layer 3 is patterned. 〇8a, forming a patterned third conductive layer 4〇8c and a patterned second guide 22 between the first portion 21〇a′ 201222821

AU1009002 36141twf.d〇c/I electro-layered, and an oxide semiconductor is formed between the patterned portions, and the gate layer 104 is uncovered. In one embodiment, the layer is removed, The method of patterning the second conductive layer 3〇8c, patterning the second conductive screen Geyangxiang Guangli oxide semi-conducting layer 106 comprises performing i=person itf, and for example by using acid (also known as commission) , nitric acid and acetic acid, 1 compound = _ agent 4 This (four) agent has a low engraving rate for the material of the patterned first guide 308a. The smelting type is formed by the wet-side process of the tangential material. The second conductive layer is patterned, and the second conductive layer is stripped, and the wet pattern is not easy to remove the layer 308a, so that the bottom of the oxide semiconductor channel layer lion is caused by the roll. Cut 416. In other words, the patterned first conductive & ^ 3 〇 8a, for example, is self-patterned third conductive layer her, patterned second conductive 曰 408b and sidewalls of the oxide semiconductor channel layer 4 〇 6 protrude. 4C' is a masked first portion 21〇a• removed, and the patterned first conductive layer covered by the unbroken first portion 210a' is removed. 3_, and a patterned first conductive layer over the bit 416 to form a patterned first conductive layer 408a. Patterning the first conductive layer 4〇8a, patterning the second conductive layer 4嶋, and patterning the third conductive layer The layer 4 敝 is, for example, a laminate constituting the patterned conductive layer 408 to serve as the source 412 and the drain 414 on the oxide semiconductor channel layer 4 〇 6 respectively. In an embodiment, the above removal is not performed. The method of patterning the first conductive layer 308a' covered by 210a and the patterned first conductive layer 3?8a over the undercut 416 includes performing a dry etching process that removes exposure using, for example, CL and BCI3 as reactive gases. Patterning the first conductive layer 308a1. Further, forming the source 412 and the drain 23

201222821 AU1009002 36141twf.doc/I 414 After the first portion 210a' can be further removed, the fabrication of the thin film transistor of the present embodiment is completed. The stacked structure formed by the above-described patterned third conductive layer 408c and patterned second conductive layer 408b has, for example, a substantially continuous side wall which may be a vertical side wall or a slant side wall. In addition, the oxide semiconductor channel layer 406 and the source 412 and the gate 414 may, for example, form a two-stage sidewall profile at two opposite outer sides and the source 412 and the gate 414 may form two segments at the channel region, for example. Side wall profile. A portion of the oxide semiconductor channel layer 406 of the present embodiment protrudes from the bottom of one of the source 412 and the drain 414 (also - the bottom of the patterned first conductive layer 408a). The horizontal distance is about μ1 μηι to 1 μπι, and the bottom of the patterned first conductive layer 408a protrudes from the bottom of the patterned second conductive layer 408b by a horizontal distance of about 01 μm to i5 μm. In this embodiment, the wet etching process is first used to simultaneously remove the patterned third conductive layer 3 8c, which is not covered by the first portion 2, the patterned conductive layer 308b, and the partial oxide semiconductor material layer 1 〇6, leaving the first conductive layer 308a, and then the unbroken first portion 210a is removed by the dry etch process to cover the patterned first conductive layer 3〇8a. With such a φ, the undercut caused by the isotropic wet etching process to the oxide semiconductor channel layer 406 can be eliminated. Specifically, in the third and fourth embodiments, the electrical-composite laminated structure in which the first conductive layer 308a is formed as the bottom conductive layer and the second conductive conductive layer is formed as the top conductive layer = ^ is explained, but the invention is not limited thereto. Of course, in other embodiments, the bottom conductive layer is composed of, for example, a plurality of metal layers, and the top conductive layer is also 24 201222821

/\kj i wy\j〇2 36141 twf.doc/I 'There is a variation and application in the technical field, so for example, it is composed of a single layer or a plurality of metal layers, and the general knowledge can be used according to the foregoing embodiment. I know that I will not repeat them. Moreover, it should be noted that the manufacturing method of the above-mentioned thin film transistor is mainly a detailed description of the process of forming an oxide semiconductor channel layer, a source and a immersive step, which can be implemented by those skilled in the art, but And # Use the scope of the mosquito side. As for _ electro-crystal rhyme other components or cloth

The bureau can be appropriately adjusted according to the technology of the art to which the person skilled in the art knows, and is not limited to the above embodiment. In summary, the thin film transistor of the present invention and the method of fabricating the same have at least the following advantages: 1. The thin film transistor of the above embodiment and the method of fabricating the same, the oxide semiconductor is formed by a patterned photoresist layer having a plurality of thicknesses The channel layer as well as the source and drain are used, so using this mask process can help reduce the steps and costs. 2. The thin film transistor of the above embodiment and the method of manufacturing the same can prevent the oxide semiconductor channel layer from being damaged and improve the undercut phenomenon caused by the side etching, thereby enabling the process to be well controlled. 3. The thin film transistor of the above embodiment and its method of fabrication can be integrated with existing processes' and are widely used in the formation of thin film transistors of a variety of different layouts. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention to those skilled in the art, and may be modified and modified without departing from the spirit and scope of the invention. Therefore, this 25

201222821 AU1009002 36141 twf.doc/I The scope of protection of the invention is subject to the definition of the scope of the patent application. BRIEF DESCRIPTION OF THE DRAWINGS Figs. 1A to 1D are views showing a manufacturing process of a thin film transistor according to a first embodiment of the present invention. 2A to 2E are schematic views showing a manufacturing process of a thin film transistor according to a second embodiment of the present invention. 3A to 3F are views showing a manufacturing process of a thin film transistor according to a third embodiment of the present invention. 4A to 4C are schematic views showing a manufacturing process of an active device array substrate in accordance with a fourth embodiment of the present invention. [Main component symbol description] 100: Substrate 102: Gate 104: Gate insulating layer 106: Oxide semiconductor material layers 106', 206, 306, 406: Oxide semiconductor channel layers 108, 308: Conductive layers 108', 308' 408: patterned conductive layers 110, 210: patterned photoresist layers 110a, 110a', 210a, 210a, first portions 110b, 210b: second portions 112, 212, 312, 412: source 201222821

AU1U09002 36141twf.doc/I 114, 214, 314, 414: drain 210c: third portion 216, 316, 416: undercut 308a: first conductive layer 308a', 408a: patterned first conductive layer 308b: second Conductive layer 308b', 408b: patterned second conductive layer 308c: third conductive layer 308c', 408c: patterned third conductive layer A, B: region D Bu D2, D3, D4: horizontal distance

27

Claims (1)

201222821 Auiuuyu02 36141twf.doc/I VII. Patent application scope: 1. A method for manufacturing a thin film transistor, comprising: forming a gate on a substrate; forming a layer on the substrate in sequence - riding a layer of H compound semiconductor material and a conductive a layer; a T sub-clay on the upper layer of the electro-layer - a hybrid layer, the patterned optical confinement layer: a portion and a second portion connected between the first portions, the first portion The thickness is greater than the thickness of the second portion; each of the luminescence _ is a screen, and the patterned light is not formed by the layered semiconductor-free material to form a patterned conductive layer between the oxidized photoresist layers. a layered portion of the patterned layer to reduce the thickness of the portions until the second portion is removed; and the portions that are not removed are masked and removed The patterned conductive layer of the first cover forms a source and a gate on the oxide semiconductor channel layer. The manufacturer of the thin film transistor according to the first aspect of the patent application, wherein the patterned photoresist layer is processed by a gray-scale (Gray_Tc)neMask, Μ) process or a half-tone (Half_TQneMask, htm) process. Formed. The method for removing the conductive layer and the oxide semiconductor material layer not covered by the patterned contact layer in the manufacturing method of the thin film transistor according to the first aspect of the invention includes: js fishing ^订-第湿1 insect engraving process to remove the conductive layer not covered by the patterned photoresist layer; and 28 201222821 AU1009002 36141 twf.doc/I frost frost - design process, Qing except The patterned photoresist; ====' it: the first, _ different. The method of manufacturing a compound semiconductor material layer of the thin film transistor described in the above-mentioned method, the conductive layer covered with the resist layer and the oxygen-in-wet type The last name is engraved to cover the conductive layer and the oxide semiconductor = map; the first resist layer is coated, and the semiconductor material layer is moved by the conductive layer method, wherein the part of the removal of Wei Guang is manufactured. The application for the full-time _ 所 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = The pattern that is not covered by the first part is a wet type of money. 7. If you apply for the thin amine method described in item 1, the source is recorded, and the shift is 1 = a method for manufacturing a T8-type thin film transistor; in the section of "Hai", forming a gate on a substrate; forming a gate insulating layer, a material layer, and the like on the substrate a conductive layer; an oxide semiconductor material forms a pattern on the conductive layer, and the first portion is connected to the a thinned photoresist layer, a third portion of each of the first-part connections, each of the second, second, and second thicknesses greater than the thickness of the 29th 201222821 AU1009002 36141twf.doc/I and the second portion The thickness of the third portion is equal to each of the third portions and the layer is a mask, and the removal is not caused by the patterned photoresist layer in the oxide semiconductor channel layer. The first part is at the side wall of the track layer, and the undercut is located at the degree of reduction, and the thick guide: is formed on the undercut semiconductor semiconductor channel layer to form a source and a :: an electrical layer for the oxidation 9· The method for fabricating an oxide semiconductor layer by a half-tone ΪΞ method includes a layer covering the conductive layer. The layer and the cover of the formula = _, covered with a bribe _ (four) photo-progenitor layer covered as described in the scope of claim 8 'where the conductive layer includes - bottom conductive layer and" method 30 201222821 AU1009002 36141twf.doc /I ===The conductive layer covered by the resist layer and the oxide semi-conductive layer are covered by the cut-off process, Cover the photoresist pattern to remove the patterned photoresist layer is not covered, the line - _ second wet process, not to remove the oxide layer covers the semiconductor material of the pattern layer. Ρ方Α::, The manufacturing method of the thin film transistor according to Item 8, wherein the method of removing the patterned contact layer of the crucible comprises ashing. 13. The method for forming the source and the ship includes: the first portion of the body that is not removed is a mask, and the first one is located above the undercut and is not covered by the first portion. Pattern = Η. As described in the application of the eighth paragraph _ transistor ^ method after the formation of the source and the extreme, including the removal of the first 15. -1 film transistor manufacturing methods, including Forming a gate on a substrate; forming a gate insulating layer, an oxygen layer, a bottom conductive layer, and a top conductive layer on the substrate; the dry body material forms a pattern on the top conductive layer a photoresist layer, the patterned layer comprising two first portions, a second portion connected between the first portions, and 31 201222821 AU1009002 36141twf.doc/I 2 and a third portion connected to each of the first portions a thickness of the second portion, wherein the thickness of the second portion is greater than the thickness; and qualitatively equal to each of the third portions being patterned The resist layer is a mask covering the top conductive layer and the bottom conductive layer to break the patterned photoresist of the patterned photoresist layer removing portion until the second portion and the third portions are removed The portions of the first portion that are not removed are the top conductive layer covered by the cover portion and a portion of the oxide first layer, wherein the sidewall of the oxide semiconductor channel layer is caused by the side contact Mu in the oxide semiconductor channel is not removed, the first - Αβ inflammation ======= Lu 17 · γ please patent! The method for manufacturing a thin film transistor according to claim 15, wherein the method for removing the top conductive layer of the top conductive layer that is not covered by the photoresist layer comprises: electrically increasing and "promoting-wet" The last name engraving process is to remove the top conductive layer that is not patterned, and the cover layer is ϊίίΐΐ, and the wire is not observed (4) the first resistance layer 32 201222821 AU1009002 36141twf.doc/I 18. Apply The method of claim 15, wherein the first portion, the top conductive layer covered by the first portion of the transistor, and the portion of the transistor are removed from the layer The method includes: '" an oxide semiconductor material performing a wet etching process to remove the un-conductive layer and a portion of the oxide semiconductor material 19. The thin body described in claim 15 of the patent application, wherein the first part that has not been removed is the military power; the electric power (10) is located on the bottom of the dry side process to move Except for the electrical layer not covered by the first portions and the bottom conductive layer above the undercut. In the case of the decision, the processing of the thin film transistor described in the fifteenth patent section is requested. The method of removing the portion of the patterned photoresist layer by the towel comprises the method of ashing, such as the manufacturing of the thin film transistor described in claim 8. After the opening of the source and the drain, the method further includes removing the first 22-type thin film transistors, including: - a gate; a gate insulating layer on the gate; a vaporized semiconductor channel layer, Located on the gate insulating layer; and a pole and a drain on the oxide semiconductor channel layer, wherein a bottom of the S vapor-semiconductor channel layer protrudes from the source and a bottom horizontal distance of the bottom is about 0.1 Ιιη to 1 μΐϋ. A thin film transistor according to claim 22, wherein the source includes: a first conductive layer on the oxide semiconductor channel layer; and a second conductive layer And a layer on the first conductive layer, wherein a bottom of the first conductive layer protrudes from a bottom of the second conductive layer by a horizontal distance of about 0.1 μm to 1.5 μm. 24. The thin film transistor of claim 23, wherein the source further comprises a third conductive layer on the second conductive layer. The thin film transistor according to claim 24, wherein the materials of the first conductive layer, the second conductive layer and the third conductive layer are respectively selected from the group consisting of copper, molybdenum, titanium, Ming, and crane. At least one of the group consisting of silver, gold, and alloys thereof. 34