CN102157387A - Thin film transistor and method of manufacturing the same - Google Patents
Thin film transistor and method of manufacturing the same Download PDFInfo
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- CN102157387A CN102157387A CN2011100267502A CN201110026750A CN102157387A CN 102157387 A CN102157387 A CN 102157387A CN 2011100267502 A CN2011100267502 A CN 2011100267502A CN 201110026750 A CN201110026750 A CN 201110026750A CN 102157387 A CN102157387 A CN 102157387A
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- Thin Film Transistor (AREA)
Abstract
The invention discloses a thin film transistor and a manufacturing method thereof. A gate electrode, a gate insulating layer, an oxide semiconductor material layer, a conductive layer and a patterned photoresist layer are sequentially formed on a substrate. The patterned photoresist layer comprises two first parts and a second part connected between the first parts, and the thickness of the first parts is larger than that of the second parts. And removing the conductive layer and the oxide semiconductor material layer which are not covered by the patterned photoresist layer by using the patterned photoresist layer as a mask to form an oxide semiconductor channel layer and a patterned conductive layer positioned between the oxide semiconductor channel layer and the patterned photoresist layer. Removing part of the patterned photoresist layer to reduce the thickness of the first portion until the second portion is removed. And removing the patterned conductive layer uncovered by the first part by taking the first part which is not removed as a mask so as to form a source electrode and a drain electrode on the oxide semiconductor channel layer.
Description
Technical field
The present invention relates to a kind of thin-film transistor and manufacture method thereof, and particularly relevant for a kind of thin-film transistor and the manufacture method thereof that can avoid the oxide semiconductor channel layer to sustain damage.
Background technology
Along with showing being showing improvement or progress day by day of science and technology, people can make life convenient more by the auxiliary of display, and for asking light, the thin characteristic of display, (flat panel display FPD) becomes present main flow to impel flat-panel screens.Common flat-panel screens comprise LCD (liquid crystal display, LCD), plasma scope (plasma display), electro-exciting light-emitting display (electroluminescent display) etc.With the LCD popularized the most at present is example, and it is made of thin-film transistor array base-plate, colored optical filtering substrates and the liquid crystal layer that is sandwiched between the two.Particularly, the thin-film transistor that in display, is used in a large number, its structural design or the selection of material can directly have influence on the performance of product especially.
On known thin-film transistor array base-plate, adopt amorphous silicon (amorphous silicon, a-Si) thin-film transistor or low-temperature polysilicon film transistor are as the switching device of each sub-pixel more.In recent years, existing research points out that oxide semiconductor (oxide semiconductor) thin-film transistor compared to amorphous silicon film transistor, has higher carrier mobility (carrier mobility); And oxide semiconductor thin-film transistor then has preferable critical voltage (threshold voltage, Vth) uniformity compared to low-temperature polysilicon film transistor.Therefore, the potential key element that becomes flat-panel screens of future generation of oxide semiconductor thin-film transistor.
Generally can use aluminic acid as the source electrode of etching oxide semiconductor thin-film transistor and the etchant of drain electrode.Yet, aluminic acid is not high for the etching selectivity of the oxide semiconductor channel layer of oxide semiconductor thin-film transistor, thereby make the source electrode of oxide semiconductor thin-film transistor and the etching program of drain electrode be very difficult to control, and then have influence on the electrical performance and the reliability of oxide semiconductor thin-film transistor.
Summary of the invention
The invention provides a kind of method of manufacturing thin film transistor, can reduce the technology of using mask, and avoid the oxide semiconductor channel layer to sustain damage.
The invention provides a kind of thin-film transistor, it has outstanding oxide semiconductor channel layer.
The present invention proposes a kind of method of manufacturing thin film transistor, and it comprises the following steps.On substrate, form grid.On substrate, form gate insulation layer, oxide semiconductor material layer and conductive layer in regular turn.Form the patterning photoresist layer on conductive layer, the patterning photoresist layer comprises two first one and be connected between first one second one, and each thickness of first one is greater than second one thickness.With the patterning photoresist layer is mask, removes not to be patterned conductive layer and the oxide semiconductor material layer that photoresist layer covers, to form oxide semiconductor channel layer and the patterned conductive layer between oxide semiconductor channel layer and patterning photoresist layer.Remove the patterning photoresist layer of part, be removed up to second one with the thickness that reduces first one.With first one of not being removed is mask, removes not by the patterned conductive layer of first covering, to form source electrode and drain electrode on the oxide semiconductor channel layer.
In one embodiment of this invention, (Gray-ToneMask, GTM) (Half-Tone Mask, HTM) technology forms above-mentioned patterning photoresist layer for technology or intermediate tone mask by the gray tone mask.
In one embodiment of this invention, above-mentioned removing is not patterned conductive layer that photoresist layer covers and the method for oxide semiconductor material layer comprises the following steps.Carry out first wet etch process, be not patterned the conductive layer that photoresist layer covers to remove.Carry out second wet etch process, be not patterned the oxide semiconductor material layer that photoresist layer covers to remove, wherein the employed etchant of first wet etch process is different with the employed etchant of second wet etch process.
In one embodiment of this invention, the above-mentioned method that is not patterned conductive layer that photoresist layer covers and oxide semiconductor material layer that removes comprises and carries out wet etch process, be not patterned conductive layer and the oxide semiconductor material layer that photoresist layer covers to remove, wherein conductive layer and oxide semiconductor material layer adopt the same etch agent to remove.
In one embodiment of this invention, the above-mentioned method that removes the patterning photoresist layer of part comprises cineration technics.
In one embodiment of this invention, the method for above-mentioned formation source electrode and drain electrode comprises that with first one of not being removed be mask, carries out Wet-type etching to remove not by the patterned conductive layer of first covering.
In one embodiment of this invention, after forming source electrode and drain electrode, method of manufacturing thin film transistor more comprises and removes first one.
The present invention proposes a kind of method of manufacturing thin film transistor in addition, and it comprises the following steps.On substrate, form grid.On substrate, form gate insulation layer, oxide semiconductor material layer and conductive layer in regular turn.Form the patterning photoresist layer on conductive layer, the patterning photoresist layer comprises two first one, is connected in second one and two the 3rd ones of being connected with each first one between first one.Each thickness of first one is greater than second one thickness, and second one thickness equals each thickness of the 3rd one in fact.With the patterning photoresist layer is mask, remove and be not patterned conductive layer and the oxide semiconductor material layer that photoresist layer covers, to form oxide semiconductor channel layer and the patterned conductive layer between oxide semiconductor channel layer and patterning photoresist layer, wherein occur in the side-walls of oxide semiconductor channel layer, and undercutting is positioned at the 3rd subordinate side because of the undercutting that lateral erosion caused.Remove the part the patterning photoresist layer, with reduce first one thickness up to second one with the 3rd one be removed.With first one of not being removed is mask, removes to be positioned at the undercutting top and not by the patterned conductive layer of first covering, to form source electrode and drain electrode on the oxide semiconductor channel layer.
In one embodiment of this invention, above-mentioned patterning photoresist layer forms by gray tone masking process or intermediate tone mask technology.
In one embodiment of this invention, above-mentioned removing is not patterned conductive layer that photoresist layer covers and the method for oxide semiconductor material layer comprises the following steps.Carry out dry etch process, be not patterned the conductive layer that photoresist layer covers to remove.Carry out wet etch process, be not patterned the oxide semiconductor material layer that photoresist layer covers to remove.
In one embodiment of this invention, above-mentioned conductive layer comprises end conductive layer and top conductive layer, is not patterned conductive layer that photoresist layer covers and the method for oxide semiconductor material layer comprises the following steps and remove.Carry out first wet etch process, be not patterned the top conductive layer that photoresist layer covers to remove.Carry out dry etch process, be not patterned the end conductive layer that photoresist layer covers to remove.Carry out second wet etch process, be not patterned the oxide semiconductor material layer that photoresist layer covers to remove.
In one embodiment of this invention, the above-mentioned method that removes the patterning photoresist layer of part comprises cineration technics.
In one embodiment of this invention, the method for above-mentioned formation source electrode and drain electrode comprises that with first one of not being removed be mask, carries out dry-etching and is positioned at the undercutting top and not by the patterned conductive layer of first covering to remove.
In one embodiment of this invention, after forming source electrode and drain electrode, method of manufacturing thin film transistor more comprises and removes first one.
The present invention proposes a kind of method of manufacturing thin film transistor again, and it comprises the following steps.On substrate, form grid.On substrate, form gate insulation layer, oxide semiconductor material layer, end conductive layer and top conductive layer in regular turn.Form the patterning photoresist layer on the conductive layer of top, the patterning photoresist layer comprises two first one, is connected in second one and two the 3rd ones of being connected with each first one between first one.Each thickness of first one is greater than second one thickness, and second one thickness equals each thickness of the 3rd one in fact.With the patterning photoresist layer is mask, removes not to be patterned top conductive layer and the end conductive layer that photoresist layer covers.Remove the part the patterning photoresist layer, with reduce first one thickness up to second one with the 3rd one be removed.With first one of not being removed is mask, remove not by the top conductive layer of first covering and partial oxide semiconductor material layer, between end conductive layer and gate insulation layer, to form the oxide semiconductor channel layer, wherein occur in the side-walls of oxide semiconductor channel layer because of the undercutting that lateral erosion caused.With first one of not being removed is mask, removes not by the end conductive layer of first covering and the end conductive layer that is positioned at the undercutting top, to form source electrode and drain electrode on the oxide semiconductor channel layer.
In one embodiment of this invention, above-mentioned patterning photoresist layer forms by gray tone masking process or intermediate tone mask technology.
In one embodiment of this invention, above-mentioned removing is not patterned top conductive layer that photoresist layer covers and the method for end conductive layer comprises the following steps.Carry out wet etch process, be not patterned the top conductive layer that photoresist layer covers to remove.Carry out dry etch process, be not patterned the end conductive layer that photoresist layer covers to remove.
In one embodiment of this invention, above-mentioned is mask with first one of not being removed, remove and do not comprised and carry out wet etch process, to remove not by the top conductive layer of first covering and partial oxide semiconductor material layer by the method for the top conductive layer of first covering and partial oxide semiconductor material layer.
In one embodiment of this invention, above-mentioned is mask with first one of not being removed, remove not and to be comprised by the end conductive layer of first covering and the method that is positioned at the end conductive layer of undercutting top and to carry out dry etch process, to remove not by the end conductive layer of first covering and the end conductive layer that is positioned at the undercutting top.
In one embodiment of this invention, the above-mentioned method that removes the patterning photoresist layer of part comprises cineration technics.
In one embodiment of this invention, after forming source electrode and drain electrode, method of manufacturing thin film transistor more comprises and removes first one.
The present invention proposes a kind of thin-film transistor again, and it comprises grid, gate insulation layer, oxide semiconductor channel layer, source electrode and drain electrode.Gate insulation layer is positioned on the grid.The oxide semiconductor channel layer is positioned on the gate insulation layer.Source electrode and drain electrode are positioned on the oxide semiconductor channel layer.Outstanding source electrode in the bottom of oxide semiconductor channel layer and one of them the horizontal range of bottom of draining are about 0.1 μ m to 1 μ m.
In one embodiment of this invention, above-mentioned source electrode comprises first conductive layer and second conductive layer.First conductive layer is positioned on the oxide semiconductor channel layer.Second conductive layer is positioned on first conductive layer, and wherein the horizontal range of the bottom of outstanding second conductive layer in the bottom of first conductive layer is about 0.1 μ m to 1.5 μ m.
In one embodiment of this invention, above-mentioned source electrode more comprises the 3rd conductive layer, and it is positioned on second conductive layer.
In one embodiment of this invention, the material of above-mentioned first conductive layer, second conductive layer and the 3rd conductive layer is respectively and is selected from the group that is made up of copper (Cu), molybdenum (Mo), titanium (Ti), aluminium (Al), tungsten (W), silver (Ag), gold (Au) and alloy thereof at least one.
Based on above-mentioned, thin-film transistor of the present invention and manufacture method thereof form oxide semiconductor channel layer, source electrode and the drain electrode of thin-film transistor respectively by the patterning photoresist layer with at least two kinds of different-thickness, so can help to reduce processing step and cost.In addition, thin-film transistor of the present invention and manufacture method thereof can be avoided the structure of oxide semiconductor channel layer to produce and destroy defective, and can improve the undercut phenomenon that causes because of lateral erosion.
For above-mentioned feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and cooperate appended accompanying drawing to be described in detail below.
Description of drawings
Figure 1A to Fig. 1 D is the manufacturing process schematic diagram according to a kind of thin-film transistor of the first embodiment of the present invention;
Fig. 2 A to Fig. 2 E is the manufacturing process schematic diagram according to a kind of thin-film transistor of the second embodiment of the present invention;
Fig. 3 A to Fig. 3 F is the manufacturing process schematic diagram according to a kind of thin-film transistor of the third embodiment of the present invention;
Fig. 4 A to Fig. 4 C is the manufacturing process schematic diagram according to a kind of active component array base board of the fourth embodiment of the present invention.
Wherein, Reference numeral
100: substrate 102: grid
104: gate insulation layer 106: the oxide semiconductor material layer
106 ', 206,306,406: the oxide semiconductor channel layer
108,308: conductive layer
108 ', 308 ', 408: patterned conductive layer 110,210: patterning photoresist layer
110a, 110a ', 210a, 210a ': first 110b, 210b: second one
112,212,312,412: source electrode 114,214,314,414: drain electrode
210c: the 3rd one 216,316,416: undercutting
308a: the first conductive layer 308a ', 408a: patterning first conductive layer
308b: the second conductive layer 308b ', 408b: patterning second conductive layer
308c: the 3rd conductive layer 308c ', 408c: patterning the 3rd conductive layer
A, B: region D 1, D2, D3, D4: horizontal range
Embodiment
First embodiment
Figure 1A to Fig. 1 D is the manufacturing process schematic diagram according to a kind of thin-film transistor of the first embodiment of the present invention.Please refer to Figure 1A, substrate 100 is provided, and on substrate 100, form grid 102.Substrate 100 for example is the hard substrate (rigid substrate) of glass substrate, or as bendable substrate (flexible substrate) of plastic substrate etc.Grid 102 for example is the electric conducting material that single or multiple lift stacks, as be selected from the group that is made up of copper (Cu), molybdenum (Mo), titanium (Ti), aluminium (Al), tungsten (W), silver (Ag), gold (Au) and alloy thereof at least one, and the formation method of grid 102 can come patterning conductive material to make by photoetching and etch process.In addition, the making of grid 102 can also be integrated with the making of scan line (not illustrating) or common line (not illustrating).
Then, on substrate 100, form gate insulation layer 104, oxide semiconductor material layer 106 and conductive layer 108 in regular turn.Gate insulation layer 104 cover gate 102.Gate insulation layer 104 can be the composite construction that single layer structure or multilayer stack, and its material for example is dielectric materials such as silicon nitride, silica or silicon oxynitride.Oxide semiconductor material layer 106 covering gate insulating barrier 104.The material of oxide semiconductor material layer 106 for example is indium gallium zinc oxide (Indium-Gallium-Zinc Oxide, IGZO), indium-zinc oxide (Indium-Zinc Oxide, IZO), gallium zinc oxide (Gallium-Zinc Oxide, GZO), aluminum zinc oxide (Aluminum-Zinc Oxide, AZO), zinc tin oxide (Zinc-Tin Oxide, ZTO) or indium tin oxide (Indium-Tin Oxide, ITO) etc.Conductive layer 108 capping oxide semiconductor material layers 106.Conductive layer 108 can be the composite construction that single layer structure or multilayer stack, and its material for example is metal materials such as copper (Cu), molybdenum (Mo) or its alloy.The material of conductive layer 108 can be identical or different with the material of grid 102.
Afterwards, on conductive layer 108, form patterning photoresist layer 110.Patterning photoresist layer 110 comprises two first 110a and second 110b, and wherein second 110b is connected between 2 first 110a, and the thickness of each first 110a is greater than the thickness of second 110b.Second 110b of patterning photoresist layer 110 for example is the top that is positioned at follow-up predetermined formation channel region.In one embodiment, patterning photoresist layer 110 forms by gray tone masking process or intermediate tone mask technology.For example, present embodiment can then use gray tone mask or intermediate tone mask light shield to come the patterning photoresist, to form above-mentioned patterning photoresist layer 110 prior to form one deck photoresist (not illustrating) on the conductive layer 108 comprehensively.Though present embodiment is to be that example illustrates with gray tone masking process or intermediate tone mask technology, the invention is not restricted to this.
Please refer to Figure 1B, with patterning photoresist layer 110 is mask, remove and be not patterned the conductive layer 108 and oxide semiconductor material layer 106 that photoresist layer 110 covers, with form oxide semiconductor channel layer 106 ' and oxide semiconductor channel layer 106 ' and patterning photoresist layer 110 between patterned conductive layer 108 '.Particularly, in one embodiment, removing the conductive layer 108 that is not patterned photoresist layer 110 coverings can be by carrying out first wet etch process earlier, to remove the conductive layer 108 that is not patterned photoresist layer 110 coverings with the method for oxide semiconductor material layer 106; Then, carry out second wet etch process again, be not patterned the oxide semiconductor material layer 106 that photoresist layer 110 covers to remove.The employed etchant of first wet etch process is different with the employed etchant of second wet etch process, and has different etching selectivities respectively.Particularly, first wet etch process for example is to utilize H
2O
2Copper acid remove conductive layer 108 as etchant, and second wet etch process for example is to remove oxide semiconductor material layer 106 by oxalic acid as etchant.Because the employed etchant of first wet etch process has very high etching selectivity (conductive layer 108/ oxide semiconductor material layer 106) for conductive layer 108 and oxide semiconductor material layer 106, thereby is difficult for etching oxide semiconductor material layer 106.The employed etchant of second wet etch process has very high etching selectivity (oxide semiconductor material layer 106/ conductive layer 108) for oxide semiconductor material layer 106 and conductive layer 108, thereby be difficult for etching conductive layer 108, and make technology can obtain good control.
In addition, in another embodiment, can remove by wet etch process and not be patterned the conductive layer 108 and oxide semiconductor material layer 106 that photoresist layer 110 covers.That is to say that conductive layer 108 is to adopt identical etchant to remove with oxide semiconductor material layer 106, etchant has close rate of etch for conductive layer 108 and oxide semiconductor material layer 106, and etchant for example is H
2O
2With concentration fluorine-containing (F) mixtures of liquids, perhaps use aluminic acid (that is mixture of phosphoric acid, nitric acid and acetic acid) greater than 1wt%.Therefore, only need to use a kind of etchant to carry out wet etch process and can remove conductive layer 108 and oxide semiconductor material layer 106 simultaneously.
Please refer to Fig. 1 C, remove the patterning photoresist layer 110 of part, be removed up to second 110b with the thickness that reduces by first 110a, and expose patterned conductive layer 108 ' the upper surface of a part.In one embodiment, the method for patterning photoresist layer 110 that removes part comprises cineration technics (ashing).In detail, the cineration technics that removes photoresist can adopt the mode as the dry-etching of oxygen gas plasma, the integral thickness of patterning photoresist layer 110 is reduced, till second less 110b of thickness removed fully.Because the thinner thickness of second 110b, therefore after removing second 110b fully, still have first 110a ' that is not removed fully remain in patterned conductive layer 108 ' on.
Please refer to Fig. 1 D, after removing second less 110b of thickness fully, with first 110a ' not being removed is mask, remove not by the patterned conductive layer 108 of first 110a ' covering ', with in oxide semiconductor channel layer 106 ' on form source electrode 112 and drain electrode 114.Source electrode 112 and drain electrode 114 for example be respectively formed at oxide semiconductor channel layer 106 ' both sides on.In one embodiment, remove not by the patterned conductive layer 108 of first 110a ' covering ' and the method that forms source electrode 112 and drain electrode 114 can adopt wet etch process, and adopt for patterned conductive layer 108 ' with the etchant of the high etching selectivity of oxide semiconductor channel layer 106 ' have (patterned conductive layer 108 '/oxide semiconductor channel layer 106 '), as H
2O
2Copper acid.After forming source electrode 112 and drain electrode 114, remove first 110a ', with the making of the thin-film transistor of finishing present embodiment.The method that removes first 110a ' for example is to adopt dry type removing photoresistance method or wet type removing photoresistance method, wherein can utilize oxygen gas plasma to carry out cineration technics as reacting gas.Certainly, source electrode 112 can also be integrated with the making of data wire (not illustrating) with the making of drain electrode 114.
Second embodiment
Fig. 2 A to Fig. 2 E is the manufacturing process schematic diagram according to a kind of thin-film transistor of the second embodiment of the present invention.It is noted that in Fig. 2 A to Fig. 2 E, the member identical with Figure 1A to Fig. 1 D then uses identical label and omit its explanation.
Please refer to Fig. 2 A, substrate 100 is provided, and on substrate 100, form grid 102.Then, on substrate 100, form gate insulation layer 104, oxide semiconductor material layer 106 and conductive layer 108 in regular turn.Afterwards, on conductive layer 108, form patterning photoresist layer 210.Patterning photoresist layer 210 comprises two first 210a, second 210b and the 3rd 210c, and wherein second 210b is connected between first 210a, and the 3rd 210c then is connected with each first 210a respectively and is positioned at the outside of first 210a.The thickness of each first 210a for example is the thickness greater than second 210b and each the 3rd 210c, and the thickness of second 210b equals the thickness of each the 3rd 210c in fact.Particularly, second 210b of patterning photoresist layer 210 for example is the top that is positioned at follow-up predetermined formation channel region, and each the 3rd 210c for example is two the tops outside relative that are positioned at follow-up predetermined formation source electrode and drain electrode.In one embodiment, patterning photoresist layer 210 forms by gray tone masking process or intermediate tone mask technology.
Please refer to Fig. 2 B, is mask with patterning photoresist layer 210, remove not to be patterned the conductive layer 108 that photoresist layer 210 covers, with formation patterned conductive layer 108 between oxide semiconductor material layer 106 and patterning photoresist layer 210 '.In one embodiment, the method that removes the conductive layer 108 that is not patterned photoresist layer 210 coverings comprises carries out dry etch process, and it for example uses Cl
2With BCl
3The conductive layer 108 that comes etch exposed to go out as reacting gas, and this reacting gas has very high etching selectivity (conductive layer 108/ oxide semiconductor material layer 106) for conductive layer 108 and oxide semiconductor material layer 106.
Please refer to Fig. 2 C, is mask with patterning photoresist layer 210, removes not to be patterned the oxide semiconductor material layer 106 that photoresist layer 210 covers, to form oxide semiconductor channel layer 206.In one embodiment, the method that removes the oxide semiconductor material layer 106 that is not capped comprises carries out wet etch process, and for example is to remove the oxide semiconductor material layer 106 that exposes as etchant by oxalic acid.
What specify is, because the oxide semiconductor material layer 106 that utilizes iso wet etch process to remove to expose, and the hard mask of patterned conductive layer 108 ' in wet etch process, can be used as, therefore the oxide semiconductor channel layer 206 that is positioned at patterned conductive layer 108 ' below can cause its side-walls generation undercutting (undercut) 216 because of lateral erosion, and undercutting 216 for example is the below that occurs in the 3rd 210c that is positioned at the relative outside.In this embodiment, can make that because of the undercutting 216 that lateral erosion caused the sidewall of patterned conductive layer 108 ' autoxidisable substance channel semiconductor layer 206 is outstanding.
Please refer to Fig. 2 D, remove the patterning photoresist layer 210 of part, be removed up to second 210b and the 3rd 210c with the thickness that reduces by first 210a.In one embodiment, the method that removes the patterning photoresist layer 210 of part can adopt cineration technics, and the mode that it for example is to use the dry-etching of oxygen gas plasma reduces the integral thickness of patterning photoresist layer 210.Because the thinner thickness of second 210b and the 3rd 210c, so after removing second 210b and the 3rd 210c fully, still have first 210a ' that is not removed fully remain in patterned conductive layer 108 ' on.At this moment, remaining first 210a ' can make the patterned conductive layer 108 ' come out of part, and the partially patterned conductive layer 108 that is exposed out ' for example be to be positioned at undercutting 216 tops.
Please refer to Fig. 2 E, is mask with first 210a ' that is not removed, remove be positioned at undercutting 216 tops and not by the patterned conductive layer 108 of first 210a ' covering ', on oxide semiconductor channel layer 206, to form source electrode 212 and drain electrode 214.In one embodiment, the method that forms source electrode 212 and drain electrode 214 comprises carries out dry etch process, and it for example uses Cl
2With BCl
3As reacting gas remove the patterned conductive layer 108 of exposure '.After forming source electrode 212 and drain electrode 214, can further remove first 210a ', with the making of the thin-film transistor of finishing present embodiment.The method that removes first 210a ' for example is to adopt dry type removing photoresistance method or wet type removing photoresistance method, wherein can utilize oxygen gas plasma to carry out cineration technics as reacting gas.
This explanation be, shown in Fig. 2 D and Fig. 2 E, partially patterned conductive layer 108 on exposing channel region of first 210a ' ', also expose the patterned conductive layer 108 that is positioned at undercutting 216 tops ' protuberance.Therefore, at the patterned conductive layer 108 that removes exposure ' afterwards, can remove the patterned conductive layer 108 of undercutting 216 tops ' protuberance, make that the sidewall that formed source electrode 212 and drain electrode 214 can autoxidisable substance channel semiconductor layers 206 is outstanding.In one embodiment, oxide semiconductor channel layer 206 for example is outstanding source electrode 212 and drain electrode 214, and forms the side wall profile of two-part.One of them the horizontal range D1 of bottom of the outstanding source electrode 212 in the bottom of oxide semiconductor channel layer 206 and drain electrode 214 is about 0.1 μ m to 1.0 μ m.
In addition, owing to the patterned conductive layer 108 ' protuberance that is positioned at undercutting 216 tops is to utilize remaining first 210a ' of patterning photoresist layer 210 to remove as mask, therefore when forming patterning photoresist layer 210, can also be positioned at two layouts of the 3rd 210c in the outside relatively according to the degree design of the undercutting 216 of oxide semiconductor channel layer 206, so that be positioned at the patterned conductive layer 108 of undercutting 216 tops ' can be exposed and help follow-up removing, shown in Fig. 2 D.
The 3rd embodiment
Fig. 3 A to Fig. 3 F is the manufacturing process schematic diagram according to a kind of thin-film transistor of the third embodiment of the present invention.It is noted that in Fig. 3 A to Fig. 3 F, the member identical with Fig. 2 A to Fig. 2 E then uses identical label and omit its explanation.Method of manufacturing thin film transistor and the described method of second embodiment at the 3rd embodiment are similar, yet difference between the two mainly is: the configuration structure of conductive layer and the mode that forms patterned conductive layer.
Please refer to Fig. 3 A, substrate 100 is provided, and on substrate 100, form grid 102.Then, on substrate 100, form gate insulation layer 104, oxide semiconductor material layer 106 and conductive layer 308 in regular turn.In one embodiment, conductive layer 308 comprises end conductive layer and top conductive layer, and end conductive layer and top conductive layer for example are to have different etching selectivities.In detail, the formation method of conductive layer 308 for example is to form the first conductive layer 308a, the second conductive layer 308b and the 3rd conductive layer 308c on oxide semiconductor material layer 106 in regular turn, wherein the first conductive layer 308a for example is as end conductive layer, and second conductive layer 308b on it and the 3rd conductive layer 308c for example are as the top conductive layer.In the group that material difference optional free copper (Cu), molybdenum (Mo), titanium (Ti), aluminium (Al), tungsten (W), silver (Ag), gold (Au) and the alloy thereof of the first conductive layer 308a, the second conductive layer 308b, the 3rd conductive layer 308c formed at least one.For example, the material of the first conductive layer 308a for example is a titanium, and the material of the second conductive layer 308b for example is an aluminium, and the material of the 3rd conductive layer 308c for example is a molybdenum, and forms the composite metal structures that multilayer stacks.
Afterwards, on conductive layer 308, form patterning photoresist layer 210.Patterning photoresist layer 210 comprises two first 210a, second 210b and the 3rd 210c, and wherein second 210b is connected between first 210a, and the 3rd 210c then is connected with each first 210a respectively and is positioned at the outside of first 210a.The thickness of each first 210a for example is the thickness greater than second 210b and each the 3rd 210c, and the thickness of second 210b equals the thickness of each the 3rd 210c in fact.
Please refer to Fig. 3 B, with patterning photoresist layer 210 is mask, remove and be not patterned the top conductive layer (i.e. the 3rd conductive layer 308c and the second conductive layer 308b) that photoresist layer 210 covers, between the first conductive layer 308a and patterning photoresist layer 210, to form patterning the 3rd conductive layer 308c ' and the patterning second conductive layer 308b '.In one embodiment, the method that removes the 3rd conductive layer 308c that exposes and the second conductive layer 308b comprises carries out first wet etch process, and it for example is as etchant by aluminic acid (that is mixture of phosphoric acid, nitric acid and acetic acid).
Please refer to Fig. 3 C, with patterning photoresist layer 210 is mask, remove and be not patterned the end conductive layer (i.e. the first conductive layer 308a) that photoresist layer 210 covers, between oxide semiconductor material layer 106 and the patterning second conductive layer 308b ', forming the patterning first conductive layer 308a ', thus form as patterned conductive layer 308 ' laminated.In one embodiment, the method that removes the first conductive layer 308a that exposes comprises carries out dry etch process, and it for example uses Cl
2With BCl
3As reacting gas.
Please refer to Fig. 3 D, is mask with patterning photoresist layer 210, removes not to be patterned the oxide semiconductor material layer 106 that photoresist layer 210 covers, to form oxide semiconductor channel layer 306.In one embodiment, the method that removes the oxide semiconductor material layer 106 that is not capped comprises carries out second wet etch process, and for example is as etchant by oxalic acid.
Similarly, because the oxide semiconductor material layer 106 that utilizes iso wet etch process to remove to expose, and the hard mask of patterned conductive layer 308 ' in wet etch process, can be used as, therefore can occur in the side-walls of oxide semiconductor channel layer 306 by the undercutting 316 that lateral erosion caused, and undercutting 316 for example is the below that is positioned at the 3rd 210c in the relative outside.Thus, the sidewall that patterned conductive layer 308 ' for example can autoxidisable substance channel semiconductor layer 306 is outstanding.
Please refer to Fig. 3 E, remove the patterning photoresist layer 210 of part, be removed up to second 210b and the 3rd 210c, and expose the part upper surface of patterning the 3rd conductive layer 308c ' with the thickness that reduces by first 210a.At this moment, first 210a ' that is not removed fully can remain in patterned conductive layer 308 ' on, and expose the partially patterned conductive layer 308 that is positioned at follow-up predetermined formation channel region top ' and be positioned at the patterned conductive layer 308 of undercutting 316 tops ' protuberance.In one embodiment, the method that removes the patterning photoresist layer 210 of part can adopt cineration technics, and the mode that it for example is to use the dry-etching of oxygen gas plasma reduces the integral thickness of patterning photoresist layer 210.
Please refer to Fig. 3 F, is mask with first 210a ' that is not removed, remove be positioned at undercutting 316 tops and not by the patterned conductive layer 308 of first 210a ' covering ', on oxide semiconductor channel layer 306, to form source electrode 312 and drain electrode 314.In one embodiment, the method that forms source electrode 312 and drain electrode 314 comprises carries out dry etch process, and it for example uses Cl
2With BCl
3As reacting gas remove the patterned conductive layer 308 of exposure '.In addition, after forming source electrode 312 and drain electrode 314, can further remove first 210a ', with the making of the thin-film transistor of finishing present embodiment.
In the present embodiment, partially patterned conductive layer 308 by making the 3rd 210c below ' come out, therefore after carrying out dry etch process, be positioned at the patterned conductive layer 308 of undercutting 316 tops ' protuberance can be removed, and oxide semiconductor channel layer 306 for example is outstanding source electrode 312 and drain electrode 314.In addition, the layout of patterning photoresist layer 210 similarly also can be positioned at two scopes of the 3rd 210c in the outside relatively according to the degree design of the undercutting 316 of oxide semiconductor channel layer 306.
What deserves to be mentioned is, because the patterning first conductive layer 308a ', the patterning second conductive layer 308b ' and patterning the 3rd conductive layer 308c ' have different etching selectivities, therefore remove not by the 308 ' time of patterned conductive layer of first 210a ' covering carrying out dry etch process, the degree that the patterning first conductive layer 308a ', the patterning second conductive layer 308b ' and patterning the 3rd conductive layer 308c ' are removed is difference to some extent also.In addition, in one embodiment, the patterning first conductive layer 308a ' for example is to have continuous in fact sidewall with the stacking structure that the patterning second conductive layer 308b ' is constituted, and it can be vertical sidewall or sloped sidewall (tapered sidewall).Therefore, oxide semiconductor channel layer 306 and source electrode 312 and the side wall profile of drain electrode 314 meetings in two relative outsides formation syllogic, and source electrode 312 can be in the side wall profile of channel region place formation two-part with drain electrode 314.
For example, shown in the local enlarged diagram of the regional A of Fig. 3 F, one of them the horizontal range D2 of bottom (that is bottom of the patterning first conductive layer 308a ') of the outstanding source electrode 312 in the bottom of oxide semiconductor channel layer 306 and drain electrode 314 is about 0.1 μ m to 1 μ m, and the horizontal range D3 of the bottom of the outstanding patterning second conductive layer 308b ' in the bottom of the patterning first conductive layer 308a ' is about 0.1 μ m to 1.5 μ m.On the other hand, shown in the local enlarged diagram of the area B of Fig. 3 F, in channel region, the horizontal range D4 of the bottom of the outstanding patterning second conductive layer 308b ' in the bottom of the patterning first conductive layer 308a ' is about 0.1 μ m to 1.5 μ m.
In the present embodiment, after forming oxide semiconductor channel layer 306 with wet etch process, carry out dry-etching remove be positioned at undercutting 316 tops and not by the patterned conductive layer 308 of first 210a ' covering '.Thus, can eliminate in the oxide semiconductor channel layer 306 undercut phenomenon because of lateral erosion caused.
The 4th embodiment
Fig. 4 A to Fig. 4 C is the manufacturing process schematic diagram according to a kind of active component array base board of the fourth embodiment of the present invention.It is noted that the manufacturing process shown in Fig. 4 A to Fig. 4 C is the step behind the hookup 3C, and in Fig. 4 A to Fig. 4 C, the member identical with Fig. 3 A to Fig. 3 F then uses identical label and omits its explanation.Method of manufacturing thin film transistor and the described method of the 3rd embodiment at the 4th embodiment are similar, yet difference between the two mainly is: the mode that forms patterned conductive layer and formation oxide semiconductor channel layer.
Please refer to Fig. 4 A, form patterned conductive layer 308 ' laminated after, remove the patterning photoresist layer 210 of part, be removed up to second 210b and the 3rd 210c with the thickness that reduces by first 210a.At this moment, first 210a ' that is not removed fully can remain in patterned conductive layer 308 ' on, and expose the partially patterned conductive layer 308 that is positioned at follow-up predetermined formation channel region top ' and be positioned at the patterned conductive layer 308 of undercutting 316 tops ' protuberance.In one embodiment, the method that removes the patterning photoresist layer 210 of part can adopt cineration technics, and the mode that it for example is to use the dry-etching of oxygen gas plasma reduces the integral thickness of patterning photoresist layer 210.
Please refer to Fig. 4 B, with first 210a ' not being removed is mask, remove not by top conductive layer of first 210a ' covering (that is patterning the 3rd conductive layer 308c ' and the patterning second conductive layer 308b ') and partial oxide semiconductor material layer 106, and end conductive layer (that is patterning first conductive layer 308a ') for example is can not be removed.Therefore, between the patterning first conductive layer 308a ' and first 210a ', form patterning the 3rd conductive layer 408c, the patterning second conductive layer 408b, and between patterning first conductive layer 308a ' and gate insulation layer 104, form oxide semiconductor channel layer 406.In one embodiment, the method that removes patterning the 3rd conductive layer 308c ', the patterning second conductive layer 308b ' that are not capped and partial oxide semiconductor material layer 106 comprises carries out wet etch process, and for example be by aluminic acid (that is mixture of phosphoric acid, nitric acid and acetic acid) as etchant, and this etchant is low to the rate of etch of the material of the patterning first conductive layer 308a '.
Similarly, owing to adopt iso wet etch process to form patterning the 3rd conductive layer 408c, the patterning second conductive layer 408b and oxide semiconductor channel layer 406, therefore and this wet etch process is difficult for removing the patterning first conductive layer 308a ', in the side-walls of oxide semiconductor channel layer 406 undercutting 416 that causes because of lateral erosion can take place.In other words, the patterning first conductive layer 308a ' for example is outstanding from the sidewall of patterning the 3rd conductive layer 408c, the patterning second conductive layer 408b and oxide semiconductor channel layer 406.
Please refer to Fig. 4 C, with first 210a ' not being removed is mask, remove not by the patterning first conductive layer 308a ' of first 210a ' covering and the patterning first conductive layer 308a ' that is positioned at undercutting 416 tops, to form the patterning first conductive layer 408a.The patterning first conductive layer 408a, the patterning second conductive layer 408b and patterning the 3rd conductive layer 408c for example are constitute patterned conductive layer 408 laminated, with on oxide semiconductor channel layer 406 respectively as source electrode 412 and drain electrode 414.In one embodiment, above-mentioned remove not comprised by the patterning first conductive layer 308a ' of first 210a ' covering and the method that is positioned at the patterning first conductive layer 308a ' of undercutting 416 tops and to carry out dry etch process that it for example uses Cl
2With BCl
3Remove the patterning first conductive layer 308a ' of exposure as reacting gas.In addition, form source electrode 412 and draining after 414, can further remove first 210a ', promptly finishing the making of the thin-film transistor of present embodiment.
Hold above-mentionedly, the stacking structure that patterning the 3rd conductive layer 408c and the patterning second conductive layer 408b are constituted for example is to have continuous in fact sidewall, and it can be vertical sidewall or sloped sidewall.In addition, oxide semiconductor channel layer 406 and source electrode 412 for example are the side wall profile that can form syllogic in two relative outsides with drain electrode 414, and source electrode 412 for example is the side wall profile that can form two-part at the channel region place with drain electrode 414.The local enlarged diagram of the regional A of similar Fig. 3 F, one of them the horizontal range of bottom (that is bottom of the patterning first conductive layer 408a) of the outstanding source electrode 412 in the bottom of the oxide semiconductor channel layer 406 of present embodiment and drain electrode 414 is about 0.1 μ m to 1 μ m, and the horizontal range of the bottom of the outstanding patterning second conductive layer 408b in the bottom of the patterning first conductive layer 408a is about 0.1 μ m to 1.5 μ m.
In the present embodiment, utilize wet etch process to remove simultaneously earlier, and stay the patterning first conductive layer 308a ' not by patterning the 3rd conductive layer 308c ' of first 210a ' covering, the patterning second conductive layer 308b ' and partial oxide semiconductor material layer 106; Just remove not by the patterning first conductive layer 308a ' of first 210a ' covering afterwards by dry etch process.Thus, can eliminate by the undercut phenomenon that waits tropism's wet etch process that oxide semiconductor channel layer 406 is caused.
What specify is, in the 3rd and the 4th embodiment, be with form the first conductive layer 308a as end conductive layer, to form the second conductive layer 308b and the 3rd conductive layer 308c be that example describes as three layers of composite construction that stacks of top conductive layer, but the present invention is not limited to this.Certainly, in other embodiments, end conductive layer for example is made up of the multiple layer metal layer, and the top conductive layer also for example is made up of the metal level of single or multiple lift, have in the affiliated technical field and know that usually the knowledgeable is when knowing its variation and application according to previous embodiment, so repeat no more in this.
And, it is noted that, above-described method of manufacturing thin film transistor mainly is to be used for describing in detail the flow process that forms oxide semiconductor channel layer, source electrode and drain electrode, so that those skilled in the art can implement according to this, but is not in order to limit scope of the present invention.As for other members or the layout of thin-film transistor, all can suitably adjust, and it is described to be not limited to the foregoing description according to having the technology of knowing usually known to the knowledgeable in the affiliated technical field.
In sum, thin-film transistor of the present invention and manufacture method thereof have following advantage at least:
1. thin-film transistor of the foregoing description and manufacture method thereof form oxide semiconductor channel layer and source electrode and drain electrode by the patterning photoresist layer with a plurality of thickness, thereby utilize this dim light cover technology can help to reduce processing step and cost.
2. it is impaired that thin-film transistor of the foregoing description and manufacture method thereof can be avoided the oxide semiconductor channel layer, and improve because of the undercut phenomenon that lateral erosion caused, thereby make technology can obtain good control.
3. thin-film transistor of the foregoing description and manufacture method thereof can be integrated with existing processes, and are widely used in the thin-film transistor that forms multiple different layouts.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection range of the appended claim of the present invention.
Claims (25)
1. a method of manufacturing thin film transistor is characterized in that, comprising:
On a substrate, form a grid;
On this substrate, form a gate insulation layer, monoxide semiconductor material layer and a conductive layer in regular turn;
Form a patterning photoresist layer on this conductive layer, this patterning photoresist layer comprises 2 first ones and 1 second one of being connected between these first one, and respectively this thickness of first one is greater than this thickness of second one;
With this patterning photoresist layer is mask, remove this conductive layer and this oxide semiconductor material layer that are not covered, to form monoxide channel semiconductor layer and the patterned conductive layer between this oxide semiconductor channel layer and this patterning photoresist layer by this patterning photoresist layer;
Remove this patterning photoresist layer of part, be removed up to this second one to reduce these thickness of first one; And
With these first one of not being removed is mask, removes not by this patterned conductive layer of these first covering, drains with one to form one source pole on this oxide semiconductor channel layer.
2. method of manufacturing thin film transistor according to claim 1 is characterized in that, this patterning photoresist layer forms by gray tone masking process or intermediate tone mask technology.
3. method of manufacturing thin film transistor according to claim 1 is characterized in that, does not remove to be comprised by this conductive layer of this patterning photoresist layer covering and the method for this oxide semiconductor material layer:
Carry out one first wet etch process, to remove this conductive layer that is not covered by this patterning photoresist layer; And
Carry out one second wet etch process, to remove this oxide semiconductor material layer that is not covered by this patterning photoresist layer, wherein the employed etchant of this first wet etch process is different with the employed etchant of this second wet etch process.
4. method of manufacturing thin film transistor according to claim 1 is characterized in that, does not remove to be comprised by this conductive layer of this patterning photoresist layer covering and the method for this oxide semiconductor material layer:
Carry out a wet etch process, to remove this conductive layer and this oxide semiconductor material layer that is not covered by this patterning photoresist layer, wherein this conductive layer and this oxide semiconductor material layer adopt the same etch agent to remove.
5. method of manufacturing thin film transistor according to claim 1 is characterized in that, the method that removes this patterning photoresist layer of part comprises cineration technics.
6. method of manufacturing thin film transistor according to claim 1 is characterized in that, the method that forms this source electrode and this drain electrode comprises:
With these first one of not being removed is mask, carries out a Wet-type etching to remove not by this patterned conductive layer of these first covering.
7. method of manufacturing thin film transistor according to claim 1 is characterized in that, after forming this source electrode and this drain electrode, more comprises removing these first one.
8. a method of manufacturing thin film transistor is characterized in that, comprising:
On a substrate, form a grid;
On this substrate, form a gate insulation layer, monoxide semiconductor material layer and a conductive layer in regular turn;
On this conductive layer, form a patterning photoresist layer, this patterning photoresist layer comprise 2 first ones, one be connected between these first one second one and two with this first the 3rd one of being connected respectively, respectively this thickness of first one is greater than this thickness of second one, and this thickness of second one equals respectively the 3rd one thickness in fact;
With this patterning photoresist layer is mask, remove this conductive layer and this oxide semiconductor material layer that are not covered by this patterning photoresist layer, to form monoxide channel semiconductor layer and the patterned conductive layer between this oxide semiconductor channel layer and this patterning photoresist layer, wherein occur in the side-walls of this oxide semiconductor channel layer, and this undercutting is positioned at these the 3rd subordinate sides because of the undercutting that lateral erosion caused;
Remove this patterning photoresist layer of part, be removed with these the 3rd one up to this second one to reduce these thickness of first one; And
With these first one of not being removed is mask, removes to be positioned at this undercutting top and not by this patterned conductive layer of these first covering, to drain with one to form one source pole on this oxide semiconductor channel layer.
9. method of manufacturing thin film transistor according to claim 8 is characterized in that, this patterning photoresist layer forms by gray tone masking process or intermediate tone mask technology.
10. method of manufacturing thin film transistor according to claim 8 is characterized in that, does not remove to be comprised by this conductive layer of this patterning photoresist layer covering and the method for this oxide semiconductor material layer:
Carry out a dry etch process, to remove this conductive layer that is not covered by this patterning photoresist layer; And
Carry out wet etch process one by one, to remove this oxide semiconductor material layer that is not covered by this patterning photoresist layer.
11. method of manufacturing thin film transistor according to claim 8, it is characterized in that, this conductive layer comprises an end conductive layer and a top conductive layer, is not comprised by this conductive layer of this patterning photoresist layer covering and the method for this oxide semiconductor material layer and remove:
Carry out one first wet etch process, to remove this top conductive layer that is not covered by this patterning photoresist layer;
Carry out a dry etch process, to remove this end conductive layer that is not covered by this patterning photoresist layer; And
Carry out one second wet etch process, to remove this oxide semiconductor material layer that is not covered by this patterning photoresist layer.
12. method of manufacturing thin film transistor according to claim 8 is characterized in that, the method that removes this patterning photoresist layer of part comprises cineration technics.
13. method of manufacturing thin film transistor according to claim 8 is characterized in that, the method that forms this source electrode and this drain electrode comprises:
With these first one of not being removed is mask, carries out a dry-etching and is positioned at this undercutting top and not by this patterned conductive layer of these first covering to remove.
14. method of manufacturing thin film transistor according to claim 8 is characterized in that, after forming this source electrode and this drain electrode, more comprises removing these first one.
15. a method of manufacturing thin film transistor is characterized in that, comprising:
On a substrate, form a grid;
On this substrate, form a gate insulation layer, monoxide semiconductor material layer, an end conductive layer and a top conductive layer in regular turn;
On this top conductive layer, form a patterning photoresist layer, this patterning photoresist layer comprise 2 first ones, one be connected between these first one second one and two with this first the 3rd one of being connected respectively, respectively this thickness of first one is greater than this thickness of second one, and this thickness of second one equals respectively the 3rd one thickness in fact;
With this patterning photoresist layer is mask, removes this top conductive layer and this end conductive layer that are not covered by this patterning photoresist layer;
Remove this patterning photoresist layer of part, be removed with these the 3rd one up to this second one to reduce these thickness of first one;
With these first one of not being removed is mask, remove not by this top conductive layer of these first covering and this oxide semiconductor material layer of part, between this end conductive layer and this gate insulation layer, to form monoxide channel semiconductor layer, wherein occur in the side-walls of this oxide semiconductor channel layer because of the undercutting that lateral erosion caused; And
With these first one of not being removed is mask, removes not by this end conductive layer of these first covering and this end conductive layer of being positioned at this undercutting top, drains with one to form one source pole on this oxide semiconductor channel layer.
16. method of manufacturing thin film transistor according to claim 15 is characterized in that, this patterning photoresist layer forms by gray tone masking process or intermediate tone mask technology.
17. method of manufacturing thin film transistor according to claim 15 is characterized in that, does not remove to be comprised by this top conductive layer of this patterning photoresist layer covering and the method for this end conductive layer:
Carry out a wet etch process, to remove this top conductive layer that is not covered by this patterning photoresist layer; And
Carry out a dry etch process, to remove this end conductive layer that is not covered by this patterning photoresist layer.
18. method of manufacturing thin film transistor according to claim 15 is characterized in that, is mask with these first one of not being removed, and does not remove to be comprised by the method for this top conductive layer of these first covering and this oxide semiconductor material layer of part:
Carry out a wet etch process, to remove not by this top conductive layer of these first covering and this oxide semiconductor material layer of part.
19. method of manufacturing thin film transistor according to claim 15, it is characterized in that, with these first one of not being removed is mask, removes not by this end conductive layer of these first covering and the method that is positioned at this end conductive layer of this undercutting top to comprise:
Carry out a dry etch process, to remove not by this end conductive layer of these first covering and this end conductive layer of being positioned at this undercutting top.
20. method of manufacturing thin film transistor according to claim 15 is characterized in that, the method that removes this patterning photoresist layer of part comprises cineration technics.
21. method of manufacturing thin film transistor according to claim 8 is characterized in that, after forming this source electrode and this drain electrode, more comprises removing these first one.
22. a thin-film transistor is characterized in that, comprising:
One grid;
One gate insulation layer is positioned on this grid;
Monoxide channel semiconductor layer is positioned on this gate insulation layer; And
An one source pole and a drain electrode are positioned on this oxide semiconductor channel layer, and wherein one of them the horizontal range of bottom of outstanding this source electrode in the bottom of this oxide semiconductor channel layer and this drain electrode is about 0.1 μ m to 1 μ m.
23. thin-film transistor according to claim 22 is characterized in that, this source electrode comprises:
One first conductive layer is positioned on this oxide semiconductor channel layer; And
One second conductive layer is positioned on this first conductive layer, and wherein the horizontal range of the bottom of outstanding this second conductive layer in the bottom of this first conductive layer is about 0.1 μ m to 1.5 μ m.
24. thin-film transistor according to claim 23 is characterized in that, this source electrode more comprises one the 3rd conductive layer, is positioned on this second conductive layer.
25. thin-film transistor according to claim 24, it is characterized in that the material of this first conductive layer, this second conductive layer and the 3rd conductive layer is respectively and is selected from the group that is made up of copper, molybdenum, titanium, aluminium, tungsten, silver, gold and alloy thereof at least one.
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| CN102881653A (en) * | 2012-09-28 | 2013-01-16 | 深圳市华星光电技术有限公司 | Thin film transistor and manufacturing method thereof |
| CN102881653B (en) * | 2012-09-28 | 2015-02-04 | 深圳市华星光电技术有限公司 | Thin film transistor and manufacturing method thereof |
| US9171939B2 (en) | 2012-09-28 | 2015-10-27 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Method for manufacturing thin-film transistor and thin-film transistor manufactured with same |
| CN103050441A (en) * | 2012-12-10 | 2013-04-17 | 华映视讯（吴江）有限公司 | Oxide thin film transistor preparation method |
| CN106952823A (en) * | 2016-01-07 | 2017-07-14 | 中华映管股份有限公司 | The preparation method of metal oxide semiconductor films transistor |
| CN110120426A (en) * | 2018-02-07 | 2019-08-13 | 南京中电熊猫平板显示科技有限公司 | A kind of manufacturing method and thin film transistor (TFT) of thin film transistor (TFT) |
| CN110098259A (en) * | 2019-04-10 | 2019-08-06 | 深圳市华星光电技术有限公司 | Amorphous silicon film transistor and preparation method thereof |
| CN111584424A (en) * | 2020-05-09 | 2020-08-25 | Tcl华星光电技术有限公司 | Array substrate preparation method |
| CN111584424B (en) * | 2020-05-09 | 2023-11-28 | Tcl华星光电技术有限公司 | Array substrate preparation method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102157387B (en) | 2013-04-17 |
| TWI416736B (en) | 2013-11-21 |
| TW201222821A (en) | 2012-06-01 |
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