TW201218364A - Solid imaging device - Google Patents

Abstract

A solid imaging device having an island shape semiconductor (1a) is provided. The island shape semiconductor (1a) has: a first semiconductor N+ region (2) formed on a substrate, a second semiconductor P region (3) formed on the region (2), a third semiconductor region (6a, 6b) formed on an upper side region of region (3), an insulation layer (4a, 4b) formed on the peripheral part of a lower side region of region (6a, 6b) and region (2), a gate conductor layer (5a, 5b) formed on an outer periphery of the insulation layer (4a, 4b) and functioning as a gate electrode forming a channel in the lower region of region (2), a light reflection conductor layer (9a, 9b) formed in an outer periphery of the insulation layer (4a, 4b), a fifth semiconductor P+ region (10) formed on region (3) and region (6a, 6b), and a micro lens (11) formed on region (10) and having a focus positioned on the vicinity of an upper surface of region (10).

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device, and more particularly to a solid-state imaging device capable of realizing high pixel density, high resolution, low color mixing, and high sensitivity. [Prior Art] Currently, CCD and CMOS solid-state imaging devices have been widely used in video cameras, still cameras, and the like. Further, it is required to improve the performance of the solid-state imaging device such as high pixel density, high resolution, low color mixing in color imaging, and high sensitivity. On the other hand, in order to achieve high resolution of a solid-state imaging device, there has been a technological innovation that depends on the increase in density of pixels. Figs. 12A to 12B and 13 show a conventional solid-state imaging device. Fig. 12A is a cross-sectional view showing a solid-state imaging device in which one island-shaped semiconductor 30 is formed of one pixel in a conventional example (see, for example, Patent Document 1). As shown in Fig. 12A, in the island-shaped semiconductor 30 constituting the pixel, a signal line semiconductor N+ region 31 is formed on a substrate (not shown) (hereinafter, "semiconductor N+ region" is regarded as containing a large amount of donor body Semiconductor region of impurities). A semiconductor P region 32 is formed on the signal line semiconductor N+ region 31 (hereinafter, "semiconductor P region" is regarded as a semiconductor region containing an acceptor impurity), and an insulating layer 33a is formed on the outer peripheral portion of the semiconductor P region 32. The gate conductor layers 34a and 34b are formed by sandwiching the insulating layers 33a and 33b. Above the gate conductor layers 34a, 34b

S 4 323367 201218364 The semiconductor peripheral region of the semiconductor region p is formed with a semiconductor N region, 35b (hereinafter, "a semi-conductive region" is regarded as a semiconductor region containing a donor impurity). In the semiconductor N region 35a, 35b In the semiconductor p region %, a semiconductor p+ region% is formed on the upper portion of the island-shaped semiconductor 3G (the semiconductor P+ region is regarded as a semiconductor region containing a large amount of acceptor impurities by y). The semiconductor P+ region 36 is connected to the pixel selection lines 37a, 37b. The insulating layers 33a and 33b described above are connected to each other in a state surrounding the outer periphery of the island-shaped semiconductor 3A. Similarly, the gate conductor layers 3, 3, and the half V body N regions 35a and 35b are also connected to each other in a state surrounding the outer periphery of the island-shaped semiconductor 3A. With respect to the island-shaped semiconductor 30, light belonging to one of electromagnetic energy waves is irradiated from the side of the semiconductor p+ region 36 on the upper surface of the island-shaped material 3. In the island-shaped semiconductor 30, a photodiode region composed of the semiconductor p region and the semiconductor N regions 35a and 35b is formed, and by the light irradiation, the photoelectric conversion region of the photodiode region can be generated. Signal charge (here free electron). Then, the signal charge is accumulated in the semiconductor regions 35a and 35b of the photodiode region. Further, a bonding electric aa body is formed in the island-shaped semiconductor 3A, and the semiconductor n-regions 35a and 35b are regarded as gates, and the semiconductor P+ region 36 is used as a source, and the signal line semiconductor N+ is used. The semiconductor p region 32 near the region 31 serves as a drain. Then, the current (output signal) between the drain and the source of the bonded transistor is changed in accordance with the amount of signal charge accumulated in the semiconductor N regions 35a and 35b, and can be taken out from the signal line semiconductor N+ region 31 to the outside. And read out to the outside. Further, an MOS transistor is formed in the island-shaped semiconductor 30, and the MOS transistor 3-323367 201218364 system uses the semiconductor N regions 35a, 35b of the photodiode as a source, and the gate conductor layers 34a, 34b As a gate, the signal line semiconductor N+ region 31 is regarded as a gateless semiconductor d region 32 located between the semiconductor n regions 35a and 35b and the signal line semiconductor N+ region 31 as a channel. Then, the signal charges accumulated in the semiconductor N regions 35a, 35b are applied to the signal line semiconductor germanium region 31 by applying a plus on voltage ' to the gate conductor layers 34a, 34b of the MOS transistor. Remove it. The imaging operation of the solid-state imaging device includes a signal charge accumulation operation 'in a state where a ground voltage (0 V) is applied to the signal line semiconductor N+ region 31, the gate conductor layers 34a and 34b, and the semiconductor P+ region 36. The signal charges generated in the photoelectric conversion region (photodiode region) by the light incident from the upper surface of the island-shaped semiconductor 30 are accumulated in the semiconductor N regions 35a and 35b; the signal charge readout operation is performed on the signal line semiconductor When the γ region 31 and the gate conductor layers 34a and 34b are applied with a ground voltage, and the semiconductor P+ region 36 is applied with a positive voltage, the current between the drain and the source of the bonded electrode body is read as an output signal. The interelectrode is modulated by the potential of the semiconductor N regions 35a, 35b that vary according to the amount of accumulated signal charge; and the reset of the moving field after the signal charge readout operation is performed on the semiconductor The p+ region is accumulated in the semiconductor n: body 35a, 35b in a state where a ground voltage is applied and a positive voltage is applied to the gate conductor layers 34a and 34b and the signal line plus the N+ region 31. The signal charge is shown in the signal line semiconductor N+ region 31. The 12B picture shows the wavelength from the illumination light; I is the blue light (λ divided by ° = 400 nm), the green light (A = 55 〇 nm), and the red light (λ = 7 〇). 〇Infrared light 6 323367 201218364 Light absorption intensity of light-irradiated surface in light (;l=870nin) 丨 is related to (矽) depth (#m). When light absorption intensity is irradiated on the surface, the light absorption intensity is used. In the normalization, the normalized value Ι/Ιβ is reduced by an exponential function with respect to the depth of light entering. The 12th image shows that the blue light is mostly absorbed at a depth of about 1//m, relative to the green light. In the actual solid-state imaging device, for example, the non-patent document 1 needs to be used for the photosensitive region, the light is at a depth of 1 〇/zm or more. The depth is set to 2.5#111 to 3 to 111, and 80% of the green light is absorbed. The photoelectric conversion region in the solid-state imaging device of Fig. 12A is formed by the semiconductor P region 32 and the semiconductor N regions 35a and 35b. Photoelectric one-pole region. Therefore, by using For the reason, the height Ld of the photodiode region needs to be 2.5/zm to 3//m. The distance between pixels currently arranged in a 2nd order is the smallest because of the smallest solid-state imaging device in the product. It is also disclosed as a product having a pitch of 〇·9 in m (for example, refer to Non-Patent Document 2). Moreover, the pixel pitch is required to be reduced. Further, since they are adjacent to each other Further, the distance between the island-shaped semiconductors 30 constituting the pixels is reduced. The light-receiving rate of the light rays can be efficiently received in the photodiode region, and the sensitivity of the solid-state imaging device is improved. Therefore, adjacent islands are also required. The distance between the semiconductors 30 is reduced. In the case where the design rule is 0·2#in (200 nm), the distance between the adjacent island-shaped semiconductors 30 is usually processed to be as close as possible to the size of 〇.2//m. In this case, the aspect ratio between the island-shaped semiconductors (the ratio of the depth length to the distance length between adjacent island-shaped semiconductors) is 12·5 to 15, or 15 7 323367 201218364. The gate must be formed in a wide and deep In the island-shaped semi-conductor-3/channel, the gate conductor of the MOS transistor is formed 屛*3 \ 〇^ 3, r region 31' T forms a t-line semiconductor at the bottom of the island-shaped semiconductor 3〇°°° Domain 31. At this point, it is difficult to manufacture a solid-state imaging device. As described above, in the island-shaped semiconductor 30 in which the solid-state imaging is performed, the height Ld is required to be 2^ into the photodiode region, whereby it is difficult to achieve the pixel density and high-intensity of the solid-state imaging. Therefore, in the case where the solid is to be connected, the sensitivity of the region is reduced, and the technique of the photodiode and the Adu u can be reduced. The light ray 38 incident on the island semiconductor 30 as a pixel from the oblique direction as shown in FIG. 12A is also incident on the body region of the island-shaped semiconductor 3 〇 adjacent to the island-shaped semiconductor 3 构成 constituting the β-pixel. - The problem of the decrease in the light-receiving rate in the pixel is that the island-shaped semiconductor 30 constituting the pixel in which the signal charge generated by the island-shaped semiconductor 3 constituting one pixel is originally dispersed is generated. This causes a decrease in the resolution of the solid-state image device or a color mixture in color imaging. Such a good situation 'If the pixel is higher, the density will increase. "And in order to prevent such a decrease in the light-receiving rate, as in the 13th As shown in the figure, in the semiconductor device, there is a technique in which the metal walls 39a and 39b are placed on the upper portion of the photodiode region 41 (see, for example, Patent Document 2). In the read pixel structure, a photodiode region 41 w. ' is formed in the semiconductor substrate 4 并且 and an element isolation region 42 and a source drain region of the MOS transistor are formed around the photodiode region 41 . 43a, 43b. In the first interlayer insulating film 44 formed on the semiconductor substrate 40, a peripheral electrode 45, a contact hole 46a, and a photo-electrode region 41 are formed in the first interlayer insulating film 44 formed on the semiconductor substrate 40. Metal walls 39a, 39b. The second interlayer insulating layer 47 is formed on the first interlayer insulating layer 44, and the Si〇2 film 48, the SiN film 49, and the microlens 50 are sequentially formed on the second interlayer insulating layer 47. Contact g 46b, 46c for circuit wiring is formed in the second layer H edge layer <7, and 'the metal wirings 51a, 51b, 51c, and 51d are formed on the second interlayer insulating layer 47. In the semiconductor device, the light rays 52a, 52b, 52c, 52d' passing through the microlens 50 are reflected by the metal walls 39a, 39b, and are incident on the photodiode region 41, thereby improving the incidence from the microlens 50. The light is incident on the light-receiving rate of the photodiode region 41. However, since such incident light rays are incident on the surface of the photodiode 41 from the oblique direction, a portion of the light rays 53a, 53b, 53c, 53d incident on the photodiode 41 may leak to the pixel adjacent to the pixel. . Other 'as a technique for improving the light-receiving rate in one pixel, it is known to provide a metal wall in a color filter layer formed between a microlens and a photodiode region. A technique (for example, refer to Patent Document 3) or a technique of forming an optical path in an upper portion of a photodiode region (for example, 'refer to Patent Document 4). However, even with this technique, since incident light rays are incident on the surface of the photodiode region from an oblique direction, a part of incident light rays incident on the photodiode region may leak adjacent to the pixel. Pixel. [Patent Document] [Patent Document D International Publication No. 2009/034623 No. 9 323367 201218364 (Patent Document 2) US Patent Application Publication No. 2/8/185622 2 〇〇 9 / 〇 1〇 1946 ^ Specification (Patent Document 4) US Patent Application Publication No. 2008/0145965 Specification [Non-Patent Document 1] (Non-Patent Document 1) G. Agranov, R. Mauritzson; J. Ladd , A. Dokoutchaev, X. fan, X. Li, Z. Yin, R. Johnson, V. lenchenkov, S. Nagaraja, W. Gazeley, J.Bai, H. Lee, 泷泽义顺; "CMOS image sense Pixel size reduction and feature comparison of the detector", Image Information Media Society Report, ITE Technical Report Vol. 33, No. 38, pp. 9-12 (Sept. 2009) (Non-Patent Document 2) SGWuu, CC Wang , BC Hseih, YL Tu, CH Tseng, TH Hsu, RS Hsiao, S. Takahashi, RJLin, CS Tsai, YP Chao, KY Chou, PS CHOU, Η. Y. Tu, FL Hsueh, L. Tran; " A Leading-Edge 0. 9 ^ m Pixel CMOS Image Sensor Technology with Backside Illumination: Future Challenges for Pixel Sca Ling", IEDM2010 Digest Papers, 14.1.1 (2010) [Problem to be Solved by the Invention] The solid-state imaging device shown in Fig. 12A is formed by one island-shaped semiconductor 30 to form one pixel. Therefore, it is suitable for high pixel density. Therefore, in order to apply the fine-grained technique, it is possible to achieve high image cut from the size of the light irradiation plane. However, when the document 1 is obtained, In the case of the light absorption conditions described above, the height Ld of the photoelectric green is required to be 2.5//m to 3 in the case of forming an island-shaped semiconductor by Si according to the patent diagram of FIG. 12B. The photodiode: domain: region South Ld' is required to change even as the pixel density increases. In addition, in order to increase the sensitivity, it is required to reduce the distance of the island shape. Because &, it is necessary to carry out a higher high- 30 semiconductor distance between 30 and the photodiode region. Therefore, in order to form the signal line n+ & field 31 at a thinner width of 1 + 3 Γ Tilt = 34b and at the bottom of the island-shaped semiconductor 30, manufacturing difficulty occurs. In this case, it is difficult to form the pixel structure of the body 3G, and it is more difficult to increase the pixel density and sensitivity of the (four) body imaging device. Therefore, in the solid-state imaging device, there is a demand for a technique which can reduce the height Ld of the photodiode region without causing a decrease in sensitivity. Further, as described above, in the conventional solid-state imaging device, the light ray 38 incident on the ridge semiconductor 30 constituting the pixel from the oblique direction may be incident on the island-shaped semiconductor 30 adjacent to the island-shaped semiconductor 30. Photodiode region.耨The decrease in the light-receiving rate in one of the three island-shaped semiconductors constituting the one pixel causes the signal charge originally generated in one pixel (island-shaped semiconductor 3〇) to be dispersed in the periphery (island) The problem of the semiconductor 30). As a result, the resolution of the solid-state imaging device is lowered, or the color mixture in the color image is 5 323367 11 201218364. This color mixing is required to lower the color quality of the color reproduction image, so that low color mixing is required. Further, the pixel structure shown in Fig. 13 (see, for example, Patent Document 2) is a technique in which the metal walls 39a and 39b are provided on the photodiode region 41 to increase the light collection rate. In the upper portion of the photodiode region 41 in this technique, the light leakage toward the pixel adjacent to the pixel is reduced, thereby increasing the light collection rate. However, since a part of the light ray incident on the photodiode region 41 in the oblique direction is incident on the pixel adjacent to the pixel, the resolution of the solid-state imaging device cannot be avoided or the color mixture in color imaging cannot be avoided. The same applies to the solid-state imaging device of the conventional example disclosed in Patent Document 3 and Patent Document 4. The decrease in the light-receiving rate is greater as the pixel density is increased. Therefore, there has been a demand for a technique for improving the light-receiving rate of light incident on the surface of the photodiode region. The present invention has been developed in view of the above circumstances, and in particular, it is aimed at realizing a solid-state imaging device capable of obtaining high pixel density, high resolution, low color mixing, and high sensitivity. (Means for Solving the Problem) The solid-state imaging device according to the present invention has a coefficient pixel row 2 and an under-shaped shape, and is characterized in that the plurality of substrates are formed on the semiconductor substrate. Each of the plurality of island-shaped semiconductors of the pixel includes: a first semiconductor cage region 'formed under the island-shaped semiconductor; 12 323367 201218364 a second semiconductor region formed on the ith semiconductor region and The first semiconductor region is opposite to the conductivity type or the semiconductor; the third semiconductor region is formed on the upper surface region of the second semiconductor region and is the same conductivity type as the second semiconductor region; and the fourth semiconductor region a conductive type formed on the outer peripheral portion of the third semiconductor region and opposite to the second semiconductor region; and an insulating layer formed on the outer peripheral portion of the fourth semiconductor region and the outer peripheral portion of the lower side surface region of the second semiconductor region a conductor layer formed on a peripheral portion of the insulating layer and configured to form a channel in a lower region of the second semiconductor region The function of the idle electrode; the reflective conductor layer is formed on the third semiconductor region, the fourth semiconductor region, and the outer peripheral portion of the insulating layer, and reflects electromagnetic energy waves; and the fifth semiconductor region is formed in the second semiconductor region And an upper portion of the third semiconductor region and a conductivity type similar to the fourth semiconductor region; and a microlens formed on the fifth semiconductor region, wherein the focus is located near the upper surface of the fifth semiconductor region; The island-shaped semiconductor includes a portion that functions as a photoelectric conversion unit, a portion that functions as a signal charge storage unit, a portion that functions as a signal charge reading unit, and an accumulated signal charge removal unit. a portion of the function; the photoelectric conversion portion is composed of a photodiode region including the second semiconductor region and the third semiconductor region, and the electromagnetic energy wave of the microlens by the incident 323367 5, 13 201218364 And generating a signal charge in the photoelectric conversion unit; the signal charge accumulation unit, a signal charge generated by the photoelectric conversion unit is formed by the third semiconductor region; the signal charge readout portion is formed of a bonded transistor, and the bonded transistor system includes the fifth semiconductor region and the first (2) a lower region of the semiconductor region is regarded as a drain or a source, and the signal charge storage portion is regarded as a gate, and the signal charge readout portion functions to read a current between the drain and the source as an output signal. The drain-source current flows between the drain and the source of the bonded transistor that varies according to the amount of signal charge accumulated in the signal charge storage portion; the accumulated signal charge removal portion is a MOS transistor The MOS electro-crystal system has the first semiconductor region as a drain, the conductor layer as a gate, and the third semiconductor region as a source, and the first semiconductor region and the first The second semiconductor region sandwiched by the semiconductor region serves as a channel, and the accumulated signal charge removing portion functions as follows by applying the conductor layer Predetermined voltage and the signal charge accumulated in the signal charge storage portion of the, to be removed in the first semiconductor region. Further, in a preferred aspect of the present invention, in the solid-state imaging device, the imaging operation performed by the solid-state imaging device includes a signal charge accumulation operation and a signal charge generated in the photoelectric conversion unit. Accumulating in the third semiconductor region; and in the signal charge reading operation, reading the current between the drain and the source of the bonded transistor as an output signal according to the amount of signal charge accumulated in the third semiconductor region 14 323367 201218364; In the charge removing operation, the accumulated signal charges accumulated in the third semiconductor region are removed by applying a predetermined voltage to the conductor layer, and the first semiconductor region is removed; the signal charge accumulation operation and the signal are When each of the charge reading operation and the accumulation signal charge removing operation is performed, charges having opposite polarities to the signal charges are accumulated in the fourth semiconductor region. Further, in a preferred aspect of the present invention, the sixth semiconductor region, the ninth semiconductor region, the seventh semiconductor region, and the eighth semiconductor region are provided instead of the first semiconductor region, and the sixth semiconductor region is the same as the first semiconductor region. a conductive type having the same semiconductor region, the ninth semiconductor region being of a conductivity type opposite to the second semiconductor region, wherein the seventh semiconductor region is of the same conductivity type as the second semiconductor region, and is connected to the second semiconductor region The eighth semiconductor region is a conductivity type opposite to the second semiconductor region, and the lower region of the second semiconductor region in the vicinity of the sixth semiconductor region and the ninth semiconductor region is a bonded transistor. The drain and the source, the eighth semiconductor region is the drain of the M?s transistor. Further, in a preferred aspect of the invention, there is provided a reflective layer formed in a region below the island-shaped semiconductor. Further, in a preferred aspect of the invention, the method further comprises: forming the island-shaped semiconductor a light penetrating the insulating layer in the lower region; and a light absorbing layer formed in a region below the light penetrating insulating layer,

S 323 367 15 201218364 The thickness of the light-transmitting insulating layer is set such that it is incident from the microlens and is reflected by the conductor layer and the reflective conductor layer, and passes through the first to fourth semiconductor regions and reaches the foregoing The reflectance of light passing through the insulating layer is relatively large in green light and relatively small in red light. Further, in a preferred aspect of the present invention, a light-transmitting insulating layer formed in a lower region of the island-shaped semiconductor; and a light absorbing layer formed in a region below the light-transmitting insulating layer, The thickness of the light-transmitting insulating layer is set such that light that is incident from the microlens and that is reflected by the conductive layer and the reflective conductor layer and passes through the first to fourth semiconductor regions and reaches the light-transmitting insulating layer The reflectance is relatively large in green and red light. 2. In a preferred aspect of the present invention, the optical transparent intermediate layer formed between the microlens and the island-shaped semiconductor is disposed, and the focus of the other microlens is located inside the light transparent intermediate layer. In a preferred aspect of the present invention, a concave portion or a convex portion is formed in a central surface layer portion of the upper portion of the island-shaped semiconductor, and a concave surface of the concave portion or a convex surface of the convex portion is a boundary interface The refractive indices of the two material regions are different from each other. In a preferred aspect of the invention, there is provided: the shape of the microlens and the other:! The light between the semiconductors is transparent, and the interlayer, the center line and the outer peripheral portion of the f-microlens are incident on the first line and pass through the microlens to the upper (four) layer (four).

C 323367 16 201218364 The angle between the light of one point on the outer peripheral portion and the line orthogonal to the upper surface of the fifth semiconductor region is the Brewster angle Θ bOtan^^/%), wherein Nl is a refractive index of the optically transparent intermediate layer, and 沁 is a refractive index of the fifth semiconductor region). Moreover, in a preferred aspect of the present invention, the plurality of pixels are arranged in a square lattice shape, a rectangular lattice shape, or a thousand bird shape, and the solid-state imaging device further includes: a plurality of longitudinally extending conductor tracks, which are longitudinally The foregoing plurality of pixels of the plurality of pixels are connected and extend in a longitudinal direction; the red-conducting red field electrically crosses the plurality of images (four) and laterally extends to the lateral direction, and the plurality of conductor layers are electrically connected to each other a reflective conductor wiring connecting a plurality of pixels arranged in a plurality of pixels and extending in a lateral direction; the conductor wirings electrically and laterally extending from each other, and the reflection guides illuminating the plurality of pixels from the plurality of pixels The 4' system has no upper and lower weights, and is electrically isolated from each other in the longitudinal direction of the two directions and two pixels of the aforementioned plurality of pixels, and the former fifth semi-guided 齅厗 and t 迖 all of the plurality of pixels of the reflection stage, ', to cover the pixel area of the plurality of pixels of the pixel area. 4 mutually connected and Above 17

S 323367 201218364 (Effect of the Invention) Density and High Resolution According to the present invention, it is possible to provide a solid-state imaging device capable of realizing high pixel size, low color mixing, and high sensitivity. [Embodiment] Referring to the following, a solid-state imaging device according to an embodiment of the present invention will be described. (first embodiment) Fig. 1A is a cross-sectional view showing the island-shaped semiconductor la of the constituent pixels of the solid-state imaging device according to the first embodiment of the present invention. As shown in Fig. 1A, the second semiconductor N+ region 2 as a signal line extending in the pixel direction on the substrate is formed in the entire h = position of the island-shaped semiconductor constituting each pixel. In the second conductor N+ region 2, the system is formed with the first! The conductivity type of the semiconductor N+ region 2 is opposite to the second sheep conductor P region 3. The third semiconductor n regions 6a and 6b having the same conductivity type as the second semiconductor N+ region 2 are formed on the side surface region of the second semiconductor p region 3. The insulating layers 4a and 4b are formed so as to surround the outer peripheral portion of the third semiconductor N regions 6a and 6b and the outer peripheral portion of the lower side surface region of the second semiconductor P region 3. In order to surround the outer peripheral portions of the insulating layers 4a and 4b, a gate conductor layer 5& and a small gate conductor layer 5a and 5b are formed in a lower region of the second semiconductor p region 3, and a metal material is used, for example. It also forms a function as a light reflection layer that reflects light (electromagnetic energy waves). An MOS transistor is formed in the island-shaped semiconductor la constituting the pixel. The MOS transistor system uses the third semiconductor n region 6a, 6b as a source, and the gate electrode layer 5a, 5b of the 18 323367 5 201218364 gate is used as a gate. The second semiconductor p region 3, which is sandwiched by the third semiconductor N region 6a, 6b, and the second semiconductor p region 3, which is sandwiched by the third semiconductor N region 6a, 6b, is used as a channel body in the gate. On the upper side of the pole conductor layers 5a and 5b, a photodiode region 7 formed of the first region 3 and the third semiconductor N region 6 is formed in the surface layer portion of the photodiode region 7, and the fourth portion is formed. Semiconductor P+ regions 8a, 8b. The fourth semiconductor p+ regions 8a and 8b are formed between the third semiconductor N regions 6a and 6b and the insulating layers 4a and 4b in contact with the insulating layers 4 and 4b. In the fourth semiconductor p+ region, the light-reflecting conductor layers 9a and 9b for reflecting the electromagnetic energy waves such as light are formed from the 4a and 4b via the insulation. The light-reflecting conductor layers 9a and gb are formed on the outer peripheral portions of the insulating layers 4a and 4b other than the conductor layers 5a and 5b, that is, the outer peripheral portions of the third semiconductor N regions 6a and 6b. The light-reflecting conductor layers 9a and 9b are formed using, for example, a metal material, and function as a conductor layer through which a current flows and a light-reflecting layer that reflects light. In the upper portion of the third semiconductor N regions 6a and 6b, a fifth semiconductor p+ region 1A having the same conductivity type as that of the second semiconductor p region 3 electrically connected to the fourth semiconductor P+ regions 8a and 8b is formed. The fifth semiconductor p+ region 10 is connected to the light reflection conductor layers 9a and 9b. The light-reflecting conductor layers 9a and 9b are pixel selection lines extending in a direction orthogonal to the second scanning direction (signal line). Therefore, the light-reflecting conductor layers 9a and 9b function as a light-reflecting layer and a pixel selection line. Further, at least the third semiconductor N regions 6a and 6b, the fourth semiconductor P+ regions 8a and 8b, and the fifth semiconductor derivative 19 323367 201218364 body P+ region 10 are preferably formed in the island-shaped semiconductor la. In the semiconductor la, the photodiode region 7 composed of the second semiconductor ρ region 3 and the third semiconductor N regions 6a and 6b is a photoelectric conversion portion, and the third semiconductor N region 6a, 6b of the photodiode region 7 is formed. It is a signal charge storage unit that accumulates signal charges generated in the photoelectric conversion unit. Then, the bonded crystal system is a signal charge reading unit that uses the fifth semiconductor P+ region 1〇 and the second semiconductor P region 3 near the first semiconductor region 2 as a source ship, and photoelectrically The third semiconductor N region 6a of the diode 7 is a gate, and the signal charge reading portion is for reading and accumulating the signal charge amount from the first semiconductor N+ region 2 and accumulating in the photoelectric body region 7. The corresponding source has no pole current as the signal current. Then, the MOS transistor system is an accumulation signal charge removing portion for removing signal charges accumulated in the third semiconductor N regions 6a and 6b in the i-th semiconductor N+ region 2, and the MOS transistor system is a third semiconductor N region. 6a and 6b serve as sources, and the gate conductor layers 5a and 讥 are used as gates, and the first semiconductor N+ region 2 is regarded as a drain, and between the third semiconductor N regions 6a and 6b and the first semiconductor region 2 The second semiconductor p region 3 serves as a channel. In the present embodiment, the island-shaped semiconductor h in which the photoelectric conversion portion is formed is formed in the island-shaped semiconductor la, and the photoelectric conversion portion, the signal charge storage portion, the signal charge reading portion, and the accumulation signal electric removal portion are formed. The outer circumference Deng can be covered by the light reflecting conductor layers 9a, 9b. After that, a light-transmitting intermediate region 24 composed of a material that penetrates light is formed on the fifth semiconductor p+ region 1 , and a focus is formed on the fifth semiconductor region 1 on the light-transmissive intermediate region 24 323367 20 201218364 Microlens 11 near the surface. This light penetrates the intermediate portion 24 and the microlens 11 and is formed of a transparent resin material. In the island-shaped semiconductor la, the ridges (electromagnetic energy waves) 12a, 12b' incident from the upper surface of the microlens 11 are concentrated at the focus of the microlens 11 located near the upper surface of the fifth semiconductor cryptic region 10. The light ray 12a, 12b of the condensed light is reflected by the light ray which is incident on the island-shaped semiconductor la except for the line which is perpendicularly incident on the central portion of the microlens u, and is reflected by the light as the pixel selection line. The conductor layers 9a and 9b and the conductor layer are reflected and propagated in the island-shaped semiconductor la<曰# h to be absorbed to generate signal charges. ^ Island shape + net Therefore, the length of the light in the photodiode region 7 as the photosensitive region is longer than the height Ld of the photodiode region. Thus, 矸# is a long-term transmission of light in the photodiode region _ 7 as a photosensitive region: second means: compared with the conventional pixel-based y-camera device shown in the first example, The same sensitivity is obtained while lowering the high 虞Ld of the photodiode region. The fault can be narrowed down. (4) The height and width of the semiconductor la tbUM is the ratio of the upper side length of 1 to the height Ld of the photodiode area, and the user can perform the island-shaped semi-conductor (four) pixel structure including the pixel. 1. In the present embodiment, the light rays 12a and 12b which are incident on the 2+ conductor h constituting the pixel from the oblique direction can be prevented by the light-reflecting conductor and the conductor layer % and ❿, so that the light (10) can be prevented. An island-shaped body constituting a pixel adjacent to the island-shaped semiconductor 1a of the pixel. In this case, the resolution of the solid-state imaging device can be prevented from being lowered, and

S 323367 201218364 Color mixing in color photography. In the solid-state imaging device of the present embodiment, a schematic plan view of the arrangement of the island-shaped semiconductors Ρι to Pm constituting 3x3 (=9) pixels formed in the pixel region is seen from the light incident surface side. As shown in Fig. 1B, the island-shaped semiconductors Ρι to P33 constituting the pixels having the microlenses thereon are formed on the signal line semiconductors N+ regions Si, S2, and S3 extending in the vertical direction in the figure. Then, the pixel selection lines 9ab, 9ab2, 9ab3, and the MOS gate wirings 5ab1, 5ab2, and 5ab3 surround the island-shaped semiconductors P" to P33 arranged in the direction of the array of the island-shaped semiconductors P11 to Pa arranged in a matrix. Formed by the way. The pixel selection lines gabi, 9ab2, and 9ab3 and the MOS gate wirings 5ab1, 5ab2, and 5ab3 are formed so as to overlap each other. Then, the island-shaped semiconductors pu to p33, the gate wirings 5ab1, 5ab2, and 5ab3, and the pixel selection lines 9aM, 9ab2, and 9ab3 are connected to a drive/output circuit (not shown) provided around the pixel region. Fig. 1C is a schematic perspective view showing a three-dimensional structure in a rectangular region surrounded by a dot chain line a in Fig. 1B. As shown in Fig. 1c, the first semiconductor if regions 2a and 2b corresponding to the island-semiconductor-first semiconductor N+ region 2 shown in Fig. 1A are present in the island-shaped semiconductors Pii and Pi2'. The first semiconductor N+ regions 2a and 2b are electrically connected to the strip-shaped signal line N+ regions 2aa and 2 extending in the i-th scan direction on the substrate. Further, a ring-shaped gate conductors Jana 5aa and 5bb are formed so as to surround the island-shaped semiconductor Pu and the outer peripheral portion. The gate conductor layers 5aa and 5bb are electrically connected to the MOS gate wirings 5ab (5abl, 5ab2, 5ab3) extending toward the side 22 323367 201218364 orthogonal to the strip signal line N+ regions 2aa and 2bb. The annular light-reflecting conductor layers 9aa and 9bb are formed to surround the outer circumferences of the island-shaped semiconductors Pn and p12. The light-reflecting conductor layers 9aa and 9bb are electrically connected to the pixel selection line 9ab extending in a direction orthogonal to the strip-shaped signal line N+ regions 2aa and 2bb. The light-reflecting conductor layers 9aa and 9bb are electrically connected to the fifth semiconductor P+ regions 10a and 10b formed thereon. The microlenses 11a and 11b are disposed on the fifth semiconductor P+ regions 10a and 10b. The island-shaped semiconductors Pn and P1Z formed on the strip-shaped signal line N+ regions 2a and 2bb form a conductor layer 5aa, 5bb, and light that reflects light so as to surround the island-shaped semiconductors Pn and P!2. Reflective conductor layers 9aa, 9bb. Since the first semiconductor N+ regions 2a and 2b and the strip-shaped signal line if regions 2aa and 2bb are regions in which the donor impurities are sufficiently doped, the first semiconductor N+ regions 2a and 2b and the strip-shaped signal line N+ region 2aa are 2bb, does not generate signal charge (here, free electron) due to the incident light (electromagnetic energy wave). Thus, light rays incident on the island-shaped semiconductors pn and Pu from the microlenses 11a and lib hardly cause light leakage to the island-shaped semiconductors constituting the pixels adjacent to the island-shaped semiconductors Ρπ and P12, and are respectively on the conductors. The layers 5aa and 5bb and the light-reflecting conductor layers 9aa and 9bb are reflected and propagated in the high-profile semiconductors Pn and Pu, and are absorbed in the island-shaped semiconductors P" and P12 to generate signal charges. Thereby, the height of the island-shaped semiconductors P1, Pu can be lowered, and the workability of the pixel structure can be improved, and high pixel density can be realized. Further, it is possible to provide a solid-state imaging device which does not have a reduction in resolution and a color mixture of color imaging. In the first embodiment, the second semiconductor P region 3 (see the

S 23 323 367 201218364 1A) is composed of a P-type semiconductor, but the second semiconductor p region 3 may be an intrinsic semiconductor instead of such a P-type semiconductor. All semiconductors refer to semiconductors whose parent wealth does not contain impurities' and whose f-meter energy system is located near the center of the energy band gap at the lower end of the conductor and the upper end of the valence band. When the semiconductor contains a trace amount of a trace impurity, it becomes a P-type, and if it is a pure semiconductor which does not contain a completely impurity, it becomes an intrinsic type, and if it contains a trace amount of a dopant (4), it becomes an N-type. The built-in semiconductor is a high-resistance, and a potential gradient is generated internally when a voltage is applied between the fifth semiconductor p+ regions 1 〇 &, l 〇 b and the strip-shaped signal line N+ region 2 纽 2 bb. Then, 'holes from the fifth semiconductor p+ regions 10a and 10b> that are mainly in the bulk having the potential gradient flow toward the strip-shaped signal lines N+ regions 2aa and 2bb, so The second semiconductor region 3 composed of the intrinsic semiconductor functions as a channel for bonding the transistors. (Second Embodiment) Figs. 2A and 2B are a cross-sectional view and a potential distribution diagram of a solid-state imaging device of a conventional example, respectively. 2C to 2F are a schematic view showing a pixel structure, a potential distribution diagram, and a plan view of a solid-state imaging device according to a second embodiment of the present invention. In the solid-state imaging device according to the first embodiment, the solid-state imaging device of the first embodiment can solve the problem of high pixelation, high sensitivity, and resolution in the solid-state imaging device of the conventional example (see FIG. 12A). Reduce the problem of color mixing with color imaging, and prevent dark current and dark current noise.

.S 323367 24 201218364 In the cross-sectional structure of the island-shaped semiconductor 30 shown in Fig. 2A, in order to prevent the reduction of the resolution generated in the solid-state imaging device of the conventional example shown in Fig. 12A, the color mixture in color imaging is prevented. Except for the following difference points, since the rest of the pixel structure is the same as that shown in FIG. 1A, the description of the portion of the same component symbol is omitted except for the case where the following description is made to surround the photodiode region. In the outer peripheral portion of the semiconductor N regions 35a and 35b, the light shielding metal layers 55a and 55b for shielding light are provided through the insulating layers 33a and 33b, and the fourth semiconductor P+ region 8a is not formed in the surface portion of the photodiode region. , 8b. In this pixel structure, the incident light ray 38a can be reflected by the light shielding metal layers 55a, 55b, whereby light leakage to the photodiode region of the adjacent pixel can be prevented. However, although the light shielding metal layers 55a and 55b can be provided in such a manner as to surround the semiconductor N regions 35a and 35b of the photodiode region, the reduction in resolution and color mixing can be prevented, but the dark current cannot be prevented. The generation of dark current noise. Fig. 2B is a view showing a potential distribution along the line A-A' of Fig. 2A when the signal charge storage operation of the solid-state imaging device of the embodiment is performed. As shown in Fig. 2B, a positive voltage Vg (V) is applied to the light shielding metal layer 55a (55b), and the voltage Vp (V) of the semiconductor P region 32 becomes the ground potential Vp (=0 V). In FIG. 2B, the potential distribution when the signal charge Qsig (here, free electron) is not accumulated in the semiconductor N region 35a is shown by a broken line, and the potential distribution when the signal charge Qsig is accumulated is shown by a solid line. The bottom of the potential distribution (the highest voltage) when no signal charge is accumulated is located in the middle

S 25 323367 201218364 The inside of the conductor N region 35a, and the potential at the bottom of the potential distribution is Vcm 〇, in the case where the signal charge Qsig is accumulated in the semiconductor N region 35a, from the light shielding metal layer 55a (55b) to the insulating layer 33a, The potential of the interface potential vi' of the semiconductor n region 35a becomes deeper. Then, in the region where the signal charge Qsig is accumulated, the potential Vs of the signal charge storage portion becomes flat, and from there toward the semiconductor N region 35a, the semiconductor p region 32, the potential Will lighten from Vs towards Vp. The length Ldw of the depletion layer thus expanded in the semiconductor P region 32 can be varied depending on the presence or absence of the Q-ray. Further, in the semiconductor n region 35a, 'when the interface potential between the insulating layer 33a and the semiconductor N region 35a is set to Vi (V)', depending on the presence or absence of the signal charge Qsig, the potential is applied from the interface toward the inside of the semiconductor N region 35a. Deepen to Vcm or "the way

Make a difference. In this state, when the energy of the energy level 56 existing at the interface between the insulating layer 33a and the semiconductor N region 35a is thermally excited to a conduction band, the electron 56 is mixed in the semiconductor N region 35a. It is located in the signal charge Qsig at a deeper potential. The mixed electrons 56 are referred to as dark currents, and dark current fluctuations between pixels cause uneven current leakage. Also, the dark current itself becomes a noise (an unwanted signal), which is a cause of lowering the S/N (signal/noise ratio). In Fig. 2B, since the voltage of the light shielding metal layers 55a, 55b is made even

Vg changes to the ground voltage (0V), etc. 'The Vs become deeper than Vi. ・There is no change, so the electrons 56 that always generate dark current at the interface between the insulating layer 33a and the semiconductor N region 35a will move. To semiconductor n region 35a

C 323367 26 201218364 Internal, and mixed in the signal charge Qsig. Therefore, the case where the light shielding metal layers 55a and 55b are provided in the pixel structure of the conventional example shown in Fig. 12A does not suppress the generation of dark current and dark current noise. Fig. 2C is a diagram showing the pixel structure of the solid-state imaging device of the embodiment. As shown in Fig. 2C, a second semiconductor N+ region 2 serving as a signal line is formed under the island-shaped semiconductor ia constituting the pixel. In the j-th semiconductor N+ region 2, a second semiconductor p region 3 opposite to the conductivity type of the second semiconductor N+ region 2 is formed (the second semiconductor p region may be formed of an intrinsic semiconductor instead of the p-type semiconductor) . In the upper side surface region of the second semiconductor P region 3, a third semiconductor N region having the same conductivity as that of the second semiconductor germanium region 2 is formed. The insulating layers 4a and 4b are formed so as to surround the outer peripheral portion of the 半导体3 semiconductor N regions 6a and 6b and the outer peripheral portion of the lower side surface region of the second semiconductor P region 3. A gate conductor layer 5b is formed in a lower region of the second semiconductor P region 3 so as to surround the outer peripheral portions of the insulating layers 4a and 4b. The gate conductor layers 5a and 5b are formed, for example, of a metal material, and also function as a light reflection layer that reflects light (electromagnetic energy waves). An M〇s transistor is formed in the island-shaped semiconductor la system constituting the pixel, and the MOS transistor system uses the third semiconductor N regions 6a and 6b as a source and the gate conductor layers 5a and 5b as a gate. The i-th semiconductor N+ region 2 is regarded as a gateless electrode', and the second semiconductor p region 3 between the first semiconductor N+ region 2 and the third semiconductor N regions 6a and 6b is regarded as a channel. Then, a photodiode region 7 composed of the second semiconductor p region 3 and the third C. 323367 27 201218364 semiconductor N regions 6a and 6b is formed on the upper side of the polarity conducting conductor layers 5a and 5b. The fourth semiconductor P+ regions 8a and 8b are formed in the surface layer portion of the photodiode region 7. The fourth semiconductor P+ regions 8a and 8b' are formed between the third semiconductor N regions 6a and 6b and the insulating layers 4a and 4b, and are in contact with the insulating layers 4a and 4b. In the outer periphery of the fourth semiconductor P+ regions 8a and 8b, light-reflecting conductor layers 99a and 99b for reflecting electromagnetic energy waves such as light are formed from the electrodes 4a and 4b via insulation. The light-reflecting conductor layers 99a and 99b are formed on the outer peripheral portions of the third semiconductor N regions 6a and 6b except for the insulating layers 4a and 4b other than the conductor layers 5a and 5b. The light-reflecting conductor layers 99a and 99b are formed using, for example, a metal material, and function as a conductor layer through which a current flows and a light-reflecting layer that reflects light. In the upper portion of the third semiconductor N regions 6a and 6b, a fifth semiconductor P+ region 1A having the same conductivity type as that of the second semiconductor p region 3 electrically connected to the fourth semiconductor P+ regions 8a and 8b is formed. The fifth semiconductor p+ region 10 is connected to the metal layers 10a and 10b. When the metal layer is 1 、 and 10 bb, it is a pixel selection line extending in a direction orthogonal to the first scanning direction (the edge of the signal). Therefore, the metal layer 1Gaa and the lion function as a light reflecting layer and a pixel selection line. Further, the light-reflecting conductor layer and 99b are electrically connected to the island-shaped semiconductor-emitter conductive layers 99c and 99d constituting the pixel. In the case of the other embodiment, the photoelectric conversion unit (photodiode _ field 7) L number electric charge β accumulation product #, signal charge readout unit, and accumulated signal charge removal unit are the same as the first map. The whistle, the insect Ab, and the island-shaped semiconductor la in the first embodiment are the same, and the description thereof is omitted. 323367 28 201218364 Then, a light-transparent intermediate region 24 composed of a material that penetrates light is formed on the fifth semiconductor P+ region ι, and a focus is located on the fifth semiconductor P+ region on the light-transmissive intermediate region 24. 1) The microlens 11 near the upper surface. The light penetrates the intermediate portion 24 and the microlens 11 and is formed, for example, of a transparent resin material. In the island-shaped semiconductor 1a, the light rays 12a and 12b' incident on the upper surface of the microlens 11 are concentrated on the focus of the microlens 11 located near the surface of the fifth semiconductor P+ region 1A. The light rays 12a, 12b which are incident on the island-shaped semiconductor la other than the light rays incident on the central portion of the microlens 11 in the collected light rays 12a, 12b can be used as the light-reflecting conductor layer as the pixel selection line. 99a and 99b and the gate conductor layers 5a and 5b are reflected and propagated in the island-shaped semiconductor la, and are absorbed in the island-shaped semiconductor ia to generate signal charges. As a result, the height of the island-shaped semiconductor la (the height Ld of the photodiode region 7) can be reduced similarly to the solid-state imaging device of the first embodiment. As a result, it is possible to provide a solid-state imaging device capable of improving the processability of the pixel structure including the island-shaped semiconductor constituting the pixel, achieving high pixel density, preventing the reduction of the resolution, and color mixing by color imaging. Fig. 2D is a diagram showing the potential distribution along the line B-B of Fig. 2C when the signal charge storage operation of the solid-state imaging device of the present embodiment is performed. The grounding voltage Vg (= 〇 y) is applied to the light-reflecting conductor layer 99a as shown in Fig. 2D. Similarly, a ground voltage vg (= 〇v) is also applied to the first semiconductor N+ region 2 and the fifth semiconductor p+ region 1A. In Fig. 2C, since the fourth semiconductor P+ region 8a is electrically connected to the fifth semiconductor P+ region 1〇, the fourth semiconductor p+ region% is electrically

S 29 323367 201218364 The bit will become the ground voltage Vg (= 〇 V). In the state in which the signal charge Qsig is accumulated in the third semiconductor N region 6a, the potential from the fourth semiconductor p+ region 8a to the third semiconductor N region 6a is deeper from Vg toward the potential Vs having the signal charge Qsig, and is accumulated. In the region of the signal charge Qsig, a constant potential is maintained, and from this point toward the second semiconductor p region 3, the potential Vp of the second semiconductor P region 3 is lowered. In this state, a large number of holes 56d supplied from the fifth semiconductor p+ region 1A are present in the fourth semiconductor p+ region 8a. Therefore, when the energy level 56c existing at the interface between the insulating layer 4a and the fourth semiconductor p+ region 8a is thermally excited to the conductive strip, the electron 56c is present in the fourth semiconductor p+ region such as the hole 56d. Eliminated by combination. Thereby, the excited electrons 56c are not mixed in the signal charge Qsig, and dark current and dark current noise are not generated. Fig. 2E is a diagram showing the potential distribution along the line B_B of Fig. 2C when the signal charge reading operation of the solid-state imaging device of the embodiment is performed. Referring to FIGS. 2C and 2E, when the signal charge is read, a positive voltage VH (V) is applied to the fifth semiconductor P+ region 10, and the light-reflecting conductor layer 99a and the first semiconductor N+ region serving as a signal line. 2. The gate conductor layer 5a is applied with a ground voltage Vg (=0 V). As shown in Fig. 2C, since the fourth semiconductor P+ region 8a is electrically connected to the fifth semiconductor p+ region 1A, the fourth semiconductor P+ region 8a becomes a positive voltage vh. The potential distribution map in this state rises from the potential Vg of the light-reflecting conductor layer 9 via the potential VH of the fourth semiconductor P+ region to the potential Vs of the region where the signal charge Qsig is accumulated. Then, in a region where the electric charge Qsig of the letter C.323367 30 201218364 is accumulated, a constant potential Vs is maintained, and further toward the second semiconductor P region 3, the potential Vp of the second semiconductor p region 3 is shallowed. In this state, in the fourth semiconductor P+ region 8a, there are many holes that are supplied from the fifth semiconductor P+ region 1A (h〇le: ^, therefore, similarly to the state shown in FIG. 2D, When the energy level 56c existing at the interface between the insulating layer 乜 and the fourth semiconductor P+ region 8a is thermally excited to the conductive strip, the electron 56c' is recombined with the hole 56d existing in the fourth semiconductor p+ region 8a. Therefore, the excited electrons 56c are not mixed in the signal charge Qsig, and dark current and dark current noise are not generated. Thus, according to the solid-state imaging device of the embodiment, even the fourth semiconductor is used. The potential of the P+ region 8a changes, and the electron 56c is also destroyed by recombination with the hole 56d. Therefore, the state in which dark current and dark current noise are not generated can be maintained. Further, even if the potential of the light-reflecting conductor layer 99a is generated Since the potential of the fourth semiconductor p+ region 8a can be maintained at the potential of the fifth semiconductor P+ region 10, even the energy of the energy level 56c existing at the interface between the insulating layer and the fourth semiconductor P+ region 8a is thermally excited to be electrically conductive. Belt, the electricity The sub-56c is also combined with the hole 56d located in the p+ region of the fourth semiconductor to be eliminated, and the state in which dark current and dark current noise are not generated can be maintained. As described above, since the fourth semiconductor P+ region 8a, It is electrically connected to the fifth semiconductor P+ region 1〇', so that in the fourth semiconductor p+ region, not only when the signal charge is accumulated, but also when the signal charge is read, the signal is charged 31 323367 201218364 A large number of holes supplied from the fifth semiconductor P+ region 10 can be formed in the fourth semiconductor P+ region. Therefore, heat is excited from the interface of the insulating layer such as the fourth semiconductor P+_8a to the electrons of the conductive strip, The grid 56d, which is present in the fourth semiconductor P+ region 8a, is combined to eliminate the stomach. As a result, dark current and dark current noise can be prevented from being generated. Fig. 2F is seen from the light incident surface side as shown in Fig. 2C. A schematic plan view of the solid-state imaging device according to the present embodiment. As shown in FIG. 2F, the light-reflecting conductor layers 99c and 99d' connected to the light-reflecting conductor layers 99a and 99b of the second embodiment are formed in the entire pixel region. Reflective conductor connection layer 99 The pixel selection lines (metal layers) 9ab1, 9ab2, and 9ab3 (corresponding to the metal layers 10aa and 10bb of FIG. 2C) are formed to be isolated from the light-reflecting conductor layers 99a and 99b and the light-reflecting conductor layers 99c and 99d, and are The array of island-shaped semiconductors Pn to P33 arranged in a matrix is extended in the column direction. Further, the MOS gate wirings 5ab1, 5ab2, and 5ab3 and the signal line semiconductors N+ regions S!, S2, and S3' are in the same state as in the first panel. The light-reflecting-conductor connection layer 99' is shielded from the pixel region except for the upper surface of the island-shaped semiconductors Pn to P33 constituting the pixel to avoid light irradiation. Therefore, the incident light ray 100 incident on the gaps Gi to & in the direction of the column-like semiconductors Pu to P33 constituting the pixels can be reflected by light that surrounds the outer peripheral portions of the island-shaped semiconductors Pu to P33. Since the conductor connection layer 99 prevents entry into the structure from between the gaps G1 to G4, it is possible to prevent the resolution of the conventional solid-state imaging device from being lowered and the color mixture in color imaging. Hereinafter, a modification of the second embodiment will be described with reference to Figs. 3A and 3B. 323367 201218364 Fig. 3A is a view showing a pixel structure of a solid-state imaging device according to a variation of the embodiment. In FIG. 2C, 'the outer peripheral portions of the third semiconductor N regions 6a and 6b and the fourth semiconductor P+ regions 8a and 8b are formed with respect to the gate conductor layers 5a and 5b and the metal layer (pixel selection line) 10aa. The light-reflecting conductor layers 99a, 99b are isolated by i〇bb. However, in the pixel structure of the variation shown in Fig. 3A, the "gate conductor layers 56a, 56t" extend to the third semiconductor N regions 68, 61) and the fourth semiconductor. The outer regions of the + regions 83 and 81) are formed. The other components are the same as those of the cross-sectional structure shown in Fig. 100. Therefore, the description of the portions with the same reference numerals will be omitted except for the following description. In the state of the signal charge storage operation of the solid-state imaging device of the present embodiment, the state of the signal charge accumulation operation of the solid-state imaging device of the third embodiment is shown in FIG. 3B. The ground conductor voltage Vrgl (=〇v) is applied to the pole conductor layer 56a, and the positive voltage 3B is applied to the gate conductor layer when the charge is removed. The conductor layer 56a is applied to a potential map in which the insulating layer is formed by adding a 1 ί := bit to the layout ' and a broken line to the gate conductor layer 56 a : 2 f. As shown in the megagraph, in the U-Electrical QSlg corpus in the 3rd semi-conductive fourth semiconductor field (6) toward the 3rd semi-conductor 2 = the deeper to the potential with the signal charge Qsig ^ N & field 6a ' The potential system # Osis: i is the potential Vs, and in the region ♦ where the signal is stored as ig, the second semiconductor half can be maintained and from here to the position Vp. 2+ conductor p region 3 electric 33 Q. 323367 201218364 As shown in Fig. 3A, due to the flute, the semiconductor P region 8a is electrically connected to the fourth 5 conductor of the semiconductor 5 p + region 1 〇tr The potential Vpl of the p+ region 8a is the same as the potential of the fifth semiconductor p+. Therefore, the 'potential of the gate layer' is from the time of accumulating the signal charge removing action.

Vrgl changes to Vrg2 (>Vrgl)' Since the fourth semiconductor p+ region 8 is connected to the fifth semiconductor P+ region 1〇, it can be fixed at ¥. Therefore, in the fourth semiconductor P+ region 8a, there are many holes that are supplied from the fifth semiconductor p+ region 1A as the donor region (the h〇(4) trace is similar, even in the k-charge reading operation. In the case where the fourth semiconductor p+ region 8 is connected to the fifth semiconductor p+ region 1 (), a large amount of the fourth semiconductor p+ region 8a' is supplied from the fifth semiconductor p+ region ι, and electricity is supplied. Hole 56d. Therefore, similarly to the state shown in FIGS. 2D and 2E, when the energy level 56c existing at the interface between the insulating layer 4a and the fourth semiconductor p+ region (5) is thermally excited to the conductive tape The electron 56c is recombined with the hole 56d located in the fourth semiconductor p+ region 8a, whereby the excited electron 56c' is not mixed into the signal charge Qsig, and no dark current is generated. In the solid-state imaging device according to the present embodiment, even if the potential of the gate conductor layer 56a changes, it is possible to maintain a state in which no dark current or dark current noise is generated. ▲ The following is referred to FIG. 4A. And the fourth embodiment, as in the second embodiment A variation embodiment will be described.

Fig. 4A is a view showing a pixel structure of a solid-state imaging device according to a modification of the embodiment. In FIG. 2C, the fourth semiconductor P+ regions 8a and 8b and the third semiconductor N 323367 34 201218364 regions 6a and 6b formed in the third semiconductor N region 6a and the outer peripheral portion are electrically connected to the fifth semiconductor p+. Area ι〇. In contrast, in the pixel structure of the present variation, the fourth semiconductor p+ region, 88b, and the third semiconductor N region 66a, _ are electrically isolated from the fifth semiconductor p+ region f W . In the outer periphery of the third semiconductor N region 66a and the fourth semiconductor P+ regions 88a and 88k, light-reflecting conductor layers 9a and 9b are formed via an insulating layer. Since the other components are the same as those of the cross-sectional structure shown in Fig. 2C, the description of the portions of the same component symbols will be omitted except for the following description. Fig. 4B is a view showing a potential distribution along the line D-D of Fig. 4A when the signal charge storage operation of the solid-state imaging device of the embodiment is performed. In the state shown in the figure, the fourth semiconductor p+ region is in the state of being stored in the hole (the second semiconductor p region 3 is supplied to the electric power, and there is a shape i of the rut). The reflection conductor layers 9a and gb are applied with a negative voltage Vpg (<〇V=Vp). Further, the second semiconductor p+ region 8 is VP2 (and 0 V). As shown in FIG. 4B, in a state where the signal charge Qsig is accumulated in the third semiconductor N region 66a, the potential from the fourth semiconductor p+ region geo 88a (88b) toward the third semiconductor n region 66a is from Vp2 to 具有The potential Vs of the signal charge Qsig, while in the region where the signal charge Qsig is accumulated, a certain potential Vs can be maintained, and from here toward the second semiconductor p region 3, the potential Vp of the second semiconductor p region 3 is shallowed. . In the pixel structure shown in FIG. 4A, since the fourth semiconductor p+ region 88a and the _ system are electrically isolated from the fifth semiconductor P+ region 1〇, the potential of the fourth semiconductor P+ regions 88a and 88b is the same as that of the fifth semiconductor p+. region

^ S 201218364 ίο The potential is not necessarily the same potential. In this case, in the fourth semiconductor P+ regions 88a and 88b, holes are injected from the second semiconductor P region 3, and a large number of holes are present. Therefore, as in the state shown in FIG. 3B, when the energy level 56c existing at the interface between the insulating layer 4a and the fourth semiconductor P+ region 88a (88b) is thermally excited to the conductive tape, the electron 56c is The hole 56d located in the fourth semiconductor P+ region 88a (88b) is combined and eliminated. Thereby, the excited electrons 56c are not mixed in the signal charge Qsig, and dark current and dark current noise are not generated. As described above with reference to the 2C, 3A, and 4A, the peripheral portions of the third semiconductor N regions 6a, 6b, 66a, and 66b and the fourth semiconductor P+ regions 8a, 8b, 88a, and 88b are described. The light-reflecting conductor layers 99a and 99b, the gate conductor layers 56a and 56b, and the light-reflecting conductor layers 9a and 9b are formed via the insulating layers 4a and 4b, and are subjected to signal charge accumulation operation and signal charge reading depending on the solid-state imaging device. In the case where the operation and the accumulation of the signal charge are removed, a large number of holes are formed in the fourth semiconductor P+ regions 8a, 8b, 88a, and 88b, thereby solving the problem of the solid-state imaging device of the conventional example. The realization of high pixelation and high sensitivity, reduction of resolution, and color mixing in color imaging can also prevent dark current and dark current noise. (Third Embodiment) Fig. 5A and Fig. 5B are diagrams showing the pixel structure of the solid-state imaging device and the pixel structure of the solid-state imaging device according to the modification of the third embodiment of the present invention. S-36 323367 201218364 In the solid-state imaging device of the present embodiment shown in FIG. 5A, an insulating layer 13 is formed under the island-shaped semiconductor la in the solid-state imaging device according to the first embodiment shown in FIG. A light-reflecting conductor layer 14a is formed under the insulating layer 13, and the light-reflecting conductor layer 14a is formed of metal or the like, and reflects light and is composed of a conductor. The light ray 12b incident from the upper surface of the microlens is reflected by the light reflecting conductor layers 9a and 9b and the gate conductor layers 5a and 5b as pixel selection lines, and propagates under the island semiconductor la. Then, the light ray 12c incident on the insulating layer 13 is reflected by the light-reflecting conductor layer 14a, and the reflected light ray 12d reaches the photodiode region 7 in the island-shaped semiconductor la forming the pixel again to generate a signal charge. In the solid-state imaging device according to the first embodiment, the sensitivity of the solid-state imaging device of the first embodiment is the same as that of the solid-state imaging device according to the first embodiment. The height Ld of the photodiode region 7 can be further reduced than the solid-state imaging device of the first embodiment. Thereby, the processing of the pixel structure can be easily performed, and the high pixel density of the solid-state imaging device can be achieved. Further, in the solid-state imaging device of the present embodiment, the height Ld of the photodiode region 7 can be lengthened by the photodiode region 7 as the photosensitive region even in the same manner as the solid-state imaging device of the first embodiment. Since the length is propagated, the signal charge generated by the reflected light 12d from the light-reflecting conductor layer 14a can also contribute to the sensitivity improvement. In the variation of the embodiment shown in Fig. 5B, the light-reflecting conductor layer 14b is directly formed on the lower portion of the island-shaped semiconductor 1a shown in Fig. 1A without interposing the insulating layer. Even with this pixel structure, the reflected light ray 12e reflected by the light-emitting layer 14b is incident on the photodiode region 7 of the island-shaped semiconductor la constituting the pixel again to generate a signal charge. Thereby, the same effects as those of the solid-state imaging device of the second embodiment shown in Fig. 2A can be obtained. As a result, according to the second embodiment and its modifications, a solid-state imaging device capable of obtaining high pixel density, high resolution, low color mixing, and high sensitivity can be realized. (Fourth Embodiment) Fig. 6A is a view showing a pixel structure of a solid-state imaging device according to a fourth embodiment of the present invention. As shown in FIG. 6A, the solid-state imaging device according to the present embodiment has the same pixel structure as the solid-state imaging device according to the first embodiment except for the following differences, and the difference is as shown in FIG. 1 below the island-shaped semiconductor 18 constituting the pixel of the solid-state imaging device of the embodiment, a light-transmissive insulating layer 15 of a Si 2 film or the like is formed, and under the light-transmitting insulating layer 15 , Si is formed. A light absorbing layer 16 constituting a portion absorbing incident light. The light ray 17 incident on the light penetrating the insulating layer 15 is as shown in FIG. 6A, which causes multiple reflections in the light penetrating insulating layer 15, and produces: 反射% of the reflected light reflected on the surface of the light absorbing layer 16, 18b, ...; and incident light rays 19a, 19b, ... incident on the light absorbing layer 16. In this case, the amount of light 'reflected in the light-transmitting insulating layer 15 and returned to the photodiode region 7 depends on the thickness of the light-transmitting insulating layer 15, the light absorptance of Si and Si〇2, The refractive index, the wavelength of the incident light, the incident angle, and the like change.

S 323367 38 201218364 Fig. 6B shows green light (wavelength λ = 550 η π 〇, red) incident on the surface of the light transparent insulating layer (Si 〇 2 layer) 15 at an angle of 45 degrees in the solid-state imaging device of the present embodiment. A graph showing the calculation result of the film thickness dependence of the reflectance of the Si 〇 2 layer 15 when the light (A = 650 nm) is reflected by the Si light absorbing layer 16. In addition, since the blue light is near the surface of the island-shaped semiconductor 1 & The photodiode region 7 is absorbed, so that such film thickness dependence is not observed. The reflectance indicates the amount of incident light returning to the photodiode region 7 to the incident light incident on the insulating layer 15 The ratio of the green light and the red light is higher or lower depending on the thickness of the layer 2 of the si layer 2, for example, when the thickness of the Si〇2 film is set to 〇. 5vm or so. In the case of the green light or the red light, the amount of reflection can be relatively increased. On the other hand, for example, when the thickness of the SiCh film is set to about 2.2/zm, the amount of reflection of the green light can be relatively increased, and Relatively reduce the reflectivity of red light. In need of such a Si〇2 In the signal processing to adjust the balance of the signal output of the blue, green and red light of the color camera, the film thickness of the Si〇z is set to about 0.2//m to improve the sensitivity of the green light and reduce the red light. The sensitivity of the color solid-state imaging device can be improved, and when the thickness of the Si〇2 film is set to about 55"m, and the green light and the red light can increase the reflectance, This improves the sensitivity in black-and-white imaging. Thus, by changing the film thickness of the Si〇2 layer 15, the reflectance can be changed depending on the wavelength of light, which means that the film thickness can be changed by Si〇2. To control the light sensitivity characteristic showing the relationship between the wavelength of the incident light and the sensitivity of the solid-state imaging device. In an actual solid-state imaging device, the light penetrates the insulating layer (Si〇2

The surface of S 39 323367 201218364 layer 15 is incident at various incident angles, and the characteristics of Fig. 6B can also be changed by the design of the microlens. Moreover, the required spectral sensitivity can be different by color imaging and black and white imaging. Thus, the technique of changing the thickness of the light penetrating insulating layer (Si 〇 2 layer) 15 and changing the reflectance by the wavelength of light provides an effective method for obtaining desired spectral sensitivity characteristics. . (Fifth Embodiment) Fig. 7A and Fig. 7B are diagrams showing a pixel structure of a solid-state imaging device according to a fifth embodiment of the present invention. As shown in FIGS. 7A and 7B, the solid-state imaging device according to the present embodiment has the same pixel structure as that of the solid-state imaging device according to the first embodiment except for the following difference, and the difference is: The central surface layer portion of the fifth semiconductor P+ region 10 in the pixel (island semiconductor) la of the solid-state imaging device according to the first embodiment shown in the figure is formed with the concave portion 20a or the convex portion 20b, and the concave surface of the concave portion 20a or The refractive indices of the two substance regions in which the convex surfaces of the convex portions 20b are the boundary interfaces and are in contact with each other are different from each other. Fig. 7A shows an example in which a triangular pyramid-shaped recess 20a is formed in the central surface layer portion of the fifth semiconductor P+ region 10 in the island-shaped semiconductor la constituting the pixel. In the pixel structure of the first embodiment shown in Fig. 1A, the concave portion 20a is not present in the central surface layer portion of the fifth semiconductor P+ region 10. Therefore, the light rays 21a, 21b incident perpendicularly to the central portion of the microlens 11 are not reflected by the light-reflecting conductor layers 9a, 9b, but are directly incident on the island-shaped semiconductor la of the structure 40 323367 201218364. internal. Therefore, the effect of lengthening the light propagation length in the photodiode region 7 by the reflection of the light-reflecting conductor layers 9a and 9b cannot be obtained for the light rays 21a and 21b which are vertically incident on the central portion of the microlens 11·. . On the other hand, in the pixel structure shown in FIG. 7A, the fifth semiconductor P+ region 10 is incident perpendicularly to the central portion of the microlens 11 except for the light ray 21a incident along the center line of the microlens 11. The light ray 21b can be refracted on the side of the light-reflecting conductor layers 9a and 9b by the recess 20a. Thereby, the refracted ray 22a is reflected by the light-reflecting conductor layers 9a and 9b, and the light propagation length in the photodiode region 7 is lengthened, whereby the sensitivity of the solid-state imaging device can be improved. The refraction of the light in the concave portion 20a is caused by the difference between the refractive index of Si which is the material of the fifth semiconductor P+ region 10 and the refractive index of the transparent resin material which is the material of the light penetrating the intermediate portion 24. And produced. Fig. 7B shows an example in which a triangular pyramid-shaped convex portion 20b is formed in the central surface layer portion of the fifth semiconductor P+ region 10. As shown in Fig. 7B, the convex portion 20b may be formed in the central surface layer portion of the fifth semiconductor P+ region 10 instead of the concave portion 20a shown in Fig. 7A. In this case, in addition to the light ray 21c incident along the center line of the microlens 11, the light ray 21d which is perpendicularly incident on the fifth semiconductor P+ region 10 from the central portion of the microlens 11 can be made by the convex portion. 20b is refracted to the side of the light-reflecting conductor layers 9a, 9b. Thereby, the refracted ray 22a is reflected by the light-reflecting conductor layers 9a, 9b, and the light propagation length in the photodiode region 7 can be lengthened, and the sensitivity of the solid-state imaging device can be improved. In the present embodiment, the refractive indices of the two substance regions which are in contact with each other by the concave surface of the concave portion 20a or the convex surface of the convex portion 20b are different from each other. The recess 20a or the projection 20b itself may be formed of a material having a refractive index different from that of the material of the fifth semiconductor P+ region 10 or the transparent resin material penetrating the intermediate portion 24, without being limited thereto. Thereby, the light incident on the fifth semiconductor P+ region 10 from the central portion of the microlens 11 can be refracted to the light reflection conductor layers 9a and 9b by the concave portion 20a or the convex portion 20b. Then, the light propagation length in the photodiode region 7 as the photosensitive region can be lengthened, and the sensitivity of the solid-state imaging device can be improved. In the present embodiment, referring to Figs. 7A and 7B, the shapes of the concave portion 20a and the convex portion 20b are each a triangular pyramid shape. The light incident on the central portion of the microlens 11 may be other shapes such as a conical shape or a quadrangular pyramid as long as it is refracted in the concave portion 20a or the convex portion 20b and reflected in the light reflection conductor layer. Shaped, semi-circular. (Embodiment 6) FIG. 8 is a view showing a pixel structure of a solid-state imaging device according to a sixth embodiment of the present invention. As shown in Fig. 8, the solid-state imaging device according to the present embodiment has the same pixel structure as that of the solid-state imaging device according to the first embodiment except for the following differences, and the difference is as shown in Fig. 1A. In the island-shaped semiconductor la constituting the pixel of the solid-state imaging device according to the first embodiment, the light beam 23 of the microlens 11 is positioned closer to the upper side than the upper surface of the fifth semiconductor P+ region 10 to penetrate the intermediate portion 24 Inside. In the pixel structure shown in FIG. 8, the focus 23 of the microlens 11 is

S 42 323367 201218364 Light is formed in the upper portion 24 that is closer to the upper portion than the fifth semiconductor P+ region 10. In the solid-state imaging device of the present embodiment, the incident light ray 25b incident from the microlens 11 and concentrated on the focus 23 of the light penetrating the intermediate portion 24 initially has the pixel structure, and initially reaches the light-reflecting conductor layer 9a. The position of 9b is such that the incident light ray 25a is located closer to the upper surface of the fifth semiconductor P+ region 10 (in the case of the pixel structure of the first embodiment), and is closer to the upper surface of the fifth semiconductor P+ region 10. This means that the incident light ray 25b generated by the pixel structure of the present embodiment can lengthen the light propagation length in the photodiode region 7 more than the incident light ray 25a in the pixel structure of the first embodiment. Therefore, according to the solid-state imaging device of the first embodiment, the sensitivity can be further improved as compared with the solid-state imaging device of the first embodiment. Even in the pixel structure shown in Fig. 8, the light rays 21b and 21d incident on the central portion of the microlens 11 shown in Figs. 7A and 7B cannot be lengthened in the photodiode region 7 The effect of the light propagation length. Therefore, the configuration of the fifth embodiment (the concave portion 20a or the convex portion 20b formed in the central portion of the fifth semiconductor P+ region 10) described in the seventh embodiment and the seventh embodiment is applied to the sixth embodiment. The sensitivity of the solid-state imaging device can be improved. (Embodiment 7) FIG. 9 is a view showing a pixel structure of a solid-state imaging device according to a seventh embodiment of the present invention. As shown in Fig. 9, the solid-state imaging device of the present embodiment is characterized by the configuration of the solid-state imaging device 43 323367 201218364 in the first embodiment shown in Fig. 1A. One point 26a, 26b of the outer peripheral portion of the microlens u is incident and passes through the center line 27 of the microlens 11 to reach the outer peripheral portion of the fifth half-body P region 1A, the two north rays 29a, 29b, and The angle 0 i ' formed by the line orthogonal to the upper surface of the fifth semiconductor p+ region 1 系 is more than the Brewster (such as the beaten) angle 0 b / J, 〇 in the 12A, 帛 13 In the solid-state imaging device of the prior art, since the photodiode region is not completely surrounded by the material that reflects the light, the light 38' that is incident on the photodiode region by a larger human angle is used. Will leak into the pixels adjacent to the pixel. On the other hand, as shown in Fig. ia, in the pixel structure sheet of the present embodiment, the light is incident on the photodiode region 7 at a different angle, and the entire photodiode region 7 is the conductor layer 5a. The 5b and the light-reflecting conductor layers 9a and % are completely surrounded, so that light leakage to adjacent pixels can be eliminated. This means that if the light incident from the microlens 11 reaches the inside of the fifth semiconductor p+ region 1〇, all of the incident light can be effectively contributed to the generation of the signal charge. However, the light incident on the microlens Η at a larger angle of incidence is reflected on the surface of the fifth semiconductor Ρ+ region 10, and does not contribute to the generation of signal charges. On the other hand, in the solid-state imaging device according to the seventh embodiment, as described below, all the light rays incident on the microlens 11 and passing through the intermediate region % by light can be efficiently guided to the photodiode region 7. As shown in Fig. 9, the entrance point 26a, 26b of the outer peripheral portion of the microlens 11 enters and passes through the center line 27 of the microlens 11 and the light penetrates the intermediate portion 24 to reach the outer peripheral portion of the fifth semiconductor P+ region 10. 323367 44 201218364 of the points 28a, 28b ^, ^, and the angle 正交 orthogonal to the surface of the fifth semiconductor P+ region 1G, Pebble is also smaller when the light transparent intermediate region 24 is twitched * < When the refractive index is Nr and the refractive index of the fifth semiconductor P region 10 is N2, it can be expressed by the following formula. Θ b=tan_1(Ni/N2) ', when the above-mentioned angle ❹i is larger than the Brewster angle, the person who enters the microlens 11 and passes through the intermediate portion 24 through the light, will be in the fifth semiconductor field.表面) The surface is totally reflected, and will not enter the fifth semiconductor Ρ+ area 10. Thus, by setting the corner ❹i to be smaller than the Brewster angle Θb, all of the light incident on the microlens u and passing through the intermediate portion 24 through the light can be efficiently guided to the photodiode region 7. Here, the effective guiding of the light means that the light incident on the surface of the fifth semiconductor p+ region 1〇 is not totally reflected and enters the fifth semiconductor P+ region 1〇. Thereby, the sensitivity of the solid-state imaging device can be improved. (Embodiment 8) Hereinafter, a solid-state imaging device according to an eighth embodiment of the present invention will be described with reference to Figs. 10A to 10E. Fig. 10A is a perspective view showing a state in which the incident light ray is incident on the gap G2 extending in the column direction between the island-shaped semiconductors Pu to p33 constituting the pixels in the first embodiment shown in Fig. 1B. As shown in Fig. 10A, the incident light ray 100 incident from above is incident on the strip-shaped signal line N+ region 2aa located below the island-shaped semiconductor Pn. A part of the incident light ray 100 is a strip-shaped signal line N+ region 2aa sandwiched by two insulating layers having different refractive indices, and a strip adjacent thereto 45 323367 201218364-shaped k-line N+ region 2bb (signal Multiple reflected lights l〇la, 101b, 101c, l〇ld are generated in the line semiconductor N+ regions Si, S2, and S3). The multiple reflected lights i〇la, 101b, l〇ic, and 1〇ld are photodiode regions 7 incident on the island-shaped semiconductor Pi2 constituting the pixels adjacent to the island-shaped semiconductors ρ1 constituting the pixels (see FIG. 1A). And the signal charge is generated. The light leakage of the island-shaped semiconductor P1z constituting the adjacent pixels causes a decrease in the resolution of the solid-state imaging device and color mixing with the color imaging command. Fig. 1 is a schematic plan view showing the solid-state imaging device of the embodiment as seen from the light incident surface side. As shown in Fig. 10B, the island-shaped semiconductors pu to Pm constituting the pixels are arranged in a square lattice shape or a rectangular lattice shape. The pixel selection lines 9ab1, 9ab2, 9ab3 and the gate wirings 5ab1, 5ab2, and 5ab3 which are formed in the horizontal direction of the drawing are arranged so as not to overlap each other from the top of the drawing. The pixel selection lines 9ab1, 9ab2, and 9ab3' are wired in the gaps G!, G2, G3, and G4 formed between the MOS gate wirings 5ab1, 5ab2, and 5ab3. According to this configuration, the incident light incident from the light irradiation surface in the entire region of the pixel region where the solid image capture occurs is blocked by the pixel selection lines 9ab1, 9ab2, and 9ab3, thereby preventing the direct arrival of the multiple Reflected signal line semiconductor N+ regions Si, S2, S3. According to the solid-state imaging device of the present embodiment, it is possible to prevent the resolution from being lowered and the color mixture in color imaging. Fig. 1 is a perspective view showing a three-dimensional structure in a region surrounded by a point chain line B of Fig. 10B. As shown in Fig. 10C, pixel selection lines 9ab1 connected to the light reflection conductor layers 9aa and 9bb formed on the outer peripheral portions of the island-shaped semiconductors Pn and P1z are formed. Then, the pixel selection line 9abl is formed in a region where the gap g2 is formed so as to extend in the horizontal direction by C. 46 323367 201218364. Others have the same pixel structure as that of Fig. 1C, and therefore the same reference numerals are used for the same reference numerals, and the description thereof is omitted. When viewed from the side of the light-emitting surface, the domain can be substantially covered by the pixel selection line 9abl and the burn-off wiring 5ab, except for the island-shaped semiconductors Pu and pi2 existing in the ϋ*-electric conversion portion, so that the incident light is The line 100 does not leak into the interior of the adjacent island-shaped semiconductor as in the pixel structure shown in FIG. 10A. Fig. 10D is a perspective view showing a state in which the MOS gate wiring 55abl is provided in a region of the gap G2 extending in the column direction between the island-shaped semiconductors constituting the pixel. The same as the stereoscopic schematic structure shown in Fig. 1C and Fig. 1A except that the MOS gate wiring 55abl is provided. The structure shown in Fig. 10D is also the same as the structure shown in Fig. 1(), and the island semiconductor exists in the photoelectric conversion portion when viewed from the light incident surface side.

The regions other than P11 and P12 can be substantially covered by the pixel selection line 9ab and the MOS gate wiring 55ab1, so that the incident light rays are not leaked to the adjacent islands as in the pixel structure shown in FIG. Inside the semiconductor. Fig. 1 is a plan view showing a solid-state imaging device according to a modification of the embodiment. As shown in Fig. 1E, the island-shaped semiconductors Ρι to P33' constituting the pixels are not arranged in one row in the vertical direction, but are arranged in a thousand bird shape. When the island-shaped semiconductors Pu to Pm constituting the pixels are arranged in the thousands of bird-shaped signal line semiconductors N+ regions Si, S2, and S3, the island-shaped semiconductors P11 to P33 are connected to each other in the upper and lower sides. Similarly to the first drawing, the pixel selection lines 9ab1, 9ab2, and 9ab3 are wired in the gaps of the MOS gate wirings 5ab1, 5ab2, and 5ab3, and in G2, G3, and G4. Thereby, 47 323367 201218364 in the entire area of the pixel device of the solid-state imaging device, by the pixel selection lines 9ab1, 9ab2, 9ab3 and the MOS gate wirings 5ab1, 5ab2, 5ab3, the incident light can be prevented from directly reaching the multiple reflections. Signal line semiconductor N+ regions Si, S2, S3. As a result, according to the solid-state imaging device according to the present modification, it is possible to prevent a decrease in the resolution and color mixing in color imaging. Further, in FIGS. 10B and 10E, a slight gap is formed between the pixel selection lines 9ab1, 9ab2, and 9ab3 and the MOS gate wirings 5ab1, 5ab2, and 5ab3 in a state of being viewed from the light incident surface. However, the pixel selection lines 9ab1, 9ab2, and 9ab3 and the MOS gate wirings 5ab1, 5ab2, and 5ab3 may be formed to overlap each other. Thereby, in the entire area of the pixel device of the solid-state imaging device, the incident light can be more reliably prevented from directly reaching the signal line semiconductor N+ regions Si, S2, S3 which generate multiple reflections by the pixel selection lines 9ab1, 9ab2, 9ab3. As a result, according to the solid-state imaging device of the present modification, it is possible to prevent a decrease in the resolution and color mixing in color imaging. (Ninth embodiment) A solid-state imaging device according to a ninth embodiment of the present invention will be described with reference to Figs. 11A and 11B. Fig. 11A is a cross-sectional view showing the solid-state imaging device of the embodiment. In the first embodiment shown in Fig. 1A, the first semiconductor n+ region 2 forms the entirety of the lower portion of the MOS transistor. On the other hand, as shown in FIG. 19, in the first embodiment, the region in which the first semiconductor N+ region 2 is formed in the first embodiment includes the sixth semiconductor p+ region 2c and the second semiconductor P region. 3th connected seventh semiconductor P region 3b; and 8th semi-conducting N+ region & P+ region 2c, & &amp separated from the sixth semiconductor P+ region 2c by the seventh semiconductor P region 3b by 48 323367 201218364 In the π-pixel structure, the sixth half* becomes the signal charge that is used as the charge of the cut region 7 to be discharged from the animal = the second pole of the first electric pole; the eighth semiconductor "zone *2. The bonding electric crystal is accumulated in the photodiode region 7 band to function as an accumulation signal for removing the enthalpy of the function of the charge removing portion by the second half _= /= semiconductor (4) The domain is isolated. In this way, in the signal charge conductor, the area % and the action of each other, the post-electricity and the accumulation of the (4) charge will be separated by the mode of the signal; = when it is enough to reach the height of 18 bodies? The advantage of the camera action of the action. In addition, in the ith image, the sixth semiconductor 2c of the bonded transistor is a pixel structure of the domain device of the present embodiment as shown in the (10) figure, and is replaced by the ninth semiconductor Ν+ region. Ka,, achieve the same camera action. In this case, the region below the second semiconductor ore region 2 in the vicinity of the ninth semiconductor N+a is the source of the junction transistor in which =2ca is a function of the signal charge reading portion. Further, in the above-described embodiment, a pixel structure, two or three or three (= nine) pixels are used in the pixel region, and a solid-state imaging device and an imaging operation thereof will be described. However, the present invention is not limited to this, and the technical idea of the image can be applied to a plurality of solid-state imaging devices in which a plurality of pixels a bright regions are arranged in a 丨-dimensional or 2-dimensional shape. In the above-described embodiment, the island-shaped semiconductor la has a photodiode region 7 as a photoelectric conversion portion and a third semiconductor N region 6a, 6b as a signal charge storage portion. In addition, the structure of the junction transistor of the output portion and the M〇s transistor of the signal charge removal unit is the same as the structure of the island semiconductor, and other structures are used. The configuration in which the photoelectric change portion, the signal charge storage portion, the signal charge readout portion, and the accumulated signal charge removal portion are provided is of course also encompassed by the technical idea of the present invention. In the above embodiment, the structures of the island-shaped semiconductors 1 a and Pi 1 to Pm constituting the pixels are each formed in a columnar shape. It is not limited thereto, and may be a quadrangular column or a polygonal column. In the above embodiment, the first semiconductor N+ region 2 and the third semiconductor N regions 6a and 6b are N-type conductivity type, the second semiconductor p region 3 is P-type conductivity type, and the fourth semiconductor P+ region 8a 8b and 5, the conductor P+ region 1 is a p-type conductivity type. However, the first semiconductor region 2 and the third semiconductor regions 6a and 6b may be of a p-type conductivity type, and the second semiconductor region 3 may be of an n-type conductivity type, and the fourth semiconductor regions 8a and 8b may be used. And the fifth semiconductor region 1 can also be a type conductivity type. In this case, in the fourth semiconductor N+ region of the N+ type, a large number of electrons of opposite polarities are accumulated as holes of the signal charge. In this = state, at the interface between the insulating layer 4a and the fourth semiconductor region of the N+ type, the field exists when the electrons of the electron band are in the forbidden band of energy = thermal excitation to the conductive strip. The electricity that causes the dark current is the same as that of the electrons in the fourth semiconductor N+ region of the N+ type. C: 50 323367 201218364: Combination: By this, the hole that becomes a dark current will not In the above-described embodiment, the channel of the M〇s transistor is formed in the second semiconductor p region 3 by the electric field (enhancement type • • Enhanced type. The channel of the smart transistor is not limited thereto, for example, by implanting impurities into a depletion type or embedding channel of the second semiconductor p region 3 by ion implantation or the like. In the above embodiment, although the light penetrating intermediate portion 24 is a single layer structure, the light penetrating intermediate portion may be formed by a plurality of layers, and may further include color filtering in the light penetrating intermediate portion 24. Sheet layer. In the above embodiment Although the conductor layers 5a and 5b and the light-reflecting conductor layers 9a, 9b, 99a, and 99b are formed of a single-layer metal film, they may be formed of a plurality of metal films. Further, the conductor layers 5a and 5b and the light reflection are provided. The conductor layers 9a, 9b, 99a, and 99b' are not limited to metals, and may be formed by, for example, polysilicon doped with impurities, or metal halides, including a material layer that reflects long-wavelength light, in one part of the metal, or may be merely doped. It is formed by polycrystalline germanium Si or metal germanide mixed with impurities. In the first B, 2F, 10B, and ι〇Ε diagrams, the Si, S2, and S3 lines forming the "line" are set as the semiconductor N+ region. . However, as shown in FIG. 5B, in the case where the light-reflecting conductor layer 14b made of a metal is directly formed under the first semiconductor N+ region 2 without interposing an insulating layer, the signal line Si is formed. Since the resistances of S2 and S3 are lowered by the light-reflecting conductor layer 14b, the signal lines S!, S2, and S3 may not be semiconductor N+ regions. In this case, it is incident on the gap &

S 323367 51 201218364

The incident light of G G G4 is 1 〇〇, and can be reflected by the light-reflecting conductor layer, and a part thereof can be prevented from leaking into the photodiode region 7 of the pixel (island semiconductor) adjacent to the pixel (the island-shaped semiconductor la). In the above-described embodiment, the light-reflecting conductor layers 14a and 14b reflect electromagnetic energy waves such as light of an electromagnetic wave, but the light-reflecting conductor layer may be used according to the purpose of use of the solid-state imaging device. The electromagnetic wave reflection conductor layer functions as a function of reflecting other electromagnetic energy waves such as infrared rays, visible light rays, external rays, X-rays, gamma rays, electron beams, and the like. In addition, the basic case of this application is PCT/JP2010/69384, which was filed on January 29, 2010. The descriptions of PCT/JP2010/69384, the scope of the patent application, and the drawings are incorporated in this specification. Further, various embodiments and changes may be made without departing from the spirit and scope of the invention. Further, the above-described embodiments are intended to illustrate one embodiment of the invention and are not intended to limit the scope of the invention. (Industrial Applicability) The present invention is applicable to a semiconductor device including a transistor in which a channel region is formed in a semiconductor having a columnar structure. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1A is a cross-sectional view showing a pixel structure of a solid-state imaging device according to a first embodiment of the present invention. Fig. 1B is a plan view schematically seen from the light incident surface side of the solid-state imaging slurry of the first embodiment. Fig. 1C is a perspective view showing a three-dimensional structure of two pixels (island-shaped semiconductors) adjacent to g-52 323367 201218364 in the solid-state imaging device according to the first embodiment. Fig. 2A is a cross-sectional view showing a pixel structure of a solid-state imaging device of a conventional example. Fig. 2B is a potential distribution diagram along the line A-A' of Fig. 2A. Fig. 2C is a cross-sectional view showing the pixel structure of the solid-state imaging device according to the second embodiment of the present invention. The 2D diagram is a potential distribution diagram along the B-B' line of the 2Cth diagram. Fig. 2E is a potential distribution diagram along the B-B' line of Fig. 2C. Fig. 2F is a schematic plan view of the solid-state imaging device according to the second embodiment as seen from the light incident surface side. Fig. 3A is a cross-sectional view showing a pixel structure of a solid-state imaging device according to a modification of the second embodiment. Fig. 3B is a potential distribution diagram along the line C-C' of Fig. 3A. Fig. 4A is a cross-sectional view showing a pixel structure of a solid-state imaging device according to a modification of the second embodiment. Fig. 4B is a potential distribution diagram along the D-D' line of Fig. 4A. Fig. 5A is a cross-sectional view showing a pixel structure of a solid-state imaging device according to a third embodiment of the present invention. Fig. 5B is a cross-sectional view showing a pixel structure of a solid-state imaging device according to a modification of the third embodiment. Fig. 6A is a cross-sectional view showing a pixel structure of a solid-state imaging device according to a fourth embodiment of the present invention. Fig. 6B is a view showing the dependence of the thickness of the green light and the red light on the surface of the light-transparent insulating layer (Si 2 layer) of the solid-state imaging device according to the fourth embodiment 53 323367 201218364 Calculation of the film thickness dependence of the transparent insulating layer A graph of the results. Fig. 7A is a cross-sectional view showing a pixel structure of a solid-state imaging device according to a fifth embodiment of the present invention. Fig. 7B is a cross-sectional view showing another pixel structure of the solid-state imaging device according to the fifth embodiment. Fig. 8 is a cross-sectional view showing a pixel structure of a solid-state imaging device according to a sixth embodiment of the present invention. Figure 9 is a cross-sectional view showing a pixel structure of a solid-state imaging device according to a seventh embodiment of the present invention. Fig. 10A is a view showing a three-dimensional structure in which the light is incident on the gap G2 of the island-shaped semiconductor in the three-dimensional structure model shown in Fig. 1C. Fig. 10B is a plan view of the solid-state imaging device according to the eighth embodiment of the present invention. Fig. 10C is a schematic perspective view showing a three-dimensional structure of two adjacent pixels (island semiconductors) in the solid-state imaging device according to the eighth embodiment. In the 10D, the three-dimensional structure of the two adjacent pixels (island semiconductors) in the solid-state imaging device according to the modification of the eighth embodiment is not intended. Fig. 10E is a schematic plan view showing a solid-state imaging device according to a modification of the eighth embodiment from the light incident surface side. Fig. 11A is a cross-sectional view showing a pixel structure of a solid-state imaging device according to a ninth embodiment of the present invention. Fig. 11B is a cross-sectional view showing a pixel structure of a solid-state imaging device 5 54 323 367 201218364 according to a modification of the ninth embodiment. Fig. 12A is a cross-sectional view showing the pixel structure of a solid-state imaging device of a conventional example. Fig. 12B is a graph showing the relationship between the depth of si (矽) and the intensity of light absorption. Fig. 13 is a cross-sectional view showing the pixel configuration of another solid-state imaging device of a conventional example. [Description of main component symbols] la, lb, lc, Pu to ~ island-shaped semiconductor 2, 2a, 2b constituting a pixel, first semiconductor n+ region 2c, sixth semiconductor p+ region 2ca, ninth semiconductor region 2d, eighth semiconductor N+ region 2aa, 2bb strip signal line N+ region 3 second semiconductor P region 3a second semiconductor region (inherent semiconductor region) 3b seventh semiconductor P region 4a, 4b insulating layer 5a, 5b, 5aa, 5bb gate conductor layer (M0S transistor Gate conductor layer) 5ab, 5abl, 5ab2, 5ab3, 55abl MOS gate wiring (gate wiring of MOS transistor; conductor wiring) 6a, 6b, 66a, 66b Third semiconductor N region 7 Photodiode region 8a, 8b, 88a, 88b Fourth semiconductor P+ region 55 323367 201218364 9a, 9b, 9aa ' 9bb Light-reflecting conductor layer 10, 10a, 10b Fifth semiconductor p+ region 10a, lObb Metal layer (pixel selection line) 11, 11a, lib Lens 12a, 12b light (light concentrated at a focus near the upper surface of the fifth semiconductor P+ region) 12c Light rays 12d, 12e reflect light 13 Insulating layers 14a, 14b Light reflecting conductor layer 15 Light penetrating insulating layer 16 Light absorbing layer 17 Light (towards S I〇2 film incident light) 18a, 18b reflected light (reflected light caused by Si layer) 19a, 19b incident light (incident light incident toward Si layer) 20a concave portion (P+ region concave portion) 20b convex portion (P+ region 21a '21c light (light incident along the center line of the microlens) 21b, 21d light (light incident perpendicularly to the central portion of the microlens) 22a light (refracted light in the concave portion) 22b light (at The refracted light of the convex portion) 23 The focal point of the microlens 24 The incident light ray that the light penetrates the intermediate portion 25a, 25b and enters the fifth semiconductor P+ region 26 The outer peripheral portion of the microlens is 1 point 27 The center line 28a, 28b of the microlens is 5th 1 point 29a, 29b of the outer peripheral portion of the semiconductor P+ region (light passing through the center line of the microlens and light passing through the intermediate portion) 56 323367 201218364 30 32 34a , 34b 36 38a Island semiconductor semiconductor P region gate conductor layer semiconductor P+ region 31 signal line semiconductor N+ region 33a, 33b insulating layer 35a, 35b semiconductor N region 37a, 37b pixel selection line light (light incident from island semiconductor from oblique direction) 39a, 39b metal wall 40 semiconductor base 41 Photodiode region 42 Element isolation region 43a, 43b Source gate region of MOS transistor 44 First interlayer insulating layer 45 MOS transistor gate electrode 46a, 46b, 46c Contact window 47 Second interlayer insulating layer 48 31〇2 film 49 SiN film 50 microlenses 51a, 51b, 51c, 51d metal wires 52a, 52b, 52c, 52d, 100 rays 53a, 53b, 53c, 53d, 102 incident light rays 55a, 55b incident on the photodiode Light-shielding metal layer 56, 56c Electronics 56a' 56b Gate conductor layer 56d Hole 99 Light-reflecting conductor connection layer 99a, 99b, 99c, 99d Light-reflecting conductor layer 100 Incident light 101a, 101b, 101c, 1 Old at signal line N+ Multiple reflected light in the area

Gi, G2, G3, G4 gap Ld Photodiode region

S 57 323367 201218364

Ldw extends to the length of the depletion layer in the semiconductor P region

Qsig signal charge S!, S2, S3 signal line semiconductor N+ region φ (V) potential direction potential (voltage)

Vs, Vp, Vg, Vpg, Vrg Bu Vrg2, Vp Bu Vp2, VH 58 323367

Claims (1)

201218364 VII. Patent application scope: 1. A solid-state imaging device has a plurality of pixels arranged in a quadratic shape, wherein 'a plurality of island-shaped semiconductors constituting the plurality of pixels are formed on a substrate: each of the aforementioned island-shaped semiconductors Each of the first semiconductor regions is formed in the lower portion of the island-shaped semiconductor, and the second semiconductor region is formed on the second semiconductor region and is a conductive or intrinsic semiconductor opposite to the first semiconductor region; The region is formed in the upper side surface region of the second semiconductor region and is the same conductivity type as the ith semiconductor region; the fourth semiconductor region is formed on the outer periphery β 卩 of the third semiconductor region and is a semiconductor a conductive layer having an opposite conductivity; an insulating layer formed on an outer peripheral portion of the fourth semiconductor region and the lower surface region of the second semiconductor region; and a conductor layer ' formed on the outer peripheral portion of the insulating layer and serving as the second semiconductor region The lower portion functions as a gate electrode of the channel; the reflective conductor layer is formed on The third semiconductor region, the fourth semiconductor region, and the outer peripheral portion of the insulating layer reflect electromagnetic energy waves; the fifth semiconductor region 'is formed in the second semiconductor region and the third semiconductor region upper region' and is The fourth semiconductor region is of the same conductivity type; and the microlens is formed in the fifth semiconductor field, and the focus is on the vicinity of the upper surface of the semiconductor region of the 1 323 367 201218364; & : the island-shaped semiconductor system contains: a portion that functions as a signal charge storage unit in a wide range of functions, a portion that functions as a signal charge storage unit, a portion that functions as a read unit, and a portion that functions as a charge signal charge removal unit; In other words, the photoelectric conversion unit is formed by the photodiode region including the second semiconductor region and the third semiconductor region: the electromagnetic energy wave generated by the microlens is generated in the photoelectric conversion unit. The electric charge of the fl; the electric power generated by the said third semiconductor region is formed by the aforementioned third semiconductor region Accumulation of the charge: the first portion is composed of the fifth semiconductor region, the signal charge storage = lower region as a non-polar or source ', and the bonded transistor of 4::2, and varies The function of the signal charge amount pole/source between the source charge storage unit and the inter-source fabric and the secret flow (4) is not read by the snow signal; the area is 2=:: The first semiconductor third semiconductor _ domain _ w ^ domain and the MOS transistor constitute a $ + conductor # as a channel voltage, and the predetermined amount of the first w body =:: product is accumulated by the conductor layer. 2. The solid-state imaging device according to claim 1, wherein in the solid-state imaging device, the imaging operation performed by the solid-state imaging device includes: signal charge accumulation. An operation of accumulating signal charges generated in the photoelectric conversion unit in the third semiconductor region; and a signal charge reading operation corresponding to a signal charge amount accumulated in the third semiconductor region, Taking the drain/source current of the bonded transistor as an output signal; accumulating a signal charge removing operation, applying a predetermined voltage to the conductor layer, and removing the accumulated signal charge accumulated in the third semiconductor region to the first In each of the operations of the signal charge accumulation operation, the signal charge reading operation, and the accumulated signal charge removal operation, charges in a polarity opposite to the signal charge are accumulated in the fourth semiconductor region. 3. The solid-state imaging device according to the first or second aspect of the invention, comprising: a second semiconductor region of the same conductivity type as the second semiconductor, or the second semiconductor device, in place of the first semiconductor region The semiconductor is a ninth semiconductor region of the opposite conductivity type; the seventh semiconductor region is of the same conductivity type as the second semiconductor region and is connected to the second semiconductor region; and the eighth semiconductor region is the second semiconductor region The opposite conductivity type; wherein the lower portion of the second semiconductor region in the vicinity of the sixth semiconductor region and the ninth semiconductor region is a drain and a source of the bonded transistor, and the eighth semiconductor region is the MOS The bungee of the transistor. The solid-state imaging device according to claim 1 or 2, further comprising a reflective layer formed on a lower region of the island-shaped semiconductor. 5. The solid-state imaging device according to claim 1 or 2, further comprising: a light transmitting insulating layer formed in a lower region of the island-shaped semiconductor; and a light absorbing layer formed on the light transmitting insulating layer The lower portion of the light transmitting insulating layer is set such that the light is incident from the microlens and is reflected by the first to fourth semiconductor regions while being reflected by the conductive layer and the reflective conductive layer The reflectance of the light transmitted through the insulating layer becomes such that the reflectance relatively increases when the light is green light, and the reflectance relatively decreases when the light is red light. 6. The solid-state imaging device according to claim 1 or 2, further comprising: a light transmitting insulating layer formed in a lower region of the island-shaped semiconductor; and a light absorbing layer formed on the light transmitting insulating layer The lower portion of the light transmitting insulating layer is set such that the light is incident from the microlens and is reflected by the first to fourth semiconductor regions while being reflected by the conductive layer and the reflective conductive layer The reflectance of the light transmitted through the insulating layer becomes such that when the light is green light and red light, the reflectance relatively increases. 7. The solid-state imaging device according to claim 1 or 2, further comprising: 4 323 367 201218364 a light transparent intermediate layer formed between the microlens and the island-shaped semiconductor; a focus of the microlens At the position inside the aforementioned light transparent intermediate layer. 8. The solid-state imaging device according to the first or second aspect of the invention, wherein the central surface layer portion of the upper portion of the island-shaped semiconductor is formed with a concave portion or a convex portion; and the concave surface or the convex portion of the concave portion The light refractive indices of the two material regions connected to each other as the boundary surface of the convex portion of the portion are different from each other. 9. The solid-state imaging device according to claim 1 or 2, further comprising: a light transparent intermediate layer formed between the microlens and the island-shaped semiconductor; and 1 from the outer periphery of the microlens Point incidence, the angle between the light passing through the center line of the microlens and the light transparent intermediate layer to the outer peripheral portion of the upper portion of the island-shaped semiconductor and the line between the lines orthogonal to the upper surface of the fifth semiconductor region i is less than Brewster's angle 0 bbtanl K/Nz); wherein N! is the refractive index of the optically transparent intermediate layer, and N2 is the refractive index of the fifth semiconductor region. 10. The solid-state imaging device according to claim 1 or 2, wherein the plurality of pixels are arranged in a square lattice shape, a rectangular lattice shape, or an S 5 323367 201218364 staggered shape; Further, the plurality of conductor wires extending in the longitudinal direction are electrically connected to the first semiconductor regions of the plurality of pixels arranged in the longitudinal direction in the plurality of pixels; and the plurality of conductor wires extending in the lateral direction The conductive layers of the plurality of pixels arranged in the horizontal direction in the plurality of pixels are electrically connected to each other; and the plurality of reflective conductor wires extending in the lateral direction are arranged in the horizontal direction of the plurality of pixels (four) The counter-body layers of the plurality of pixels are electrically connected to each other; the conductor wiring extending in the direction of the line is matched with the reflective conductor _2 to 11.: as described in item 1 or *2: device, like: === =- all of the aforementioned reflective conductor layers, the pixel area of a plurality of pixels, the pixel area; cover ==素6 -S 323367