JP5535261B2 - Solid-state imaging device - Google Patents

Description

  The present invention relates to a solid-state imaging device.

  2. Description of the Related Art In recent years, pixel size has been rapidly miniaturized based on demands for downsizing and increasing the number of pixels in solid-state imaging devices. In particular, there is a strong demand for pixel miniaturization in an imaging device for a mobile phone with a camera function because it is necessary to satisfy both the demands for downsizing a camera module and increasing the number of pixels.

  However, the tendency of the SN ratio to decrease with pixel miniaturization is inevitable. Noise generated in the photodiode inside the pixel can be classified into a component generated in proportion to its volume inside the photodiode and a component generated at the interface between the photodiode and its peripheral structure, but the dominant component is the latter. It is generally known that Of the components generated at the interface between the photodiode and its peripheral structure, the pixel separation surface component, that is, the peripheral length of the photodiode and the depth of the photodiode when the photodiode is cut along a plane orthogonal to the incident light. It is known that the component proportional to the product is dominant. Only the noise of the pixel separation surface component is proportional to the pixel pitch, and the other noise and signal amount are proportional to the square of the pixel pitch. Therefore, when only the inside of the photodiode is considered, the noise of the pixel separation surface component relatively increases and the SN ratio decreases as the pixel becomes finer.

  In reality, many noise components other than photodiodes are not directly affected by pixel miniaturization. Conversely, noise components that increase with pixel miniaturization, such as analog transistor noise in the pixel. However, even if the noise of the pixel separation surface component can be ignored and the S / N ratio in the photodiode does not depend on the pixel pitch, the S / N ratio decreases with pixel miniaturization.

  In order to suppress pixel separation surface component noise that becomes dominant during pixel miniaturization, the photodiode separation structure, so-called pixel separation structure, is an impurity separation structure peculiar to solid-state imaging devices, and it is a common element separation for miniaturized LSIs. It is different from the structure.

As an element isolation structure in a miniaturized LSI, a trench isolation structure in which an oxide film is embedded in a trench structure is generally used. When this trench isolation structure is applied to pixel separation of a solid-state image sensor, the current generated from the interface state between Si and SiO ₂ existing on the side wall of the trench isolation structure becomes noise, and the SN ratio is rapidly deteriorated. End up. In order not to be affected by the interface state between Si and SiO ₂ , it is known that it is effective to form a high concentration p ⁺ impurity region on the trench sidewall.

However, it is not always easy to form the high-concentration p ⁺ impurity region. Furthermore, forming the high-concentration p ⁺ impurity region around the trench isolation in addition to the trench isolation improves the occupation ratio of the pixel isolation area. This is also an obstacle to pixel miniaturization.

  In addition, since it is known that the width and depth of the pixel isolation structure are in a trade-off relationship, in a fine pixel using the impurity isolation structure, the photodiode volume is reduced due to the relative expansion of the pixel isolation width. Alternatively, there arises a problem that the depth of the pixel isolation structure and the depth of the photodiode are lowered.

  When the pixel separation and the depth of the photodiode are lowered, the absorption of the long wavelength light is lowered and the signal amount is lowered. In addition, so-called crosstalk occurs in which charges generated by pixel separation and light absorption in a region deeper than the photodiode are mixed into adjacent pixels. It is clear that the former causes a decrease in the SN ratio, but the latter also contributes not only to a decrease in spatial resolution but also a decrease in the SN ratio.

This crosstalk also occurs due to factors other than pixel separation and photodiode depth. This is a case where signal charges generated inside the photodiode are mixed into adjacent pixels via the pixel separation structure. In order to form a high-concentration p ⁺ impurity region, which is a common pixel separation structure in a solid-state imaging device, it is necessary to perform multiple ion implantations from low acceleration to high acceleration. If the valley of the impurity profile, that is, the potential barrier height of the portion where the impurity concentration is low in the depth direction is insufficient, crosstalk may occur through that portion. In order to prevent this crosstalk, it is necessary to perform ion implantation many times by changing the acceleration voltage, which hinders the simplification of the manufacturing process. The crosstalk through the pixel separation is a component proportional to the pixel pitch, and the ratio of the crosstalk to the signal component proportional to the square of the pixel pitch tends to increase with pixel miniaturization.

In addition to these electrical crosstalks, suppression of optical crosstalk is also important.
In the periphery of the imaging region, incident light is incident on the substrate obliquely rather than perpendicularly. In particular, the incident angle is large in a solid-state imaging device for a mobile phone with a camera function in which a camera module is reduced in size and height. The obliquely incident light crosses the photodiode cross section diagonally, and components that are not sufficiently absorbed inside the photodiode pass through the photodiode and reach the pixel isolation structure. A high-concentration p ⁺ impurity region, which is a standard pixel separation structure in a solid-state imaging device, is a single crystal silicon whose main component is a semiconductor substrate material. There is no boundary between them, and the transmitted light that reaches the pixel separation region goes straight. Further, the component that has not been absorbed in the pixel separation region passes through the pixel separation region, reaches the adjacent photodiode, and is absorbed, thereby generating optical crosstalk.

  In order to suppress this optical crosstalk, trench isolation in which a material that reflects incident light is embedded is effective.

As for the pixel separation of the trench structure, as described above, it is necessary to form an additional high-concentration p ⁺ impurity region for suppressing dark current in application to a solid-state imaging device, and therefore, the photodiode opening is suppressed. There is a problem that it ends up.

As a structure that does not require a high-concentration p ⁺ impurity region, pixel isolation is achieved by forming a hole accumulation layer near the interface between the photodiode and the pixel isolation structure by biasing the conductive material embedded in the trench structure to a negative voltage. It is possible to suppress surface component noise (see, for example, Patent Document 1).

However, when a negative voltage is applied to the conductive material embedded in the trench structure, an electric field is always formed in the insulating material formed between the conductive material and the photodiode, and the insulating material has defects. When present, there is a problem that local electric field concentration occurs, and a leakage current due to dielectric breakdown is injected into the photodiode, which may result in a white scratch image defect.
In addition, a structure for applying a negative voltage is additionally required.

  On the other hand, as a method for avoiding a decrease in the amount of incident light on the photodiode due to the pixel region wiring structure, which is another factor in the reduction in the SN ratio in pixel miniaturization, light is transmitted from the back surface side of the semiconductor substrate on the opposite side to the wiring structure. Development of a so-called back-illuminated solid-state imaging device that makes the light incident is active (see, for example, Non-Patent Document 1).

  This back-illuminated solid-state imaging device has high light utilization efficiency and high sensitivity because incident light passes directly through the microlens and color filter array and then directly enters the photodiode without passing through the wiring structure. The

  Similarly, since the distance until the incident light reaches the silicon substrate is shortened, the oblique incident light is refracted when the silicon substrate having a high refractive index is incident, which is an advantageous structure with respect to optical crosstalk.

  However, in a situation where the pixel pitch is reduced to about 1 μm, the depth of the photodiode is about 3 μm, and thus there remains a problem regarding optical crosstalk generated when oblique incident light reaches an adjacent pixel.

In order to obtain sufficient red sensitivity, it is preferable to set the depth of the photodiode to 5 μm or more. However, it is difficult to increase the optical crosstalk or to form a high concentration p ⁺ impurity region deeply. For this reason, the thickness of the silicon substrate in the back-illuminated solid-state imaging device is about 3 μm, and sufficient sensitivity to red is not obtained.

: JP 2006-120804 A

ISSCC2006, 16-8, A Back-Illuminated High-Sensitivity Small-Pixel Color CMOS Image Sensor with Flexible Layout of Metal Wiring

  As described above, in order to suppress a decrease in the S / N ratio (sensitivity) in pixel miniaturization, a noise component generated in the vicinity of the photodiode is suppressed, and further, optical crosstalk and electrical crosstalk are suppressed. This is very important.

  For this purpose, a pixel separation structure that can be formed finely and can be formed sufficiently deep so as not to compress the photodiode volume is required. In particular, in order to suppress optical crosstalk, A pixel isolation structure having a trench structure is desired.

  However, in the pixel separation structure of the trench structure, there is a problem that the structure necessary for suppressing the pixel separation component noise presses the photodiode volume or causes white scratches. .

  An object of this invention is to provide the solid-state imaging device which can obtain a high sensitivity even if it refines | miniaturizes.

The solid-state imaging device according to one embodiment of the present invention includes a plurality of pixels provided on a first conductivity type semiconductor substrate, each of which receives light incident from the first surface side of the semiconductor substrate as a signal charge. A plurality of pixels having a semiconductor region of a second conductivity type to be converted and accumulated; a readout circuit provided on the first surface side of the semiconductor substrate for reading out signal charges accumulated in the pixels;
A pixel isolation structure provided between adjacent pixels of the semiconductor substrate, the pixel isolation structure having a stacked film embedded in a trench provided from the first surface side of the semiconductor substrate; The stacked film includes a first insulating film provided along a side surface and a bottom surface of the trench, and a fixed charge film provided in the trench so as to cover the first insulating film and holding a fixed charge. And a separation structure.

  According to the present invention, high sensitivity can be obtained even when miniaturized.

1 is a plan view showing a solid-state imaging device according to a first embodiment. FIG. 3 is a circuit diagram of a pixel of the solid-state imaging device according to the first embodiment. FIG. 3 is a cross-sectional view of a pixel of the solid-state imaging device according to the first embodiment. Sectional drawing of the pixel isolation | separation structure which concerns on the 1st modification of 1st Embodiment. Sectional drawing of the solid-state imaging device by 2nd Embodiment. Sectional drawing of the solid-state imaging device by the 1st modification of 2nd Embodiment. Sectional drawing of the solid-state imaging device by the 2nd modification of 2nd Embodiment. Sectional drawing of the solid-state imaging device by the 3rd modification of 2nd Embodiment. Sectional drawing of the solid-state imaging device by 3rd Embodiment. Sectional drawing of the solid-state imaging device by 4th Embodiment. Sectional drawing of the solid-state imaging device by 5th Embodiment. Sectional drawing of the solid-state imaging device by 6th Embodiment. Sectional drawing of the solid-state imaging device by 7th Embodiment. Sectional drawing of the solid-state imaging device by 8th Embodiment. Sectional drawing of the solid-state imaging device by 9th Embodiment. Sectional drawing of the solid-state imaging device by 10th Embodiment. Sectional drawing of the solid-state imaging device by 11th Embodiment. Sectional drawing of the solid-state imaging device by 12th Embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
A solid-state imaging device according to a first embodiment of the present invention is shown in FIG. In the solid-state imaging device 100 according to the present embodiment, photoelectric conversion pixels 200 arranged in a matrix are provided in the imaging region 101. The photoelectric conversion pixel 200 converts an incident light signal into an electric signal by photoelectric conversion. Further, there are a load transistor unit 102, a CDS circuit unit 103, a V selection circuit 104, an H selection circuit 105, an AGC (automatic gain control circuit) 106, an ADC (A / D converter) 107, around the imaging region 101, A digital amplifier 108, a TG (timing generator) circuit 109, and the like are arranged. The ADC 107 can be configured integrally with the CDS circuit 103 and can have a column-type CDS-ADC circuit configuration. Alternatively, the TG 109, the AGC 106, the ADC 107, the digital amplifier 108, etc. may be provided as separate chips.

A circuit configuration inside the pixel 200 constituting the imaging region 101 is shown in FIG. In FIG. 2, the portion surrounded by the lower broken line is the circuit configuration of the pixel 200. A photodiode 201 that performs photoelectric conversion is connected to a floating diffusion 203 via a transfer transistor 202. The floating diffusion 203 is made of, for example, a high-concentration n ⁺ -type impurity region, and a reset for resetting the floating diffusion 203. The transistor 204 is connected to Vdd. The floating diffusion 203 is connected to the gate of the amplification transistor 205, the drain of the amplification transistor 205 is connected to the drive voltage Vdd, and the source of the amplification transistor 205 is connected to the vertical signal line 207 via the selection transistor 206. One end of the vertical signal line 207 is connected to the ground via a load transistor 208 outside the imaging region and surrounded by the upper broken line in FIG. 2, and the other end is the CDS circuit 103 outside the imaging region 101 (see FIG. 1). Connected to. The load transistor 208 and the amplification transistor 205 connected in series via the vertical signal line 207 constitute a source follower circuit, and output a signal voltage generated in the floating diffusion 203 to the CDS circuit 103.

  In FIG. 2, all the functions for photoelectric conversion, signal charge accumulation, charge / voltage conversion, and source follower circuit formation are provided inside the unit pixel 200, but a plurality of photodiodes 201 can be transferred as necessary. By connecting the transistor 202 to one floating diffusion 203, it is possible to share circuits in the pixel such as the floating diffusion 203, the reset transistor 204, the amplification transistor 205, and the selection transistor 206, which are other components. That is, by adopting a 2-pixel 1-cell configuration, a 4-pixel 1-cell configuration, or the like, it becomes easy to cope with the miniaturization of the pixel 200. In FIG. 2, the arrangement of the amplification transistor 205 and the selection transistor 206 may be interchanged.

Next, a cross-sectional structure of the solid-state imaging device according to the first embodiment is shown in FIG. Inside the p-type silicon substrate 150, an n-type impurity region (hereinafter also referred to as a PD_n region) 201a constituting the photodiode 201 is formed. Signal electrons generated by photoelectric conversion in the photodiode 201 having a pn junction made of the PD_n region 201a and the p-type semiconductor substrate 150 are accumulated in the PD_n region 201a. Then, by turning on the transfer transistor 202 formed on the silicon substrate 150, the transfer transistor 202 is transferred to the following diffusion 203, and the amplification transistor 205 (see FIG. 2) in which the floating diffusion 203 and its gate are electrically connected is connected. By modulating, a signal corresponding to the amount of incident light is read out. The transfer transistor 202 and the amplification transistor 205 are covered with an interlayer insulating film 230, and a metal wiring 235 connected to these transistors or the floating diffusion 203 is provided in the interlayer insulating film 230. A color filter 237 is provided on the interlayer insulating film 230, and a microlens 239 is provided on the color filter 237. Note that a p ⁺ region 210 is provided in the semiconductor substrate 150 between the PD_n region 201a and the interlayer insulating film 230 in order to prevent dark current from flowing into the PD_n region 201a. A constant potential (for example, 0 V) is applied to the p ⁺ region 210.

The PD_n region 201a has a so-called embedded photodiode structure that is completely embedded in the silicon substrate 150 to reduce noise, and a trench type pixel as a pixel isolation structure for element isolation from adjacent pixels. The separation structure 160 is provided. In the pixel isolation structure 160, a fixed charge film 162 that holds fixed charges is embedded in a trench provided in the silicon substrate 150. Between the fixed charge film 162 and the trench, for example, an extremely thin silicon oxide layer 164 of about several atomic layers is provided.
That is, the silicon oxide layer 164 is provided along the side surface and the bottom surface of the trench. Therefore, the pixel isolation structure has a configuration including the fixed charge film 162 and the silicon oxide layer 164. As the fixed charge film 162, for example, an oxide dielectric film containing at least one element selected from hafnium (Hf) zirconium (Zr) and titanium (Ti) is used. For example, when hafnium oxide is used, embedding can be performed by an ALD (Atomic Layer Deposition) method using TDEAH (Tetrakis-DiEthylAmino-Hafnium) as a raw material.

In the present embodiment, since the signal charge is an electron, the fixed charge film 162 holds a negative charge, so that the fixed charge in the vicinity of the pixel isolation structure 160 on the PD_n region 201a side, that is, on the PD_n region 201a side. A hole accumulation region is formed in the vicinity of the interface between the film 162 and the silicon oxide layer 164. Specifically, after forming a hafnium oxide film by the ALD method, annealing in a hydrochloric acid gas atmosphere terminates dangling bonds of hafnium atoms existing at the interface between the hafnium oxide film and the silicon oxide layer with chlorine atoms. Thus, a negative fixed charge can be formed and held. At this time, by setting the fixed charge density to 1.0 × 10 ¹² cm ⁻² or more, a sufficient hole accumulation layer is formed in the vicinity of the interface, and dark current is suppressed. In addition, it is more preferable that the fixed charge density is 1.0 × 10 ¹³ cm ⁻² or more because the effect of suppressing dark current can be obtained more stably.

According to the present embodiment, even when obliquely incident light on the photodiode 201 reaches the pixel separation structure 160, the light is reflected and does not enter an adjacent pixel. This is because the refractive indexes of the silicon oxide layer 164 and the hafnium oxide film are smaller than the refractive index of silicon. That is, when n ₁ is the refractive index of silicon (= 3.9) and n ₂ is the refractive index of silicon oxide (= 1.4) or the refractive index of hafnium oxide (= 2.0), the following (1 ) Formula θc = arcsin (n ₂ / n ₁ ) This is because light incident at an angle shallower than the critical angle θc defined by (1) is totally reflected. Therefore, optical crosstalk is greatly suppressed. At this time, since the pixel separation structure 160 has a so-called tapered shape in which the opening diameter on the bottom surface is smaller than the opening diameter on the light incident side, the angle at which the incident light enters the pixel separation structure 160 becomes shallow. This is more preferable because the range of optical crosstalk suppression is expanded.

  In addition, the pixel separation structure 160 can form deep pixel separation, has high red sensitivity, and greatly suppresses electrical crosstalk.

  And the subject in a prior art example is also solved. This will be described below.

First, by using a fixed charge film 162 embedded in the pixel isolation structure 160 as a structure for suppressing noise generated in the vicinity of the pixel isolation interface, a trench type pixel isolation layer that is essential in the prior art is used. The high-concentration p ⁺ impurity region formed adjacent to the pixel is not necessary, and the volume of the PD_n region is not compressed, and at the same time, the opening of the photodiode is not reduced, so that the sensitivity reduction due to the pixel isolation structure is eliminated. .

  Further, even if a defect exists in the silicon oxide layer 164 between the fixed charge film 162 and the silicon substrate 150, no charge is injected from the fixed charge film 162, so that no white scratch occurs.

  As described above, according to the present embodiment, by performing pixel separation with the pixel separation structure 160, it is possible to obtain a highly sensitive solid-state imaging device with less optical crosstalk and less electrical crosstalk. .

  In this embodiment, electrons are used as signal charges. However, when holes are used as signal charges, an electron accumulation layer is formed near the interface by holding positive charges in the fixed charge film 162. It is possible to obtain the same effect. For example, when a hafnium oxide film is used as the fixed charge film 162, it can be formed by the ALD method described above, and dangling bonds of hafnium atoms present at the interface between the hafnium oxide and the silicon oxide layer hold a positive charge.

(First modification)
Next, a solid-state imaging device according to a first modification of the first embodiment will be described with reference to FIG. The solid-state imaging device of the first modification is configured by replacing the trench-type pixel isolation structure 160 with the trench-type pixel isolation structure 160A shown in FIG. 4 in the solid-state imaging device of the first embodiment. In the pixel isolation structure 160A according to the first modification, a stacked film of a silicon oxide layer 164, a charge fixing film 162 made of a silicon nitride film, a silicon oxide layer 166, and a polycrystalline silicon film 168 is arranged in this order in the trench. It is possible to obtain the same effect as that of the first embodiment. At this time, the silicon oxide layer 166 is applied with a voltage of about 10 V to 20 V to the polycrystalline silicon film 168 so that the tunnel current flows to a thickness, for example, about 2 nm. The silicon nitride film 162 has a composition capable of holding a fixed charge therein. For example, the silicon nitride film 162 has a silicon-rich composition such as Si ₉ N ₁₀ and has a film thickness of, for example, about 10 nm. The silicon oxide layer 164 is, for example, about 2 nm in order to form a hole accumulation layer inside the silicon substrate 150.

  In the pixel isolation structure 160A of the first modification, a voltage that allows a tunnel current to flow through the silicon oxide layer 166 is applied to the polycrystalline silicon film 168 embedded in the trench structure, so that the polycrystalline silicon film 168 is transformed into silicon nitride. Electrons can be injected into the film 162, and the electrons injected into the silicon nitride film 162 are trapped to obtain a fixed charge.

  According to this modification, the same effects as those of the first embodiment can be obtained, and a high-sensitivity solid-state imaging device with less optical crosstalk and less electrical crosstalk can be obtained.

  Further, the above-described step of forming a fixed charge in the silicon nitride film 162 can be sufficiently effected by performing it during or immediately after the device manufacture, and thereafter, the polycrystalline silicon film 168 has a voltage applied to it. Need not be applied. In addition, since the stacked structure including the silicon oxide layer 164, the silicon nitride film 162, and the silicon oxide layer 166 described above is formed between the polycrystalline silicon film 168 and the semiconductor substrate 150, white scratches caused by gate leakage are caused. The possibility of occurrence is greatly reduced.

(Second Embodiment)
Next, a solid-state imaging device according to a second embodiment of the present invention is shown in FIG. In the solid-state imaging device according to the second embodiment, as in the first embodiment, a trench-type pixel isolation structure 160 is provided between adjacent pixels, and a floating diffusion 203 is provided between adjacent pixels. On the side, a p ⁺ pixel separation region 220 is provided between the floating diffusion 203 and the pixel separation structure 160. Note that the p ⁺ pixel isolation region 220 is not provided on the side different from the side where the floating diffusion 203 between adjacent pixels is provided. In the second embodiment, as described with reference to FIG. 3, the pixel isolation structure 160 includes a silicon oxide layer 164 and a fixed charge film 162 containing, for example, hafnium oxide in a trench provided in the semiconductor substrate 150. It has an embedded configuration.
In FIG. 5, a p ⁺ region 210 is provided on the PD_n region 201a in order to prevent dark current from flowing into the PD_n region 201a. Note that the color filters 237 provided on the pixels are arranged so that colors are different in adjacent pixels.

According to the present embodiment, the pixel circuit sharing method described above can be supported. That is, in the pixel layout of the pixel circuit sharing method, two photodiodes sharing the floating diffusion 203 are arranged on the surface of the silicon substrate 150 on the wiring side: photodiode 201 / transfer transistor 202 / floating diffusion 203 / transfer transistor 202. / Photodiodes 201 are formed in order. However, in the silicon substrate 150, the photodiodes 201 / p ^{+ the} pixel separation region 230 / the photodiode 201 are arranged in this order. In this case, a pixel isolation structure 160 for pixel isolation between the two photodiodes 201 is formed so as to be embedded in the silicon substrate 150, and a high-concentration p ⁺ impurity that is in contact with the wiring side end face of the pixel isolation structure 160. By forming the p ⁺ pixel isolation region 220 composed of the region, and further forming the transfer transistor 202 / floating diffusion 203 / transfer transistor 202 on the surface side of the silicon substrate 150, the isolation structure shown in FIG. 5 is obtained.

  Next, an example of a method for manufacturing the separation structure shown in FIG. 5 will be described.

First, the pixel separation structure 160 is formed on the silicon substrate 150. Subsequently, only in the region where the high concentration p ⁺ pixel isolation region 220 is formed, a part of the pixel isolation structure 160 is etched away to a desired depth. A recess is formed in the trace of a part of the removed pixel separation structure 160. Then, the recess is filled with the single crystal silicon film by epitaxial growth. At this time, the surface of the silicon substrate 150 is planarized as necessary.

Thereafter, the p ⁺ pixel isolation region 220, the floating diffusion 203, and the transfer transistor are formed by a normal manufacturing process of the solid-state imaging device. Further, the interlayer insulating film 230, the metal wiring 235, the color filter 237, and the microlens 239 are formed.

In the present embodiment, p ⁺ pixels are arranged in a region inside the silicon substrate 150 located below the region where the transfer transistor 202 / floating diffusion 203 / transfer transistor 202 are located, which is located in the wiring side region of the silicon substrate 150. There is a separation region 220. However, this embodiment differs from the conventional structure to form all the pixel isolation structure p ⁺ pixel isolation region only sufficiently shallow region, it is sufficient to form a p ⁺ pixel isolation region 220, microfabrication There is no problem above, and electrical crosstalk can be sufficiently suppressed. At the same time, light leakage of obliquely incident light to adjacent pixels, which simultaneously causes optical crosstalk, is greatly suppressed.

  Therefore, according to the present embodiment, it is possible to use a pixel layout of the pixel circuit sharing method, it is possible to obtain a finer pixel, and in combination with the high sensitivity characteristic that is a feature of the pixel sharing method, A highly sensitive solid-state imaging device can be obtained.

(First modification)
Next, a solid-state imaging device according to a first modification of the second embodiment is shown in FIG. In the solid-state imaging device of the first modification, in the solid-state imaging device shown in FIG. 5, the p ⁺ pixel separation region on the pixel separation structure 160 is on the side different from the side where the floating diffusion 203 between adjacent pixels is provided. 221 is provided. That is, the pixel separation structure 160 and the p ⁺ pixel separation region 220 or 221 are provided between adjacent pixels. As the first modification, between adjacent pixels, as a pixel separation structure of the surface side of the silicon substrate 150, all the ^{p +} pixel isolation region 220 or 221, provided under the ^{p +} pixel isolation region 220 or 221 A pixel separation structure 160 to be provided and a structure including the pixel separation structure 160 are also possible.

  In order to obtain the pixel separation structure according to the first modification, the same process as the manufacturing process described in the second embodiment is performed.

  This first modification can obtain the same effects as those of the second embodiment, can use a pixel circuit sharing type pixel layout, can obtain finer pixels, and Combined with the high sensitivity characteristic that is a feature of the sharing method, a higher sensitivity solid-state imaging device can be obtained.

(Second modification)
Next, a solid-state imaging device according to a second modification of the second embodiment is shown in FIG. The solid-state imaging device of the second modification has a configuration in which the trench-type pixel isolation structure 160 is replaced with the trench-type pixel isolation structure 160A shown in FIG. 4 in the solid-state imaging device shown in FIG.

  The solid-state imaging device of the second modification can also obtain the same effect as that of the second embodiment.

  In addition, it is possible to obtain a high-sensitivity solid-state imaging device with less optical crosstalk and less electrical crosstalk.

  Further, the above-described step of forming a fixed charge in the silicon nitride film 162 can be sufficiently effected by performing it during or immediately after the device manufacture, and thereafter, the polycrystalline silicon film 168 has a voltage applied to it. Need not be applied. In addition, since the stacked structure including the silicon oxide layer 164, the silicon nitride film 162, and the silicon oxide layer 166 described above is formed between the polycrystalline silicon film 168 and the semiconductor substrate 150, white scratches caused by gate leakage are caused. The possibility of occurrence is greatly reduced.

(Third Modification)
Next, a solid-state imaging device according to a third modification of the second embodiment is shown in FIG. The solid-state imaging device of the second modification has a configuration in which the trench-type pixel isolation structure 160 is replaced with the trench-type pixel isolation structure 160A shown in FIG. 4 in the solid-state imaging device of the first modification shown in FIG. It has become.

  The solid-state imaging device of the third modification can also obtain the same effect as that of the first modification of the second embodiment.

  In addition, it is possible to obtain a high-sensitivity solid-state imaging device with less optical crosstalk and less electrical crosstalk.

  Further, the above-described step of forming a fixed charge in the silicon nitride film 162 can be sufficiently effected by performing it during or immediately after the device manufacture, and thereafter, the polycrystalline silicon film 168 has a voltage applied to it. Need not be applied. In addition, since the stacked structure including the silicon oxide layer 164, the silicon nitride film 162, and the silicon oxide layer 166 described above is formed between the polycrystalline silicon film 168 and the semiconductor substrate 150, white scratches caused by gate leakage are caused. The possibility of occurrence is greatly reduced.

(Third embodiment)
Next, a solid-state imaging device according to a third embodiment of the present invention is shown in FIG. In the solid-state imaging devices of the first and second embodiments and the modifications thereof, the incident light is a surface irradiation type in which the incident light is incident from the front side. However, the solid-state imaging device of the third embodiment is a backside irradiation type. .

  The solid-state imaging device according to the third embodiment has a configuration in which a trench type pixel isolation structure 160 is provided between adjacent pixels in a silicon substrate 150 on which a photodiode 201 having a PD_n region 201a is formed. . In the pixel isolation structure 160, a trench is provided so as to penetrate from the back surface side to the front surface side of the silicon substrate 150, and a silicon oxide layer 164 and a fixed charge film 162 made of a dielectric oxide are embedded in the trench. It becomes the composition. That is, the pixel separation structure 160 has the same configuration as the pixel separation structure 160 described in the first to second embodiments and the modifications thereof.

Further, as described in the first and second embodiments, the transfer transistor 202, the floating diffusion 203, the reset transistor (not shown), and the amplification transistor (not shown) are provided on the surface side of the silicon substrate 150. Is provided. Further, an interlayer insulating film 230 is provided on the surface of the silicon substrate 150, and a metal wiring 235 is provided in the interlayer insulating film 230. On the other hand, unlike the first embodiment, a fixed charge film 162 is provided on the back surface side of the silicon substrate 150, and incident light is transmitted on the fixed charge film 162 (under the fixed charge film 162 in the drawing). An insulating film 236 is provided, and a microlens 239 is provided on the insulating film 236 (under the insulating film 236 in the drawing). A light shield 240 is provided in the region of the insulating film 236 corresponding to the pixel isolation structure 160 so as to overlap or cover the pixel isolation structure 160. Note that a p ⁺ region 210 for preventing a dark current from flowing into the PD_n region 201a is provided in a region on the surface side of the silicon substrate 150 between the PD_n region 201a and the interlayer insulating film 230, and the PD_n region 201a. A p ⁺ region 210a for preventing dark current from flowing into the PD_n region 201a is provided in a region on the back surface side of the silicon substrate 150 between the semiconductor substrate 150 and the fixed charge film 162. In the present embodiment, since a fixed potential is applied to the fixed charge film 162, the p ⁺ region 210a may not be provided.

  One method for manufacturing the solid-state imaging device of the third embodiment is performed as follows.

  A structure on the metal wiring 235 side is completed on the silicon substrate 150 along the manufacturing process of a normal back-illuminated solid-state imaging device, and then the structure is bonded to a support substrate (not shown). Subsequently, the silicon substrate 150 is processed to a desired thickness by grinding the light incident side surface of the silicon substrate 150, and the damaged layer on the surface of the silicon substrate 150 is removed.

  Subsequently, a trench is formed from the light incident side, and a fixed charge film is formed in the trench. For example, a silicon oxide layer 164 and a hafnium oxide film 162 to be a fixed charge film are sequentially formed to fill the trench, and at the same time, a fixed charge film 162 is formed on the surface of the silicon substrate 150 on the light incident side. At this time, since the fixed charge film 162 can be formed at a sufficiently low temperature with little damage to the metal wiring 235 and the portion in contact with the metal wiring 235, it can also be formed from the back side.

  Thereafter, in accordance with the manufacturing process of a normal back-illuminated solid-state imaging device, an insulating film layer, a light shield 240 that prevents light from entering between pixels, an insulating film 236, and a microlens 239 are formed. The structure shown can be obtained.

  According to this embodiment, it is possible to obtain a finer and higher-sensitivity solid-state imaging device combined with the high-sensitivity effect that is a feature of the backside illumination type solid-state imaging device.

Further, the refractive index of hafnium oxide as a fixed charge film is 2.0, and is a value close to the square root of the product of the refractive index 3.9 of single crystal silicon as a silicon substrate and the refractive index 1 of air. Therefore, it is possible to construct an antireflection structure for incident light, which is more preferable. At this time, the film thickness required for the anti-reflection structure as d _1, the case where the film thickness required to embed the pixel separation structure was d _2, it is d 1 ₌ d ₂ is ideal , D ₁ ≠ d ₂ , it is possible to correspond.

First, when d ₁ > d ₂ , the film thickness on the light incident surface side is insufficient even when the filling of the pixel isolation structure 160 is completed. In this case, the trench portion is buried. After the process is completed, film formation is performed on the upper part of the trench region at the same speed as the light incident surface. Strictly speaking, the film thickness in the upper part of the trench region has a slightly concave shape as compared with the flat part on the incident surface side, but there is no problem because the light shield 240 is formed in that region.

Conversely, when d ₁ <d ₂ , the pixel isolation structure is not completely embedded even when the film thickness on the light incident surface side becomes sufficient. There is correspondence.

One is that the film formation is further continued to obtain a film thickness d ₂ necessary for embedding, and then the entire surface is etched to perform a so-called etch back process so that the film thickness of the flat portion becomes d _1. is there. Strictly speaking, the thickness of the upper portion of the trench region is slightly concave compared to the flat portion on the incident surface side, but this is problematic because the light shield 240 is formed in that region. Must not.

Another countermeasure is a method in which the film formation is completed when the film thickness of the flat portion on the light incident surface side becomes d ₁ and then the inside of the trench is filled with another material. It is also possible to etch back this last filling material. As this last embedding material, for example, a silicon oxide film having a refractive index of 1.4, which is a material having a refractive index between hafnium oxide refractive index 2.0 and air refractive index 1.0 is used. Is possible. Furthermore, it is possible to further enhance the effect of the antireflection structure by utilizing this refractive index relationship, which is more preferable. Moreover, according to this correspondence, the structure of the fourth embodiment to be described later is obtained, and the effect of suppressing the optical crosstalk is further increased, and the effect of further increasing the sensitivity can be obtained.

  Furthermore, the formation of the trench type pixel isolation structure on the back side also has another effect, and higher sensitivity is possible. This is because the alignment accuracy in the lithography process when forming the light shield 240 is improved, and the optical aperture is improved as described below.

The light shield 240 is a structure that prevents optical crosstalk before entering the silicon substrate 150 by shielding a region between the photodiodes from light irradiated between the pixels.
Therefore, it is necessary to precisely control and form the positional relationship with the PD_n region 201a constituting the photodiode or the pixel isolation structure 160. As is clear from the structure shown in FIG. 9, since the pixel isolation structure 160 is open to the light incident surface of the silicon substrate 150, an alignment mark having the same cross-sectional structure as the pixel isolation structure 160 is formed. A high alignment accuracy can be obtained by performing lithography with reference to. The conventional high density p ⁺ pixel separation structure is difficult to detect optically, and the alignment mark is formed by the structure located on the other wiring side surface. It is difficult to recognize this alignment mark through an optically opaque silicon substrate in visible light and light having a shorter wavelength, and at the same time the alignment accuracy is lowered. Alternatively, alignment with infrared light having a wavelength of 1.1 microns or more that makes the silicon substrate transparent is also possible, but a decrease in alignment accuracy is inevitable. In order to absorb the decrease in the alignment accuracy, the conventional structure has realized a stable light shield structure by expanding the width of the light shield.

  However, the structure of this embodiment makes it possible to expand the opening of the photodiode without unnecessarily increasing the width of the light shield under the improved alignment accuracy. It will become.

  Furthermore, in the conventional backside illumination type solid-state imaging device, the depth and the fineness of the pixel separation structure cannot be achieved at the same time, and the thickness of the silicon substrate, that is, the incident light is reduced in order to prevent the deterioration of the optical crosstalk. The depth of the absorbing photodiode remained at about 2.5 microns or 3 microns. However, according to the structure of this embodiment, since these problems are solved, the absorption of red light, which could not be sufficiently absorbed by the conventional structure, is increased, and the sensitivity can be further increased.

  In this embodiment, it is possible to form the pixel isolation structure 160 from the wiring side surface and form a structure including the fixed charge film on the surface of the silicon substrate 150 on the light incident side from the back side. In order to reduce the manufacturing cost associated therewith, a manufacturing process by simultaneous formation is more preferable.

(Fourth embodiment)
Next, a solid-state imaging device according to a fourth embodiment of the present invention is shown in FIG. The solid-state imaging device of the fourth embodiment has a configuration in which the trench-type pixel isolation structure 160 is replaced with a trench-type pixel isolation structure 160B in the solid-state imaging device of the third embodiment shown in FIG.

The pixel isolation structure 160B has a structure in which a silicon oxide layer 164, a fixed charge film 162, and a film 169 made of a low refractive index material are embedded in a trench provided in a silicon substrate. The manufacturing process for obtaining the pixel isolation structure 160B according to the fourth embodiment is the same as that of the third embodiment. However, in the process of embedding the inside of the pixel isolation structure 160B, the silicon oxide layer 164 and a solid made of hafnium oxide are used. The only difference is that the low refractive index film 169 is embedded after the charge film 162. In this specification,
Here, the low refractive index material means a material having a refractive index lower than that of the semiconductor substrate 150. When the semiconductor substrate is single crystal silicon, the refractive index is 3.9, so the refractive index is 3.9. Less than material. Alternatively, as described in the third embodiment, for the purpose of improving the efficiency of the antireflection structure on the light incident side and increasing the sensitivity, the material should be lower than the refractive index of hafnium oxide 2.0. Is more preferable. Moreover, in order to improve the optical crosstalk suppressing effect described below, a material having a refractive index lower than the refractive index of silicon oxide is more preferable.

  According to this embodiment, the effect of suppressing optical crosstalk caused by obliquely incident light entering adjacent pixels is increased, and a more sensitive solid-state imaging device can be obtained. The reason is as follows.

  The optical crosstalk suppression by the pixel separation structure is as described above, and all the obliquely incident light is absorbed by the structure embedded with a material having a refractive index lower than the refractive index 3.9 of the single crystal silicon which is a semiconductor substrate. By reflecting.

At this time, in order to suppress optical crosstalk, it is important to reduce the critical angle θc for total reflection. This is based on the above-described equation (1) that defines the critical angle. It is necessary to make the refractive index n ₂ of the exit side material smaller than the refractive index n ₁ . That is, it is necessary to use a material having a lower refractive index than the refractive index n ₁ (= 3.9) of single crystal silicon.

  The first interface for obliquely incident light is single crystal silicon having a refractive index of 3.9 and a silicon oxide layer having a refractive index of 1.4, and the critical angle at this time is 21 degrees. Accordingly, obliquely incident light having an incident angle of 69 degrees or less to the solid-state imaging device is totally reflected at this interface, thereby suppressing the occurrence of optical crosstalk. Actually, the behavior of obliquely incident light on the pixel separation structure 160 having a smaller size than the wavelength range (400 nm to 700 nm) of incident light is complicated by the influence of the wave nature, and a thin silicon oxide layer It can happen that it exudes over 164. In that case, the critical angle is determined by the relationship between the refractive indexes of the hafnium oxide film 162 having a higher refractive index than that of the silicon oxide layer 164 and single crystal silicon, and the critical angle increases to 30 degrees.

  In order to prevent the influence of the bleeding due to the wave nature of the incident light, the thickness of the hafnium oxide film 162 is formed to be smaller than the thickness necessary for embedding the trench, and thereafter, the low refractive index is reduced. By embedding the material, it is possible to suppress the increase of the critical angle and expand the range of optical crosstalk suppression.

  For example, following the formation of a hafnium oxide film having a thickness that does not completely fill a trench, a critical angle of 21 degrees can be maintained by embedding a silicon oxide layer, or a so-called low-k film having a lower refractive index. By forming (low dielectric constant material film) or the like, the critical angle is further reduced. Note that silicon oxide, porous silica, a polymer material, or the like can be used as a material for the low-refractive index low-k film.

  The present embodiment is not limited to the effect of suppressing optical crosstalk, but can also achieve the effect of reducing the manufacturing cost by shortening the manufacturing process time.

  Since the hafnium oxide film as the fixed charge film is formed conformally inside the trench structure having a large aspect ratio by the ALD method or the like as described above, the throughput of the manufacturing process is low. However, as described above, since the fixed charge is unevenly distributed at the interface between the hafnium oxide film and the silicon oxide layer, it is possible to obtain a fixed charge holding effect even if the hafnium oxide film is thin. Following the thin hafnium oxide film, the structure of this embodiment can be realized by embedding a low refractive index material by a process having a high throughput.

  In addition to the silicon oxide film, various coating films can be used as the low-refractive material. In this case, the effect of improving the throughput is great and the manufacturing cost can be greatly reduced. There is.

(Fifth embodiment)
Next, a solid-state imaging device according to a fifth embodiment of the present invention is shown in FIG. In the solid-state imaging device according to the fifth embodiment, as in the third embodiment, a trench type pixel isolation structure 160 is provided between adjacent pixels, and a floating diffusion 203 is provided between adjacent pixels. On the side, a p ⁺ pixel isolation region 220 is provided between the floating diffusion 203 and the pixel isolation structure 160. In addition, a p ⁺ pixel isolation region 221 is provided on a side different from the side where the floating diffusion 203 between adjacent pixels is provided. In the fifth embodiment, the pixel isolation structure 160 includes a silicon oxide layer 164 and a fixed charge film 162 containing, for example, hafnium oxide, in a trench provided in the semiconductor substrate 150, as described with reference to FIG. And embedded.

In the fifth embodiment, the support substrate 300 described in the method for manufacturing the solid-state imaging device of the third embodiment is provided on the interlayer insulating film 230. In the fifth embodiment, unlike the third embodiment, the fixed electrode film 162 is not formed on the back surface side of the silicon substrate 150, and an insulating film 236 through which incident light is transmitted is provided. A color filter 237 is provided on 236 (under the insulating film 236 in FIG. 11), and a microlens 239 is provided on the color filter 237 (under the color filter 237 in FIG. 11).
A light shield 240 is provided in the region of the insulating film 236 corresponding to the pixel isolation structure 160 so as to overlap or cover the pixel isolation structure 160. Note that a p ⁺ region 210 for preventing a dark current from flowing into the PD_n region 201a is provided in a region on the surface side of the silicon substrate 150 between the PD_n region 201a and the interlayer insulating film 230, and the PD_n region 201a. A p ⁺ region 210 a for preventing dark current from flowing into the PD_n region 201 a is provided in a region on the back surface side of the silicon substrate 150 between the insulating film 236 and the insulating film 236. Note that the color filters 237 provided on the pixels are arranged so that colors are different in adjacent pixels. That is, the fifth embodiment has a configuration in which the surface irradiation type solid-state imaging device according to the first modification of the second embodiment shown in FIG.

According to the fifth embodiment, it is possible to correspond to the pixel circuit sharing method described in the second embodiment. That is, in the pixel layout of the pixel circuit sharing method, two photodiodes sharing the floating diffusion 203 are arranged on the surface of the silicon substrate 150 on the wiring side: photodiode 201 / transfer transistor 202 / floating diffusion 203 / transfer transistor 202. / Photodiodes 201 are formed in order. However, in the silicon substrate 150, the photodiodes 201 / p ^{+ the} pixel separation region 230 / the photodiode 201 are arranged in this order. In this case, a pixel isolation structure 160 for pixel isolation between the two photodiodes 201 is formed so as to be embedded in the silicon substrate 150, and a high-concentration p ⁺ impurity that is in contact with the wiring side end face of the pixel isolation structure 160. A p ⁺ pixel isolation region 220 composed of a region is formed, and a transfer transistor 202 / floating diffusion 203 / transfer transistor 202 are formed on the surface side of the silicon substrate 150. In addition, a p ⁺ pixel isolation region 221 is formed on a side different from the side where the floating diffusion 203 between adjacent pixels is provided. By forming in this way, the solid-state imaging device of this embodiment having the separation structure shown in FIG. 11 is obtained.

  As in the first modification of the second embodiment, this embodiment can also sufficiently suppress electrical crosstalk. At the same time, light leakage of obliquely incident light to adjacent pixels, which simultaneously causes optical crosstalk, is greatly suppressed.

  As described above, according to the present embodiment, it is possible to use the pixel layout of the pixel circuit sharing method, it is possible to obtain finer pixels, and the high sensitivity characteristic that is a feature of the pixel sharing method In combination with this, a more sensitive solid-state imaging device can be obtained.

(Sixth embodiment)
Next, a solid-state imaging device according to a sixth embodiment of the present invention is shown in FIG. The solid-state imaging device according to the sixth embodiment is configured by replacing the pixel separation structure 160 with the pixel separation structure 160B used in the fourth embodiment shown in FIG. 10 in the solid-state imaging device according to the fifth embodiment shown in FIG. It has become.

  The sixth embodiment can obtain the same effect as that of the fifth embodiment and, similarly to the fourth embodiment, enhances the optical crosstalk suppression effect caused by the oblique incident light entering the adjacent pixels. Therefore, a more sensitive solid-state imaging device can be obtained.

(Seventh embodiment)
Next, a solid-state imaging device according to a seventh embodiment of the present invention is shown in FIG. The solid-state imaging device of the seventh embodiment is the same as the solid-state imaging device of the fifth embodiment shown in FIG. 11 except that the fixed charge film 162 and the silicon oxide layer 164 embedded in the trench of the pixel isolation structure are on the lower surface side of the PD_n region 201a. Also configured to extend. In the present embodiment, unlike the fifth embodiment shown in FIG. 11, the p ⁺ region 210a for suppressing the dark current from flowing into the PD_n region 201a is not provided. This is because when a fixed potential is applied to the fixed charge film 162, the dark current can be prevented from flowing into the PD_n region 201a.

According to the present embodiment, it is possible to omit the step for providing the p ⁺ region 210a for suppressing the dark current from flowing into the PD_n region 201a, and the manufacturing yield is improved by the effect of shortening the step. In addition, by reducing the manufacturing cost, an effect that the cost can be reduced can be obtained.

  The sixth embodiment can also obtain the same effects as the fifth embodiment.

(Eighth embodiment)
Next, FIG. 14 shows a solid-state imaging device according to the eighth embodiment of the present invention. The solid-state imaging device according to the eighth embodiment is the same as the solid-state imaging device according to the sixth embodiment shown in FIG. 12 except that the fixed charge film 162, the silicon oxide layer 164, and the low refractive index film 169 embedded in the trench of the pixel isolation structure. The PD_n region 201a is configured to extend to the lower surface side. In the present embodiment, unlike the sixth embodiment shown in FIG. 12, the p ⁺ region 210a for suppressing the dark current from flowing into the PD_n region 201a is not provided. This is because when a fixed potential is applied to the fixed charge film 162, the dark current can be prevented from flowing into the PD_n region 201a.

According to the present embodiment, as in the seventh embodiment, it is possible to omit the process for providing the p ⁺ region 210a for suppressing the dark current from flowing into the PD_n region 201a. As a result, the manufacturing yield can be improved and the manufacturing cost can be reduced, whereby the cost can be reduced.

  The eighth embodiment can obtain the same effects as those of the sixth embodiment.

(Ninth embodiment)
Next, a solid-state imaging device according to a ninth embodiment of the present invention is shown in FIG. The solid-state imaging device according to the ninth embodiment is the same as the solid-state imaging device according to the fifth embodiment shown in FIG. 11 except that the pixel separation structure 160 is used in the first modification of the first embodiment shown in FIG. The configuration is replaced with 160A.
The ninth embodiment can obtain the same effects as those of the fifth embodiment. Further, as in the case of the first modification of the first embodiment, it is possible to greatly reduce the occurrence of white scratches due to gate leaks.

(10th Embodiment)
Next, a solid-state imaging device according to a tenth embodiment of the present invention is shown in FIG. The solid-state imaging device according to the tenth embodiment has a configuration in which the pixel isolation structure 160A is replaced with a trench-type pixel isolation structure 160C in the solid-state imaging device according to the ninth embodiment shown in FIG. The pixel isolation structure 160C has a configuration in which a low refractive material film 169 is further provided in the polycrystalline silicon film 168 of the pixel isolation structure 160A. That is, the pixel isolation structure 160C has a structure in which a laminated film including a silicon oxide layer 164, a fixed charge film 162, a silicon oxide layer 166, a polycrystalline silicon film 168, and a low refractive material film 169 is embedded in the trench. .
The tenth embodiment can obtain the same effects as those of the ninth embodiment. In addition, it is possible to enhance the optical crosstalk suppression effect caused by obliquely incident light entering adjacent pixels, and a more sensitive solid-state imaging device can be obtained.

(Eleventh embodiment)
Next, a solid-state imaging device according to an eleventh embodiment of the present invention is shown in FIG. The solid-state imaging device according to the eleventh embodiment is the same as the solid-state imaging device according to the ninth embodiment shown in FIG. 15 except that the silicon oxide layer 164, the fixed charge film 162, the silicon oxide layer 166 embedded in the trench of the pixel isolation structure 160A, Further, the polycrystalline silicon film 168 is configured to extend also to the lower surface side of the PD_n region 201a. In the present embodiment, unlike the ninth embodiment shown in FIG. 15, the p ⁺ region 210a for suppressing the dark current from flowing into the PD_n region 201a is not provided. This is because when a fixed potential is applied to the fixed charge film 162, the dark current can be prevented from flowing into the PD_n region 201a.

According to the present embodiment, similarly to the seventh embodiment, it is possible to omit the process for providing the p ⁺ region 210a for suppressing the dark current from flowing into the PD_n region 201a. As a result, the manufacturing yield can be improved, and the manufacturing cost can be reduced, whereby the cost can be reduced.

  The eleventh embodiment can achieve the same effects as those of the ninth embodiment.

(Twelfth embodiment)
Next, a solid-state imaging device according to a twelfth embodiment of the present invention is shown in FIG. The solid-state imaging device according to the twelfth embodiment is the same as the solid-state imaging device according to the tenth embodiment shown in FIG. 16 except that the silicon oxide layer 164, the fixed charge film 162, the silicon oxide layer 166 embedded in the trench of the pixel isolation structure 160C The polycrystalline silicon film 168 and the low refractive material film 169 are configured to extend also to the lower surface side of the PD_n region 201a. In the present embodiment, unlike the tenth embodiment shown in FIG. 16, the p ⁺ region 210a for suppressing the dark current from flowing into the PD_n region 201a is not provided. This is because when a fixed potential is applied to the fixed charge film 162, the dark current can be prevented from flowing into the PD_n region 201a.

According to the present embodiment, similarly to the seventh embodiment, it is possible to omit the process for providing the p ⁺ region 210a for suppressing the dark current from flowing into the PD_n region 201a. As a result, the manufacturing yield can be improved, and the manufacturing cost can be reduced, whereby the cost can be reduced.

  This twelfth embodiment can obtain the same effects as those of the tenth embodiment.

  In the backside illumination type solid-state imaging device shown in the ninth to twelfth embodiments, there is a concern that the presence of the polycrystalline silicon film on the light incident side absorbs incident light and lowers sensitivity. The polycrystalline silicon film is a component that needs to operate only in the electron injection into the silicon nitride film as a fixed charge initialization process, and is not necessarily required to have a low resistance. Therefore, it is possible to reduce the film thickness so that a decrease in sensitivity due to light absorption does not become a problem. For example, even in an embedded photodiode structure in a normal surface irradiation type solid-state imaging device, the depth of the ineffective region that does not contribute to the sensitivity of the photodiode is generally larger than 0.1 μm on the light incident side. There are situations where it is difficult to reduce the thickness due to process reasons and suppression of surface component noise.

  Therefore, by setting the thickness of the polycrystalline silicon film as the fixed charge film to 0.1 μm or less, the sensitivity is reduced as much as that of a normal embedded photodiode, and conversely, the thickness of the polycrystalline silicon layer is reduced. Since it can be formed to a thickness of about 100 nm, it can be said that the sensitivity can be higher than that of a buried photodiode.

  As described above, according to each embodiment of the present invention, even in a miniaturized pixel, the signal charge is generated near the pixel isolation region of the photodiode by the fixed charge film that holds the fixed charge embedded in the trench structure. Since the interface shield charge of the opposite conductivity type is induced, a dark current can be suppressed and a pixel separation structure that does not compress the volume of the photodiode can be realized, whereby a highly sensitive solid-state imaging device can be obtained.

  In addition, since the oblique incident light incident on the pixel separation structure is reflected by the incident surface, it does not enter the adjacent pixels, so that optical crosstalk can be suppressed, and a highly sensitive solid-state imaging device. Can be obtained.

  Furthermore, it is possible to realize a pixel separation structure and a photodiode with a depth that can sufficiently absorb red long-wavelength incident light. By improving red sensitivity and reducing electrical crosstalk, a highly sensitive solid-state imaging device Can be obtained.

100 Solid-state imaging device
DESCRIPTION OF SYMBOLS 101 Image pick-up area 102 Load transistor 103 CDS circuit 104 V selection circuit 105 H selection circuit 106 AGC circuit 107 A / D converter 108 Digital amplifier 109 TG circuit 150 Silicon substrate 160 Trench type pixel isolation structure 160A Trench type pixel isolation structure 160B Trench type pixel isolation structure 160C Trench type pixel isolation structure 162 Fixed charge film 164 Silicon oxide layer 166 Silicon oxide layer 168 Polycrystalline silicon film 169 Low refractive index film 200 Pixel 201 Photo diode 201a n-type impurity region (PD_n region)
202 Transfer transistor 203 Floating diffusion (FD)
205 amplification transistor 206 selection transistor 230 interlayer insulation film 235 metal wiring 237 color filter 239 micro lens

Claims (4)

a plurality of pixels provided on a p-type semiconductor substrate, each of which has an n-type semiconductor region for converting and storing light incident from the first surface side of the semiconductor substrate into a signal charge; ,
A readout circuit provided on the first surface side of the semiconductor substrate for reading out signal charges accumulated in the pixels;
A pixel isolation structure provided between adjacent pixels of the semiconductor substrate, the pixel isolation structure having a stacked film embedded in a trench provided from the first surface side of the semiconductor substrate; The stacked film includes a first insulating film provided along a side surface and a bottom surface of the trench, a fixed charge film provided in the trench so as to cover the first insulating film, and holding a negative charge, comprising a second insulating film provided on the trench so as to cover the fixed charge film, and an electrode film of polycrystalline silicon to which a voltage is applied is provided in the trench so as to cover the second insulating film A pixel separation structure;
The solid-state imaging device that features.   The solid-state imaging device according to claim 1, further comprising a p-type impurity region provided on the semiconductor substrate so as to be in contact with the upper surface of the pixel isolation structure and having a higher concentration than the semiconductor substrate.   3. The solid according to claim 1, wherein the stacked film of the pixel isolation structure further includes a low refractive index film provided in the trench so as to cover the fixed charge film and having a refractive index lower than that of the semiconductor substrate. Imaging device.   The semiconductor substrate is a silicon substrate, the first insulating film is a silicon oxide film, and the fixed charge film is an oxide containing at least one of hafnium (Hf) zirconium (Zr) and titanium (Ti). The solid-state imaging device according to claim 1, which is a dielectric film.

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