201044472 六、發明說明： 【發明所屬之技術領域】 本發明係有關 有關於半導體晶片 【先前技術】 於半導體晶片之封裝過程，特別係 之封襄過程之黏晶步驟。201044472 VI. Description of the Invention: [Technical Field] The present invention relates to a semiconductor wafer [Prior Art] A packaging process for a semiconductor wafer, particularly a die bonding step of a sealing process.
在半導體晶片封襄過財，—般係以—具有窗口 之電路基板㈣於n独複數個金屬銲線穿過 該窗口連接電路基板與晶片，該電路基板並形成有複 數個矩陣排列之銲球，在美國專㈣第6，刚，州號所 揭示的「晶片尺寸封裝方法」中，如帛1圖所示，該 半導體晶片組件（1GG)係包含有-基板（110)、-半 導體晶片（130)及複數個鮮球⑽），該基板（11〇) 係具有一用以黏固半導體晶片（130)之上表面（111)、 一用以焊接銲球（160)之下表面（112)以及貫穿上 表面（111)與下表面（112)之通孔（113)，其中半 導體晶片（130)係以熱塑性黏著層（12〇)黏固於基 板（Π0)之上表面（1U) ’此外該基板（11〇)之該 通孔（113)係對應於該半導體晶片（13〇)之主動面 (131) (active surface)之該些銲墊（132)，使金屬 銲線（140)可穿過通孔（113)，以電性連接半導體晶 片（130)之銲墊（132)與基板（11〇)之導接墊（114)， 該導接墊（114)係由在基板（no)下表面（112)之 3 201044472 k 導電層（115)所構成，並在通孔（113)處以及半導 體晶片（130)之周邊形成有一封膠材（15〇)，該封膠 材（150)係為-種絕緣性及熱回性之環氧樹脂石夕氧填 充材料。 在該美國專利案第6,190,943號「晶片尺寸封裝方 法」中，關於上述半導體晶片組件（1〇〇)之封裝方法 係如第2圖所示，包含以下步驟：a)提供一基板（11〇)， ° 纟該基板（11G)之上表面（111)具有至少-黏晶區 域（116)，其包含上述之通孔（113) ; b)將液態之熱 塑性黏著層（120 )網版印刷（Stenciling)於該黏晶區域 (116) ; c)黏貼半導體晶片（130)至黏晶區域（116), 使得半導體晶片（130)之主動面（131)接觸熱塑性 黏著層（120)，且在主動面（13ι)之銲墊（132)係 對應於通孔（113) ; d)在預定之溫度、壓力及時間之 〇 下’施壓加熱基板（110)與晶片（130) ; e)以打線 (wire-bonding)將金屬銲線（140)經由通孔（113)連 接基板（110)之導接塾（114)與晶片（13〇)之銲墊 (132) ; f)提供一封膠材（15〇)於該通孔（113)及晶 片（130)之周邊；g)在基板（110)之下表面（112) 接植複數個呈矩陣排列之銲球（160)。籍由上述之步 驟以製備半導體晶片組件（100)，其中在b)步驟中之 熱塑性黏著層（120)係為一種無溶劑、彈性且半透明 4 201044472 之石夕橡膠（silicone rubber)，由於未黏合前的熱塑性黏 著層（120 )係呈液態，在d)步驟中的施壓加熱容易使 得液態熱塑性黏著層（120)溢流並覆蓋半導體晶片 (130)之銲墊（132)’而導致封裝失敗，故良率較低， 此外，另一不便之處為在b)步驟印刷上液態熱塑性黏 著層（120)之後，無法將多個基板（11〇)堆叠以供 搬運或儲放，必須儘速黏固上半導體晶片（13〇)，否 〇 則基板〇1〇)會受到污染以及基板（110)間會不當 黏著。此外，在c)步驟與d)步驟的黏晶施壓加熱步驟 中，由於熱塑性黏著層（120)之熱膨脹係數（coefficient of thermal expansion)與晶片（130)及基板（no)不 相匹配，造成熱塑性黏著層（120)與晶片（13〇)及 基板（110 )間之結合界面熱應力很大，較易產生脫層 (delamination)或爆米花(popcorn)...等現象，並影響至 〇 半導體晶片組件（1〇〇)與外部裝置的電性連接品質。 【發明内容】 因此，為解決上述問題’本發明之主要目的係在提 供半導體晶片封裝過程’首先利用一種具有溶劑之熱 固性混合物，以黏貼晶片，在印刷於基板及乾燥後在基 板表面形成一不具黏性之黏著乾膜，使得具有熱固性黏 著乾膜之基板可堆疊搬運或儲放，亦使得在施壓加熱該 基板與該晶片步驟時，該黏著乾膜不易覆蓋晶片之銲 5 201044472 塾，以增加封裝良率。 本發明之再一目的在於提供半導體晶片封裝過 程，利用具有溶劑之_性混合物，在乾燥後形成黏著 乾膜後，施壓加熱該基板與該晶丨，並基於該熱固性黏 著乾膜之熱膨脹係數與基板相近之特性，而不易造成脫 層（delamination)現象，以確保電性連接品質。 ΟIn the semiconductor wafer, the circuit board is sealed, and the circuit board having the window (4) is connected to the circuit substrate and the wafer through a plurality of metal bonding wires. The circuit substrate is formed with a plurality of matrix-arranged solder balls. In the "wafer size packaging method" disclosed in U.S. Patent No. 4, Gang., as shown in FIG. 1, the semiconductor wafer module (1GG) includes a substrate (110), a semiconductor wafer ( 130) and a plurality of fresh balls (10), the substrate (11) having a surface (111) for bonding the semiconductor wafer (130) and a surface (112) for soldering the solder ball (160) And a through hole (113) penetrating the upper surface (111) and the lower surface (112), wherein the semiconductor wafer (130) is adhered to the upper surface (1U) of the substrate (1U) by a thermoplastic adhesive layer (12〇) The through hole (113) of the substrate (11〇) corresponds to the pads (132) of the active surface (131) of the semiconductor wafer (13〇), so that the metal bonding wire (140) can be Passing through the through hole (113) to electrically connect the pad (132) and the substrate (11〇) of the semiconductor wafer (130) a conductive pad (114) consisting of a 3,043,472,472 conductive layer (115) on the lower surface (112) of the substrate (no), and at the via (113) and the semiconductor wafer A rubber material (15 〇) is formed around the periphery of (130), and the sealant (150) is an epoxy resin filled with an insulating and heat-recycling epoxy resin. In the "wafer size packaging method" of the U.S. Patent No. 6,190,943, the packaging method of the semiconductor wafer module (1) is as shown in Fig. 2, and includes the following steps: a) providing a substrate (11 〇) , the upper surface (111) of the substrate (11G) has at least a polycrystalline region (116) comprising the above-mentioned through holes (113); b) screen printing of a liquid thermoplastic adhesive layer (120) (Stenciling) And bonding the semiconductor wafer (130) to the die-bonding region (116) such that the active surface (131) of the semiconductor wafer (130) contacts the thermoplastic adhesive layer (120) and is on the active surface. The (13) pad (132) corresponds to the through hole (113); d) the substrate (110) and the wafer (130) are heated under a predetermined temperature, pressure and time; e) Wire-bonding) connects the metal bonding wire (140) to the bonding pad (114) of the substrate (110) and the pad (132) of the wafer (13) via the through hole (113); f) providing a glue ( 15〇) around the via (113) and the periphery of the wafer (130); g) implanting a plurality of substrates in the lower surface (112) of the substrate (110) A solder ball (160). The semiconductor wafer assembly (100) is prepared by the above steps, wherein the thermoplastic adhesive layer (120) in the step b) is a solventless, elastic and translucent silicone rubber of 201044472, due to The thermoplastic adhesive layer (120) before bonding is in a liquid state, and the pressure heating in the step d) easily causes the liquid thermoplastic adhesive layer (120) to overflow and cover the pad (132) of the semiconductor wafer (130) to cause packaging. Failure, the yield is low, and another inconvenience is that after printing the liquid thermoplastic adhesive layer (120) in step b), it is impossible to stack a plurality of substrates (11〇) for handling or storage. The semiconductor wafer (13 〇) is quickly adhered, otherwise the substrate 污染 1 〇) is contaminated and the substrate (110) is improperly adhered. In addition, in the die pressing heating step of the steps c) and d), since the coefficient of thermal expansion of the thermoplastic adhesive layer (120) does not match the wafer (130) and the substrate (no), The thermal interface between the thermoplastic adhesive layer (120) and the wafer (13〇) and the substrate (110) has a large thermal stress, which is relatively easy to cause delamination or popcorn, and affects 〇 The electrical connection quality of the semiconductor wafer assembly (1〇〇) to the external device. SUMMARY OF THE INVENTION Therefore, in order to solve the above problems, the main object of the present invention is to provide a semiconductor wafer packaging process. First, a thermosetting mixture having a solvent is used to adhere the wafer, and after printing on the substrate and drying, a surface is formed on the substrate. Adhesive adhesion of the dry film, so that the substrate with the thermosetting adhesive dry film can be stacked for storage or storage, and the adhesive dry film is not easy to cover the soldering of the wafer during the step of heating and heating the substrate and the wafer, Increase package yield. A further object of the present invention is to provide a semiconductor wafer packaging process in which a solvent-containing mixture is used to form a bonded dry film after drying, and the substrate and the wafer are heated and pressed, and based on the thermal expansion coefficient of the thermosetting adhesive dry film. Similar to the substrate, it is not easy to cause delamination to ensure the quality of electrical connection. Ο
為了達到上述之目的’依本發明之半導體晶片封裝 過程’其步驟為：提供—基板，該基板係具有-上表 下表面及至少一通孔，所述該通孔係貫通該上 表面與該下表面；接著，於該基板之該上表面形成至 ”少-熱固性混合物’所述該熱固性混合物係包含溶 劑；去除溶劑，使該熱固性混合物形成黏著乾臈；接 者，提供至少一晶片，該晶片具有一主動面及複數個 銲墊，所述該些銲墊係位於該主動面上，其中該晶片 之該主動面係接觸該黏著乾膜，且該晶片之該些銲墊 係對應於該基板之該通孔；爾後，施壓加熱該基板與 該晶片，使該黏著乾膜黏合該晶片與該基板；再提供 複數個金屬導線，藉由該通孔電性連接該銲墊與該基 板；再以壓模形成一封膠材於該基板之該通孔處。 本發明的目的及解決其技術問題還可採用以下技 術措施進一步實現。 月1J述的半導體晶片封裝過程，其中係以網版印刷 6 201044472 (stencil printing )方法形成至少一熱固性混合物。 前述的半導體晶片封裝過程，其中係以塗刷 [painting]、喷塗[spraying]、旋塗[spinning]或浸染 [dipping]方法形成至少一熱固性混合物。 前述的半導體晶片封裝過程，其中係以加熱方法 去除溶劑。 前述的半導體晶片封裝過程，其中係以真空乾燥 〇 加熱方法完全去除溶劑。 前述的半導體晶片封裝過程，其中於施壓加熱該 基板與該晶片時，亦可固化該黏著乾膜。 前述的半導體晶片封裝過程，其中於壓模形成一 封膠材於該基板之該通孔處之後，亦可加熱固化該黏 著乾膜與該封膠材。 前述的半導體晶片封裝過程，其中於壓模形成一 〇 封膠材於該基板之該通孔處後，可接植複數個銲球於 該基板之該下表面。 前述的半導體晶片封裝過程，其中在壓模形成一 封膠材於該基板之該通孔處之後，於加熱固化該黏著 乾膜與該封膠材後，可接植複數個銲球於該基板之該 下表面。 前述的半導體晶片封裝過程，其中所述該封膠材 係密封該晶片。 7 201044472 溫度裝過程，施“熱- 著體晶片封裝過程’其中同時固化該黏 者乾膜/、該封膠材之溫度係高於之去除溶劑溫度。 相較於習知技術，本發明之功效在於，使^種 具有溶劑之熱隨混合物，以紙W，似卩刷於基板In order to achieve the above object, the semiconductor wafer packaging process according to the present invention includes the steps of: providing a substrate having a lower surface and at least one via hole, wherein the through hole penetrates the upper surface and the lower surface a surface; subsequently, forming a "less-thermosetting mixture" on the upper surface of the substrate, the thermosetting mixture comprising a solvent; removing the solvent to form the thermosetting mixture to form an adhesive dry; and providing at least one wafer, the wafer An active surface and a plurality of pads are disposed on the active surface, wherein the active surface of the wafer contacts the adhesive dry film, and the pads of the wafer correspond to the substrate The through hole is then pressed to heat the substrate and the wafer to adhere the adhesive film to the substrate; and then a plurality of metal wires are provided, and the pad and the substrate are electrically connected through the through hole; Then, a stamping material is formed on the through hole of the substrate by using a stamper. The object of the present invention and solving the technical problem thereof can be further realized by the following technical measures. a bulk wafer packaging process in which at least one thermosetting mixture is formed by a screen printing method 6 201044472 (stencil printing). The aforementioned semiconductor wafer packaging process, in which painting, spraying, spin coating [spinning] Or a dipping method to form at least one thermosetting mixture. The aforementioned semiconductor wafer encapsulation process in which a solvent is removed by a heating method. The aforementioned semiconductor wafer encapsulation process in which a solvent is completely removed by a vacuum drying crucible heating method. a wafer packaging process, wherein the adhesive dry film is cured when the substrate and the wafer are heated by pressure. The semiconductor wafer packaging process, after the stamper forms a glue on the through hole of the substrate, The adhesive dry film and the sealant can also be heated and cured. The semiconductor wafer packaging process described above, wherein after forming a sealant on the through hole of the substrate, a plurality of solder balls can be implanted in the stamper. The lower surface of the substrate. The semiconductor wafer packaging process described above, wherein a stamp is formed on the stamper After the through hole of the board, after curing the adhesive dry film and the sealing material, a plurality of solder balls may be implanted on the lower surface of the substrate. The semiconductor chip packaging process, wherein the sealing material The system seals the wafer. 7 201044472 The temperature loading process applies a "hot-on-body wafer packaging process" in which the adhesive dry film is simultaneously cured. The temperature of the sealant is higher than the solvent removal temperature. Compared with the prior art, the effect of the invention is that the heat with the solvent is mixed with the paper, and the paper W is applied to the substrate.
及乾燥後在基板表㈣成—不具純之黏著乾膜，使得 具有熱固性黏著贿之基板可堆㈣運讀放，亦使得 在施壓加熱該基板與該晶片步驟時，該黏著乾膜不易覆 蓋晶片之銲整，以增加封裝良率，並基於該熱固性黏著 乾膜之熱膨脹係數與基板相近之特性，而不㈣成脫層 UelaminatiGn)縣，以麵電性連接品質。 【實施方式】 為了讓本發明之目的、特徵與功效更明顯⑽，以下特 別列舉本發明之較佳實施型態： δ月參知第4圖為本發明之第一具體實施例之流程 圖，並請配合參看第3Α至3G圖所示，在步驟（211) 中，提供一基板（10)，該基板（10)係具有一上表面 (11)、一下表面（12)及至少一通孔（13)，所述該 通孔（13)係貫通該上表面（u)與該下表面（12) (第3Α圖），其中基板可為—種玻璃纖維強化樹脂之 印刷電路板，在基板（1〇)之下表面（12)形成有一電 8 201044472 路圖案層（未繪製於圖中），在步驟（212)中，於該基 板（10)之該上表面（11)形成至少一熱固性混合物 (20 )，所述該熱固性混合物（20 )係包含溶劑，該熱 固性混合物（20 )係包含有熱固性樹脂，如聚亞醯胺 (polyimide )、聚喹琳（polyquinolin )或苯環丁西 (benzocyclobutene )，以及能夠溶解上述熱固性樹脂 之溶劑，如丁内脂（butyrolactone )與環戊酮 〇 ( cyclopentanone ) 之混合溶劑或是1，3，5-三甲基苯 (mesitylene)或者是其他可B階化的熱固性混合物 (B-stageableepoxy)，由於該熱固性混合物在 塗施於該基板（ίο)時呈液態’故可以網版印刷（stencil printing )’ 或者是塗刷（painting )、喷塗（spraying )、 旋塗（spinning)或浸染（dipping)等方法形成至少 一熱固性混合物（20)(第3B圖）；接著於步驟（213) D 時，加熱該基板（10)至一適當溫度以去除溶劑，使 該熱固性混合物（20)形成黏著乾膜（21)，該黏著乾 膜（21 )之玻璃態轉化溫度（glass transiti〇n temperature，Tg)係大於等於4(rc，因此該黏著乾膜 (21 )於室溫下係為不具有黏性之膠膜，因此具有該 黏著乾膜（21)之該基板（1〇)在常溫下係可供堆疊 搬運或儲放（第3C圖）；接著於步驟（214)時，提 供至少一晶片（30)，該晶片（3〇)具有一主動面（31) 9 201044472 及複數個銲墊（32 )，所述該些銲墊（32 )係位於該主 動面（31)上’其中該晶片（30)之該主動面（31) 係接觸該黏著乾膜（21)，且該晶片（30)之該些銲墊 (32)係對應於該基板（〗〇)之該通孔（13)(第3D 圖），爾後於步驟（215)，施壓加熱該基板（1〇)與該 晶片（30)，使該黏著乾膜（21)黏合該晶片（3〇)與 該基板（10)，並亦可固化該黏著乾膜（21)，由於在 黏合過程中，該黏著乾膜（21)不具有高流動性，因 此該黏著乾膜（21)不易覆蓋該晶片（30)之銲墊（32)， 此外，基於該熱固性混合物（2〇)之熱膨脹係數與基 板（1 〇)相近之特性，因此不易造成脫層（delaminati〇n) 現象可確保電性連接品質；接著於步驟（216 )時， 提供複數個金屬導線（40)，藉由該通孔（13)電性連 接該銲墊（32)與該基板（10)(第3E圖）；後續於步 驟（217)時，壓模形成一封膠材（5〇)於該基板 之該通孔（13)處，其中該封膠材（5〇)係密封該晶 片（30)(第3F圖）’如有需要，則後續於步驟（ 接植複數個銲球（60)於該基板（1〇)之該下表面（12) (第犯圖）；此外於步驟（215)之施壓加熱固化溫 度係尚於步驟（213)之去除溶劑之溫度。 請參照第5圖為本發明之第二具體實施例之流程 圖，並可配合參看第3F圖所示，職裝過程大體相同 201044472 於第一具體實施例，如第一具體實施例的步驟（211)、 步驟（212)、步驟（213)、步驟（214)、步驟（216) 及步驟（218)皆分別相同於第二具體實施例的步驟 (221)、步驟（222)、步驟（223 )、步驟（224)、步驟 (226)及步驟（228)，由於該些步驟之細部描述已於 第一具體實施例中詳加說明，因此在此則不再贅述。第 二具體實施例與第一具體實施例的不同處在於步驟 〇 (225)與步驟（227):第二具體實施例之步驟（225) 係施壓加熱該基板（1〇)與該晶片（3〇)，使該黏著乾 膜（21)黏合該晶片（30)與該基板（1〇)，並未於此 時固化該黏著乾膜（21)，然而與第一具體實施例相同 處在於由於在黏合過程中，該黏著乾膜（21)不具有 高流動性，因此該黏著乾膜（21)不易覆蓋該晶片（3〇) 之銲塾（32)，此外’基於該熱固性混合物（2〇)之熱 鮮脹係數與基板（1〇)相近之特性’因此不易造成脫層 (delamination)現象，可確保電性連接品質；另一個 不同處在於步驟（ 227)，壓模形成一封膠材（5〇)於 該基板（10)之該通孔（13)處之後，加熱固化該黏 著乾膜（21)與該封膠材（50)，由於壓模壓力可排除 原本可能潛藏在未固化前該黏著乾膜（21)之空隙， 係可增進封裝良率，其中該封膠材（50)亦密封該晶 片（3〇)(第3F圖），而步驟（ 227)之後之加熱固化 11 201044472 溫度亦高於步驟（ 223)之去除溶劑之溫度。 請參照第6圖為本發明之第三具體實施例之流程 圖，並可配合參看第3C圖所示，該封裝過程亦大體相 同於第一具體實施例，如第一具體實施例的步驟 (211 )、步驟（212)、步驟（214)、步驟（215)、步驟 (216)、步驟（217)及步驟（218)皆分別相同於第三 具體實施例的步驟（231 )、步驟（232)、步驟（234)、 步驟（ 235 )、步驟（ 236)、步驟（237)及步驟（ 238)， 由於該些步驟之細部描述已於第一具體實施例中詳加 说明，因此在此不再贅述。第三具體實施例與第一具體 實施例的不同處在於步驟（233 ):第三具體實施例之步 驟（ 233 )係以真空乾燥加熱完全去除溶劑，使該熱固 性此合物（20)形成無溶劑之黏著乾膜（21)，由於該 黏著乾膜（21)之玻璃態轉化溫度（glass transhi〇n temperature，Tg)係大於等於4〇£)(：與第一具體實施例 =同’因此具有該黏著乾膜（21)之該基板（1〇)在 常溫下係可供堆疊搬運或儲放（第3C圖）。 喷參照第7圖為本發明之第四具體實施例之流程 圖’並可配合參看第3C、3F圖所示，該封裝過程亦大 體相同於第-具體實施例’如第—具體實施例的步驟 (211)步驟（212)、步驟（214)、步驟（216)、及步 驟（218 )皆分別相同於第四具體實施例的步驟（241 )、 12 201044472 步驟（242)、步驟（244)、步驟（246)及步驟（248)， 由於該些步驟之細部描述已於第—具體實施例中詳加 忒明，因此在此不再贅述。第四具體實施例與第一具體 實施例的不同處在於步驟（243)、步驟（245)與步驟 (247):第四具體實施例之步驟（243)係以真空乾燥 加熱完全去除溶劑，使該熱固性混合物（20)形成無溶 劑之黏著乾膜（21)，由於該黏著乾膜（21)之玻璃態 轉化 /皿度（glass transition temperature，Tg )係大於等 於40 C與第-具體實施例相同，因此具有該黏著乾膜 (21)之該基板（1〇)在常溫下係可供堆疊搬運或儲 放（第3C圖）；步驟（245)係施壓加熱該基板（1〇) 與該晶片（30)，使該黏著乾膜（21)黏合該晶片（3〇) 與該基板（10) ’並未於此時固化該黏著乾膜（21)， ,、、；而與第一具體實施例相同處在於由於在黏合過程 中，該黏著乾膜（21 )不具有高流動性，因此該黏著 乾膜（21)不易覆蓋該晶片（3〇)之銲墊（％)，此外， 基於該熱固性混合物（20)之熱膨脹係數與基板（1〇) 相近之特性’因此不易造成脫層（deianiinati〇n )現象， 可確保電性連接品質；另一個不同處在於步驟（247 )， 壓模形成一封膠材（50)於該基板（10)之該通孔（13) 處之後，加熱固化該黏著乾膜（21)與該封膠材（5〇)， 由於壓模壓力可排除原本可能潛藏在未固化前該黏著 13 201044472 乾膜（21)之空隙，係可增進封裝良率，其中該封膠 材（50)亦密封該晶片（30)(第3F圖），而步驟（ 247) 之後之加熱固化溫度亦高於步驟（ 243)之去除溶劑之 溫度。 綜上所述，本發明係使用熱固性混合物於半導體晶 片之封裝過程中，作為該基板與該晶片黏合之材料，並 基於該熱固性混合物之特性，使具有熱固性黏著乾膜之 〇 基板可堆疊搬運或儲放，亦使得在施壓加熱該基板與該 晶片步驟時，該黏著乾膜不易覆蓋晶片之銲墊，並由於 該熱固性黏著乾膜之熱膨脹係數與基板相近，而不易造 成脫層（delamination )現象，以確保電性連接品質， 此於同類產品當中實屬首創，符合發明專利要件，爰依 法倶文提出申請。 惟，以上所述者僅為本發明之較佳實施型態，舉 〇 凡應用本發明說明書、申請專利範圍或圖式所為之等效 結構變化，理應包含在本發明之專利範圍内。 【圖式簡單說明】 第1圖：習知有關於半導體晶片組件之剖面示意圖 第2圖：習知習知有關於半導體晶片組件之製造流程 剖面圖 第3圖：係本發明半導體晶片封裝過程之製造流程剖 面圖 14 201044472 第4圖：係本發明之第一具體實施例之流程圖 第5圖：係本發明之第二具體實施例之流程圖 第6圖：係本發明之第三具體實施例之流程圖 第7圖：係本發明之第四具體實施例之流程圖 【主要元件符號說明】 10 基板 40金屬導線 115導電層 11 上表面 50封膠材 116黏晶區域 12 下表面 60 鲜球 120熱塑性黏著層 13 通孔 100半導體晶片組件 130半導體晶片 20 熱固性混合物 110基板 131主動面 21 黏著乾膜 111上表面 132銲墊 30 晶片 112下表面 140金屬銲線 31 主動面 113通孔 150封膠材 32 銲墊 114導接墊 160銲球 211, 221, 231, 241 提供一基板 於該基板之該上表面形成至少一熱 212, 222, 232, 242 固性混合物 213, 223 加熱去除溶劑，使該熱固性混合物形成黏著 乾膜 233, 243 以真空乾燥加熱完全去除溶劑，使該熱固性 15 201044472 混合物形成無溶劑之黏著乾膜 214, 224, 234, 244 提供至少一晶片 215,235施壓加熱该基板與該晶片，使該黏著乾膜固 化並黏合該晶片與該基板 225,245施壓加熱該基板與該晶片，使該黏著乾膜黏 合該晶片與該基板 〇 216, 226, 236, 240提供複數個金屬導線，藉由該通孔 電性連接該銲墊與該基板 2Π，237壓模形成-封膠材於該基板之該通孔處 227, 247顏形成-封膠材於該基板之該通孔處；之 後加熱固化該黏著乾膜與該封膝材 〇 218, 228, 238, 248接植複數個銲球於該基板之該下 表面 16And after drying, it is formed on the substrate table (4) - there is no pure adhesive dry film, so that the substrate with thermosetting adhesive brittle can be piled up (4), and the adhesive film is not easily covered when the substrate and the wafer are heated and pressurized. Soldering of the wafer to increase the package yield, and based on the thermal expansion coefficient of the thermosetting adhesive film is similar to that of the substrate, without (four) delamination UelaminatiGn), the surface electrical connection quality. [Embodiment] In order to make the object, features and effects of the present invention more obvious (10), the following is a particularly preferred embodiment of the present invention: δ月参知四图 is a flow chart of a first embodiment of the present invention, And in conjunction with referring to Figures 3 to 3G, in step (211), a substrate (10) having an upper surface (11), a lower surface (12) and at least one through hole is provided ( 13) The through hole (13) penetrates the upper surface (u) and the lower surface (12) (Fig. 3), wherein the substrate can be a printed circuit board of a glass fiber reinforced resin, on the substrate ( a lower surface (12) is formed with an electric 8 201044472 road pattern layer (not shown), and in step (212), at least one thermosetting mixture is formed on the upper surface (11) of the substrate (10) (20) The thermosetting mixture (20) comprises a solvent comprising a thermosetting resin such as polyimide, polyquinolin or benzocyclobutene. ), and a solvent capable of dissolving the above thermosetting resin, a mixed solvent of butyrolactone and cyclopentanone or 1,3,5-trimethylbenzene (mesitylene) or other B-stageable epoxy (B-stageable epoxy), The thermosetting mixture is in a liquid state when applied to the substrate (so stencil printing) or painting, spraying, spinning or dipping. The method forms at least one thermosetting mixture (20) (Fig. 3B); then, in step (213) D, the substrate (10) is heated to a suitable temperature to remove the solvent, so that the thermosetting mixture (20) forms an adhesive dry film ( 21) The glass transition temperature (Tg) of the adhesive dry film (21) is greater than or equal to 4 (rc, so the adhesive dry film (21) is non-sticky at room temperature. a film, such that the substrate (1) having the adhesive dry film (21) is available for stacking or storage at room temperature (Fig. 3C); then, at step (214), at least one wafer is provided (30) ), the wafer (3〇) has an active surface ( 31) 9 201044472 and a plurality of pads (32) on the active surface (31), wherein the active surface (31) of the wafer (30) is in contact with the adhesive a film (21), and the pads (32) of the wafer (30) correspond to the through holes (13) of the substrate (Fig. 3D), and then pressed in step (215) Heating the substrate (1) and the wafer (30), bonding the adhesive dry film (21) to the wafer (3) and the substrate (10), and curing the adhesive dry film (21), During the bonding process, the adhesive dry film (21) does not have high fluidity, so the adhesive dry film (21) does not easily cover the solder pad (32) of the wafer (30), and further, based on the thermosetting mixture (2〇) The thermal expansion coefficient is similar to that of the substrate (1 〇), so that it is not easy to cause delamination, which ensures electrical connection quality; then, in step (216), a plurality of metal wires (40) are provided, The through hole (13) is electrically connected to the bonding pad (32) and the substrate (10) (Fig. 3E); after the step (217), the stamper forms a rubber material (5〇) At the through hole (13) of the substrate, wherein the sealing material (5〇) seals the wafer (30) (Fig. 3F), if necessary, subsequent to the step (planting a plurality of solder balls ( 60) The lower surface (12) of the substrate (1) (the first drawing); and the pressure heating curing temperature in the step (215) is the temperature of the solvent removed in the step (213). Please refer to FIG. 5 for a flow chart of a second embodiment of the present invention, and with reference to FIG. 3F, the job process is substantially the same as 201044472 in the first embodiment, such as the steps of the first embodiment ( 211), the step (212), the step (213), the step (214), the step (216), and the step (218) are respectively the same as the step (221), the step (222), and the step (223) of the second embodiment. And the step (224), the step (226), and the step (228). Since the detailed description of the steps has been described in detail in the first embodiment, it will not be repeated here. The second embodiment differs from the first embodiment in steps (225) and (227): the second embodiment (225) applies pressure to heat the substrate (1) and the wafer ( 3)), the adhesive dry film (21) is bonded to the wafer (30) and the substrate (1), and the adhesive dry film (21) is not cured at this time, but the same as the first embodiment Since the adhesive dry film (21) does not have high fluidity during the bonding process, the adhesive dry film (21) does not easily cover the solder (32) of the wafer (3), and is further based on the thermosetting mixture (2) 〇) The thermal expansion coefficient is similar to that of the substrate (1〇), so it is not easy to cause delamination, which ensures the quality of electrical connection. Another difference is the step (227), which forms a glue. After the material (5〇) is at the through hole (13) of the substrate (10), the adhesive dry film (21) and the sealant (50) are heat-cured, and the pressure may be excluded due to the pressure of the stamper. The gap between the adhesive dry film (21) before curing can improve the package yield, wherein the sealant (5 0) The wafer (3 〇) is also sealed (Fig. 3F), and the heat curing after step (227) is also higher than the temperature at which the solvent is removed in step (223). Please refer to FIG. 6 for a flowchart of a third embodiment of the present invention, and as shown in FIG. 3C, the encapsulation process is also substantially the same as the first embodiment, such as the steps of the first embodiment ( 211), step (212), step (214), step (215), step (216), step (217), and step (218) are respectively the same as steps (231) and 232 of the third embodiment. ), step (234), step (235), step (236), step (237), and step (238), since the detailed description of the steps has been described in detail in the first embodiment, Let me repeat. The third embodiment differs from the first embodiment in the step (233): the step (233) of the third embodiment is to completely remove the solvent by vacuum drying and heating to form the thermosetting compound (20). The adhesion of the solvent to the dry film (21), since the glass transition temperature (Tg) of the adhesive dry film (21) is greater than or equal to 4 ) (): the same as the first embodiment = The substrate (1) having the adhesive dry film (21) is available for stacking or storage at a normal temperature (Fig. 3C). Fig. 7 is a flow chart of a fourth embodiment of the present invention. As can be seen with reference to Figures 3C and 3F, the encapsulation process is also substantially the same as the first embodiment - step (211), step (212), step (214), step (216) of the specific embodiment. And step (218) are respectively identical to steps (241), 12 201044472, step (242), step (244), step (246), and step (248) of the fourth embodiment, due to detailed description of the steps. It has been detailed in the first embodiment, so it is no longer here. The fourth embodiment differs from the first embodiment in the steps (243), (245) and (247): the fourth embodiment (243) is completely removed by vacuum drying and heating. The thermosetting mixture (20) is formed into a solvent-free adhesive dry film (21), and the glass transition temperature (Tg) of the adhesive dry film (21) is greater than or equal to 40 C and the first-specific The embodiment is the same, so the substrate (1) having the adhesive dry film (21) is available for stacking or storage at room temperature (Fig. 3C); the step (245) is applying pressure to heat the substrate (1〇) And the wafer (30), the adhesive dry film (21) is bonded to the wafer (3) and the substrate (10) 'does not cure the adhesive dry film (21) at this time; The first embodiment is the same in that the adhesive dry film (21) does not easily cover the pad (%) of the wafer (3) because the adhesive dry film (21) does not have high fluidity during the bonding process. Further, the thermal expansion coefficient based on the thermosetting mixture (20) is similar to the substrate (1〇) Sexuality 'is therefore not easy to cause delamination (deianiinati〇n) phenomenon, to ensure the quality of electrical connection; another difference is in step (247), the stamper forms a glue (50) on the substrate (10) After the hole (13), the adhesive dry film (21) and the sealant (5〇) are heat-cured, and the gap between the adhesive film (21) and the dry film (21) which may have been hidden before uncured may be excluded due to the pressure of the stamper. Is to improve the package yield, wherein the sealant (50) also seals the wafer (30) (Fig. 3F), and the heat curing temperature after the step (247) is also higher than the solvent removal step (243) temperature. In summary, the present invention uses a thermosetting mixture in a semiconductor wafer package process as a material for bonding the substrate to the wafer, and based on the characteristics of the thermosetting mixture, the substrate having the thermosetting adhesive dry film can be stacked or transported. The storage also makes the adhesive dry film not easily cover the pad of the wafer when the substrate and the wafer are heated, and the thermal expansion coefficient of the thermosetting adhesive film is close to the substrate, which is not easy to cause delamination. Phenomenon, in order to ensure the quality of electrical connection, this is the first of its kind, in line with the invention patent requirements, and apply in accordance with the law. However, the above description is only a preferred embodiment of the present invention, and equivalent changes in the structure of the present invention, the scope of the application, or the drawings are intended to be included in the scope of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional view showing a semiconductor wafer module. FIG. 3 is a cross-sectional view showing a manufacturing process of a semiconductor wafer module. FIG. 3 is a semiconductor chip packaging process of the present invention. Manufacturing Process Section FIG. 14 201044472 FIG. 4 is a flow chart of a first embodiment of the present invention. FIG. 5 is a flow chart of a second embodiment of the present invention. FIG. 6 is a third embodiment of the present invention. Flowchart of the fourth embodiment: Flow chart of the fourth embodiment of the present invention [Description of main components] 10 substrate 40 metal wire 115 conductive layer 11 upper surface 50 sealing material 116 sticky region 12 lower surface 60 fresh Ball 120 thermoplastic adhesive layer 13 Through hole 100 Semiconductor wafer assembly 130 Semiconductor wafer 20 Thermosetting mixture 110 Substrate 131 Active surface 21 Adhesive dry film 111 Upper surface 132 Pad 30 Wafer 112 Lower surface 140 Metal bond wire 31 Active surface 113 Through hole 150 The adhesive material of the soldering pad is connected to the soldering pad 211, 221, 231, 241, and a substrate is provided on the upper surface of the substrate to form at least one heat 212, 222, 232, 2 42 The solid mixture 213, 223 is heated to remove the solvent, so that the thermosetting mixture forms an adhesive dry film 233, 243 is completely dried by vacuum drying to remove the solvent, so that the thermosetting 15 201044472 mixture forms a solvent-free adhesive dry film 214, 224, 234, 244 Providing at least one wafer 215, 235 to press and heat the substrate and the wafer, curing the adhesive dry film and bonding the wafer and the substrate 225, 245 to pressurize the substrate and the wafer, and bonding the adhesive dry film to the wafer and the substrate 216 The 226, 236, 240 provides a plurality of metal wires, and the through pads are electrically connected to the pads and the substrate 2, 237 is stamped to form a sealant at the through holes 227, 247 of the substrate - Sealing material is applied to the through hole of the substrate; then the adhesive dry film is heated and cured, and the sealing material 218, 228, 238, 248 is implanted with the plurality of solder balls on the lower surface of the substrate 16