CN109003907B

CN109003907B - Packaging method

Info

Publication number: CN109003907B
Application number: CN201810883152.9A
Authority: CN
Inventors: 石虎; 刘孟彬
Original assignee: Ningbo Semiconductor International Corp
Current assignee: Ningbo Semiconductor International Corp
Priority date: 2018-08-06
Filing date: 2018-08-06
Publication date: 2021-10-19
Anticipated expiration: 2038-08-06
Also published as: CN109003907A; CN114050113A

Abstract

A method of packaging, comprising: providing a substrate, wherein a surface to be bonded of the substrate is a first surface to be bonded; providing a plurality of chips, wherein the surfaces to be bonded of the chips are second surfaces to be bonded; providing a thin film type packaging material; forming a bonding layer on at least one surface of the first surface to be bonded and the second surface to be bonded; after a bonding layer is formed on at least one of the first surface to be bonded and the second surface to be bonded, enabling the first surface to be bonded and the second surface to be bonded to be oppositely arranged and placing the chip on the substrate; after the chips are arranged on the substrate, the substrate and the chips are bonded through the bonding layer by adopting a hot-pressing process, packaging materials are filled between the chips and the substrate and cover the chips, and the packaging materials after the hot-pressing process are used as packaging layers. Through the thin film type packaging material, the probability of chip drifting in the hot pressing process is reduced, and the yield and the reliability of the packaging structure are improved; and the hot-pressing process synchronously realizes the bonding of the substrate and the chip, and improves the packaging efficiency.

Description

Packaging method

Technical Field

The invention relates to the field of semiconductor manufacturing, in particular to a packaging method.

Background

With the trend of very large scale integrated circuits, the feature size of the integrated circuits is continuously decreasing, and the requirements of people on the packaging technology of the integrated circuits are also increasing correspondingly. Among them, System In Package (SIP) is a System or subsystem that combines a plurality of active elements, passive elements, micro-electro-mechanical systems (MEMS), optical elements, etc. having different functions into one unit to form a System or subsystem that can provide multiple functions, allowing heterogeneous ICs to be integrated. Compared with a System on Chip (SoC), the System on Chip has the advantages of relatively simple integration of System-in-package, shorter design period and market period, lower cost, capability of realizing a more complex System, and relatively common packaging technology.

At present, in order to meet the objectives of lower cost, more reliability, faster performance and higher density of integrated circuit packaging, the advanced packaging method mainly adopts Wafer Level System in Package (WLPSiP) and Panel Level System In Package (PLSIP), and compared with the conventional System Level packaging, the Wafer Level System packaging and the Panel Level System packaging complete the packaging process on the Wafer (Wafer) or the Panel, so that the advanced packaging method has the advantages of greatly reducing the area of the packaging structure, reducing the manufacturing cost, optimizing the electrical performance, manufacturing the batch, and the like, and can obviously reduce the workload and the requirements of the equipment.

However, the yield and reliability of the package structure formed by the current packaging method still need to be improved.

Disclosure of Invention

The invention aims to provide a packaging method for improving the yield and the reliability of a packaging structure.

To solve the above problems, the present invention provides a packaging method, comprising: providing a substrate, wherein a surface to be bonded of the substrate is a first surface to be bonded; providing a plurality of chips, wherein the surfaces to be bonded of the chips are second surfaces to be bonded; providing a thin film type packaging material; forming a bonding layer on at least one of the first surface to be bonded and the second surface to be bonded; after a bonding layer is formed on at least one of the first surface to be bonded and the second surface to be bonded, the first surface to be bonded and the second surface to be bonded are oppositely arranged, and the chip is placed on the substrate; after the chips are arranged on the substrate, the substrate and the chips are bonded through the bonding layer by adopting a hot pressing process, the packaging material is filled between the chips and the substrate and covers the chips, and the packaging material after the hot pressing process is used as the packaging layer.

Optionally, after the chip is placed on the substrate, before the thermal compression process, the method further includes: and carrying out pre-bonding treatment on the substrate and the chip.

Optionally, the pre-bonding treatment process is thermocompression bonding or pressure bonding.

Optionally, the process of the pre-bonding treatment is thermocompression bonding, and the pre-bonding treatment includes: at least one of the chip and the substrate is subjected to a first pressure treatment, and the chip and the substrate are subjected to a first heat treatment while the first pressure treatment is performed.

Optionally, in the step of the first pressurization treatment, the first pressurization treatment is performed on a surface of the chip opposite to the second surface to be bonded; in the first heat treatment step, the first heat treatment is performed on the surface of the chip, which faces away from the second surface to be bonded, and the back surface of the substrate.

Optionally, the step of pre-bonding further includes: before the first pressurizing treatment and the first heating treatment, first vacuumizing treatment is carried out, so that the process pressure of the pre-bonding treatment reaches a preset pressure.

Optionally, the thermal compression process includes the steps of: placing the packaging material on the chips; after the packaging material is placed on the plurality of chips, second vacuumizing treatment and second heating treatment are carried out, so that the process pressure of the hot-pressing process reaches a preset pressure, and the process temperature of the hot-pressing process reaches a preset temperature; under the preset pressure and the preset temperature, carrying out second pressurization treatment on the substrate and the packaging material for a preset time, so that the packaging material is filled between the chips and the substrate and covers the chips, and the substrate and the chips are bonded; and performing second pressurization treatment under the preset pressure and the preset temperature, and performing thermosetting treatment on the packaging material under the preset temperature to form the packaging layer.

Optionally, in the step of forming the bonding layer, the bonding layer is formed on the first surface to be bonded.

Optionally, the hot pressing process is a hot pressing molding process or a hot pressing attachment process.

Optionally, in the step of performing the pre-bonding treatment on the substrate and the chip, the process time of the pre-bonding treatment is 1 second to 30 seconds, the pressure of the first pressurization treatment is 100 newtons to 400 newtons, and the process temperature of the first heating treatment is 150 degrees celsius to 250 degrees celsius.

Optionally, in the step of performing a pre-bonding process on the substrate and the chip, the preset pressure is 5 kpa to a standard atmospheric pressure.

Optionally, in the step of the thermal compression process, the preset pressure is 5 kpa to 15 kpa, the preset temperature is 120 ℃ to 180 ℃, the pressure of the second pressure treatment is 0.1 mpa to 10 mpa, the preset time is 30 seconds to 60 seconds, and the process time of the thermal curing treatment is 300 seconds to 600 seconds.

Optionally, in the step of providing a sheet-type or film-type encapsulating material, the thickness of the encapsulating material is 40 μm to 200 μm.

Optionally, the substrate is a device wafer, a carrier wafer, or a panel.

Optionally, in the step of providing a plurality of chips, a pad is formed in each chip, a chip surface exposed out of the pad is a chip front surface, and a surface opposite to the chip front surface is a chip back surface; the second surface to be bonded is the front surface or the back surface of the chip.

Compared with the prior art, the technical scheme of the invention has the following advantages:

after a Chip (Chip) is placed on the substrate, a thin film type packaging material is adopted, the substrate and the chips are bonded through the bonding layer through a hot pressing process, the packaging material is filled between the chips and the substrate and covers the chips, and the packaging material after the hot pressing process is used as a packaging layer; compared with the scheme that the bonding of the chip and the substrate is realized firstly and then the packaging layer is formed by adopting a Molding (Molding) process, the transverse impact force borne by the chip can be reduced by carrying out the hot-pressing process on the film type packaging material, so that the probability of the chip drifting in the hot-pressing process is favorably reduced, and the yield and the reliability of the packaging structure are improved; and the hot-pressing process synchronously realizes the bonding of the substrate and the chip, and correspondingly shortens the processing period of the packaging process while ensuring higher bonding strength between the substrate and the chip, thereby improving the packaging efficiency.

In an alternative, after the chip is placed on the substrate and before the thermocompression bonding process, the method further includes: the substrate and the chip are subjected to pre-bonding treatment, and a certain bonding strength can be achieved between the substrate and the chip before the hot-pressing process is carried out through the pre-bonding treatment, so that in the hot-pressing process, the probability of chip drifting is further reduced, the bonding strength of the substrate and the chip after the hot-pressing process is improved, the process time of the hot-pressing process is reduced, the yield and the reliability of a packaging structure are further improved, and the packaging efficiency is improved.

Drawings

Fig. 1 to 8 are schematic structural diagrams corresponding to steps in an embodiment of the packaging method of the present invention.

Detailed Description

As can be seen from the background art, the yield and reliability of the package structure formed by the current packaging method are still to be improved. The reason why the yield and reliability of the analysis package structure need to be improved is that:

in the current packaging process, compared with the bonding process, the bonding process has better adhesion and chemical stability, so the bonding process is gradually becoming the main means for realizing the wafer level system packaging and the panel level system packaging.

However, the wafer level system package or the panel level system package is to bond the chips to the wafer or other substrates one by one, and since the number of the chips is large, in order to shorten the processing period of the packaging process, the bonding time is required to be short, and the short bonding time correspondingly reduces the bonding strength between the chips and the wafer or other substrates; when a molding process is subsequently adopted to form a packaging layer, the packaging material generates a transverse impact force on the chip in the flowing process, and the chip is easy to drift due to the low bonding strength between the chip and the wafer or other substrates, i.e., the chip is easy to deviate from a preset position on the wafer or other substrates, so that adverse effects are generated on subsequent processes, and the yield and reliability of the packaging structure are reduced.

In order to solve the technical problem, the present invention provides a packaging method, including: providing a substrate, wherein a surface to be bonded of the substrate is a first surface to be bonded; providing a plurality of chips, wherein the surfaces to be bonded of the chips are second surfaces to be bonded; providing a thin film type packaging material; forming a bonding layer on at least one of the first surface to be bonded and the second surface to be bonded; after a bonding layer is formed on at least one of the first surface to be bonded and the second surface to be bonded, the first surface to be bonded and the second surface to be bonded are oppositely arranged, and the chip is placed on the substrate; after the chips are arranged on the substrate, the substrate and the chips are bonded through the bonding layer by adopting a hot pressing process, the packaging material is filled between the chips and the substrate and covers the chips, and the packaging material after the hot pressing process is used as the packaging layer.

After the chips are arranged on the substrate, the substrate and the chips are bonded through the bonding layer by adopting a thin film type packaging material and a hot pressing process, the packaging material is filled between the chips and the substrate and covers the chips, and the packaging material after the hot pressing process is used as the packaging layer; compared with the scheme that the bonding of the chip and the substrate is realized firstly and then the packaging layer is formed by adopting the molding process, the transverse impact force borne by the chip can be reduced by carrying out the hot-pressing process on the thin-film packaging material, so that the probability of the chip drifting in the hot-pressing process is favorably reduced, and the yield and the reliability of the packaging structure are improved; and the hot-pressing process synchronously realizes the bonding of the substrate and the chip, and correspondingly shortens the processing period of the packaging process while ensuring higher bonding strength between the substrate and the chip, thereby improving the packaging efficiency.

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.

Referring to fig. 1, a substrate 100 is provided, and a surface to be bonded of the substrate 100 is a first surface to be bonded 101.

The packaging method is used for realizing wafer level system packaging or panel level system packaging.

Specifically, when the packaging method is used to realize Wafer level system packaging, the substrate 100 is a device Wafer (CMOS Wafer) or a Carrier Wafer (Carrier Wafer). The carrier wafer may be a semiconductor substrate (e.g., a silicon substrate), an organic glass wafer, an inorganic glass wafer, a resin wafer, a semiconductor material wafer, an oxide crystal wafer, a ceramic wafer, a metal wafer, an organic plastic wafer, an inorganic oxide wafer, or a ceramic material wafer.

When the packaging method is used for realizing Panel-level system packaging, the substrate is a Panel (Panel). The panel is square, rectangular or any other required shape, the size of the panel is usually larger, and more chips can be packaged on one panel, so that the packaging cost is reduced, and the economic benefit of scale is achieved. Specifically, the panel may be a Printed Wire Board (PWB), a Printed Circuit Board (PCB), a double-layer Printed Board, a multi-layer Printed Board, a flexible Circuit Board, or other types.

In this embodiment, the packaging method is used to realize wafer level system packaging, and the substrate 100 is a carrier wafer according to actual process requirements.

Specifically, the substrate 100 is used for realizing temporary bonding with a chip to be packaged, and the substrate 100 is used for supporting the chip to be packaged bonded on the substrate 100 in a subsequent process, so that the probability of the chip to be packaged breaking, warping, breaking and other problems in the subsequent process is reduced, a process platform is provided for the subsequent process, and the operability of the subsequent process is improved. That is, after the substrate 100 and the chip to be packaged are bonded, the substrate 100 needs to be removed.

In other embodiments, according to actual process requirements, the substrate may also be used to achieve permanent bonding with a chip to be packaged, that is, the substrate is retained after the substrate and the chip to be packaged are subsequently bonded.

In this embodiment, any surface of the substrate 100 is the first surface to be bonded 101. Correspondingly, the surface opposite to the first surface to be bonded 101 is a substrate back surface 102.

It should be noted that, in other embodiments, when the substrate is a device wafer, the device wafer is a wafer on which device fabrication is completed, for example, devices such as an N-Metal-Oxide-Semiconductor (NMOS) device and a P-Metal-Oxide-Semiconductor (PMOS) device are formed on a substrate through deposition, etching, and the like, and structures such as a dielectric layer, a Metal interconnection structure, and a pad electrically connected to the Metal interconnection structure are formed on the devices. Correspondingly, the surface of the substrate, on which the pad is exposed, is the first surface to be bonded, and the surface opposite to the first surface to be bonded is the back surface of the substrate. The Pad is a lead Pad (Bond Pad), and the back surface of the substrate refers to the bottom surface of the substrate on the side far away from the lead Pad in the substrate.

Referring to fig. 2, a plurality of chips 200 are provided, and a surface to be bonded of the chips 200 is a second surface 201 to be bonded.

The chip 200 is used as a chip to be packaged in a packaging process, and the function types of the chips 200 are at least one.

In this embodiment, the number of the chips 200 is multiple, and the wafer level system package is used to combine a plurality of chips 200 with different functions into one package structure, so that the function types of the chips 200 are multiple. Specifically, the chip 200 may be a memory chip, a communication chip, a processing chip, a flash memory chip, or a logic chip. In other embodiments, the chip may also be other functional chips.

In other embodiments, the functional types of the plurality of chips may also be the same according to actual process requirements.

The chip 200 is fabricated using integrated circuit fabrication techniques, and thus the chip 200 generally includes devices such as NMOS devices and PMOS devices formed on a substrate, and further includes structures such as dielectric layers, metal interconnection structures, and bonding pads. Specifically, the pad is a lead pad.

In this embodiment, the surface of the chip 200 exposed out of the lead pad is a front surface (not labeled) of the chip, and the surface opposite to the front surface of the chip is a back surface (not labeled) of the chip. Wherein the chip back surface refers to a bottom surface of the substrate of the chip 200 on a side away from the lead pad.

In this embodiment, according to actual process requirements, the chip 200 is bonded to the substrate 100 in a manner that a front surface of the chip faces upward (facing) (as shown in fig. 1), so that the second surface 201 to be bonded is a back surface of the chip. In other embodiments, when the chip is bonded to the substrate with the front surface of the chip facing downward (face down), the second surface to be bonded is the front surface of the chip.

Note that, for convenience of illustration, only one chip 200 is illustrated in fig. 2.

In this embodiment, in order to realize the bonding between the substrate 100 and the chip 200, the packaging method further includes: a bonding film 120 (shown in fig. 3) is formed on at least one of the first surface to be bonded 101 (shown in fig. 1) and the second surface to be bonded 201 (shown in fig. 2).

After a subsequent bonding process, the substrate 100 and the chips 200 are physically connected through the bonding layer 120.

Compared with an adhesive layer, the bonding layer 120 has higher bonding strength, and has good properties of chemical resistance, acid and alkali resistance, high temperature resistance and the like, and after the bonding layer 120 is adopted, the requirement of a bonding process on shearing force is reduced, complete bonding of the substrate 100 and the chip 200 can be realized within a shorter process time, and the probability of drifting of the chip 200 on the substrate 100 is also lower.

In this embodiment, the main material of the bonding layer 120 is epoxy resin, and the content of the epoxy resin is 80% to 95% by mass. Wherein, the host material refers to the base material of the bonding layer 120, and is the main component of the bonding layer 120, and is used for determining the basic performance of the bonding layer 120.

In other embodiments, the host material of the bonding layer may also be novolac epoxy.

It should be noted that a photosensitizer may be added to the auxiliary material of the bonding layer 120, so as to make the bonding layer 120 have a lithographically-feasible property. Wherein, the auxiliary agent material refers to: the material other than the host material is an auxiliary material added to impart a certain property to the bonding layer 120.

The electrical connection is another important process of the packaging process, in order to implement the electrical connection of the packaging structure, after the subsequent bonding process, a process of patterning the bonding layer 120 is usually included, and by making the bonding layer 120 have a characteristic of being lithographically, the bonding layer 120 can be patterned in a manner of exposure and development subsequently, so that an additional etching process is avoided, which is not only beneficial to simplifying the process steps of patterning the bonding layer 120 and improving the packaging efficiency, but also can reduce the influence on the bonding strength between the bonding layer 120 and the chip 200 in a manner of exposure and development, and correspondingly reduce the probability of the bonding layer 120 falling off.

In other embodiments, the material of the bonding layer may not be added with a photosensitizer according to actual process requirements.

The thickness T1 (shown in fig. 3) of the bonding layer 120 should not be too small, nor too large. If the thickness T1 of the bonding layer 120 is too small, it is easy to cause the bonding layer 120 to be insufficient to achieve the bonding between the substrate 100 and the chips 200, i.e., it is easy to reduce the bonding strength between the substrate 100 and the chips 200; if the thickness T1 of the bonding layer 120 is too large, the volume of the formed package structure is too large, and the material is wasted. For this reason, in the present embodiment, after the bonding layer 120 is formed, the thickness T1 of the bonding layer 120 is 20 μm to 100 μm.

In this embodiment, an attaching process (i.e., a plating process) is adopted to form the bonding layer 120 on at least one of the first surface to be bonded 101 and the second surface to be bonded 201.

Referring to fig. 3, in this embodiment, in order to reduce the difficulty of the process for forming the bonding layer 120, simplify the process steps for forming the bonding layer 120, and improve the packaging efficiency, the bonding layer 120 is formed on the first surface 101 to be bonded of the substrate 100.

Moreover, by forming the bonding layer 120 on the first surface 101 to be bonded of the substrate 100, it is also convenient to subsequently place the chips 200 on the substrate 100, which is beneficial to improving the process operability.

In other embodiments, the bonding layer may be further formed on the second surfaces to be bonded of the chips. Since the chips are obtained by cutting a plurality of wafers with different functions, in order to facilitate formation of the bonding layer, the step of forming on the second surfaces to be bonded of the chips includes: forming the bonding layer on a plurality of wafers integrated with the chips; and after the bonding layer is formed, cutting the plurality of wafers to obtain a plurality of chips with the bonding layers.

With continued reference to fig. 3, in the present embodiment, the bonding layer 120 and the substrate 100 are bonded by the adhesive layer 110 according to actual process requirements.

The adhesive layer 110 serves as a release layer for temporary bonding (temporary bonding) of the substrate 100 and the bonding layer 120.

After a package layer is formed on the substrate 100, the substrate 100 needs to be removed, and the bonding layer 120 and the substrate 100 are bonded by the adhesive layer 110, so that the substrate 100 and the bonding layer 120 can be separated conveniently.

Therefore, the adhesive layer 110 has a smooth surface, and the adhesive layer 110 has a certain bonding force with the substrate 100 and the bonding layer 120, thereby reducing the probability of the substrate 100 and the bonding layer 120 moving or separating in the subsequent process.

In this embodiment, the adhesive layer 110 is a Die Attach Film (DAF). In other embodiments, the adhesive layer may also be a Dry Film (Dry Film), a UV glue, or a thermosetting glue.

For this reason, in the present embodiment, in order to improve the process operability, the adhesive layer 110 is formed on the first surface to be bonded 101; after the adhesive layer 110 is formed on the first surface 101 to be bonded, the bonding layer 120 is formed on the adhesive layer 110.

In other embodiments, when the substrate is used for permanently bonding with the chips, the adhesive layer may not be used, that is, the first surface to be bonded is in contact with the bonding layer.

Referring to fig. 4, after the bonding layer 120 is formed, the first surface to be bonded 101 and the second surface to be bonded 201 are disposed opposite to each other, and the chips 200 are disposed on the substrate 100.

The first surface to be bonded 101 and the second surface to be bonded 201 are arranged oppositely, and the chips 200 are placed on the substrate 100, so that a process basis is provided for subsequently achieving bonding of the substrate 100 and the chips 200.

In this embodiment, the chips 200 are placed on the substrate 100 by adsorption.

Specifically, the step of arranging the first surface to be bonded 101 and the second surface to be bonded 201 oppositely and placing the chips 200 on the substrate 100 includes: providing a bonding apparatus (not shown), wherein the bonding apparatus comprises a first heating plate 310 and a thermal compression head 320, and the first heating plate 310 and the thermal compression head 320 are arranged in a cavity of the bonding apparatus; placing the substrate 100 on the first heated plate 310; after the substrate 100 is placed on the first heating plate 310, the surface of the chip 200 opposite to the second surface 201 to be bonded is adsorbed by the hot press head 320; after the surface of the chip 200, which faces away from the second surface 201 to be bonded, is adsorbed by using the hot pressing head 320, the chip 200 is placed at a preset position on the substrate 100 by using the hot pressing head 320.

It should be noted that the number of the thermal pressing heads 320 of the bonding apparatus is one, so that the thermal pressing heads 320 place the chips 200 on the substrate 100 one by one.

With continued reference to fig. 4, in this embodiment, after the chip 200 is disposed on the substrate 100, the method further includes: the substrate 100 and the chip 200 are subjected to a pre-bonding process.

The substrate 100 and the chip 200 are subjected to pre-bonding treatment, so that a certain bonding strength is provided between the substrate 100 and the bonding layer 120, the probability of drifting of the chip 200 in subsequent processes is correspondingly reduced, the process time of the subsequent processes is favorably reduced, the yield and the reliability of a subsequently formed packaging structure are favorably improved, and the packaging efficiency is favorably improved.

The process of the pre-bonding treatment can be thermal compression bonding or pressure bonding. Specifically, the thermocompression bonding includes a pressure treatment and a heat treatment, and is suitable for a bonding material that exhibits a certain adhesive force under a heating condition, such as: the bonding material is a dry film which can be photoetched; the pressure bonding includes only a pressure treatment, and is suitable for a bonding material having a certain adhesive force without heating, such as: the bonding material is a chip bonding adhesive film or a dry film with adhesive force on the surface under a non-heating condition.

In this embodiment, in order to improve the adhesion of the bonding layer 120 in the process of the pre-bonding treatment and the efficiency of the pre-bonding treatment, and improve the bonding strength of the substrate 100 and the bonding layer 120 after the pre-bonding treatment, the process of the pre-bonding treatment is thermocompression bonding.

Specifically, the step of the pre-bonding process includes: at least one of the chip 200 and the substrate 100 is subjected to a first pressure treatment, and the chip 200 and the substrate 100 are subjected to a first heat treatment simultaneously with the first pressure treatment.

In this embodiment, in order to improve the process operability, reduce the process difficulty of the pre-bonding treatment, and improve the precision of the pressing region, the first pressing treatment (as shown by an arrow in fig. 4) is performed on the surface of the chip 200 facing away from the second surface 201 to be bonded, and the first heating treatment is performed on the surface of the chip 200 facing away from the second surface 201 to be bonded and the back surface 102 of the substrate while performing the first pressing treatment.

During the first heating process, the bonding layer 120 may be softened, so that the bonding layer 120 has an adhesive force at a contact surface between the second surface to be bonded 201 and the bonding layer 120, so that the chip 200 and the bonding layer 120 are primarily bonded by the first pressing process.

In the step of performing the pre-bonding treatment on the substrate 100 and the chip 200, the process temperature of the first heating treatment is not too low or too high. If the process temperature of the first heating treatment is too low, the softening point temperature of the bonding layer 120 is difficult to reach, and the effect of the preliminary bonding between the chip 200 and the bonding layer 120 is relatively poor, or the process time of the preliminary bonding treatment needs to be prolonged in order to ensure the effect of the preliminary bonding between the chip 200 and the bonding layer 120, which correspondingly causes the reduction of the packaging efficiency; if the process temperature of the first heat treatment is too high, the bonding layer 120 is easily melted and decomposed, and the yield and reliability of the package structure may be reduced. For this reason, in this embodiment, in the step of performing the pre-bonding process on the substrate 100 and the chip 200, the process temperature of the first heating process is 150 to 250 ℃.

In the step of performing the pre-bonding process on the substrate 100 and the chip 200, the pressure of the first pressurization process should not be too small or too large. If the pressure of the first pressurization process is too small, the effect of achieving the preliminary bonding between the chip 200 and the bonding layer 120 is also deteriorated; if the pressure of the first pressurization process is too large, the chip 200 is easily broken, which may also cause a reduction in yield and reliability of the package structure, and may also easily shorten the service life of the bonding apparatus. For this reason, in this embodiment, in the step of performing the pre-bonding process on the substrate 100 and the chip 200, the pressure of the first pressurization process is 100 newtons to 400 newtons.

In order to improve the packaging efficiency, in the step of performing the pre-bonding treatment on the substrate 100 and the chip 200, the surface of the chip 200, which faces away from the second surface 201 to be bonded, is rapidly pressurized, so that the process time of the pre-bonding treatment is shortened as much as possible while the chip 200 and the bonding layer 120 achieve a better preliminary bonding effect, and therefore, the process time of the pre-bonding treatment is not too long, otherwise, the waste of the process time is easily caused, and the packaging efficiency is reduced; however, the process time of the pre-bonding treatment is not short enough, and if the process time of the pre-bonding treatment is short enough, the effect of the chip 200 and the bonding layer 120 in achieving the preliminary bonding is relatively poor. For this reason, in this embodiment, in the step of performing the pre-bonding treatment on the substrate 100 and the chip 200, the process time of the pre-bonding treatment is 1 second to 30 seconds.

In this embodiment, in the step of performing the pre-bonding treatment on the substrate 100 and the chip 200, the process temperature of the first heating treatment, the pressure of the first pressurization treatment, and the process time of the pre-bonding treatment should be reasonably matched, so that the chip 200 and the bonding layer 120 can be well bonded initially, and the packaging efficiency is improved.

Specifically, in the step of performing the pre-bonding treatment on the substrate 100 and the chip 200, the hot press head 320 is used to perform the first pressurization treatment on the surface of the chip 200 opposite to the second surface 201 to be bonded, the hot press head 320 is used to perform the first heating treatment on the surface of the chip 200 opposite to the second surface 201 to be bonded, and the first heating plate 310 is used to perform the first heating treatment on the back surface 102 of the substrate. The process temperature of the first heat treatment is the temperature of the thermal head 320 and the first heating plate 310.

Because the plurality of chips 200 are placed on the substrate 100 one by the hot-pressing head 320, after one chip 200 is placed at a preset position on the substrate 100 by the hot-pressing head 320, the chip 200 can be subjected to the pre-bonding treatment, the process is simple and convenient, and the packaging efficiency is improved.

In this embodiment, the step of pre-bonding further includes: before the first pressurizing treatment and the first heating treatment, first vacuumizing treatment is carried out, so that the process pressure of the pre-bonding treatment reaches a preset pressure.

Through the first vacuum-pumping treatment, air between the chip 200 and the bonding layer 120 is favorably exhausted, and the probability of generating bubbles between the chip 200 and the bonding layer 120 is reduced, so that after the pre-bonding treatment, the second surface 201 to be bonded can be tightly attached to the bonding layer 120, and the effect of realizing primary bonding between the chip 200 and the bonding layer 120 is favorably improved.

Specifically, when the first heating plate 310 and the thermal head 320 start to increase in temperature, the chamber of the bonding apparatus is simultaneously evacuated until the chamber pressure of the bonding apparatus reaches a preset pressure.

In the step of performing the pre-bonding processing on the substrate 100 and the chip 200, the smaller the preset pressure, the higher the vacuum degree in the chamber, and the better the bonding effect between the second surface 201 to be bonded and the bonding layer 120 is; however, if the preset pressure is too small, the process cost and the process time of the vacuuming process are increased accordingly, thereby increasing the packaging cost and reducing the packaging efficiency. For this reason, in the present embodiment, in the step of performing the pre-bonding process on the substrate 100 and the chip 200, the preset pressure is greater than or equal to 5 kpa and less than 1 atm.

It should be noted that, in other embodiments, depending on actual process conditions, the chamber of the bonding apparatus may not be evacuated, that is, the pre-bonding process is performed under normal pressure (i.e., 1 atm). For example: when the second surface to be bonded is the back surface of the chip, the back surface of the chip refers to the bottom surface of the substrate on the side, away from the lead bonding pad, of the chip, and compared with the front surface of the chip, the flatness of the back surface of the chip is higher, so that the pre-bonding treatment is performed under normal pressure, and the chip and the bonding layer can also keep higher bonding degree.

Moreover, the pre-bonding treatment is carried out under normal pressure, which is correspondingly beneficial to reducing the process cost and the process time.

It should be further noted that, in other embodiments, when the substrate is used to implement permanent bonding with the plurality of chips, that is, when the first surface to be bonded of the substrate is in contact with the bonding layer, a certain bonding strength between the substrate and the bonding layer is also facilitated through the pre-bonding treatment, so as to further improve the bonding strength between the substrate and the chips.

Referring collectively to fig. 5-7, a thin film type encapsulant 255 (shown in fig. 5) is provided; after the chips 200 are placed on the substrate 100, a thermal compression process is used to bond the substrate 100 and the chips 200 through the bonding layer 120, and the packaging material 255 is filled between the chips 200 and the substrate 100 and covers the chips 200, where the packaging material 255 after the thermal compression process is used as a packaging layer 250 (as shown in fig. 7).

The thermal compression process is a process of pressurizing at a preset temperature, the packaging material 255 is softened by the thermal compression process, and the softened packaging material is embedded between adjacent chips 200 under a certain pressure condition, so as to be tightly attached to the chips 200 and the surfaces of the bonding layers 100 exposed from the chips 200. Moreover, under the action of the thermal compression process, the bonding layer 120 has an adhesive force at a contact surface of the second surface 201 to be bonded and the bonding layer 120, so that the substrate 100 and the chips 200 are completely bonded through the bonding layer 120.

Compared with the scheme of firstly realizing bonding of the chip and the substrate and then forming the packaging layer by adopting the molding process, the packaging material 255 is of a thin film type, so that the transverse impact force applied to the chip 200 in the hot-pressing process can be reduced, the probability of drifting of the chip 200 in the hot-pressing process is effectively reduced, and the yield and the reliability of the formed packaging structure are improved. Specifically, by using a film type encapsulation material, the lateral impact force to which the chip 200 is subjected during the thermal compression process is significantly reduced, as compared to using a powder or liquid encapsulation material.

Moreover, the thermal compression process synchronously realizes the bonding of the substrate 100 and the chip 200, and correspondingly shortens the processing period of the packaging process while ensuring higher bonding strength between the substrate 100 and the chip 200, thereby improving the packaging efficiency; therefore, the requirements on the yield and reliability of the packaging structure and the requirements on the packaging efficiency can be well balanced through the hot pressing process.

In addition, through the hot-pressing process, the thickness of the packaging layer 250 is favorably reduced, so that the size of the packaging structure is smaller, and the requirements of miniaturization and microminiaturization of the packaging structure are favorably met while the yield and the reliability of the packaging structure are ensured.

In this embodiment, the thermal compression process is a compression molding process or a thermal compression attachment process.

Specifically, the thermal compression process comprises the following steps: placing the encapsulation material 255 on the number of chips 200; after the packaging material 255 is placed on the plurality of chips 200, performing a second vacuum pumping process and a second heating process to make the process pressure of the thermal compression bonding process reach a preset pressure and make the process temperature of the thermal compression bonding process reach a preset temperature; performing second pressurization treatment on the substrate 100 and the packaging material 255 for a preset time under the preset pressure and the preset temperature, so that the packaging material 255 is filled between the chips 200 and the substrate 100 and covers the chips 200, and the substrate 100 and the chips 200 are bonded; after the second pressurization treatment is performed at the preset pressure and the preset temperature, the thermal curing treatment is performed on the encapsulating material 255 at the preset temperature, so as to form the encapsulating layer 250.

Specifically, the hot press bonding process is taken as an example of a hot press molding process. As shown in fig. 5, a hot press apparatus (not shown) is provided, in which a chamber (not shown) is provided with a second heating plate 330 and a third heating plate 340; placing the substrate 100 on the second heating plate 330; after the substrate 100 is placed on the second heating plate 330, the encapsulation material 255 is placed on the chips 200; after the encapsulation material 255 is placed on the chips 200, the third heating plate 340 is placed on the encapsulation material 255; after the third heating plate 340 is placed on the packaging material 255, the chamber of the hot pressing device is vacuumized to make the pressure of the chamber of the hot pressing device reach a preset pressure, and the second heating plate 330 and the third heating plate 340 are heated to a preset temperature; as shown in fig. 6, performing a second pressurization process (as indicated by arrows in fig. 6) on the substrate 100 and the encapsulating material 255 for a predetermined time through the second heating plate 330 and the third heating plate 340 at the predetermined pressure and temperature, so that the encapsulating material 255 is filled between the chips 200 and the substrate 100 and covers the chips 200, and the substrate 100 and the chips 200 are completely bonded; as shown in fig. 7, after the second pressing process is performed at the preset pressure and the preset temperature, the encapsulant 255 (shown in fig. 6) is thermally cured at the preset temperature to form the encapsulant layer 250.

In other embodiments, when the thermal compression process is a thermal compression attachment process, a thermal compression attachment device is used to perform the thermal compression process, the thermal compression attachment device correspondingly includes a roller shaft capable of being heated and pressurized and a platform capable of being heated and pressurized, and the packaging material 255 is wound around the roller shaft. The roller shaft can place the packaging material 255 on the chip 200, and synchronously realize the heating and pressurizing effects, that is, after the roller shaft places the packaging material 255 on the chip 200, the bonding of the substrate 100 and the chip 200 and the formation of the packaging layer 250 can be realized, and the process is simple.

The packaging layer 250 can perform the functions of insulation, sealing and moisture prevention, and can reduce the probability that the chip 200 is damaged, polluted or oxidized, thereby being beneficial to improving the yield and reliability of the formed packaging structure.

In this embodiment, the main material of the encapsulation layer 250 is epoxy resin. Epoxy resin has the advantages of low shrinkage, good adhesion, good corrosion resistance, excellent electrical properties, low cost and the like, and is widely used as a packaging material for electronic devices and integrated circuits. Specifically, the content of the epoxy resin is 20 to 40% by mass.

Correspondingly, in this embodiment, the main material of the encapsulating material 255 is epoxy resin.

The encapsulating material 255 whose main agent material is epoxy resin is a material layer that can be softened after reaching a softening point temperature, thereby preventing the encapsulating material 255 from being broken under the pressure condition of the thermal compression process.

In the step of providing the encapsulating material 255, the thickness T2 (shown in fig. 5) of the encapsulating material 255 should not be too small, and should not be too large. If the thickness T2 of the encapsulating material 255 is too small, after the thermal compression process, it is difficult for the formed encapsulating layer 250 to completely cover the chips 200 and the exposed surfaces of the bonding layers 120 of the chips 200; if the thickness T2 of the encapsulant 255 is too large, warpage is caused, and waste of material and increase in volume of the package structure are caused. For this reason, in the present embodiment, the thickness T2 of the encapsulant 255 is 40 μm to 200 μm.

The thickness T2 of the encapsulating material 255 is determined according to the thickness of the chip 200, so as to reduce the occurrence of side effects while ensuring the covering effect of the encapsulating layer 250.

Specifically, the thickness T2 of the encapsulant 255 is 40 μm to 50 μm, or 80 μm to 100 μm. The two thickness specifications of the packaging material 255 are common film layers that are pre-fabricated in the packaging process, so that the ready-made packaging material 255 is directly placed on the plurality of chips 200, thereby avoiding an additional process for forming the packaging material 255, facilitating simplification of the steps of the packaging process, and improving the packaging efficiency.

In this embodiment, after the third heating plate 340 is disposed on the packaging material 255, the chamber of the hot pressing apparatus is vacuumized, and the first heating plate 330 and the second heating plate 340 are heated, so that the pressure of the chamber of the hot pressing apparatus reaches a preset pressure, and the first heating plate 330 and the second heating plate 340 reach a preset temperature, thereby providing a process basis for the subsequent second pressurization treatment.

In the step of the hot pressing process, the preset temperature is not too low or too high. If the preset temperature is too low, the temperature of the softening point of the packaging material 255 is difficult to reach, that is, the packaging material 255 is difficult to reach a semi-cured state, and in the subsequent heat and pressure maintaining process, the packaging material 255 is difficult to cling to the plurality of chips 200 and the surfaces of the bonding layers 120 exposed from the chips 200, so that the performance of the packaging layer 250 is deteriorated; if the predetermined temperature is too high, the quality and performance of the encapsulating material 255 are reduced, the performance of the chip 200 is easily affected, and the package layer 250 is easily shrunk during subsequent cooling, which may reduce the yield and reliability of the formed package structure. For this reason, in this embodiment, in the step of the thermal compression process, the preset temperature is 120 to 180 degrees celsius.

In the step of the hot pressing process, the preset pressure is not too small or too large. The smaller the preset pressure is, the higher the vacuum degree of the chamber of the hot-pressing device is, increasing the vacuum degree is beneficial to discharging the residual air on the contact surface of the packaging material 255 and the chip 200 and the residual air on the contact surface of the packaging material 255 and the bonding layer 120, and reducing the bubbles on the contact surface, thereby reducing the probability of oxidation of the chip 200; however, if the preset pressure is too small, that is, the degree of vacuum is too high, the process cost and the process time are increased. For this reason, in the present embodiment, in the step of the thermal compression process, in order to ensure the process effect of the thermal compression process, the preset pressure is 5 kpa to 15 kpa.

In the step of the thermal compression process, the pressure of the second pressurization treatment is not too small and is not too large. The thermocompression apparatus applies a certain pressure to the first and

second heater plates

330 and 340, and transmits the pressure to the encapsulant 255 and the substrate 100, so that the second pressure treatment is performed on the substrate 100 and the encapsulant 255 through the second and

third heater plates

330 and 340, and therefore, the greater the pressure of the second pressure treatment is, the greater the pressure applied to the encapsulant 255 and the substrate 100 is, the better the effect of the encapsulant 255 filling between the chips 200 and the substrate 100 and covering the chips 200 is, and the better the bonding effect of the substrate 100 and the chips 200 is; however, if the pressure of the second pressure treatment is too high, the chip 200 is easily broken, which may cause a reduction in yield and reliability of the package structure, and may also easily shorten the service life of the thermocompression apparatus. For this reason, in the present embodiment, in the step of the thermocompression bonding process, the pressure of the second pressurization treatment is 0.1 mpa to 10 mpa.

Specifically, according to the actual performance of the hot-pressing device, when the hot-pressing process is a hot-pressing molding process, the pressure of the second pressurization treatment is 3 mpa to 10 mpa, and when the hot-pressing process is a hot-pressing attachment process, the pressure of the second pressurization treatment is 0.1 mpa to 3 mpa.

In the step of the hot pressing process, the preset time is not short enough or long enough. If the preset time is too short, the effect of the packaging material 255 filling between the chips 200 and the substrate 100 and covering the chips 200 is easily reduced, and the bonding effect of the substrate 100 and the chips 200 is also easily reduced; if the preset time is too long, waste of process time is easily caused, thereby causing a reduction in packaging efficiency. For this reason, in the present embodiment, in the step of the thermal compression process, the preset time is 30 seconds to 60 seconds.

In this embodiment, in the step of the thermal compression process, the preset temperature, the preset pressure, the pressure of the second pressurization treatment, and the time for performing the second pressurization treatment at the preset temperature and the preset pressure should be reasonably matched, so that the yield and the reliability of the formed package structure are ensured, and the package efficiency is improved.

And according to the selected process type of the hot-pressing process, the preset temperature, the preset pressure and the time for carrying out the second pressurization treatment at the preset temperature and the preset pressure are reasonably adjusted, so that the hot-pressing forming process and the hot-pressing attaching process are ensured to have similar or identical process effects.

After the second pressing process, the encapsulating material 255 is subjected to a heat curing process for providing the energy and time required for the encapsulating material 255 to achieve curing cross-linking. Specifically, in the process of the thermal curing treatment, the encapsulant 255 is kept warm in the preset temperature environment, the polymer resin in the encapsulant 255 is changed into a gel state and gradually hardens, and the polymer chains in the cured state cannot move due to mutual cross-linking and mutual binding, so that the thermal curing effect is achieved, and the encapsulant layer 250 with high hardness and high performance is formed.

Accordingly, in the step of the thermal compression process, the process time of the thermal curing process is not short, and is not long. If the process time of the thermal curing process is too short, the effect of the thermal curing process is correspondingly deteriorated, thereby causing degradation in quality and performance of the encapsulation layer 250; if the process time of the thermal curing process is excessively long, waste of the process time is easily caused, thereby causing a decrease in packaging efficiency. For this reason, in the present embodiment, in the step of the thermal compression process, the process time of the thermal curing process is 300 seconds to 600 seconds.

In this embodiment, after the thermal curing process, natural cooling is performed at normal pressure, so as to gradually reduce the internal stress (internal stress) of the package layer 250, and reduce the probability of the problems such as board bending and board warping.

It should be noted that, in other embodiments, when the substrate is used to implement permanent bonding with the plurality of chips, that is, when the first surface to be bonded of the substrate is in contact with the bonding layer, through the thermal compression process, it is also beneficial to implement complete bonding between the substrate and the bonding layer, and it is also beneficial to ensure yield and reliability of the formed package structure.

With reference to fig. 8, it should be further noted that, in this embodiment, since the substrate 100 is used to implement temporary bonding with the chips 200, and the substrate 100 is used to support the chips 200 during the packaging process, for the subsequent processes, after the forming of the package layer 250, the method further includes: the substrate 100 (shown in fig. 7) and the plurality of chips 200 are subjected to a De-bonding process.

Through the debonding process, the substrate 100 and the chips 200 are separated to remove the substrate 100 and the adhesive layer 110 (as shown in fig. 7).

In this embodiment, the substrate 100 and the bonding layer 120 are temporarily bonded by the adhesive layer 110, and accordingly, in the process of the debonding process, the substrate 100 and the adhesive layer 110 may be removed by a chemical method, a mechanical peeling, a grinding process, a thinning process, and the like. In other embodiments, the substrate 100 and the adhesive layer 110 may be removed in other manners.

Specifically, the adhesive layer 110 is a die bonding adhesive film, so the substrate 100 can be removed by tearing off the adhesive layer 110.

In this embodiment, the bonding layer 120 and the chips 200 have higher bonding strength, and the encapsulation layer 250 is tightly attached to the chips 200 and the surfaces of the bonding layer 120 exposed by the chips 200, so that the bonding layer 120 can still cover the chips 200 after the bonding process is performed, thereby providing a good process foundation for subsequent processes and facilitating improvement of yield and reliability of the formed encapsulation structure.

Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims

1. A method of packaging, comprising:

providing a substrate, wherein a surface to be bonded of the substrate is a first surface to be bonded;

providing a plurality of chips, wherein the surfaces to be bonded of the chips are second surfaces to be bonded;

providing a thin film type packaging material;

forming a bonding layer on at least one of the first surface to be bonded and the second surface to be bonded;

after a bonding layer is formed on at least one of the first surface to be bonded and the second surface to be bonded, the first surface to be bonded and the second surface to be bonded are oppositely arranged, and the chip is placed on the substrate;

after the chips are arranged on the substrate, the thin film type packaging material is arranged on the chips, the substrate and the chips are bonded through the bonding layer by adopting a hot-pressing process, the packaging material is filled among the chips and covers the side walls of the chips, the chips and the substrate cover the chips, and the packaging material after the hot-pressing process is used as a packaging layer;

after the chip is placed on the substrate, before the thermocompression bonding process, the method further includes: and carrying out pre-bonding treatment on the substrate and the chip.

2. The packaging method according to claim 1, wherein the pre-bonding process is thermocompression bonding or pressure bonding.

3. The packaging method according to claim 1, wherein the process of the pre-bonding treatment is thermocompression bonding, and the pre-bonding treatment comprises: at least one of the chip and the substrate is subjected to a first pressure treatment, and the chip and the substrate are subjected to a first heat treatment while the first pressure treatment is performed.

4. The packaging method according to claim 3, wherein in the first pressure treatment step, the first pressure treatment is performed on a surface of the chip facing away from the second surface to be bonded;

in the first heat treatment step, the first heat treatment is performed on the surface of the chip, which faces away from the second surface to be bonded, and the back surface of the substrate.

5. The packaging method of claim 3, wherein the step of pre-bonding further comprises: before the first pressurizing treatment and the first heating treatment, first vacuumizing treatment is carried out, so that the process pressure of the pre-bonding treatment reaches a preset pressure.

6. The packaging method of claim 1, wherein the step of the thermocompression bonding process comprises:

after the packaging material is placed on the plurality of chips, second vacuumizing treatment and second heating treatment are carried out, so that the process pressure of the hot-pressing process reaches a preset pressure, and the process temperature of the hot-pressing process reaches a preset temperature;

under the preset pressure and the preset temperature, carrying out second pressurization treatment on the substrate and the packaging material for a preset time, so that the packaging material is filled between the chips and the substrate and covers the chips, and the substrate and the chips are bonded;

and performing second pressurization treatment under the preset pressure and the preset temperature, and performing thermosetting treatment on the packaging material under the preset temperature to form the packaging layer.

7. The packaging method according to claim 1, wherein in the step of forming the bonding layer, the bonding layer is formed on the first surface to be bonded.

8. The packaging method according to claim 1, wherein the thermal compression process is a thermal compression molding process or a thermal compression attachment process.

9. The method for packaging according to claim 3, wherein in the step of performing the pre-bonding treatment on the substrate and the chip, the process time of the pre-bonding treatment is 1 second to 30 seconds, the pressure of the first pressurization treatment is 100 newtons to 400 newtons, and the process temperature of the first heating treatment is 150 degrees Celsius to 250 degrees Celsius.

10. The packaging method according to claim 5, wherein the predetermined pressure is 5 kPa to one standard atmosphere in the step of performing the pre-bonding process on the substrate and the chip.

11. The method according to claim 6, wherein in the step of the thermal compression process, the predetermined pressure is 5 to 15 kpa, the predetermined temperature is 120 to 180 degrees celsius, the pressure of the second pressing process is 0.1 to 10 mpa, the predetermined time is 30 to 60 seconds, and the process time of the thermal curing process is 300 to 600 seconds.

12. The encapsulation method according to claim 1, wherein the thickness of the encapsulation material is 40 μm to 200 μm.

13. The packaging method of claim 1, wherein the substrate is a device wafer, a carrier wafer, or a panel.

14. The packaging method according to claim 1, wherein in the step of providing a plurality of chips, the chips are formed with bonding pads, the chip surface exposed from the bonding pads is a chip front surface, and a surface opposite to the chip front surface is a chip back surface;

the second surface to be bonded is the front surface or the back surface of the chip.