201012333 九、發明說明： 【發明所屬之技術領域】 本發明涉及電路板技術領域，尤其涉及一種電路板以 及一種内埋式電路板封裝結構。 【先前技術】 於資訊、通訊及消費性電子產業中，電路板係所有電 子產品不可或缺之基本構成要件。隨著電子產品往小型 化、高速化方向發展，電路板亦從單面電路板往雙面電路 ®板、多層電路板方向發展。多層電路板由於具有較多佈線 面積與較高裝配密度而得到廣泛應用，請參見Takahashi，A. 等人於 1992 年發表於 IEEE Trans, on Components, Packaging, and Manufacturing Technology 之文獻 “High density multilayer printed circuit board for HITAC M~ 880” 。 佈線面積之增加、導電線路之細化使得電路板線路之 參線寬與線間距愈來愈小，線路之電阻愈來愈大’產生之熱 量亦愈來愈多。裝配密度之增加使得電路板上之封裝元件 如集成晶片、電阻之數量極大增加，從而使得封裝元件產 生之熱量亦極大增加。因此，先前技術之電路板以及電路 板封裝結構產生較多熱量’但並不能較快散熱’尤其係對 於内埋式之電路板封裝結構來說。 有鑑於此，提供一種具有較佳散熱性能之電路板以及 電路板封裝結構實屬必要。 6 201012333 【發明内容】 . 以下將以實施例說明一種電路板以及電路板封裝結 .構。 種電路板’其依次包括導電層、複合材料層以及絕 緣層該絕緣層具有—收容孔，該複合材料層包括聚合物 基，Γ及至^一设置於聚合物基體中之奈米碳管束，該奈 米碳b束之-端與導電層接觸，另一端從絕緣層之收容孔 露出。 一種電路板封裝結構，其包括封裝元件以及如上該電 路板，該封襄元件該封裝元件設置於絕緣層之收容孔，並 藉由奈米碳管束與導電層電連接。 與先前技術相較，本技術方案之電路板以及電路板封 裝結構中具有複合材料層，該複合材料層包括奈来碳管 束並且不米碳官束之一端與導電層接觸，另一端從絕緣 層之收谷孔露出，從而，複合材料層中之奈米碳管束可電 ❹導通導電層與埋設於絕緣層收容孔之封裝元件，並可將封 裝疋件之熱量較快地傳導至導電層以加快熱量之散發速 度。 【實施方式】 下面將結合附圖及複數實施例，對本技術方案提供之 電路^及電路板封裝結構作進—步之詳細說明。 請參閱圖1，本技術方案第一實施例提供之電路板1〇 依人包括導電層11、複合材料層12以及絕緣層。該導 電層11可由銅、鋁、金等具有較佳導電性能之材料製成。 201012333 導電層11具有導電圖形111，該導電圖形U1包括導電線 .路1111與複數導電接點1112。該導電線路lin用於傳輸 .訊號’該複數導電接點1112用於與封裝元件電連接以實現 訊號處理。該複合材料層12位於導電層u與絕緣層13之 間，具有第一表面12〇1與第二表面1202。該第一表面12〇1 與導電層11相接觸，該第二表面1202與第一表面1201平 行相對，且與絕緣層13相接觸。該絕緣層13由絕緣材料 製成’用於絕緣以及支撐導電層11與複合材料層12。絕緣 ®層13具有一用於收容埋設封裝元件之收容孔13〇。該收容 孔130之開設位置與複數導電接點1112之位置相對應，以 便於實現封裝元件與複數導電接點1112之電連接。 具體地，該複合材料層12包括聚合物基體121與設置 於聚合物基體121中之奈米碳管束122。該聚合物基體121 可為環氧（Epoxy)、聚醢亞胺（Polyimide，PI)、聚乙稀對苯 二曱酸乙二醇酯（Polyethylene Terephtalate，PET)、聚四氟乙 參嫦（Polytetrafluoroethylene，PTFE)、聚硫胺（Polyamide)、聚 甲基丙烤酸曱醋（Polymethylmethacrylate，PMMA)、聚碳酸 酯（Polycarbonate)或聚醯亞胺-聚乙烯-對苯二甲酯共聚物 (Polyamide polyethylene-terephthalate copolymer)等絕緣樹 脂。該奈米碳管束122包括一根奈米碳管或多根平行排列 之奈米碳管。奈米碳管束122之一端與導電層11電連接， 另一端從收容孔130露出，以便於與設置於收容孔130之 封裝元件接觸，從而實現導電層11與封裝元件之電連接。 奈米碳管束122之數量可為一個，亦可為複數個，可視封 8 201012333 裝元件之結構而定。 . 本實施例中，複合材料層12包括複數奈米碳管束 ，122，複數奈米碳管束122成陣列狀彼此具有一定間隔地嵌 置於聚合物基體121中。亦即，該複數奈米碳管束122彼 此絕緣地設置於導電層11與絕緣層13之間。 該複數奈米碳管束122彼此平行排列。每個奈米碳管 束122均包括多根平行排列之奈米碳管，該多根奈米碳管 之軸向即奈米碳管束122之延伸方向與第一表面1201之夾 ®角為80〜100度之間。亦即，每個奈米碳管束122均基本垂 直於第一表面1201與第二表面1202。 並且，每個奈米碳管束122之長度均略大於或基本等 於複合材料層12之厚度，從而可使得每個奈米碳管束122 之一端略突出於第一表面1201或恰好與第一表面1201相 齊平，另一端則略突出於第二表面1202或恰好與第二表面 1202相齊平。從而，奈米碳管束122可電連接導電層11與 φ埋設於絕緣層13之封裝元件，並可較快地將埋設於絕緣層 13之封裝元件之熱量傳導至第一表面1201與導電層11， 從而快速地將熱量散發至外界。 本技術方案第一實施例提供之電路板10可藉由如下步 驟製備： 第一步，請參閱圖2,提供基底100。基底100可為銅 層、鋁層或鎳層等金屬層。基底100之厚度可為2〜200微 米之間。 第二步，請參閱圖3,於基底100上形成催化劑層200。 .201012333 碳-:= 、#、鎳或其合金等可生長奈米 且，催化制具有預定圖案。該預定 圖案之形狀、分_不限，僅需使得生長出之複數奈 管束具有預定排列分佈即可。本實施例中，該⑽圖案為 陣列圖案’以使得生長出之複數奈米碳管束成陣列狀且彼 此，有-定間隔。該狀圖案之形成方法亦不限。例如， 可糟由先於基底100表面形成圖案化之光阻，再於基底 表面電鍍催化劑材料形成；亦可藉由先以電鍍、蒸鍍、濺 鑛或者氣相沈積方法於基底⑽上形絲狀催化劑層， 再選擇性地餘刻催化劑層而形成。 第二步，請參閱圖4,於催化劑層200上生長出複數奈 米碳管束122。 $ 由於催化劑層200具有預定之陣列圖案，因此，生長 出之複數奈米碳管束122亦按預定圖案呈陣列分佈，彼此 具有一疋間隔，以可填充聚合物基體，從而確保複數奈米 碳管束122之間絕緣。 該複數奈米碳管束122之生長方式不限。例如，以化 學氣相沈積法製備時，可將形成有催化劑層2〇〇之基底1〇〇 放入反應爐中，於700〜1000攝氏度下，通入乙炔、乙烯等 碳源氣，從而於催化劑層200上生長出複數奈米碳管束 122。複數奈米碳管束122之生長高度可藉由生長時間來控 制’一般生長高度為1〜30微米。 複數奈米碳管束122彼此平行排列，其延伸方向均基 本垂直於催化劑層200。每個奈米碳管束122均可包括一根 201012333 奈米碳管或多根平行排列之奈米碳管，亦即，每個奈米碳 .管束122中之奈米碳管之軸向與催化劑層200之夾角均大 致為80〜100度之間。 « 第四步，形成複合材料層12。 首先，請參閱圖5,以塗佈、擠壓或其他方式將聚合物 基體121施加於複數奈米碳管束122之間，使得聚合物基 體121充分填充複數奈米碳管束122之空隙，並使得聚合 物基體121與複數奈米碳管束122遠離催化劑層200之一 ❿端相齊平’從而形成平整之第一表面1201，使得聚合物基 體121起到連接並隔絕複數奈米碳管束122之作用，且並 不埋設複數奈米碳管束122遠離催化劑層200之一端。 另外，如果將聚合物基體121施加於複數奈米碳管束 122時聚合物基體121埋設複數奈米碳管束122遠離催化劑 層200之一端，使得複數奈米碳管束122整體均埋設於聚 合物基體121中時，可藉由機械切割、雷射燒蝕或其他方 參式去除部分聚合物基體121，以形成平整之第一表面1201， 並露出複數奈米碳管束122遠離催化劑層200之一端。 其次，請一併參閱圖5及圖6，去除基底100、催化劑 層200以及部分填充於催化劑層200之間之聚合物基體 121，以形成平整之第二表面1202。 去除基底100及催化劑層200之方法可為蝕刻法。例 如當基底100為銅、催化劑層200為三氧化二鐵時，可用 三氯化鐵溶液蝕刻去除基底100及催化劑層200。當然，採 用其他之基底材料及催化劑層材料時採用相應之蝕刻劑即 11 201012333 "uj" 〇 . 蝕刻去除基底100、催化劑層200後，還需要將部分填 充於催化劑層200之間之聚合物基體121去除，以使聚合 物基體121與複數奈米碳管束122靠近催化劑層200之一 端相齊平，從而形成平整之第二表面1202。即，形成複合 材料層12，如圖6所示。 去除聚合物基體121之方法不限，可為機械切割、雷 射燒蝕或模具沖裁等。 ® 第五步，將導電層11壓合於複合材料層12之第一表 面1201，將絕緣層13壓合於第二表面1202，從而獲得電 路板10，如圖1所示。 導電層11與絕緣層13可同時壓合於複合材料層12, 亦可先後壓合於複合材料層12。 將導電層11壓合於第一表面1201之前或之後，還包 括於導電層11形成導電圖形111之步驟。將導電層11形 φ成導電圖形111之步驟可藉由圖像轉移法以及蝕刻工序實 現。 將絕緣層13壓合於第二表面1202之前或之後，還可 藉由機械鑽孔、雷射燒孔或化學蝕孔等方式於絕緣層13之 預定位置形成收容孔130，以便於收容、埋設封裝元件。從 而，可使得奈米碳管束122之一端與導電層11電連接，另 一端從收容孔130露出，可方便地實現設置於收容孔130 之封裝元件與導電層11之電連接。 請參閱圖7,本技術方案還提供一種電路板封裝結構 12 201012333 1，其包括封裝元件14、封裝樹脂15以及如圖1所示之電 路板10。 該封裝元件14為用於實現特定處理功能之器件，其可 為積體電路晶片，亦可為電容電感元件，還可為記憶體或 其他器件。該封裝元件14具有複數導電端點141，該複數 導電端點141用於與其他電子元器件或電路板實現電連接。 本實施例中，封裝元件14藉由封裝樹脂15埋設於絕 緣層13之收容孔130内，其複數導電端點141之形狀、數 ®量均與導電接點1112之形狀、數量相對應。每個導電端點 141均藉由一個或複數奈米碳管束122實現與一個導電接 點1112間之電連接。 由於複數奈米碳管束122彼此絕緣，從而可使得複數 導電端點141與複數導電接點1112間之導通--對應，而 封裝元件14除複數導電端點141外之其餘部位均被保護層 覆蓋而絕緣，從而保證了封裝元件14與電路板10之間訊 參號之正確傳輸與處理。 當然，如果封裝元件14僅具有一導電端點141，則複 合材料層12僅需包括一奈米碳管束122即可實現導電端點 141與導電層11之電連接。 請參閱圖8,本技術方案第二實施例提供之電路板封裝 結構2與第一實施例提供之電路板封裝結構1大致相同， 其不同之處在於：該電路板封裝結構2還包括一導熱層 26。該導熱層26為具有較好導熱性能之材料薄層，其可為 金屬材料層，亦可為複合材料層，還可為其他材料層。本 13 201012333 實施例中，該導熱層26為與複合材料層22結構相同之薄 .層，設置於絕緣層23遠離複合材料層22之一側，且與絕 緣層23接觸。從而，封裝元件24散發之熱量可藉由導熱 層26中之複數奈米碳管束262快速散發至外界。 請參閱圖9,本技術方案第三實施例提供之電路板封裝 結構3與第二實施例提供之電路板封裝結構2大致相同， 其不同之處在於：該電路板封裝結構3還包括一金屬基板 37。該金屬基板37可由具有良好導熱性能之材料如銅、鋁 ®等製成，設置於導熱層36遠離絕緣層33之一側，且與導 熱層36接觸。從而，封裝元件34散發之熱量可藉由導熱 層36中之複數奈米碳管束362快速傳導至金屬基板37,並 由金屬基板37快速散發至外界。亦即，金屬基板37可進 一步加快封裝元件34之熱量散發速度。 請參閱圖10，本技術方案第四實施例提供之電路板封 裝結構4與第一實施例提供之電路板封裝結構1大致相 ❹同’其不同之處在於：該電路板封裝結構4還包括一雙面 電路板48。該雙面電路板48設置於絕緣層43遠離複合材 料層42之一側，且與絕緣層43接觸。雙面電路板48包括 第一導電線路層481、第二導電線路層482以及設置於第一 導電線路層481與第二導電線路層482間之樹脂層483。 該電路板封裝結構4還具有一導孔401，用於實現導電 層41與雙面電路板48之電導通。本實施例中，導孔401 為貫穿導電層41、複合材料層42、絕緣層43以及雙面電 路板48之導通孔。 14 .201012333 田^電路板封裝結構4除如本實施例所示包括-個 面電路板48外’亦可包括—單面電路板或者—多層電路 .反，樣可藉由複合材料層42而更有效散發封裝元件44 之…量^實現封裝元件44與導電層Ο之電導通。 ’、先A技術相較，本技術方案之電路板以及電路板封 、Ό構中具有複合材料層，該複合材料層包括奈米碳管 ’並士奈米碳f束之—端與導電層接觸，另—端從絕緣 參进之收合孔露出’從而，複合材料層中之奈米石炭管束可電 通導電層與埋②於絕緣層收容孔之封裝元件，並可將封 裝元件之熱量較快地傳導至導電層以加快熱量之散發速 度。 、、示所it本發明確已符合發明專利之要件，遂依法 提出專利申請。惟，以上所述者僅為本發明之較佳實施方 式，自不能以此限制本案之申請專利範圍。舉凡熟悉本案 技藝之人士援依本發明之精神所作之等效修飾或變化，皆 ❹應涵蓋於以下申請專利範圍内。 【圖式簡單說明】 圖1為本技術方案第一實施例提供之電路板之示意圖。 圖2為本技術方案第一實施例提供之基底之示意圖。 圖3為本技術方案第一實施例提供之於基底上形成償 化劑層之示意圖。 圖4為本技術方案第一實施例提供之於催化劑層上生 長複數奈米碳管束之示意圖。 圖5為本技術方案第一實施例提供之聚合物基體填充 15 201012333 複數奈米碳管之間隙之示意圖。 . 圖6為本技術方案第一實施例提供之去除基底與催化 劑層之示意圖。 圖7為本技術方案第一實施例提供之包括如圖1所示 之電路板之電路板封裝結構之示意圖。 圖8為本技術方案第二實施例提供之電路板封裝結構 之示意圖。 圖9為本技術方案第三實施例提供之電路板封裝結構 ⑩之示意圖。 圖10為本技術方案第四實施例提供之電路板封裝結構 之示意圖。 【主要元件符號說明】 電路板 10 導電層 11、41 複合材料層 12、22、42 絕緣層 13 、 23 、 33 、 43 導電圖形 111 導電線路 1111 導電接點 1112 第一表面 1201 第二表面 1202 收容孔 130 聚合物基體 121 奈米碳管束 122、262、362 16 201012333 基底 100 .催化劑層 200 封裝元件 14 、 24 、 34 ' 44 導電端點 141 封裝樹脂 15 導熱層 26 ' 36 金屬基板 37 雙面電路板 48 第一導電線路層 481 第二導電線路層 482 樹脂層 483 導孔 401[Technical Field] The present invention relates to the field of circuit boards, and in particular to a circuit board and a buried circuit board package structure. [Prior Art] In the information, communication and consumer electronics industries, circuit boards are essential components of all electronic products. With the development of electronic products in the direction of miniaturization and high speed, circuit boards have also evolved from single-sided boards to double-sided circuit boards and multilayer boards. Multilayer boards are widely used due to their large wiring area and high assembly density. See Takahashi, A. et al., 1992, IEEE Trans, on Components, Packaging, and Manufacturing Technology, "High Density Layered Print." Circuit board for HITAC M~ 880”. The increase in wiring area and the refinement of the conductive lines make the line width and line spacing of the circuit board lines smaller and smaller, and the resistance of the lines becomes larger and larger, and the heat generated is also increasing. The increase in assembly density has resulted in a significant increase in the number of package components such as integrated wafers and resistors on the board, resulting in a significant increase in the amount of heat generated by the package components. Thus, prior art circuit boards and circuit board package structures generate more heat 'but not faster heat', especially for embedded circuit board package structures. In view of this, it is necessary to provide a circuit board having a better heat dissipation performance and a circuit board package structure. 6 201012333 SUMMARY OF THE INVENTION A circuit board and a circuit board package structure will be described below by way of embodiments. a circuit board which in turn comprises a conductive layer, a composite material layer and an insulating layer. The insulating layer has a receiving hole, and the composite material layer comprises a polymer base and a carbon nanotube bundle disposed in the polymer matrix. The end of the nanocarbon b bundle is in contact with the conductive layer, and the other end is exposed from the receiving hole of the insulating layer. A circuit board package structure comprising a package component and a circuit board as described above, the package component being disposed in a receiving hole of the insulating layer and electrically connected to the conductive layer by a bundle of carbon nanotubes. Compared with the prior art, the circuit board and the circuit board package structure of the technical solution have a composite material layer, and the composite material layer comprises a carbon nanotube bundle and one end of the non-carbon carbon beam is in contact with the conductive layer, and the other end is from the insulating layer. The valley hole is exposed, so that the carbon nanotube bundle in the composite layer can electrically conduct the conductive layer and the package component buried in the insulating layer receiving hole, and can transfer the heat of the package component to the conductive layer faster. Speed up the dissipation of heat. [Embodiment] Hereinafter, the circuit and the circuit board package structure provided by the present technical solution will be described in detail with reference to the accompanying drawings and the embodiments. Referring to FIG. 1, a circuit board 1 according to a first embodiment of the present invention includes a conductive layer 11, a composite material layer 12, and an insulating layer. The conductive layer 11 may be made of a material having a preferable electrical conductivity such as copper, aluminum or gold. 201012333 The conductive layer 11 has a conductive pattern 111, and the conductive pattern U1 includes a conductive line, a road 1111 and a plurality of conductive contacts 1112. The conductive line lin is used to transmit the signal 'the plurality of conductive contacts 1112 for electrically connecting to the package component for signal processing. The composite material layer 12 is located between the conductive layer u and the insulating layer 13 and has a first surface 12〇1 and a second surface 1202. The first surface 12〇1 is in contact with the conductive layer 11, and the second surface 1202 is opposed to the first surface 1201 and is in contact with the insulating layer 13. The insulating layer 13 is made of an insulating material for insulating and supporting the conductive layer 11 and the composite material layer 12. The insulating layer 13 has a receiving hole 13 for receiving the embedded package component. The opening position of the receiving hole 130 corresponds to the position of the plurality of conductive contacts 1112 to facilitate electrical connection between the package component and the plurality of conductive contacts 1112. Specifically, the composite layer 12 includes a polymer matrix 121 and a bundle of carbon nanotubes 122 disposed in the polymer matrix 121. The polymer matrix 121 can be epoxy (Epoxy), polyimide (PI), polyethylene terephthalate (PET), polytetrafluoroethylene (Polytetrafluoroethylene). , PTFE), Polyamide, Polymethylmethacrylate (PMMA), Polycarbonate or Polyimide-Polyethylene-terephthalate Copolymer (Polyamide Poly -terephthalate copolymer) and other insulating resins. The carbon nanotube bundle 122 comprises a carbon nanotube or a plurality of carbon nanotubes arranged in parallel. One end of the carbon nanotube bundle 122 is electrically connected to the conductive layer 11 and the other end is exposed from the receiving hole 130 so as to be in contact with the package member disposed in the receiving hole 130, thereby electrically connecting the conductive layer 11 and the package member. The number of carbon nanotube bundles 122 may be one or plural, depending on the structure of the components. In this embodiment, the composite material layer 12 includes a plurality of carbon nanotube bundles 122, and the plurality of carbon nanotube bundles 122 are embedded in the polymer matrix 121 at an interval from each other in an array. That is, the plurality of carbon nanotube bundles 122 are insulated from each other between the conductive layer 11 and the insulating layer 13. The plurality of carbon nanotube bundles 122 are arranged in parallel with each other. Each of the carbon nanotube bundles 122 includes a plurality of carbon nanotubes arranged in parallel, and the axial direction of the plurality of carbon nanotubes, that is, the extending direction of the carbon nanotube bundle 122 and the first surface 1201 are 80 degrees. Between 100 degrees. That is, each of the carbon nanotube bundles 122 is substantially perpendicular to the first surface 1201 and the second surface 1202. Moreover, each of the carbon nanotube bundles 122 has a length that is slightly greater than or substantially equal to the thickness of the composite material layer 12 such that one end of each of the carbon nanotube bundles 122 can protrude slightly from the first surface 1201 or just to the first surface 1201. The other end is flush with the second surface 1202 or just flush with the second surface 1202. Therefore, the carbon nanotube bundle 122 can electrically connect the conductive layer 11 and the package component buried in the insulating layer 13 and can conduct heat of the package component buried in the insulating layer 13 to the first surface 1201 and the conductive layer 11 relatively quickly. , thereby quickly dissipating heat to the outside world. The circuit board 10 provided in the first embodiment of the present technical solution can be prepared by the following steps: First, referring to FIG. 2, a substrate 100 is provided. The substrate 100 may be a metal layer such as a copper layer, an aluminum layer or a nickel layer. The thickness of the substrate 100 can be between 2 and 200 microns. In the second step, referring to FIG. 3, a catalyst layer 200 is formed on the substrate 100. .201012333 Carbon-:=, #, nickel or its alloys can grow nanoparticles and have a predetermined pattern. The shape and the division of the predetermined pattern are not limited, and it is only necessary to make the plurality of bundles of the grown bundles have a predetermined arrangement distribution. In this embodiment, the (10) pattern is an array pattern ' such that the plurality of carbon nanotube bundles grown are arrayed and spaced apart from each other. The method of forming the pattern is not limited. For example, it may be formed by forming a patterned photoresist before the surface of the substrate 100, and then plating a catalyst material on the surface of the substrate; or by forming a wire on the substrate (10) by electroplating, evaporation, sputtering or vapor deposition. The catalyst layer is formed by selectively etching the catalyst layer. In the second step, referring to FIG. 4, a plurality of carbon nanotube bundles 122 are grown on the catalyst layer 200. Since the catalyst layer 200 has a predetermined array pattern, the grown plurality of carbon nanotube bundles 122 are also arranged in an array in a predetermined pattern with a spacing therebetween to fill the polymer matrix, thereby ensuring the plurality of carbon nanotube bundles 122. Insulation between. The growth mode of the plurality of carbon nanotube bundles 122 is not limited. For example, when preparing by chemical vapor deposition, the substrate 1 formed with the catalyst layer 2 can be placed in a reaction furnace, and a carbon source gas such as acetylene or ethylene is introduced at 700 to 1000 degrees Celsius. A plurality of carbon nanotube bundles 122 are grown on the catalyst layer 200. The growth height of the plurality of carbon nanotube bundles 122 can be controlled by the growth time 'the general growth height is 1 to 30 μm. The plurality of carbon nanotube bundles 122 are arranged in parallel with each other, and their extending directions are substantially perpendicular to the catalyst layer 200. Each of the carbon nanotube bundles 122 can include a 201012333 carbon nanotube or a plurality of parallel aligned carbon nanotubes, that is, the axial direction of the carbon nanotubes in each nanocarbon tube bundle 122 and the catalyst. The angles of the layers 200 are each approximately between 80 and 100 degrees. « The fourth step is to form a composite layer 12. First, referring to FIG. 5, the polymer matrix 121 is applied, sandwiched or otherwise applied between the plurality of carbon nanotube bundles 122 such that the polymer matrix 121 sufficiently fills the voids of the plurality of carbon nanotube bundles 122 and The polymer matrix 121 and the plurality of carbon nanotube bundles 122 are flush with one end of the catalyst layer 200 to form a flat first surface 1201, so that the polymer matrix 121 functions to connect and isolate the plurality of carbon nanotube bundles 122. And the plurality of carbon nanotube bundles 122 are not buried away from one end of the catalyst layer 200. In addition, if the polymer matrix 121 is applied to the plurality of carbon nanotube bundles 122, the polymer matrix 121 embeds the plurality of carbon nanotube bundles 122 away from one end of the catalyst layer 200, so that the plurality of carbon nanotube bundles 122 are entirely embedded in the polymer matrix 121. In the middle, a portion of the polymer matrix 121 may be removed by mechanical cutting, laser ablation or other ginseng to form a flat first surface 1201, and the plurality of carbon nanotube bundles 122 are exposed away from one end of the catalyst layer 200. Next, referring to Figures 5 and 6, the substrate 100, the catalyst layer 200, and the polymer matrix 121 partially filled between the catalyst layers 200 are removed to form a flat second surface 1202. The method of removing the substrate 100 and the catalyst layer 200 may be an etching method. For example, when the substrate 100 is copper and the catalyst layer 200 is ferric oxide, the substrate 100 and the catalyst layer 200 may be removed by etching with a ferric chloride solution. Of course, when other substrate materials and catalyst layer materials are used, the corresponding etchant is used, that is, after the substrate 100 and the catalyst layer 200 are removed by etching, the polymer partially filled between the catalyst layers 200 is also required. The substrate 121 is removed such that the polymer matrix 121 and the plurality of carbon nanotube bundles 122 are flush with one end of the catalyst layer 200 to form a flat second surface 1202. That is, the composite material layer 12 is formed as shown in Fig. 6. The method of removing the polymer matrix 121 is not limited and may be mechanical cutting, laser ablation or die blanking. In the fifth step, the conductive layer 11 is pressed against the first surface 1201 of the composite material layer 12, and the insulating layer 13 is pressed against the second surface 1202, thereby obtaining the circuit board 10, as shown in FIG. The conductive layer 11 and the insulating layer 13 may be simultaneously pressed to the composite material layer 12, or may be laminated to the composite material layer 12 in sequence. The step of forming the conductive pattern 111 on the conductive layer 11 is also included before or after the conductive layer 11 is pressed against the first surface 1201. The step of forming the conductive layer 11 into the conductive pattern 111 can be carried out by an image transfer method and an etching process. Before or after the insulating layer 13 is pressed against the second surface 1202, the receiving hole 130 may be formed at a predetermined position of the insulating layer 13 by mechanical drilling, laser hole burning or chemical etching, etc., so as to be accommodated and buried. Package components. Therefore, one end of the carbon nanotube bundle 122 can be electrically connected to the conductive layer 11 and the other end can be exposed from the receiving hole 130, and the electrical connection between the package member disposed in the receiving hole 130 and the conductive layer 11 can be conveniently realized. Referring to FIG. 7, the present technical solution further provides a circuit board package structure 12 201012333 1, which includes a package component 14, a package resin 15, and a circuit board 10 as shown in FIG. The package component 14 is a device for implementing a specific processing function, and may be an integrated circuit chip, a capacitive inductor component, or a memory or other device. The package component 14 has a plurality of conductive terminals 141 for electrical connection to other electronic components or boards. In this embodiment, the package component 14 is embedded in the receiving hole 130 of the insulating layer 13 by the encapsulating resin 15. The shape and the number of the plurality of conductive terminals 141 correspond to the shape and number of the conductive contacts 1112. Each of the conductive terminals 141 is electrically coupled to a conductive contact 1112 by one or a plurality of carbon nanotube bundles 122. Since the plurality of carbon nanotube bundles 122 are insulated from each other, the conduction between the plurality of conductive terminals 141 and the plurality of conductive contacts 1112 can be made, and the remaining portions of the package component 14 except the plurality of conductive terminals 141 are covered by the protective layer. The insulation ensures the correct transmission and processing of the signal between the package component 14 and the circuit board 10. Of course, if the package component 14 has only one conductive terminal 141, the composite material layer 12 only needs to include a carbon nanotube bundle 122 to achieve electrical connection between the conductive terminal 141 and the conductive layer 11. Referring to FIG. 8 , the circuit board package structure 2 provided by the second embodiment of the present invention is substantially the same as the circuit board package structure 1 provided by the first embodiment, except that the circuit board package structure 2 further includes a heat conduction. Layer 26. The heat conducting layer 26 is a thin layer of material having good thermal conductivity, which may be a metal material layer, a composite material layer, or other material layers. In the embodiment of the present invention, the heat conducting layer 26 is the same thin layer as the composite material layer 22. The layer is disposed on the side of the insulating layer 23 away from the composite material layer 22 and is in contact with the insulating layer 23. Thus, the heat dissipated by the package component 24 can be quickly dissipated to the outside by the plurality of carbon nanotube bundles 262 in the thermally conductive layer 26. Referring to FIG. 9 , the circuit board package structure 3 provided by the third embodiment of the present invention is substantially the same as the circuit board package structure 2 provided by the second embodiment, except that the circuit board package structure 3 further includes a metal. Substrate 37. The metal substrate 37 may be made of a material having good thermal conductivity such as copper, aluminum, or the like, and disposed on the side of the heat conducting layer 36 away from the insulating layer 33 and in contact with the heat conducting layer 36. Thereby, the heat radiated from the package member 34 can be quickly conducted to the metal substrate 37 by the plurality of carbon nanotube bundles 362 in the heat conduction layer 36, and is quickly dissipated to the outside by the metal substrate 37. That is, the metal substrate 37 can further accelerate the heat dissipation rate of the package member 34. Referring to FIG. 10, the circuit board package structure 4 provided by the fourth embodiment of the present invention is substantially the same as the circuit board package structure 1 provided by the first embodiment. The difference is that the circuit board package structure 4 further includes A double-sided circuit board 48. The double-sided circuit board 48 is disposed on the side of the insulating layer 43 away from the composite material layer 42 and is in contact with the insulating layer 43. The double-sided circuit board 48 includes a first conductive wiring layer 481, a second conductive wiring layer 482, and a resin layer 483 disposed between the first conductive wiring layer 481 and the second conductive wiring layer 482. The circuit board package structure 4 also has a via hole 401 for electrically conducting the conductive layer 41 and the double-sided circuit board 48. In the embodiment, the via hole 401 is a via hole penetrating through the conductive layer 41, the composite material layer 42, the insulating layer 43, and the double-sided circuit board 48. 14.201012333 Field circuit board package structure 4, except as shown in this embodiment, includes a single-sided circuit board 48, which may also include a single-sided circuit board or a multi-layer circuit. Instead, the composite material layer 42 may be used. The amount of package component 44 is more effectively dissipated to achieve electrical conduction between package component 44 and the conductive layer. Compared with the first A technology, the circuit board of the technical solution and the circuit board seal and the raft structure have a composite material layer, and the composite material layer comprises a carbon nanotube 'the side of the carbon nanotube bundle' and the conductive layer Contact, the other end is exposed from the recessed hole of the insulating part. Thus, the nano-carboniferous tube bundle in the composite layer can electrically connect the conductive layer and the package component buried in the insulating layer receiving hole, and can compare the heat of the package component Conducted quickly to the conductive layer to accelerate the rate of heat dissipation. The invention has indeed met the requirements of the invention patent and has filed a patent application in accordance with the law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a circuit board provided by a first embodiment of the present technical solution. FIG. 2 is a schematic diagram of a substrate provided by a first embodiment of the present technical solution. Fig. 3 is a schematic view showing the formation of a compensation layer on a substrate according to a first embodiment of the present technical solution. Fig. 4 is a schematic view showing the growth of a plurality of carbon nanotube bundles on a catalyst layer according to a first embodiment of the present invention. FIG. 5 is a schematic view showing the gap between the polymer base body and the first embodiment of the present invention. Figure 6 is a schematic view showing the removal of the substrate and the catalyst layer provided in the first embodiment of the present technical solution. FIG. 7 is a schematic diagram of a circuit board package structure including the circuit board shown in FIG. 1 according to the first embodiment of the present technical solution. FIG. 8 is a schematic diagram of a circuit board package structure according to a second embodiment of the present technology. FIG. 9 is a schematic diagram of a circuit board package structure 10 according to a third embodiment of the present technology. FIG. 10 is a schematic diagram of a circuit board package structure according to a fourth embodiment of the present technology. [Major component symbol description] Circuit board 10 Conductive layer 11, 41 Composite material layer 12, 22, 42 Insulation layer 13, 23, 33, 43 Conductive pattern 111 Conductive line 1111 Conductive contact 1112 First surface 1201 Second surface 1202 Containment Hole 130 polymer matrix 121 carbon nanotube bundle 122, 262, 362 16 201012333 substrate 100. catalyst layer 200 package component 14 , 24 , 34 ' 44 conductive terminal 141 encapsulation resin 15 thermal layer 26 ' 36 metal substrate 37 double-sided circuit Plate 48 first conductive circuit layer 481 second conductive circuit layer 482 resin layer 483 via hole 401
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