WO2014204828A2 - Thermal interface nanocomposite - Google Patents

Thermal interface nanocomposite Download PDF

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Publication number
WO2014204828A2
WO2014204828A2 PCT/US2014/042459 US2014042459W WO2014204828A2 WO 2014204828 A2 WO2014204828 A2 WO 2014204828A2 US 2014042459 W US2014042459 W US 2014042459W WO 2014204828 A2 WO2014204828 A2 WO 2014204828A2
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WO
WIPO (PCT)
Prior art keywords
tim
layer
cnts
heat
thermal interface
Prior art date
Application number
PCT/US2014/042459
Other languages
French (fr)
Other versions
WO2014204828A3 (en
Inventor
Nurit ATAR
Eitan GROSSMAN
Irina GUZMAN
Bruno Sfez
Original Assignee
Soreq Nuclear Research Center
Klein, David
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soreq Nuclear Research Center, Klein, David filed Critical Soreq Nuclear Research Center
Publication of WO2014204828A2 publication Critical patent/WO2014204828A2/en
Publication of WO2014204828A3 publication Critical patent/WO2014204828A3/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3731Ceramic materials or glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3732Diamonds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the invention relates to heat removal and dissipation from an electronic device using a thermal interface material, and more particularly to methods of manufacturing a carbon-nanotubes-based composite that is used as a thermal interface material.
  • the present invention relates to thermal interface materials (TIM) in integrated circuits packages. It is based on a thin layer of aligned carbon nanotubes (CNTs) array embedded in an organic solid matrix material. Without limitation, the TIM device has the following advantages:
  • the TIM device is designed in three formats allowing for: (a) heat conductivity with no electrical conductivity, (b) heat conductivity and electrical conductivity, and (c) heat conductivity and electrical conductivity only at specific regions.
  • Fig. 1 is a simplified block diagram of a thermal interface materials device, in accordance with a non-limiting embodiment of the present invention.
  • Fig. 2 is a simplified illustration of a thermal interface materials device, in accordance with another non-limiting embodiment of the present invention, in which the device has heat and electrical conductivity.
  • Fig. 3 is a simplified illustration of a thermal interface materials device, in accordance with another non-limiting embodiment of the present invention, in which the device has heat conductivity with no electrical conductivity.
  • Fig. 4 is a simplified illustration of a thermal interface materials device, in accordance with another non-limiting embodiment of the present invention, in which the device has heat conductivity and electrical conductivity only at specific regions.
  • Fig. 1 illustrates a thermal interface materials (TIM) device, in accordance with a non-limiting embodiment of the present invention.
  • the TIM device is attached to a heat removal device 100 which allows for heat transfer and spreading and can be either electrically conductive or electrically resistive.
  • materials for heat removal device 100 include, without limitation, silicon wafer, copper, indium, alumina, aluminum nitride or boron nitride.
  • a TIM layer 102 is located on the heat removal device 100 and attached to it by a metallization layer 101.
  • the TIM layer is composed of aligned CNTs embedded in an organic solid matrix.
  • This organic matrix is made of polymer material but preferably polyimide or solgel material due to their high value of Tg (glass transition temperature).
  • the aligned CNTs may be deposited by e.g., CVD (chemical vapor deposition)/PECVD (plasma enhanced chemical vapor deposition) on a substrate, such as Si, at a length of few micrometers to few centimeters with a density of 10 6 -
  • CVD chemical vapor deposition
  • PECVD plasma enhanced chemical vapor deposition
  • the CNTs array is infiltrated by organic solution, such as polyamic acid (polyimide) or solgel solution.
  • organic solution such as polyamic acid (polyimide) or solgel solution.
  • the resulting solgel with some content of organic molecules provides high Tg and can be designed to be porous, which might improve its flexibility; the solution is then cured by either thermal or radiation effect.
  • the TIM layer is then peeled off from the substrate to form a free standing nanocomposite TIM layer.
  • the CNT based composite can remain attached to the substrate 301. This can be applied where electrical resistivity is required and the substrate 301 includes electrically resistive coating 3011 (such as diamond or alumina).
  • the present invention is also designed to produce a TIM patterned to remove heat at specific locations of the electronic device.
  • the TIM layer 202 is positioned between a heat removal device 100 (e.g., copper block) and the base surface of the integrated circuit device 104 (e.g., diode).
  • a heat removal device 100 e.g., copper block
  • the base surface of the integrated circuit device 104 e.g., diode
  • a eutectic alloy (e.g. AuSn) can be deposited to form an adhesive heat transferable thin layer (101, 103) on top (103) or/and on bottom (101) of the TIM layer 102.
  • a main issue in using TIM in electronic devices is the possibility of crack formation due to different CTEs of the materials on both sides of the TIM interface.
  • the present invention solves this problem due to the flexibility of the CNTs allowing them to bend and prevent cracking.
  • the current TIM layer (CNTS and organic matrix) allows for a large temperature difference and thermal cycling of the interface with no crack formation.
  • the absent of cracks is also observed at the TIM layer itself and is contributed by the fact that the CNTs are not attached to the matrix by covalent bonds.
  • the top surface of the heat removal device 100 and the bottom surface of the electronic device 104 are characterized by some roughness. Due to their flexibility the CNTs are attached well to these surfaces regardless of the surface structure and roughness, thus assuring an ideal path for heat transfer.
  • the TIM layer can be produced in any size and shape and can easily be cut to specific dimensions.
  • a pre-mixed organic solution is cast on the aligned CNTs grown on a specific shaped substrate (e.g. square or rectangular substrate).
  • large TIM layers are prepared by a roll-to-roll process.
  • the CNTs are grown on a roll made of Si, the organic solution is added and cured, and eventually the film is peeled of the first roll and is collected on a second roll.
  • Fig. 2 illustrates a TIM device, in accordance with another non-limiting embodiment of the present invention, in which the device has heat conductivity and electrical conductivity.
  • the TIM device includes a metallization thin layer 201 which is deposited on the said organic matrix layer 202.
  • This layer is optionally filled with diamond or boron nitride nanoparticles.
  • This layer is filled with vertically aligned, parallel carbon nanotubes (CNT) with a high density.
  • CNT carbon nanotubes
  • the CNTs protrude into the next layer 203, which is a metallization layer essentially covering the CNTs.
  • the metallization layer 203 can be AuSn, Au, Indium, Sn or any metallic material used for contact.
  • the device that is attached to layer 203 is shorted (because of the AuSn).
  • this can be modified by simply patterning the metallization layer using standard lithographic or screen printing techniques.
  • Layers 201 and 203 can be patterned for isolating different regions in the device and for electrically addressing different regions of the device. In the latter case, the patterns in layers 201 and 203 should of course correspond.
  • FIG. 3 illustrates a TIM device, in accordance with another non-limiting embodiment of the present invention, in which the device has heat conductivity with no electrical conductivity.
  • the TIM device includes a substrate 301 (e.g., Si or copper), an electrical resistive coating 3011 of up to few hundred microns thick (such as, CVD grown diamond, A1N, Alumina, BN) grown on the substrate layer 301.
  • the CNT array is grown on the substrate 301 and infiltrated by the organic matrix to form the TIM layer 302.
  • Layer 302 is made of the said organic matrix optionally filled with diamond or boron nitride nanoparticles.
  • Layer 302 is filled with vertically aligned, parallel carbon nanotubes (CNT) with a high density. On the bottom side the CNTs ends are accessible (not covered by the matrix material and forming a flat surface with the matrix).
  • the CNTs protrude into the next layer 303, which is a metallization layer essentially covering the CNTs.
  • the metallization layer 204 can be AuSn, Au, Indium, Sn or any metallic material used for contact. It should be noted that the device that is attached to layer 303 is shorted (because of the metallization layer). However, this can be modified by simply patterning the metallization layer 303 using standard lithographic or screen printing techniques.
  • Fig. 4 illustrates a TIM device, in accordance with another non-limiting embodiment of the present invention, in which the device has heat conductivity and electrical conductivity only at specific regions.
  • the preceding described embodiments were essentially targeted to single electrodes. However in many cases there is a need for patterned electrodes. In this embodiment, the fact that the CNTs conduct electricity only in the nanotubes direction is exploited in order to provide for this functionality.
  • the TIM layer is covered both sides with corresponding patterns of metallization (such as AuSe, Indium, Au, Se or other), so that electricity is transported from one side of the device to the other one, without the need of vias or metallic wall deposition.
  • a checkerboard pattern can be deposited on both sides (correspondingly).
  • the checkerboard metallic square pattern is small enough so that many squares are included within a single user designed electrode pattern. It is however large enough so that a large number of CNT's are including within each metallic square.
  • each square pattern can be 5 microns by 5 microns metallic square, corresponding to around 50,000 CNT's per square, with 5 microns distance between the squares.
  • the user-designed electrode should be at least 10 microns wide in order to contain at least an entire metallic square pattern.
  • the TIM device includes a layer 401, which has a metallization pattern, for example, a checkerboard pattern.
  • a layer 402 is the matrix layer, optionally filled with diamond or boron nitride nanoparticles.
  • the matrix layer is filled with vertically aligned, parallel carbon nanotubes (CNT) with a high density.
  • CNT carbon nanotubes
  • the CNTs protrude into the next layer, which is a metallization layer 403.
  • Layer 403 essentially covers the CNTs and can be AuSn, Au, indium, Sn or any metallic material used for contact with semiconductor devices. Layer 403 preferably, but not necessarily, replicates the pattern 401.

Abstract

A thermal interface materials (TIM) device includes a heat removal and spreading device (100) made of a heat conducting material. A TIM layer (102, 202) is located on the heat removal and spreading device (100) and includes aligned carbon nanotubes (CNTs) embedded in an organic solid matrix. The TIM layer (102, 202) is positioned between the heat removal device (100) and a base surface of an integrated circuit device. The TIM layer (102, 202) may be adhesive.

Description

THERMAL INTERFACE NANOCOMPOSITE
FIELD OF INVENTION
The invention relates to heat removal and dissipation from an electronic device using a thermal interface material, and more particularly to methods of manufacturing a carbon-nanotubes-based composite that is used as a thermal interface material.
BACKGROUND OF THE INVENTION
It is necessary to cool electronic components for purposes of improved performance, reliability and lifetime of the components and circuitry.
SUMMARY
The present invention relates to thermal interface materials (TIM) in integrated circuits packages. It is based on a thin layer of aligned carbon nanotubes (CNTs) array embedded in an organic solid matrix material. Without limitation, the TIM device has the following advantages:
1. Spreads heat from local hot spots on the electronic device.
2. Prevents formation of cracks at the interface due to mismatch in coefficient of thermal expansion (CTE) between the electronic device and the heat removal material.
3. Specific embodiments of this invention prevent electrical current flow within the interface.
4. Provides enhanced thermal contact to the electronic device due to mechanical flexibility.
The TIM device is designed in three formats allowing for: (a) heat conductivity with no electrical conductivity, (b) heat conductivity and electrical conductivity, and (c) heat conductivity and electrical conductivity only at specific regions.
BRIEF DESCRIPTION OF THE DRAWINGS
The present invention will be understood and appreciated more fully from the following detailed description taken in conjunction with the appended drawings in which:
Fig. 1 is a simplified block diagram of a thermal interface materials device, in accordance with a non-limiting embodiment of the present invention. Fig. 2 is a simplified illustration of a thermal interface materials device, in accordance with another non-limiting embodiment of the present invention, in which the device has heat and electrical conductivity.
Fig. 3 is a simplified illustration of a thermal interface materials device, in accordance with another non-limiting embodiment of the present invention, in which the device has heat conductivity with no electrical conductivity.
Fig. 4 is a simplified illustration of a thermal interface materials device, in accordance with another non-limiting embodiment of the present invention, in which the device has heat conductivity and electrical conductivity only at specific regions.
DETAILED DESCRIPTION
Reference is now made to Fig. 1, which illustrates a thermal interface materials (TIM) device, in accordance with a non-limiting embodiment of the present invention. The TIM device is attached to a heat removal device 100 which allows for heat transfer and spreading and can be either electrically conductive or electrically resistive. Examples of materials for heat removal device 100 include, without limitation, silicon wafer, copper, indium, alumina, aluminum nitride or boron nitride.
A TIM layer 102 is located on the heat removal device 100 and attached to it by a metallization layer 101. The TIM layer is composed of aligned CNTs embedded in an organic solid matrix. This organic matrix is made of polymer material but preferably polyimide or solgel material due to their high value of Tg (glass transition temperature).
The aligned CNTs may be deposited by e.g., CVD (chemical vapor deposition)/PECVD (plasma enhanced chemical vapor deposition) on a substrate, such as Si, at a length of few micrometers to few centimeters with a density of 106-
10 14 cm -"2. The CNTs array is infiltrated by organic solution, such as polyamic acid (polyimide) or solgel solution. The resulting solgel with some content of organic molecules, provides high Tg and can be designed to be porous, which might improve its flexibility; the solution is then cured by either thermal or radiation effect.
The TIM layer is then peeled off from the substrate to form a free standing nanocomposite TIM layer. Alternatively, and in reference to Figure 3, the CNT based composite can remain attached to the substrate 301. This can be applied where electrical resistivity is required and the substrate 301 includes electrically resistive coating 3011 (such as diamond or alumina). The present invention is also designed to produce a TIM patterned to remove heat at specific locations of the electronic device.
The TIM layer 202 is positioned between a heat removal device 100 (e.g., copper block) and the base surface of the integrated circuit device 104 (e.g., diode). A major issue is the way of attaching the TIM layer to its adjacent surfaces while maintaining a good heat transfer through the interface.
A eutectic alloy (e.g. AuSn) can be deposited to form an adhesive heat transferable thin layer (101, 103) on top (103) or/and on bottom (101) of the TIM layer 102.
A main issue in using TIM in electronic devices is the possibility of crack formation due to different CTEs of the materials on both sides of the TIM interface. The present invention solves this problem due to the flexibility of the CNTs allowing them to bend and prevent cracking. The current TIM layer (CNTS and organic matrix) allows for a large temperature difference and thermal cycling of the interface with no crack formation. The absent of cracks is also observed at the TIM layer itself and is contributed by the fact that the CNTs are not attached to the matrix by covalent bonds.
A summary of the material and characteristics of the heat removal device and TIM device is presented in Table 1.
Table 1. Summary of the invention materials and characteristics
Figure imgf000005_0001
The top surface of the heat removal device 100 and the bottom surface of the electronic device 104 are characterized by some roughness. Due to their flexibility the CNTs are attached well to these surfaces regardless of the surface structure and roughness, thus assuring an ideal path for heat transfer.
The TIM layer can be produced in any size and shape and can easily be cut to specific dimensions.
In one embodiment, a pre-mixed organic solution is cast on the aligned CNTs grown on a specific shaped substrate (e.g. square or rectangular substrate).
In another embodiment, large TIM layers are prepared by a roll-to-roll process. In this process the CNTs are grown on a roll made of Si, the organic solution is added and cured, and eventually the film is peeled of the first roll and is collected on a second roll.
Reference is now made to Fig. 2, which illustrates a TIM device, in accordance with another non-limiting embodiment of the present invention, in which the device has heat conductivity and electrical conductivity.
The TIM device includes a metallization thin layer 201 which is deposited on the said organic matrix layer 202. This layer is optionally filled with diamond or boron nitride nanoparticles. This layer is filled with vertically aligned, parallel carbon nanotubes (CNT) with a high density. On the bottom side the CNTs ends are accessible (not covered by the organic matrix and forming a flat surface with the matrix material). On the top end, the CNTs protrude into the next layer 203, which is a metallization layer essentially covering the CNTs. The metallization layer 203 can be AuSn, Au, Indium, Sn or any metallic material used for contact.
It should be noted that the device that is attached to layer 203 is shorted (because of the AuSn). However, this can be modified by simply patterning the metallization layer using standard lithographic or screen printing techniques. Layers 201 and 203 can be patterned for isolating different regions in the device and for electrically addressing different regions of the device. In the latter case, the patterns in layers 201 and 203 should of course correspond.
Reference is now made to Fig. 3, which illustrates a TIM device, in accordance with another non-limiting embodiment of the present invention, in which the device has heat conductivity with no electrical conductivity.
The TIM device includes a substrate 301 (e.g., Si or copper), an electrical resistive coating 3011 of up to few hundred microns thick (such as, CVD grown diamond, A1N, Alumina, BN) grown on the substrate layer 301. The CNT array is grown on the substrate 301 and infiltrated by the organic matrix to form the TIM layer 302. Layer 302 is made of the said organic matrix optionally filled with diamond or boron nitride nanoparticles. Layer 302 is filled with vertically aligned, parallel carbon nanotubes (CNT) with a high density. On the bottom side the CNTs ends are accessible (not covered by the matrix material and forming a flat surface with the matrix).
On the top end, the CNTs protrude into the next layer 303, which is a metallization layer essentially covering the CNTs. The metallization layer 204 can be AuSn, Au, Indium, Sn or any metallic material used for contact. It should be noted that the device that is attached to layer 303 is shorted (because of the metallization layer). However, this can be modified by simply patterning the metallization layer 303 using standard lithographic or screen printing techniques.
Reference is now made to Fig. 4, which illustrates a TIM device, in accordance with another non-limiting embodiment of the present invention, in which the device has heat conductivity and electrical conductivity only at specific regions.
The preceding described embodiments were essentially targeted to single electrodes. However in many cases there is a need for patterned electrodes. In this embodiment, the fact that the CNTs conduct electricity only in the nanotubes direction is exploited in order to provide for this functionality. The TIM layer is covered both sides with corresponding patterns of metallization (such as AuSe, Indium, Au, Se or other), so that electricity is transported from one side of the device to the other one, without the need of vias or metallic wall deposition. For example a checkerboard pattern can be deposited on both sides (correspondingly). The checkerboard metallic square pattern is small enough so that many squares are included within a single user designed electrode pattern. It is however large enough so that a large number of CNT's are including within each metallic square. Heat is well transported through the TIM layer due to the inclusion of diamond, BN or other good conductive material particles within the matrix. The advantage of this design is that the user does not have to make custom patterning for patterned electrical transmission. As an example, each square pattern can be 5 microns by 5 microns metallic square, corresponding to around 50,000 CNT's per square, with 5 microns distance between the squares. The user-designed electrode should be at least 10 microns wide in order to contain at least an entire metallic square pattern.
The TIM device includes a layer 401, which has a metallization pattern, for example, a checkerboard pattern. A layer 402 is the matrix layer, optionally filled with diamond or boron nitride nanoparticles. The matrix layer is filled with vertically aligned, parallel carbon nanotubes (CNT) with a high density. On the bottom side the CNTs ends are accessible (not covered with the organic matrix material and forming a flat surface with the matrix). On the top end, the CNTs protrude into the next layer, which is a metallization layer 403. Layer 403 essentially covers the CNTs and can be AuSn, Au, indium, Sn or any metallic material used for contact with semiconductor devices. Layer 403 preferably, but not necessarily, replicates the pattern 401.

Claims

1. A thermal interface materials (TIM) device comprising:
a heat transfer and spreading device (100) made of a heat conducting material; a TIM layer (102, 202) located on said device and comprising aligned carbon nanotubes (CNTs) embedded in an organic solid matrix, said TIM layer (102, 202) positioned between the heat transfer and spreading device (100) and a base surface of an integrated circuit device (104), and wherein said TIM layer (102, 202) is adhesive.
2. The TIM device according to claim 1, wherein said CNTs have sufficient flexibility to bend and prevent cracking.
3. The TIM device according to claim 1, wherein a eutectic alloy is deposited to form an adhesive heat transferable layer on said TIM layer (102, 202).
4. The TIM device according to claim 1, wherein said TIM device is electrically conductive.
5. The TIM device according to claim 1, wherein said TIM device is electrically resistive due to highly electrical resistive coating.
6. The TIM device according to claim 1, wherein said TIM device has thermal conductivity and electrical conductivity only at specific regions.
PCT/US2014/042459 2013-06-20 2014-06-16 Thermal interface nanocomposite WO2014204828A2 (en)

Applications Claiming Priority (2)

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US9896389B2 (en) 2015-11-11 2018-02-20 International Business Machines Corporation Heat-generating multi-compartment microcapsules
US10278284B2 (en) 2016-08-25 2019-04-30 International Business Machines Corporation Laminate materials with embedded heat-generating multi-compartment microcapsules
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US10328535B2 (en) 2016-11-07 2019-06-25 International Business Machines Corporation Self-heating solder flux material
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US10392452B2 (en) 2017-06-23 2019-08-27 International Business Machines Corporation Light generating microcapsules for self-healing polymer applications
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US10900908B2 (en) 2017-05-24 2021-01-26 International Business Machines Corporation Chemiluminescence for tamper event detection
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US10696761B2 (en) 2017-06-23 2020-06-30 International Business Machines Corporation Light generating microcapsules for self-healing polymer applications
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