TW200946919A - Test system and test method - Google Patents

Test system and test method Download PDF

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Publication number
TW200946919A
TW200946919A TW97116578A TW97116578A TW200946919A TW 200946919 A TW200946919 A TW 200946919A TW 97116578 A TW97116578 A TW 97116578A TW 97116578 A TW97116578 A TW 97116578A TW 200946919 A TW200946919 A TW 200946919A
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Taiwan
Prior art keywords
test
mils
printed circuit
circuit board
diameter
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TW97116578A
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Chinese (zh)
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TWI368741B (en
Inventor
Tsung-Yao Chang
Yao-Te Hsu
Chien-Chung Yao
Cheng-Chang Huang
Chih-Chieh Chang
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Wistron Corp
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Priority to TW097116578A priority Critical patent/TWI368741B/en
Priority to BRPI0900416 priority patent/BRPI0900416A2/en
Publication of TW200946919A publication Critical patent/TW200946919A/en
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Publication of TWI368741B publication Critical patent/TWI368741B/en
Priority to PH12015000345A priority patent/PH12015000345A1/en

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Abstract

A test system and a test method are disclosed. The test system comprises a PCB and a test apparatus. The PCB comprises a plurality of traces and a plurality of test pads disposing correspondingly on the plurality of traces. The surface of each test pad comprises a bean structure forming with solder paste. The test apparatus comprises a plurality of probes. Each probe comprises a probe head and is corresponding to each test pad. The plurality of probes are capable of connecting to the plurality of bean structures for testing the PCB. The diameter of the cross section of each probe head may be longer than the diameter of each test pad.

Description

200946919 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種測試系統及測試方法,特別是一種 透過印刷電路板及測試探針之配合設計,以提高印刷電路 板線路之可測率及測試品質之測試系統及測試方法。 【先前技術】 ® 為了確保電子產品之品質及良率,必須針對各類電子 產品内之印刷電路板進行電性測試,以判斷印刷電路板各 元件之電性參數(例如阻值、容值或感抗等)是否合乎標 準。常見印刷電路板之測試方式是在印刷電路板線路上設 置測試點(test pad),並將錫膏印刷於測試點表面,透過自 動化測試設備或在線測試設備,以探針直接接觸測試點之 錫膏部位以取得相關之電性參數。為提高測試之效果,一 般印刷電路板會採用直徑大於28mil以上之測試點,配合 G 尖頭型式的探針接觸測試點以進行測試。但隨著電子元件 製造技術日益進步,印刷電路板朝向小型化與精密化方向 發展,使得前述大尺寸之測試點於實際應用上無法針對印 刷電路板上所有線路設置,造成測試點之含蓋率無法提升 甚至必須降低,如此將影響印刷電路板之可測率及測試品 質;同時因測試點所佔面積較大,也會增加對印刷電路板 的電路布局之困難度。 此外,在印刷電路板製造過程中,一般會在錫膏中加 5 200946919 入助焊劑’以方便錫膏印刷於測試點 本身具有較高的阻抗值,當锡膏' 面。但由於助焊劑 助焊劑,於進行測試時將會影& ,時若表面殘留過多的 低測試品質。 朱針所測出之數值而降 【發明内容】 本發明之主要目的係在提供一 試探針之配合糾,讀騎m刷電路板及測 試品質之測試系統。 ㈣板線路之可試率及測 為達成上述之目的,本發明之:丨 板及測試震置。印刷電路板包括複數線刷電路 數線路上之複數測試點,各測試面括=== -探針斜:: 包括複數探針,各探針包括 〇 數球狀凸#探針㈣於各測H藉&複數探針與複 截面5 構接觸❹撕卩刷料板。其中各探針針頭 直徑係大於各測試點之直徑。藉此設計,在相同印 路板規格下可針對每一線路設置測試點,並透過大尺 寸之探針確保與測試點間之接觸,以提高測試點之含蓋率 及測試品質。 本發明之測試方法係應用如前述之測試裝置,包括以 下步驟.提供一印刷電路板,印刷電路板包括複數線路及 對應没置於複數線路上之複數測試點,各測試點表面係包 括以錫膏形成之一球狀凸起結構;提供一測試裝置,測試 裝置包括複數探針,各探針包括一探針針頭,各探針對應 6 200946919 於各,:式點:其中各探針針頭截面之直徑係大於各夠試點 之直仏,將複數探針接觸複數球狀凸起結構以測試印刷電 路板。 电 本發明之印刷電路板係應用於前述測試系統及測試方 法,印刷電路板包括複數線路及對應設置於複數線路上之 複數測試點,各測試點表面係包括以錫膏形成之一球狀凸 起結構,其中各測試點之直徑約為10mil至14mil。藉由縮 減測試點尺寸以增加可設置測試點之空間及數量,提高印 ® 刷電路板之可測率。 本發明之印刷電路板製造方法包括以下步驟:提供一 印刷電路板,印刷電路板包括複數線路及對應設置於複數 線路上之複數測試點;於印刷電路板之表面形成一防焊層 (solder mask),防焊層包括複數開口以露出複數測試點;將 錫膏印刷於複數測試點表面;藉由高溫加熱方式使錫膏形 成複數球狀凸起結構。 【實施方式】 為成讓本發明之上述和其他目的、特徵和優點能更明 ’、、具易if,下文特舉出本發明之具體實施例,並配合所附圖 式’作詳細說明如下。 請參考圖1係本發明之印刷電路板之示意圖。如圖J 所示’本發明之印刷電路板10包括複數線路12及對應設 置於複數線路上之複數測試點14。複數線路12之兩端係 與印刷電路板1〇上之電子元件u電性連接。各測試點14 7 200946919 表面係包括以锡膏形成之一球狀凸起結構142,其中各測 試點之直徑約為10miK 14mi卜藉此設計,可減少測試點 14於印刷電路板10上所佔之空間,使得印刷電路板10所 有的線路12均設置有測試點14,因此可針對印刷電路板 10之任意線路進行測試。 以下请一併參考圖2及圖3係本發明之印刷電路板之 局部刮視圖及局部俯視圖。如圖2及圖3所示,本發明之 印刷電路板10表面形成有一防焊層16,防焊層16包括複 β 數開口 162以露出複數測試點14,使得複數測試點14時 不會被防焊層16所遮蔽,影響對複數測試點14之測試結 果。又如圖3所示,前述防焊層16與各測試點14之間係 設有一環狀溝槽18,因各測試點14表面之球狀凸起結構 142於成型過程中,會有助焊劑殘留的問題,若殘留過多 助焊劑將影響測試點之測試結果’因此藉由環狀溝槽18之 設計’使得多餘之助焊劑可流入環狀溝槽18中,不致於對 測試點14造成影響。在本實施例中,環狀溝槽之寬度s約 φ 為2mil,以配合前述測試點14之規格,但本發明並不以此 為限。 請參考圖4係本發明之印刷電路板製造方法之流程 圖。須注意的是,以下雖以圖1至圖3所示之印刷電路板 10說明本發明之印刷電路板製造方法’但本發明旅不以= 用於印刷電路板10為限,任何具有類似前述測試點、’々構圖 印刷電路板皆可適用本發明之印刷電路板製造方法^0炱 4所示,本發明之印刷電路板製造方法包括夕麟之备侗 14 0。以下將詳細說明本發明之印刷電路板製造方法 8 200946919 步驟。 首先,本發明之印刷電路板製造方法進行步驟110 :提 供一印刷電路板,印刷電路板包括複數線路及對應設置於 複數線路上之複數測試點。如圖1所示,為了對印刷電路 板10進行測試,係於印刷電路板10之複數線路12上對應 設置複數測試點14,其中各測試點之直徑D1約為lOmil 至 14mil。 接著,進行步驟120:於印刷電路板之表面形成一防焊 φ 層,防焊層包括複數開口以露出複數測試點。如圖2所示, 於印刷電路板10表面會形成一層防焊層16,以保護印刷 電路板10結構及各線路14,但為了不讓防焊層16影響複 數測試點14之測試結果,故防焊層16會包括有複數開口 162對應複數測試點14,以使複數測試點14露出於防焊層 16外。此外於防焊層16與各測試點14之間可設一環狀溝 槽18,其中環狀溝槽18之寬度S約為2mil。 於步驟120後進行步驟130:將錫膏印刷於複數測試點 Q 表面。如圖1所示,於測試過程中為了透過與複數測試點 14之電性連接以取得電性參數,係將錫膏以印刷方式形成 在複數測試點14表面,並針對錫膏做進一步之成型處理。 以下請一併參考圖5(a)、(b)係本發明之印刷電路板製 造方法之錫膏印刷示意圖及模板之填料孔示意圖。如圖5(a) 所示,前述錫膏可藉由一模板30印刷於印刷電路板10之 複數測試點14表面,模板30包括複數填料孔32,複數填 料孔32係對應於複數測試點14。當欲進行錫膏印刷步驟 時,可先將模板30重疊放置於印刷電路板10上,此時複 9 200946919 數填料孔32亦與複數測試點14重疊,因此可將錫膏印刷 於複數測,點14表面。為了控制錫膏所成型之複數球狀凸 起結構之高度及形狀’可藉由模板3G之厚度及複數填料孔 32之形狀尺寸來決定。在本實施例中,各填料孔32實質 上係為一圓角正方形,且模板厚度約為約為0.12mm,但本 發明並不以此為限。 最後’本發明之印刷電路板製造方法進行步驟140:藉 由冋bn_加熱方式使錫膏形成複數球狀凸起結構。如圖2及 ®圖5(a)所示,將錫膏印刷在複數測試點14表面後,將印刷 電路板10經過高溫加熱程序,以使錫膏熔解成型。由於錫 膏熔解後會產生内聚力,再加上前述模板30厚度及填料孔 32之形狀尺寸配合設計,可使錫膏形成複數球狀凸起結構 142。在本實施例中,可透過一錫膏印刷機將錫膏印製於複 數測試點14表面,並利用一迴焊爐高溫加熱以炼錫。此 外,透過如前所述之環狀溝槽1之設計,使得錫膏成型過 程中所殘留之助焊劑可順勢流入環狀溝槽18内,以減少助 ❹ 焊劑對成型之複數球狀凸起結構142或印刷電路板10所造 成之影響’提咼測試品質。 又如圖5(b)所示,在本實施例中為了使錫膏形成理想 之球狀凸起結構142,針對填料孔之尺寸規格進行實驗, 根據實驗結果’當測試點14之直徑D1約為1〇mil時,所 採用填料孔32之邊長L約為12mil ’且圓角之半徑R約為 2mil ;當測試點14之直徑D1約為12mil時’所採用填料 孔32之邊長L約為14mil ’且圓角之半徑R約為2.5mil ; 當測試點14之直徑D1約為14mil時’所採用填料孔32之 200946919200946919 IX. Description of the Invention: [Technical Field] The present invention relates to a test system and a test method, and more particularly to a design of a printed circuit board and a test probe to improve the measurability of a printed circuit board line and Test system and test method for test quality. [Prior Art] ® In order to ensure the quality and yield of electronic products, it is necessary to conduct electrical tests on printed circuit boards in various electronic products to determine the electrical parameters (such as resistance, capacitance or Inductive resistance, etc.) is in line with standards. Common printed circuit boards are tested by placing a test pad on the printed circuit board trace and printing the solder paste on the surface of the test point. The test probe is directly contacted with the tin through the automated test equipment or online test equipment. Paste the part to obtain the relevant electrical parameters. In order to improve the test results, the general printed circuit board will use test points with a diameter greater than 28 mils, and the G-tip type probe contact test points for testing. However, with the advancement of electronic component manufacturing technology, the development of printed circuit boards toward miniaturization and precision has made the above-mentioned large-scale test points not applicable to all lines on the printed circuit board in practical applications, resulting in the coverage rate of test points. Can not be upgraded or even reduced, this will affect the measurable rate and test quality of the printed circuit board; at the same time, due to the large area occupied by the test points, it will increase the difficulty of the circuit layout of the printed circuit board. In addition, in the manufacturing process of printed circuit boards, it is common to add 5 200946919 into the solder paste to facilitate the solder paste printing on the test point itself has a higher resistance value, when the solder paste 'face. However, due to the flux flux, when the test is performed, the surface will be excessively low and the test quality will be excessive. SUMMARY OF THE INVENTION The main object of the present invention is to provide a test system for the matching of the test probes, the reading of the m-brush board and the test quality. (IV) Testability and Measurement of Board Lines In order to achieve the above objectives, the present invention is characterized in that the board and the test are placed. The printed circuit board includes a plurality of test points on the circuit of the plurality of line brush circuits, each test surface includes === - probe tilt:: includes a plurality of probes, each of which includes a plurality of spherical convex probes (four) for each test The H borrows & multiple probes are in contact with the cross-section 5 structure to tear the brush plate. The diameter of each probe needle is larger than the diameter of each test point. With this design, test points can be set for each line under the same board specifications, and the contact between the test points can be ensured through the large-size probe to improve the coverage rate and test quality of the test points. The test method of the present invention is applied to the test apparatus as described above, comprising the steps of providing a printed circuit board comprising a plurality of lines and corresponding plurality of test points not placed on the plurality of lines, the surface of each test point comprising tin The paste forms a spherical convex structure; a test device is provided, the test device includes a plurality of probes, each probe includes a probe needle, and each probe corresponds to 6 200946919, each: a point: each probe needle cross section The diameter is greater than the diameter of each of the pilots, and the plurality of probes are contacted with a plurality of spherical projection structures to test the printed circuit board. The printed circuit board of the present invention is applied to the foregoing test system and test method. The printed circuit board includes a plurality of lines and a plurality of test points corresponding to the plurality of lines. Each test point surface includes a spherical protrusion formed by solder paste. The structure has a diameter of about 10 mils to 14 mils. Improve the measurability of the printed circuit board by reducing the size of the test points to increase the space and number of test points that can be set. The printed circuit board manufacturing method of the present invention comprises the steps of: providing a printed circuit board comprising a plurality of lines and a plurality of test points correspondingly disposed on the plurality of lines; forming a solder mask on the surface of the printed circuit board The solder resist layer includes a plurality of openings to expose the plurality of test points; the solder paste is printed on the surface of the plurality of test points; and the solder paste is formed into a plurality of spherical convex structures by high temperature heating. The above and other objects, features, and advantages of the present invention will become more apparent. . Please refer to FIG. 1 for a schematic diagram of a printed circuit board of the present invention. As shown in Fig. J, the printed circuit board 10 of the present invention includes a plurality of lines 12 and a plurality of test points 14 correspondingly disposed on the plurality of lines. Both ends of the plurality of lines 12 are electrically connected to the electronic component u on the printed circuit board 1. Each test point 14 7 200946919 surface system includes a spherical convex structure 142 formed by solder paste, wherein each test point has a diameter of about 10miK 14mi, thereby reducing the test point 14 on the printed circuit board 10. The space allows all of the lines 12 of the printed circuit board 10 to be provided with test points 14, so that any line of the printed circuit board 10 can be tested. Hereinafter, please refer to Fig. 2 and Fig. 3 together for a partial plan view and a partial plan view of the printed circuit board of the present invention. As shown in FIG. 2 and FIG. 3, a solder resist layer 16 is formed on the surface of the printed circuit board 10 of the present invention. The solder resist layer 16 includes a complex beta opening 162 to expose the plurality of test points 14, so that the plurality of test points 14 are not The solder mask 16 is shielded, affecting the test results for the plurality of test points 14. As shown in FIG. 3, an annular groove 18 is disposed between the solder resist layer 16 and each test point 14. Since the spherical convex structure 142 on the surface of each test point 14 has flux during the molding process, there is flux. Residual problem, if too much residual flux will affect the test result of the test point 'so the design of the annular groove 18' allows excess flux to flow into the annular groove 18 without affecting the test point 14. . In the present embodiment, the width s of the annular groove is about φ 2 mil to match the specifications of the aforementioned test point 14, but the invention is not limited thereto. Referring to Figure 4, there is shown a flow chart of a method of manufacturing a printed circuit board of the present invention. It should be noted that although the printed circuit board 10 of the present invention is described below with reference to the printed circuit board 10 shown in FIGS. 1 to 3, the present invention is not limited to the use of the printed circuit board 10, and any of the foregoing has similar The test point and the '々 pattern printed circuit board can be applied to the printed circuit board manufacturing method of the present invention. The printed circuit board manufacturing method of the present invention includes the Xilin. The procedure for manufacturing the printed circuit board of the present invention 8 200946919 will be described in detail below. First, the method of manufacturing a printed circuit board of the present invention proceeds to step 110: providing a printed circuit board including a plurality of lines and a plurality of test points correspondingly disposed on the plurality of lines. As shown in Fig. 1, in order to test the printed circuit board 10, a plurality of test points 14 are provided on the plurality of lines 12 of the printed circuit board 10, wherein the diameter D1 of each test point is about 10 mils to 14 mils. Next, step 120 is performed to form a solder resist φ layer on the surface of the printed circuit board, and the solder resist layer includes a plurality of openings to expose the plurality of test points. As shown in FIG. 2, a solder resist layer 16 is formed on the surface of the printed circuit board 10 to protect the structure of the printed circuit board 10 and the lines 14, but in order to prevent the solder resist layer 16 from affecting the test results of the plurality of test points 14, The solder mask 16 will include a plurality of openings 162 corresponding to the plurality of test points 14 to expose the plurality of test points 14 out of the solder mask 16. Further, an annular groove 18 may be provided between the solder resist layer 16 and each of the test points 14, wherein the width S of the annular groove 18 is about 2 mils. After step 120, step 130 is performed: the solder paste is printed on the surface of the plurality of test points Q. As shown in FIG. 1 , in order to obtain electrical parameters through electrical connection with the plurality of test points 14 during the test, solder paste is formed on the surface of the plurality of test points 14 by printing, and further molding is performed for the solder paste. deal with. Referring to Fig. 5 (a) and (b), respectively, a schematic diagram of a solder paste printing method and a packing hole of a template of the printed circuit board manufacturing method of the present invention. As shown in FIG. 5(a), the solder paste can be printed on the surface of the plurality of test points 14 of the printed circuit board 10 by a template 30. The template 30 includes a plurality of filler holes 32, and the plurality of filler holes 32 correspond to the plurality of test points 14. . When the solder paste printing step is to be performed, the template 30 may be placed on the printed circuit board 10 in an overlapping manner. At this time, the number of filler holes 32 is also overlapped with the plurality of test points 14, so that the solder paste can be printed on the plurality of samples. Point 14 surface. The height and shape of the plurality of spherical convex structures formed to control the solder paste can be determined by the thickness of the template 3G and the shape and size of the plurality of filler holes 32. In the present embodiment, each of the filler holes 32 is substantially a rounded square shape, and the thickness of the stencil is about 0.12 mm, but the invention is not limited thereto. Finally, the method of manufacturing a printed circuit board of the present invention proceeds to step 140: the solder paste is formed into a plurality of spherical convex structures by a 冋bn_heating method. As shown in Fig. 2 and Fig. 5(a), after the solder paste is printed on the surface of the plurality of test points 14, the printed circuit board 10 is subjected to a high temperature heating process to melt-mold the solder paste. Since the cohesive force is generated after the solder paste is melted, and the thickness of the template 30 and the shape and size of the filler hole 32 are matched, the solder paste can form a plurality of spherical convex structures 142. In this embodiment, the solder paste can be printed on the surface of the plurality of test points 14 through a solder paste printer, and heated at a high temperature in a reflow oven to smelt the tin. In addition, through the design of the annular groove 1 as described above, the flux remaining in the solder paste molding process can flow into the annular groove 18 to reduce the number of spherical protrusions of the auxiliary flux. The effect of the structure 142 or the printed circuit board 10 'improves the test quality. As shown in FIG. 5(b), in the present embodiment, in order to form the solder paste into the ideal spherical convex structure 142, an experiment is conducted on the size specification of the filler hole, and according to the experimental result 'When the diameter D1 of the test point 14 is about For 1 mil, the side length L of the filler hole 32 is about 12 mil' and the radius R of the fillet is about 2 mil; when the diameter D1 of the test point 14 is about 12 mils, the side length L of the filler hole 32 is used. Approximately 14 mil' and the radius R of the fillet is approximately 2.5 mils; when the diameter D1 of the test point 14 is approximately 14 mils, '200946919 of the filler hole 32 used

邊長L約為16mil,且圓角之半徑R約為3mil,但本發明 並不以此為限。 X 請參考圖6係本發明之測試系統之示意圖。如圖6所 示,本發明之測試系統1包括如前所述之印刷電路板1〇及 測試裝置20。印刷電路板10包括複數線路12,於複數線 路12上對應設置有複數測試點14,各測試點14表面係包 括以錫膏形成之一球狀凸起結構142。測試裝置2〇包括複 數探針22,各探針22包括一探針針頭222,且各探針22 ❻對應於各測試點14。藉由複數探針22與複數球狀凸起会士 構142接觸,以針對印刷電路板1〇進行電性測試。如圖1 所示,其中各探針針頭222截面之直徑D2係大於各測試 點14之直徑D1。在本實施例中,各測試點14之直俨⑴ 約為lOmil至14mi卜*各探針針頭222截面之直捏&約 為30mil,但本發明並不以此為限。 點^縮減了各測試點14尺寸,使得測試 點14可§又置在印刷電路板1〇之所有線路12上以達到ίο。% Ο 的可測率,提高印刷電路板10面積使用率;並且利用° 寸的探針針頭222來壓抵小尺寸的球狀凸起結構142 確保兩者間之確實接觸,亦可透過探針針頭奶將球狀凸 起結構142上殘存的助烊劑層經施壓而破裂,使探針 222更能與球狀凸起結構142直接接觸以增加測試之準確 度。在本實施例中,複數探針22係可採用平頭式樑 冠式探針’但亦可利用其他探針針頭接觸面積較大之= 所取代,不以本實施例為限。 卞 請參考圖7係本發明之測試方法之流程圖。須注意的 200946919 是,以下雖以圖6所示之測試系統丨說明本發明之測試方 去,但本發明並不以適用於測試系統丨為限,任何具有前 述所提及測試點與探針規格配合設計之測試系統,皆可適 用本發明之測試方法。如圖7所示,本發明之測試方法包 括步驟210至230。以下將詳細說明本發明之測試方法之 各個步驟。 首先,本發明之測試方法進行步驟21〇:提供一印刷電 _路板,印刷電路板包括複數線路及對應設置於複數線路上 之複數測試點,各測試點表面係包括以錫膏形成之一球狀 凸起結構。如圖.6所示,印刷電路板1〇之複數線路12上 岣設有對應之複數測試點14,且於各測試點14表面以錫 膏形成之球狀凸起結構142,以便於接觸球狀凸起結構142 進行測試。又如圖5(a)、⑻所示,其中複數球狀凸起結構 U2係藉由一模板30將錫膏印刷於複數測試點14表面, 並經高溫加熱所形成。模板30包括對應於複數測試點14 之複數填料孔32。在本發明之一實施例中,各填料孔& 實質上係為-圓角正方形,且模板厚度約為約為〇 12_, 钽本發明並不以此為限。此外,在本實施例中,當測試點 14之直徑D1約為lOmil時,所採用填料孔32之邊長[約 為12mU’且圓角之半徑R約$ 2mil;當測試點14之 叫約為12mil時,所採用填料孔32之邊長[約為細二 且圓角之半徑R約為2.5mil;當測試點14之直徑di約 I4mil時,所採用填料孔32之邊長L約為l6mU,且圓角 之半徑R約為3mil,但本發明並不以此為限。 接著,進行步驟2,提供―測試裝置,職裝置包括 200946919 複數探針,各探針句紅 點,其中各探針針—探針針頭,各探針對應於各測試 如圖1所示,利肖 面之直㈣、大於各測試點之直徑。 測試點14,由於探針。裝置20之複數探針22對應於複數 可確保探針針頭、二^碩222面積大於測試點14面積’ 蜊試點14之直彳①D 、剛試點14接觸。在本實施例中,各 功截面之直徑為1Gmil至14_,而各探針針頭 最嘈 约為3〇mil ’但本發明並不以此為限。 觸複數球月之'則試方法進行步驟230 :將複數探針接 與複測試印刷電路板。藉由複數探針“ 印刷電路板U) 接觸以形成電性連接’用以測試 !〇之品質。 稷數線路之電性參數,來判斷印刷電路板 顯示:陳,本發明無論就目的、手段及功效’在在均 查委二窣於習知技術之特徵’為-大突破,懇請責審 須注土,Ϊ、’、早曰賜准專利,俾嘉惠社會,實感德便。惟 效,、 迷實細*例僅為例示性說明本發明之原理及其功 1均㈣料限制本發明之範圍。任何熟於此項技藝之人 修改可ί不違背本發明之技術原理及精神下,對實施例作 範圍化。本發明之權利保護範圍應如後述之申請專利 【圖式簡單說明】 圖1係本發明之印刷電路板之示意圖。 圖2係本υ <印刷電路板之局部剖視圖。 13 200946919 圖3係本發明之印刷電路板之局部俯視圖。 圖4係本發明之印刷電路板製造方法之流程圖。 圖5(a)係本發明之印刷電路板製造方法之錫膏印刷示意圖。 圖5(b)係本發明之印刷電路板製造方法之模板之填料孔示 意圖。 圖6係本發明之測試系統之示意圖。 圖7係本發明之測試方法之流程圖。 β【主要元件符號說明】 測試系統1 印刷電路板10 線路12 測試點14 球狀凸起結構142 防焊層16 ❿ 開口 162The side length L is about 16 mils and the radius R of the rounded corners is about 3 mils, but the invention is not limited thereto. X Please refer to Figure 6 for a schematic diagram of the test system of the present invention. As shown in Fig. 6, the test system 1 of the present invention comprises a printed circuit board 1 and a test device 20 as described above. The printed circuit board 10 includes a plurality of lines 12, and a plurality of test points 14 are disposed on the plurality of lines 12, and the surface of each of the test points 14 includes a spherical protrusion structure 142 formed of solder paste. The test device 2A includes a plurality of probes 22, each of which includes a probe needle 222, and each probe 22A corresponds to each test point 14. The plurality of probes 22 are brought into contact with the plurality of spherical projections 142 for electrical testing of the printed circuit board. As shown in Fig. 1, the diameter D2 of the cross section of each probe needle 222 is larger than the diameter D1 of each test point 14. In the present embodiment, the straight 俨 (1) of each test point 14 is about 10 mils to 14 mils. * The straight pinch of the probe needle 222 is about 30 mils, but the invention is not limited thereto. Point ^ reduces the size of each test point 14 so that the test point 14 can be placed on all of the lines 12 of the printed circuit board 1 to achieve ίο. The measurable rate of % , increases the area usage of the printed circuit board 10; and the probe needle 222 of the inch is used to press against the small-sized spherical protrusion structure 142 to ensure the actual contact between the two, and also through the probe The needle milk ruptures the remaining astringent layer on the spherical convex structure 142 by pressing, so that the probe 222 can be more directly in contact with the spherical convex structure 142 to increase the accuracy of the test. In the present embodiment, the plurality of probes 22 may be replaced by a flat-headed beam-type probe, but may be replaced by a larger contact area of other probe needles, which is not limited to this embodiment.卞 Refer to FIG. 7 for a flow chart of the test method of the present invention. Note that 200946919 is that the test system of the present invention is described below with reference to the test system shown in FIG. 6, but the present invention is not limited to the test system, and any of the aforementioned test points and probes are mentioned. The test method of the present invention can be applied to the test system of the specification and design. As shown in Figure 7, the test method of the present invention includes steps 210 through 230. The various steps of the test method of the present invention will be described in detail below. First, the test method of the present invention performs step 21: providing a printed circuit board, the printed circuit board comprising a plurality of lines and corresponding plurality of test points disposed on the plurality of lines, each test point surface comprising one of the solder paste formation Spherical raised structure. As shown in FIG. 6, the plurality of circuit lines 12 of the printed circuit board 1 are provided with corresponding plurality of test points 14, and a spherical convex structure 142 formed of solder paste on the surface of each test point 14 is used to contact the ball. The raised structure 142 was tested. Further, as shown in Figs. 5(a) and (8), the plurality of spherical convex structures U2 are formed by printing a solder paste on the surface of the plurality of test points 14 by a template 30, and are formed by heating at a high temperature. Template 30 includes a plurality of packing holes 32 corresponding to a plurality of test points 14. In an embodiment of the invention, each of the filler holes & is substantially a rounded square, and the thickness of the template is about 〇 12 _, which is not limited thereto. Further, in the present embodiment, when the diameter D1 of the test point 14 is about 10 mils, the length of the side of the filler hole 32 is [about 12 mU' and the radius R of the round corner is about $2 mil; when the test point 14 is about When it is 12 mil, the length of the side of the filler hole 32 is about [about two and the radius R of the round corner is about 2.5 mil; when the diameter di of the test point 14 is about I4 mil, the length L of the side of the filler hole 32 is about l6mU, and the radius R of the fillet is about 3 mil, but the invention is not limited thereto. Next, step 2 is performed to provide a "testing device", and the device includes 200946919 plural probes, each probe has a red dot, wherein each probe pin-probe needle, each probe corresponds to each test as shown in FIG. The straight face of the facet (4) is larger than the diameter of each test point. Test point 14, due to the probe. The plurality of probes 22 of the device 20 correspond to a plurality of numbers to ensure that the probe needle, the area of the second 222 is larger than the area of the test point 14 蜊 the direct 彳 1D of the pilot 14 , and the pilot 14 contact. In the present embodiment, the diameter of each power section is 1 Gmil to 14 mm, and each probe needle is at most about 3 mil mil', but the invention is not limited thereto. The test method is performed in step 230: the complex probe is connected to the complex test printed circuit board. By means of a plurality of probes "printed circuit board U" contact to form an electrical connection 'to test the quality of the 〇 。 line. The electrical parameters of the number of lines, to judge the printed circuit board display: Chen, the present invention regardless of the purpose, means And the efficacy of 'in the investigation of the second member of the characteristics of the knowledge of the knowledge of the technology" is a big breakthrough, please be responsible for the investigation of the responsibility, Ϊ, ', early patents, 俾 惠 社会 社会 社会 社会 社会 。 。 。 。 。 。 。 。 The invention is merely illustrative of the principles of the invention and the scope of the invention is limited to the scope of the invention. Any person skilled in the art can modify it without departing from the technical principles and spirit of the invention. The scope of the present invention is defined by the following claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view of a printed circuit board of the present invention. FIG. 2 is a part of a printed circuit board. Fig. 3 is a partial plan view of a printed circuit board of the present invention. Fig. 4 is a flow chart of a method for manufacturing a printed circuit board of the present invention. Fig. 5(a) is a solder paste printing method for manufacturing a printed circuit board of the present invention. Schematic diagram. Figure 5 (b Fig. 6 is a schematic view of a test system of the present invention. Fig. 6 is a flow chart of the test system of the present invention. Fig. 7 is a flow chart of the test method of the present invention. β [Key element symbol description] Test system 1 Printed Circuit Board 10 Line 12 Test Point 14 Spherical Projection 142 Solder Mask 16 开口 Opening 162

環狀溝槽18 測試裝置20 探針22 探針針頭222 模板30 填料孔32 環狀溝槽之寬度S 14 200946919Annular groove 18 Test device 20 Probe 22 Probe needle 222 Template 30 Filling hole 32 Width of annular groove S 14 200946919

測試點之直徑D1 探針針頭截面之直徑D2 填料孔之邊長L 圓角半徑RDiameter of the test point D1 diameter of the probe needle section D2 side length of the filler hole L fillet radius R

Claims (1)

200946919 十、申請專利範園: 1 ·種’則试系統,包括: 包括複數線路及對應設置於該複數線路 ㈣忐」5式點(teStpad),各該測試點表面係包括以錫 貧肜成之一球狀凸起結構;以及200946919 X. Application for Patent Park: 1 · The 'test system', including: including multiple lines and correspondingly set to the multi-line (4) 忐 5 point (teStpad), each of the test points surface includes tin-barium a spherical raised structure; 測么裳置,包括複數探針,各該探針包括一探針針 =該探針對應於各_試點,藉㈣複數探針與該 複數球狀凸起結構接觸以測試該印刷電路板; 其中各該探針針頭截面之直徑係大於各該測試點之直 徑0 2 如申^專利範圍第1項所述之測試系統,其中各該測試點 之直徑約為10mil至14mil,而各該探針針頭截面之直徑 約為3〇mii。 200946919 提供一測試裝置,該測試裝置包括複數探針,各該探針 包括一探針針頭,各該探針對應於各該測試點,其中各 該探針針頭截面之直徑係大於各該測試點之直徑;以及 將該複數探針接觸該複數球狀凸起結構以測試該印刷 電路板。 7.如申請專利範圍第6項所述之測試方法,其中各該測試 點之直徑約為1 Omil至14mil,而各該探針針頭截面之直 徑約為30mil。 Φ 8.如申請專利範圍第6項所述之測試方法,其中該印刷電 路板表面形成有一防焊層,該防焊層包括複數開口以露 出該複數測試點。 9. 如申請專利範圍第8項所述之測試方法,其中該防焊層 與各該測試點之間係設有一環狀溝槽。 10. 如申請專利範圍第9項所述之測試方法,其中該環狀溝 槽之寬度約為2mil。 11. 如申請專利範圍第6項所述之測試方法,其中該複數球 Ο 狀凸起結構係藉由一模板將該錫膏印刷於該複數測試 點表面,並經高溫加熱所形成。 12. 如申請專利範圍第11項所述之測試方法,其中該模板包 括複數填料孔,該複數填料孔係對應於該複數測試點。 13. 如申請專利範圍第11項所述之測試方法,其中該填料孔 實質上係為一圓角正方形。 200946919 14. 如申請專利範圍第13項所述之測試方法,其中當該測試 點之直徑約為lOmil時,所採用該填料孔之邊長約為 12mil,且該圓角之半徑約為2mil。 15. 如申請專利範圍第13項所述之測試方法,其中當該測試 點之直徑約為12mil時,所採用該填料孔之邊長約為 14mil,且該圓角之半徑約為2.5mil。 16. 如申請專利範圍第13項所述之測試方法,其中當該測試 點之直徑約為14mil時,所採用該填料孔之邊長約為 ❿ 16mil,且該圓角之半徑約為3mil。 17. 如申請專利範圍第11項所述之測試方法,其中該模板之 厚度約為0.12mm。 18. —種印刷電路板製造方法,該方法包括以下步驟: 提供一印刷電路板,該印刷電路板包括複數線路及對應 設置於該複數線路上之複數測試點; 於該印刷電路板之表面形成一防焊層,該防焊層包括複 數開口以露出該複數測試點; ® 將錫膏印刷於該複數測試點表面;以及 藉由高溫加熱方式使該錫膏形成複數球狀凸起結構。 19. 如申請專利範圍第18項所述之方法,其中各該測試點之 直徑約為lOmil至14mil。 20. 如申請專利範圍第18項所述之方法,其中該印刷電路板 表面形成有一防焊層,該防焊層包括複數開口以露出該 複數測試點。 200946919 21. 如申請專利範圍第20項所述之方法,其中該防焊層與各 該測試點之間係設有一環狀溝槽。 22. 如申請專利範圍第21項所述之方法,其中該環狀溝槽之 寬度約為2mil。 23. 如申請專利範圍第18項所述之方法,其中該錫膏係藉由 一模板印刷於該複數測試點表面。 24. 如申請專利範圍第23項所述之方法,其中該模板包括複 數填料孔,該複數填料孔係對應於該複數測試點。 © 25.如申請專利範圍第24項所述之方法,其中該填料孔實質 上係為一圓角正方形。 26. 如申請專利範圍第25項所述之方法,其中當該測試點之 直徑約為lOmil時,所採用該填料孔之邊長約為12mil, 且該圓角之半徑約為2mil。 27. 如申請專利範圍第25項所述之方法,其中當該測試點之 直徑約為12mil時,所採用該填料孔之邊長約為14mil, 且該圓角之半徑約為2.5mil。 ❿ 28.如申請專利範圍第25項所述之方法,其中當該測試點之 直徑約為14mil時,所採用該填料孔之邊長約為16mil, 且該圓角之半徑約為3mil。 29. 如申請專利範圍第23項所述之方法,其中該模板之厚度 約為 0.12mm。 30. —種印刷電路板,包括複數線路及對應設置於該複數線 路上之複數測試點,各該測試點表面係包括以錫膏形成 200946919 之一球狀凸起結構,其中各該測試點之直徑約為lOmil 至 14mil 〇 31. 如申請專利範圍第30項所述之印刷電路板,其中該印刷 電路板表面形成有一防焊層,該防焊層包括複數開口以 露出該複數測試點。 32. 如申請專利範圍第31項所述之印刷電路板,其中該防焊 層與該測試點之間係設有一環狀溝槽。 33. 如申請專利範圍第32項所述之印刷電路板,其中該環狀 參 溝槽之寬度約為2mil。 ❹ 20Measured, including a plurality of probes, each of the probes including a probe needle = the probe corresponding to each _ pilot, by (four) complex probes in contact with the plurality of spherical convex structures to test the printed circuit board; The diameter of each of the probe needle sections is greater than the diameter of each of the test points. The test system described in claim 1 is wherein the diameter of each test point is about 10 mils to 14 mils. The diameter of the needle tip section is approximately 3 〇 mii. 200946919 provides a test device, the test device includes a plurality of probes, each of the probes includes a probe needle, each of the probes corresponding to each of the test points, wherein each of the probe needle cross-sections has a diameter larger than each of the test points a diameter; and contacting the plurality of probes to the plurality of spherical protrusion structures to test the printed circuit board. 7. The test method of claim 6, wherein each of the test points has a diameter of from about 1 mil to about 14 mils, and each of the probe needles has a diameter of about 30 mils. Φ 8. The test method of claim 6, wherein the printed circuit board surface is formed with a solder resist layer, the solder resist layer including a plurality of openings to expose the plurality of test points. 9. The test method of claim 8, wherein an annular groove is formed between the solder resist layer and each of the test points. 10. The test method of claim 9, wherein the annular groove has a width of about 2 mils. 11. The test method of claim 6, wherein the plurality of ball-like convex structures are printed on the surface of the plurality of test points by a template and heated by high temperature. 12. The test method of claim 11, wherein the template comprises a plurality of filler pores corresponding to the plurality of test points. 13. The test method of claim 11, wherein the filler pores are substantially a rounded square. The test method of claim 13, wherein when the diameter of the test point is about 10 mils, the side of the filler hole is about 12 mils long and the radius of the fillet is about 2 mils. 15. The test method of claim 13, wherein when the test point has a diameter of about 12 mils, the side of the filler hole is about 14 mils long and the radius of the fillet is about 2.5 mils. 16. The test method of claim 13, wherein when the test point has a diameter of about 14 mils, the length of the side of the filler hole is about mil16 mils and the radius of the fillet is about 3 mils. 17. The test method of claim 11, wherein the template has a thickness of about 0.12 mm. 18. A method of manufacturing a printed circuit board, the method comprising the steps of: providing a printed circuit board comprising a plurality of lines and a plurality of test points correspondingly disposed on the plurality of lines; forming a surface of the printed circuit board a solder resist layer comprising a plurality of openings to expose the plurality of test points; ® printing a solder paste on the surface of the plurality of test points; and forming the solder paste into a plurality of spherical convex structures by high temperature heating. 19. The method of claim 18, wherein each of the test points has a diameter of from about 10 mils to about 14 mils. 20. The method of claim 18, wherein the printed circuit board surface is formed with a solder mask layer, the solder resist layer including a plurality of openings to expose the plurality of test points. The method of claim 20, wherein an annular groove is formed between the solder resist layer and each of the test points. 22. The method of claim 21, wherein the annular groove has a width of about 2 mils. 23. The method of claim 18, wherein the solder paste is printed on the surface of the plurality of test points by a stencil. 24. The method of claim 23, wherein the template comprises a plurality of filler pores corresponding to the plurality of test points. The method of claim 24, wherein the filler pores are substantially a rounded square. 26. The method of claim 25, wherein when the test point has a diameter of about 10 mils, the length of the side of the filler hole is about 12 mils and the radius of the fillet is about 2 mils. 27. The method of claim 25, wherein when the test point has a diameter of about 12 mils, the side of the filler hole is about 14 mils long and the radius of the fillet is about 2.5 mils. The method of claim 25, wherein when the test point has a diameter of about 14 mils, the side of the filler hole is about 16 mils long and the radius of the fillet is about 3 mils. 29. The method of claim 23, wherein the template has a thickness of about 0.12 mm. 30. A printed circuit board comprising a plurality of lines and a plurality of test points correspondingly disposed on the plurality of lines, each of the surface of the test points comprising a spherical convex structure formed of solder paste 200946919, wherein each of the test points The printed circuit board of claim 30, wherein the printed circuit board surface is formed with a solder resist layer including a plurality of openings to expose the plurality of test points. 32. The printed circuit board of claim 31, wherein an annular groove is formed between the solder resist layer and the test point. 33. The printed circuit board of claim 32, wherein the annular gusset has a width of about 2 mils. ❹ 20
TW097116578A 2008-05-06 2008-05-06 Pcb test system,method and pcb manufacturing method TWI368741B (en)

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TWI461709B (en) * 2011-11-10 2014-11-21 Nihon Micronics Kk Probe card and method for manufacturing the same

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CN104111415B (en) * 2013-04-16 2016-12-14 张光容 PCB board test device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI461709B (en) * 2011-11-10 2014-11-21 Nihon Micronics Kk Probe card and method for manufacturing the same
US9329206B2 (en) 2011-11-10 2016-05-03 Kabushiki Kaisha Nihon Micronics Probe card and method for manufacturing the same

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