200930057 九、發明說明： 【發明所屬之技術領域】 '本發明涉及一種影像模組封裝結構，特別係一種薄型 多功能之影像模組封裝結構。 【先前技術】 隨著科學技術之發展，越來越多之可檇帶式電子設 備，如：手機、筆記型電腦、個人數位助理（PDA)等為 了結合攝像功能都集成了影像模組。為了滿足消費者對可 9 檇帶式電子設備輕、薄、短、小之要求，影像模組之設計 亦朝著薄型化和多功能化之方向發展。 如圖1所示，其為先前之小型化影像模組2之結構示 意圖。先前之小型化影像模組2包括：一基板4、一影像 感測晶片6、一支撐框架8、一鏡頭10。所述影像感測晶 片6設置在基板4上，所述支撐框架8設置在基板4上環 繞著所述影像感測晶片6,所述支撐框架8正對著影像感 測晶片6之受光區域形成有一入光口 9，該入光口 9内設 Θ 置有一玻璃板12,影像感測晶片6藉由鏡頭10截取圖像。 該影像模組2還需要結合一些與所述影像感測晶片6 相對應之影像處理晶片、控制晶片、記憶體等其他功能性 晶片來進行影像處理，這些功能性晶片設置在外界電路 上，所以影像模組必須藉由一軟性電路板14與外界之電路 電性連接才能實現其攝像功能。在這種情況下，每個集成 所述影像模組2之電子設備都要針對其重新進行外接電路 之設計，增加了製作之時間和成本，亦不利於實現電子設 7 200930057 備之小型化。 【發明内容】 ' 有鑒於此，有必要提供一種可以將除影像感測晶片以 外之其他功能性晶片亦整合至同一基板内並且能減少整個 基板厚度之影像感測器封裝結構，以提高影像感測器之適 配性和滿足影像模組輕、薄、短、小之要求。 一個影像模組封裝結構，包括一基板、一影像感測晶 片、至少一個功能性晶片、一鏡座和一透光組件。所述基 @ 板具有一上表面及一下表面，所述基板與所述鏡座遠離鏡 筒之一端面相互粘連。 所述基板於其上表面開設有一第一層凹槽，所述第一 層凹槽與所述基板下表面之間有一通孔貫穿，所述影像感 測晶片粘設於第一層凹槽内並與基板電性連接，所述至少 一個功能性晶片由膠體固定於通孔中並與基板電性連接， 所述透光組件枯設於影像感測晶片之感測區邊緣。 以先前技術相比較，本發明提供之影像模組封裝結構 Θ 藉由在基板上開設凹槽並在凹槽底面與基板底面之間開設 通孔以放置晶片組件，充分地利用了基板空間在不增加影 像模組高度之前提下實現了多功能之集成。 【實施方式】 如圖2所示，其為本發明提供之影像模組16之結構示 意圖，其包括：一鏡筒18、一鏡座20、一基板22、一影像 感測晶片24、至少一個功能性晶片26、一透光組件28。 所述鏡筒18有外螺紋18a，其内部裝有透鏡組32。所述 8 200930057 鏡座20具有相對之第一端20a和第二端2〇b，所述鏡筒18套 接於所述鏡座20之第一端20a内部，所述鏡座20第二端20b 之端面與所述基板22相粘連。 所述鏡座20内部為一貫穿之容室34，所述容室34靠近 所述鏡座20第一端20a之内壁上設有内螺紋36,該内螺紋36 與所述鏡筒18之外螺紋18a相互嚙合，可使得所述鏡筒18 螺接在所述鏡座20之第一端20a内。 所述基板22具有一上表面38及下表面40，在所述基板 ’ 22上表面38之中心區域開設有一第一層凹槽42 ’其尺寸大 於所述影像感測晶片24，所述第一層凹槽42與所述下表面 40之間由一通孔48貫穿，該通孔48之厚度等於或大於放置 於其内之功能性晶片26之厚度。 所述影像感測晶片24放置在第一層凹槽42内，藉由膠 體50粘接在第一層凹槽42之底部。所述影像感測晶片24具 有一設置在該影像感測晶片24中心處之感測區52。在所述 感測區52之周圍設置有多個晶片焊墊54，在所述基板22之 $ 上表面38圍繞所述第一層凹槽42之區域設置有與所述晶片 焊墊54相對應之基板焊墊68，所述晶片焊墊54藉由打線與 所述基板22電性連接，將影像感測晶片24所感測到之圖像 信號傳送給外部電路。在所述影像感測晶片24之感測區52 之周邊區域設置有粘連區56,所述粘連區56可以位於所述 感測區52與晶片焊墊54之間，亦可以圍繞所述感測區52並 覆蓋所述晶片焊墊54，所述粘連區56藉由膠體將所述透光 組件28固定在所述影像感測晶片24感測區52之上。 9 200930057 所述透光組件28可以為玻璃或者濾光片，所述透光板 件28用於保護影像感測晶片24之感測區52防止灰塵顆粒散 落在感測區52上以影響影像感測晶片24之工作效果。透光 組件28還可為濾光片，用以過濾掉一定波長之光波以達到 特殊之感測效果。 所述通孔48内藉由膠體58封裝除影像感測晶片24之 外之其他功能性晶片26，例如：馬達驅動晶片、資料處理 晶片、快閃記憶體等。所述通孔48侧壁設置有一電連接片 60 ’用於封裝在通孔48内之功能性晶片26與基板之間之電 性連接。 如圖3所示，通孔48内功能性晶片26之封裝方法如下： 先提供一薄膜23，並將該薄膜23鋪設在基板22之下表 面40將通孔48封住； 提供一功能性晶片26並把所述功能性晶片26放置在 通孔48内，由薄膜23承托； 藉由打線使功能性晶片26與所述電連接片60相連，最 後在通孔48内灌注膠體58,待膠體58凝固後把薄膜23撕開。 在所述基板22内有一連通所述基板焊墊68與所述基 板22下表面40之通道64，所述通道64内具有金屬線用以將 所述影像感測晶片24之信號藉由基板焊墊68導出。所述通 道64和電連接片60在基板下表面4〇之端口之間有一金屬片 70相連接’所述影像模組16藉由所述金屬線7〇可以實現與 外接電路之信號傳輸。 如圖4所示，其為本發明第二實施方式所提供之影像 200930057 模組結構示意圖。所述影像模組80包括鏡筒82、鏡座84、 影像感測晶片86、基板88、散熱片90和功能性晶片92、94。 . 所述影像模組80與第一實施方式所提供之影像模組 16之結構基本相同，其不同之處在於：在第一層凹槽96之 底面開設第二層凹槽98，在基板88之底面開設底面凹槽 100，所述第二層凹槽98與底面凹槽100之間有一通孔102 貫穿，該通孔102之厚度等於或大於封裝在其内之功能性晶 片94之厚度。 & 所述第二層凹槽98内可放置功能性晶片92，所述通孔 102侧壁連同第二層凹槽98下表面被功能性晶片92覆蓋之 部分設置有一電連接片104,用以與所述功能性晶片92藉由 錫球91實現電性連接。 所述散熱片90粘設於所述底面凹槽100之上表面，所 述設置於通孔102内之功能性晶片94藉由膠體固定在所述 散熱片90上，藉由打線使功能性晶片94與所述電連接片104 之間實現電連接。 ® 與先前技術相比，本發明提供之影像模組封裝結構藉 由在基板上開設階梯狀之多層中空凹槽，將除影像感測晶 片之外之其他功能性晶片亦整合到同一基板内使得所述影 像模組實現了多功能化，同時使得欲集成該影像模組之電 子設備無需再為所述影像模組設計其他功能性模組電路， 從而提高了所述影像模組之適配性，減少了電子設備之生 產成本。 此外，本發明所提供之影像模組封裝結構將功能性晶 11 200930057 片放置在凹槽内。在不增加影像模組高度之前提下整合了 更多之功能性晶片同時結合散熱片提高了模組之散熱效 _ 率，即相對地實現了所述影像模組之薄型化。 本技術領域之普通技術人員應當認識到，以上之實施 方式僅係用來說明本發明，而並非用作為對本發明之限 定，只要在本發明之實質精神範圍之内，對以上實施例所 作之適當改變和變化都落在本發明要求保護之範圍之内。 【圖式簡單說明】 5 圖1為先前微型影像模組之結構示意圖。 圖2為本發明第一實施方式所提供之影像模組之結構 示意圖。 圖3為本發明第一實施方式所提供之影像模組基板通 孔内之晶片封裝流程不意圖。 圖4為本發明第二實施方式所提供之影像模組之結構 示意圖。 【主要組件符號說明】 影像模組 2、16、80 基板 4、22、88 影像感測晶片 6、24、86支撐框架 8 入光口 9 鏡頭 10 玻璃板 12 軟性電路板 14 鏡筒 18 外螺紋 18a 鏡座 20、84鏡座第一端 20a 鏡座第二端 20b 透光組件 28 功能性晶片 26、92、94 容室 34 12 200930057 透鏡組 32 基板下表面 40 内螺紋 36 通孔 48、102 基板上表面 38 感測區 52 第一層凹槽 42、96 粘連區 56 膠體 50'58 電連接片 60 Ί04 晶片焊墊 54 基板焊墊 68 通道 64 薄膜 23 金屬線 70 鏡筒 82 底面凹槽 100 散熱片 90 第二層凹槽 98 錫球 91 ❿ 13200930057 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to an image module package structure, and in particular to a thin multi-functional image module package structure. [Prior Art] With the development of science and technology, more and more portable electronic devices, such as mobile phones, notebook computers, personal digital assistants (PDAs), etc., have integrated image modules for combining camera functions. In order to meet the requirements of consumers for the light, thin, short and small size of the electronic device, the design of the image module is also developing in the direction of thinning and multi-functionality. As shown in FIG. 1, it is a schematic diagram of the structure of the prior miniaturized image module 2. The prior miniaturized image module 2 includes a substrate 4, an image sensing wafer 6, a support frame 8, and a lens 10. The image sensing wafer 6 is disposed on the substrate 4, and the support frame 8 is disposed on the substrate 4 to surround the image sensing wafer 6. The support frame 8 is formed facing the light receiving region of the image sensing wafer 6. There is an optical port 9 in which a glass plate 12 is disposed, and the image sensing wafer 6 captures an image by the lens 10. The image module 2 also needs to combine some image processing wafers, control wafers, memory and other functional wafers corresponding to the image sensing wafer 6 for image processing. The functional wafers are disposed on the external circuit, so The image module must be electrically connected to the external circuit through a flexible circuit board 14 to realize its imaging function. In this case, each electronic device integrated with the image module 2 has to redesign the external circuit for it, which increases the time and cost of fabrication, and is not conducive to miniaturization of the electronic device. SUMMARY OF THE INVENTION In view of the above, it is necessary to provide an image sensor package structure in which other functional chips other than the image sensing wafer can be integrated into the same substrate and the thickness of the entire substrate can be reduced to improve the image sense. The adaptability of the detector and the requirements of the image module are light, thin, short and small. An image module package structure includes a substrate, an image sensing wafer, at least one functional wafer, a lens holder and a light transmissive component. The base @ plate has an upper surface and a lower surface, and the substrate and the mirror holder are adhered to each other away from an end surface of the lens barrel. The substrate has a first layer of grooves formed on the upper surface thereof, a through hole is formed between the first layer of the groove and the lower surface of the substrate, and the image sensing wafer is adhered to the first layer of the groove. And electrically connected to the substrate, the at least one functional wafer is fixed in the through hole by the colloid and electrically connected to the substrate, and the transparent component is disposed at the edge of the sensing region of the image sensing chip. According to the prior art, the image module package structure provided by the present invention utilizes a groove on the substrate and a through hole between the bottom surface of the groove and the bottom surface of the substrate to place the wafer assembly, thereby fully utilizing the substrate space. Multi-functional integration is achieved before the height of the image module is increased. [Embodiment] FIG. 2 is a schematic structural diagram of an image module 16 provided by the present invention, including: a lens barrel 18, a lens holder 20, a substrate 22, an image sensing chip 24, and at least one The functional wafer 26 is a light transmissive component 28. The lens barrel 18 has an external thread 18a which is internally provided with a lens group 32. The lens housing 20 has an opposite first end 20a and a second end 2〇b. The lens barrel 18 is sleeved inside the first end 20a of the lens holder 20, and the second end of the lens holder 20 is The end face of 20b is adhered to the substrate 22. The inside of the lens holder 20 is a through chamber 34. The inner wall of the chamber 34 adjacent to the first end 20a of the lens holder 20 is provided with an internal thread 36, which is external to the barrel 18 The threads 18a are intermeshing to cause the barrel 18 to be threaded into the first end 20a of the lens holder 20. The substrate 22 has an upper surface 38 and a lower surface 40. A first layer of recesses 42 ′ is formed in a central region of the upper surface 38 of the substrate '22. The size is larger than the image sensing wafer 24, and the first The layer recess 42 and the lower surface 40 are penetrated by a through hole 48 having a thickness equal to or greater than the thickness of the functional wafer 26 placed therein. The image sensing wafer 24 is placed in the first layer of recesses 42 and bonded to the bottom of the first layer of recesses 42 by a glue 50. The image sensing wafer 24 has a sensing region 52 disposed at the center of the image sensing wafer 24. A plurality of wafer pads 54 are disposed around the sensing region 52, and a region of the upper surface 38 of the substrate 22 surrounding the first layer recess 42 is disposed corresponding to the wafer pad 54. The substrate pad 68 is electrically connected to the substrate 22 by wire bonding, and transmits an image signal sensed by the image sensing chip 24 to an external circuit. An adhesion region 56 is disposed in a peripheral region of the sensing region 52 of the image sensing wafer 24, and the adhesion region 56 may be located between the sensing region 52 and the wafer pad 54 or may surround the sensing The region 52 covers the wafer pad 54 and the adhesion region 56 is fixed to the image sensing wafer 24 sensing region 52 by a colloid. 9 200930057 The light transmissive component 28 can be a glass or a filter, and the translucent panel 28 is used to protect the sensing area 52 of the image sensing chip 24 from dust particles scattered on the sensing area 52 to affect the image sense. The working effect of the wafer 24 is measured. The light transmissive component 28 can also be a filter for filtering out light waves of a certain wavelength to achieve a particular sensing effect. Other functional wafers 26 other than the image sensing wafer 24, such as motor driven wafers, data processing wafers, flash memory, etc., are encapsulated in the vias 48 by the glue 58. The side wall of the through hole 48 is provided with an electrical connection piece 60' for electrically connecting the functional wafer 26 encapsulated in the through hole 48 with the substrate. As shown in FIG. 3, the packaging method of the functional wafer 26 in the through hole 48 is as follows: First, a film 23 is provided, and the film 23 is laid on the lower surface 40 of the substrate 22 to seal the through hole 48; and a functional wafer is provided. 26, the functional wafer 26 is placed in the through hole 48, supported by the film 23; the functional wafer 26 is connected to the electrical connection piece 60 by wire bonding, and finally the gel 58 is poured into the through hole 48, After the gel 58 solidifies, the film 23 is torn. A channel 64 is formed in the substrate 22 to communicate the substrate pad 68 and the lower surface 40 of the substrate 22. The channel 64 has a metal line for transmitting the signal of the image sensing chip 24 through the substrate. The pad 68 is led out. The channel 64 and the electrical connection piece 60 are connected to each other between the ports of the lower surface 4 of the substrate. The image module 16 can realize signal transmission with an external circuit by the metal wire 7〇. As shown in FIG. 4, it is a schematic diagram of a module structure of the image 200930057 provided by the second embodiment of the present invention. The image module 80 includes a lens barrel 82, a lens holder 84, an image sensing wafer 86, a substrate 88, a heat sink 90, and functional wafers 92, 94. The image module 80 is basically the same as the image module 16 provided in the first embodiment, and the difference is that a second layer of grooves 98 is formed on the bottom surface of the first layer of grooves 96 on the substrate 88. A bottom surface groove 100 is defined in the bottom surface, and a through hole 102 is formed between the second layer groove 98 and the bottom surface groove 100. The thickness of the through hole 102 is equal to or greater than the thickness of the functional wafer 94 encapsulated therein. A functional wafer 92 can be placed in the second layer of grooves 98. The sidewalls of the through hole 102 and the lower surface of the second layer of the recess 98 are covered by the functional wafer 92 to provide an electrical connection piece 104. The electrical connection with the functional wafer 92 is achieved by solder balls 91. The heat sink 90 is adhered to the upper surface of the bottom surface groove 100. The functional wafer 94 disposed in the through hole 102 is fixed on the heat sink 90 by a glue, and the functional wafer is grounded. An electrical connection is made between the 94 and the electrical connection tab 104. Compared with the prior art, the image module package structure provided by the present invention integrates functional wafers other than the image sensing wafer into the same substrate by forming a plurality of stepped hollow grooves on the substrate. The image module is multi-functional, and the electronic device to be integrated into the image module does not need to design other functional module circuits for the image module, thereby improving the adaptability of the image module. , reducing the production cost of electronic equipment. In addition, the image module package structure provided by the present invention places the functional crystal 11 200930057 in a groove. The integration of more functional chips and the combination of heat sinks at the same time without increasing the height of the image module improves the heat dissipation efficiency of the module, that is, the thinning of the image module is relatively achieved. It should be understood by those skilled in the art that the above embodiments are merely illustrative of the invention, and are not intended to limit the invention, as the scope of the spirit of the invention Changes and modifications are intended to fall within the scope of the invention. [Simple diagram of the diagram] 5 Figure 1 is a schematic diagram of the structure of the previous miniature image module. FIG. 2 is a schematic structural diagram of an image module according to a first embodiment of the present invention. 3 is a schematic diagram of a wafer packaging process in a via hole of an image module substrate according to a first embodiment of the present invention. 4 is a schematic structural diagram of an image module according to a second embodiment of the present invention. [Main component symbol description] Image module 2, 16, 80 Substrate 4, 22, 88 Image sensing wafer 6, 24, 86 Support frame 8 Light entrance 9 Lens 10 Glass plate 12 Flexible circuit board 14 Barrel 18 External thread 18a Mirror holder 20, 84 Mirror holder first end 20a Mirror holder second end 20b Light transmissive assembly 28 Functional wafer 26, 92, 94 Housing 34 12 200930057 Lens group 32 Substrate lower surface 40 Internal thread 36 Through hole 48, 102 Substrate upper surface 38 Sensing area 52 First layer groove 42, 96 Adhesion area 56 Colloid 50'58 Electrical connection piece 60 Ί 04 Wafer pad 54 Substrate pad 68 Channel 64 Film 23 Metal wire 70 Lens barrel 82 Bottom groove 100 Heat sink 90 second layer groove 98 solder ball 91 ❿ 13