TW200910573A - Stacked semiconductor package structure with metal contact through via - Google Patents

Stacked semiconductor package structure with metal contact through via Download PDF

Info

Publication number
TW200910573A
TW200910573A TW096130265A TW96130265A TW200910573A TW 200910573 A TW200910573 A TW 200910573A TW 096130265 A TW096130265 A TW 096130265A TW 96130265 A TW96130265 A TW 96130265A TW 200910573 A TW200910573 A TW 200910573A
Authority
TW
Taiwan
Prior art keywords
package structure
circuit layout
semiconductor package
conductive
circuit
Prior art date
Application number
TW096130265A
Other languages
English (en)
Chinese (zh)
Other versions
TWI357653B (enrdf_load_stackoverflow
Inventor
Jen-Jung Chen
Jia-Jung Wang
Original Assignee
Bridge Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bridge Semiconductor Corp filed Critical Bridge Semiconductor Corp
Priority to TW096130265A priority Critical patent/TW200910573A/zh
Publication of TW200910573A publication Critical patent/TW200910573A/zh
Application granted granted Critical
Publication of TWI357653B publication Critical patent/TWI357653B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
    • H01L2924/15331—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Wire Bonding (AREA)
TW096130265A 2007-08-16 2007-08-16 Stacked semiconductor package structure with metal contact through via TW200910573A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW096130265A TW200910573A (en) 2007-08-16 2007-08-16 Stacked semiconductor package structure with metal contact through via

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW096130265A TW200910573A (en) 2007-08-16 2007-08-16 Stacked semiconductor package structure with metal contact through via

Publications (2)

Publication Number Publication Date
TW200910573A true TW200910573A (en) 2009-03-01
TWI357653B TWI357653B (enrdf_load_stackoverflow) 2012-02-01

Family

ID=44724402

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096130265A TW200910573A (en) 2007-08-16 2007-08-16 Stacked semiconductor package structure with metal contact through via

Country Status (1)

Country Link
TW (1) TW200910573A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI425718B (zh) * 2011-06-21 2014-02-01 Nat Chip Implementation Ct Nat Applied Res Lab 連接座結構組及其連接座結構
TWI485816B (zh) * 2011-11-10 2015-05-21 Bridge Semiconductor Corp 具有凸塊／凸緣層支撐板、無芯增層電路及內建電子元件之三維半導體組裝板
US10937771B2 (en) 2016-01-14 2021-03-02 Samsung Electronics Co., Ltd. Semiconductor packages

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI425718B (zh) * 2011-06-21 2014-02-01 Nat Chip Implementation Ct Nat Applied Res Lab 連接座結構組及其連接座結構
TWI485816B (zh) * 2011-11-10 2015-05-21 Bridge Semiconductor Corp 具有凸塊／凸緣層支撐板、無芯增層電路及內建電子元件之三維半導體組裝板
US10937771B2 (en) 2016-01-14 2021-03-02 Samsung Electronics Co., Ltd. Semiconductor packages
TWI731914B (zh) * 2016-01-14 2021-07-01 南韓商三星電子股份有限公司 半導體封裝

Also Published As

Publication number Publication date
TWI357653B (enrdf_load_stackoverflow) 2012-02-01

Similar Documents

Publication Publication Date Title
CN101459152B (zh) 具金属接点导孔的堆栈式半导体封装结构
US7656031B2 (en) Stackable semiconductor package having metal pin within through hole of package
US7598617B2 (en) Stack package utilizing through vias and re-distribution lines
KR100843137B1 (ko) 반도체 소자 패키지
CN104064551B (zh) 一种芯片堆叠封装结构和电子设备
TW586201B (en) Semiconductor device and the manufacturing method thereof
CN101341593B (zh) 多晶片集成电路封装及形成其的方法
JP3874062B2 (ja) 半導体装置
CN100438024C (zh) 半导体封装及层叠型半导体封装
CN107808878A (zh) 堆叠型芯片封装结构
TW492168B (en) Integrated circuit die having bond pads near adjacent sides to allow stacking of dice without regard to dice size
US20070007641A1 (en) Chip-embedded interposer structure and fabrication method thereof, wafer level stack structure and resultant package structure
CN107424973B (zh) 封装基板及其制法
JP2010056139A (ja) 積層型半導体装置
CN101355067A (zh) 多芯片模块的改进的电连接
US7615858B2 (en) Stacked-type semiconductor device package
CN108231716A (zh) 封装结构及其制造方法
US20180308788A1 (en) Semiconductor device with through-mold via
WO2021018014A1 (zh) 一种基于tsv的多芯片的封装结构及其制备方法
TW579560B (en) Semiconductor device and its manufacturing method
US20060091524A1 (en) Semiconductor module, process for producing the same, and film interposer
TW200910573A (en) Stacked semiconductor package structure with metal contact through via
CN102820267A (zh) 插销式半导体封装堆栈结构
JPH10242380A (ja) 半導体装置およびその製造方法
TWI807801B (zh) 半導體裝置、電子機器及半導體裝置的製造方法

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees