TW200847428A - Low on-resistance lateral-double diffused transistor and fabrication method of the same - Google Patents

Low on-resistance lateral-double diffused transistor and fabrication method of the same Download PDF

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TW200847428A
TW200847428A TW96117433A TW96117433A TW200847428A TW 200847428 A TW200847428 A TW 200847428A TW 96117433 A TW96117433 A TW 96117433A TW 96117433 A TW96117433 A TW 96117433A TW 200847428 A TW200847428 A TW 200847428A
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region
layer
type
well
doped region
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TW96117433A
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TWI336132B (en
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Hsueh-I Huang
Chien-Wen Chu
Cheng-Chi Lin
Shih-Chin Lien
Chin-Pen Yeh
Shyi Yuan Wu
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Macronix Int Co Ltd
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Abstract

A lateral-double diffused MOS (LDMOS) device is provided. The device includes a first well having a first conductive type and a second well having a second conductive type located in a substrate and adjacent each other; a drain and a source regions having the first conductive type located in the first and the second wells, respectively; a field oxide layer (FOX) located in the substrate between the source and drain regions; a gate conductive layer over the second well between the source and drain regions and extending to the FOX; a gate dielectric layer between the substrate and the gate conductive layer; a doped region having the first conductive type in the first well under a portion of the gate conductive layer and the FOX and contacting to the drain region, wherein a channel is defined in the second well between the doped region and the source region.

Description

200847428 FV6UU2/ 23687twf.doc/p 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種積體電路及其製造方法,且特別 是有關於一種橫向擴散金氧半導體元件及其製造方法。 【先前技術】 Γ: 1, 橫向擴散金氧半導體(LDMOS)元件是一種典型的 壓元件,其可與互補式金氧半導體製程整合,藉以在單一 晶片上製造控制、邏輯以及電源開關。LDM〇s元件在摔 作時必須具有高崩潰電壓(breakd〇wn v〇ltage)以及低的開 啟電阻(on-state resistance,R〇n)。具有高崩潰電壓以及低 ㈣啟電阻的LDMOS元件在高壓應科具有較低的功率 知,失。此外’較低的開啟電阻則可以使得電晶體在飽和 狀恶日:具妹⑧岐極電流藉以增加元件的操作速度。 松向擴散錢半導體元件纽極端的冑電場與高沒 ,電流會形錢乡帶奴高能量的熱好去擊穿問介電 ::而^響兀件的壽命。典型的—種橫向擴散金氧半導體 =件,θ在沒極端形成場氧化層,藉以提升元件的壽命。 S下:氧化層的形成卻會導致開啟電阻增加,造成飽和 【發明内容】 复制ΐΐ Γ就疋在提供—種橫向擴散金氧半導體元件及 其心方法’其可叫低開啟電阻,增加飽和電流。 有笛ίΐϊϊ出:種橫向擴散金氧半元件。此元件包括具 、电,之弟—井區、具有第二導電型之第二井區、 c o 200847428 P960027 23687twf.d〇c/p ⑺力电層、閘極導電層以及具有第一導電 雜區。第-井區與第二井區並鄰位 ·^ =第-井區中。第二換雜區,位於第二井區V=y 笔層,位於源極區與汲極區之間的第二井區上 ^ ^日卜万的該弟-井时且與該第—摻雜 井區=層第三摻雜區與第二摻雜區之間的第: 第^關賴之橫向擴散錢半元件,龙中 ::區之摻雜濃度低於第一摻雜區或第二摻雜區;: 依照本發明實施例所述之橫 第三摻雜區底雜歸紅表中 底部距離基底之表面的深度。 、 &gt;_區 依照本發明實施例所述之橫向擴 第-導電型為Ν型;第二導電型為ρ型。 ’其中 依照本發明實施例所述之橫 括一場氧化層,位於第-摻雜區與ϋ+兀件,更包 第三摻雜區上。 —枱雜區之間的部分 6 200847428 P960027 23687twf.doc/p 依照本發明實施例所述之横向擴散金氧半 閘極導電層更覆蓋在場氧化層上。 /、中 依照本發明實施例所述之橫向擴散 第-,為一第二接雜區為二:件’其中 此方ΐ”又ίΐ:種橫向擴散金氧半元件的製造方法。 一方法疋在-具有弟二導電型的基底中分卿成一 厂導電,之第-井區與具有第二導電型之第二井區 ,’在第-井區中形成—第―導電型摻雜區。鎌了 ::雜區一場氧化層。接著,再於基底上形成間; 與部分場氧化層上形成-閘極導; 層—側壁以外的第二井區中形成-i二,型之源極區,並在閘極導電層另—側壁以 極區緊私雜區的第一井區中形成一具有第—導電型之沒200847428 FV6UU2/23687twf.doc/p IX. Description of the Invention: [Technical Field] The present invention relates to an integrated circuit and a method of fabricating the same, and more particularly to a laterally diffused MOS device and a method of fabricating the same . [Prior Art] Γ: 1. A laterally diffused metal oxide semiconductor (LDMOS) device is a typical piezoelectric device that can be integrated with a complementary MOS process to fabricate control, logic, and power switches on a single wafer. The LDM〇s component must have a high breakdown voltage (breakd〇wn v〇ltage) and a low on-state resistance (R〇n) when it is dropped. LDMOS components with high breakdown voltage and low (four) turn-on resistance have lower power in high voltage applications. In addition, the lower opening resistance allows the transistor to be in a saturated day: it has a sister 8 岐 current to increase the operating speed of the component. Loosely diffuse money semiconductor components and the extreme electric field and high and no electricity, the current will shape the money to bring the high energy of the slave to the breakdown of the dielectric :: and ^ the life of the piece. A typical type of laterally diffused MOS = piece, θ does not form a field oxide layer extremely, thereby increasing the life of the element. S: The formation of the oxide layer will lead to an increase in the opening resistance, resulting in saturation. [Inventive content] Copying ΐΐ Γ 疋 提供 提供 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向 横向. There are flutes: a kind of lateral diffusion of gold oxide half components. The component includes a device, a battery, a well region, a second well region having a second conductivity type, a 200847428 P960027 23687 twf.d〇c/p (7) a power layer, a gate conductive layer, and a first conductive region. . The first well zone and the second well zone are adjacent to each other. ^^ is in the first well zone. The second change zone is located in the second well zone V=y pen layer, located in the second well zone between the source zone and the bungee zone. The well area = the third between the third doped region and the second doped region: the lateral diffusion of the half element, the doping concentration of the middle:: region is lower than the first doped region or the first The second doped region: The depth of the bottom of the horizontally doped region in the horizontally doped red table according to the embodiment of the present invention is from the surface of the substrate. &gt;_Zone The laterally expanded-conducting type according to the embodiment of the present invention is a Ν-type; the second conductive type is a ρ-type. </ RTI> wherein a plurality of oxide layers are disposed in the first doped region and the third doped region, in accordance with an embodiment of the present invention. - a portion between the miscellaneous regions 6 200847428 P960027 23687twf.doc/p The laterally diffused gold-oxygen semi-gate conductive layer according to an embodiment of the invention is more overlying the field oxide layer. In the transverse diffusion of the embodiment of the present invention, the second junction region is two: a component of which is a method of manufacturing a laterally diffused gold-oxide half element. In the substrate having the second conductivity type, the first well region and the second well region having the second conductivity type are formed, and the first conductive type doped region is formed in the first well region.镰:: an oxide layer in the impurity region. Then, a space is formed on the substrate; a gate electrode is formed on the partial field oxide layer; a source region of the -i II type is formed in the second well region outside the layer-side wall Zone, and in the first well region of the gate conductive layer, the other side wall is formed in the first well region of the polar region, and has a first conductivity type.

Cj 依^發明實施例所述之橫向擴散金氧半元件的製迕 ^、中形成第-導電型摻雜區與場氧化層的步驟是 第二=上形ΐ具有—第—開σ的—塾氧化層與—罩幕層, 幵口稞路出默形成場氧化層之基底表面。接著 層上形成-具有第二開口的光阻層,裸露出第口 二裸^基絲及部分轉層。絲,以光_為罩幕, 订二第:離子植入製程’於第一井區中形成摻雜區。之 :,除光阻層’再進行—局部熱氧化製程, =露的基底中形成場氧化層。其後,移除罩幕層與;; 200847428 F96UU27 23687twf.doc/p 依照本發明實施例所述之橫向擴散金氧半树The step of forming the first-conducting type doped region and the field oxide layer in the process of forming the laterally-diffused gold-oxygen half-element according to the embodiment of the invention is the second=upper-shaped ΐ having the first-opening σ- The tantalum oxide layer and the mask layer form a surface of the base oxide layer of the field oxide layer. A photoresist layer having a second opening is then formed on the layer to expose the first two bare wires and a portion of the layer. The wire is formed in the first well region by a light-masking, second-order: ion implantation process. : In addition to the photoresist layer 're--local thermal oxidation process, = field oxide layer is formed in the exposed substrate. Thereafter, the mask layer is removed;; 200847428 F96UU27 23687twf.doc/p laterally diffused gold oxide half tree according to an embodiment of the invention

=法,其帽雜區之雜濃度低於源極區或祕區之S 7辰度。 ^ $= method, the impurity concentration of the hat area is lower than the S 7 degree of the source area or the secret area. ^ $

依照本發明實施例所述之橫向擴散金氧半元 方,其中進行第一離子植入製程之劑量為 Ga laterally diffused gold-oxygen half unit according to an embodiment of the invention, wherein the dose for performing the first ion implantation process is G

o 依照本發明實施例所述之橫向擴散金氧半元件的 方法’其中第—井區衫—第二離子植人製程形成^進 打第二離子植入製程的劑量為1Χ1012至9x10i3/cm2。 依照本發明實施例所述之橫向擴散金氧半元件的制造 方法’其中第二井區是以-第二離子植人製程形成^進 打第二離子植入製程的劑量為1&gt;&lt;1012至9xl〇13/cm2。 依照本發明實施例所述之橫向擴散金氧半元件的刹 造方法,其中第—導電型為Μ;第二導電型為P型。衣 依照本發明實施例所述之橫向擴散金氧半元件的剩 造方法,其中第一導電型為Ρ型;第二導電型為以型。衣o The method of laterally diffusing a gold-oxygen half element according to an embodiment of the present invention, wherein the first well-coating-second ion implanting process forms a dose of 1Χ1012 to 9x10i3/cm2. The method for manufacturing a laterally diffused gold-oxygen half element according to an embodiment of the present invention, wherein the second well region is formed by the second ion implantation process, and the dose of the second ion implantation process is 1&lt;1012 To 9xl〇13/cm2. A method of braking a laterally diffused gold-oxide half element according to an embodiment of the invention, wherein the first conductivity type is Μ; and the second conductivity type is P type. A method of remanufacturing a laterally diffused gold-oxide half element according to an embodiment of the present invention, wherein the first conductivity type is a Ρ type; and the second conductivity type is a type. clothes

本發明之橫向擴散金氧半導體元件可以降低開啟心 阻,增加飽和電流。 A 本發明之方法是以不同的光罩來定型摻雜區以及 場氧化層,因此,Ν型摻雜區的位置不會受限於場氧化層。 此外本發明之方法中,用來定義Ν型摻雜區位置的 光阻層是形成在用來定義場氧化層區域的罩幕層上方,因 此,在進行光阻層的曝光製程時較易於對準。 為讓本發明之上述和其他目的、特徵和優點能更明顯 200847428 FV5UU2/ 23687twf.doc/p 易懂,下文特舉較佳實施例,並配合所附圖式,作詳細說 明如下。 【實施方式】 氧半ϋ是依照本發明—實施例所繪示之—種橫向擴散金 請參照圖1 ’橫向擴散金氧半元件1〇包括Ν型井區 102、Ρ型井區104、Ν型之摻雜區1〇6、場氧化層⑽、Ν 型摻雜區116做為Ν型汲極區與Ν型摻雜區114做為ν 型源極區、閘介電層11G、閘極導電層U2以及ρ型基極 接觸區(bulk contact region) 118。 N型井區1()2與p型井區刚相並鄰且皆位於基底ι〇〇 之中。N型賴搬與p型井區刚的形成方法可以分別 形成光阻圖案並利用離子植入製程以及驅入步驟來達成 之0 源極區114位於P型井區1〇4之中;汲極區ιι6位於 N型井區1〇2之中。源極區114與汲極區116的形成方法 可以在基底100上形成光阻圖案並利用離子植入製程來達 成之。 思 場氧化層108位於源極區114與汲極區116之間的n 型井區102上。場氧化層108可以利用局部熱氧化製程來 施行之。在一實施例中,場氧化層1〇8與汲極區ιΐ6鄰接。 閘介電層no配置於源極區114與場氧化層1〇8之間 的P型井區104與N型井區102上方。閘介電層11〇下方 之N型摻雜區1〇6與源極區之間的p型井區定義 9 200847428 F960027 23687tw£doc/p 出一通道區120。以型摻雜區1〇6盥源 離L·為通道區120之長度。閘介★ '、 °。114之間的距 化梦,其形成方法例如是層1丨0之材質例如是氧 的場伸至部分 多晶石夕,形成的方法例如是利二雜的 ,晶…利卿與崎 =二-#層 N型摻雜區106位於場氧化層 ⑴下方_型井區搬之中且她及極區 :的摻雜濃度低於源極區ιΐ4或汲極區US的 师雜區的濃度太高,崩潰電壓也就愈低。=, 開啟;=;=源極區_可以同時兼顧 ”朋頃氣壓之需求。此外,Ns摻雜區1〇6底部 /距離基底1()()的表面1GGa的深度也較大於源極區U4 區116, 1143或U6a距離基底1〇〇的表面職 又在選輯〇乃微米製程的實施例中,N型摻雜區 6穴的喊為Q 4_G 5微米左右;源極區⑴與祕區Μ 、:米度為ο·ι微米左右。在一實施例中,N型摻雜區廳 =延:申至部分P型井區104之中。N型摻雜區1〇6的形成 去可以在基底1〇〇上形成光阻圖案並利用離子植入製程 來達成之。 P型基極接觸區118,位於P型井區104之中與源極 200847428 t^bVOZ/ 23687twf.doc/p 區相鄰。P型基極接觸區m的形成方法 100上形成光阻圖案並利用離子植入製程來達成之在土底 由於此7L件在場氧化層舰下方具有低濃度的 ^區丄其可以降低電阻,使得電晶體在飽和狀離時: 有較局的祕電流,藉以增加树的操作速度。 八The laterally diffused MOS device of the present invention can reduce the opening resistance and increase the saturation current. A. The method of the present invention shapes the doped regions and the field oxide layer with different masks. Therefore, the position of the germanium-type doped regions is not limited by the field oxide layer. In addition, in the method of the present invention, the photoresist layer for defining the position of the doped region is formed over the mask layer for defining the field oxide layer region, and therefore, it is easier to perform the exposure process of the photoresist layer. quasi. The above and other objects, features, and advantages of the present invention will become more apparent from the following description of the appended claims. [Embodiment] Oxygen helium is a lateral diffusion gold according to the present invention - see FIG. 1 'Transversely diffused gold oxide half element 1 〇 includes Ν type well area 102, Ρ type well area 104, Ν The doped region 1〇6, the field oxide layer (10), and the Ν-type doped region 116 are used as the Ν-type drain region and the Ν-type doping region 114 as the ν-type source region, the gate dielectric layer 11G, and the gate. Conductive layer U2 and a p-type bulk contact region 118. The N-type well zone 1()2 is adjacent to the p-type well zone and is located in the basement 〇〇. The formation method of the N-type and the p-type well can form a photoresist pattern separately and is realized by the ion implantation process and the driving-in step. The source region 114 is located in the P-well region 1〇4; The area ιι6 is located in the N-type well area 1〇2. The method of forming the source region 114 and the drain region 116 can form a photoresist pattern on the substrate 100 and be formed by an ion implantation process. The field oxide layer 108 is located on the n-well region 102 between the source region 114 and the drain region 116. Field oxide layer 108 can be implemented using a local thermal oxidation process. In one embodiment, the field oxide layer 1 邻接 8 is adjacent to the drain region ι 6 . The gate dielectric layer no is disposed above the P-type well region 104 and the N-type well region 102 between the source region 114 and the field oxide layer 1〇8. A p-type well region defined between the N-type doped region 1〇6 and the source region under the gate dielectric layer 11〇 9 200847428 F960027 23687 tw. The type doping region 1 〇 6 盥 source L · is the length of the channel region 120.介介 ★ ', °. The distance between the 114 dreams, the formation method is, for example, the material of the layer 1 丨 0, for example, the field of oxygen is extended to a part of the polycrystalline stone, and the forming method is, for example, Li Erqi, crystal... Li Qing and Saki = two -# layer N-doped region 106 is located in the field oxide layer (1) below the _ type well region and her and polar regions: the doping concentration is lower than the concentration of the source region ιΐ4 or the bungee region US High, the lower the breakdown voltage. =, open; =; = source region _ can simultaneously take into account the "friends pressure". In addition, the Ns doped region 1 〇 6 bottom / distance from the substrate 1 () () surface 1GGa depth is also larger than the source region U4 area 116, 1143 or U6a is away from the surface of the substrate 1 又 in the embodiment of the selection of the micron process, the hole of the N-doped area 6 is about Q 4_G 5 microns; the source area (1) and the secret area Μ,: the degree of rice is about ο·ι microns. In one embodiment, the N-type doping zone = extension: to the partial P-type well zone 104. The formation of the N-type doping zone 1〇6 can A photoresist pattern is formed on the substrate 1 and is achieved by an ion implantation process. The P-type base contact region 118 is located in the P-type well region 104 and the source 200847428 t^bVOZ/ 23687twf.doc/p region Adjacent to the formation method of the P-type base contact region m, a photoresist pattern is formed on the substrate 100 by using an ion implantation process, and the substrate has a low concentration under the oxide layer of the 7L piece. Reducing the resistance so that the transistor is in saturation: There is a relatively small current, which increases the operating speed of the tree.

C 來金ί半元件可以採用各種的製程方法 财發明。 ,施例來說明之,财並非用以限 圖Μ至2Ε是依照本發明一實施例所緣示之一種橫向 擴散金氧半元件的製造方法餘剖面*意圖。 ’、 ^照圖2Α,在-ρ型基底⑽中形成一 Ν型井區 型井區104 °Ν型井區102與ρ型井區刚的 形成方法可以分別形成光阻圖案,再分別進行Ν型盘Ρ型 離子植入製程,⑽Ν型與Ρ蘭子植人於基底⑽之中, 驅人步驟來達成之。在—實施例巾,ν型離 才衣,所植入之離子例如為磷或砷。ρ型離子植製程所 ,入之離子例如㈣。在—邏輯G5微米製程的實施例 9X1^ lxl012^ 接著,在基底100上形成墊氧化層2〇〇與罩幕層2〇2, 2具有一,口 204,裸露出預定形成場氧化層之基底100 :面Θ墊氧化層200例如是一氧化矽層,形成的方法例如 是熱,化法。罩幕層202例如是一氮化矽層,形成的方法 例如疋化學氣相沈積法。在形成氧化矽層與氮化矽層之 200847428C to Jin 半 half-element can use a variety of process methods for financial invention. It is to be understood that the invention is not limited to the drawings. The method of manufacturing a laterally diffused gold-oxide half element according to an embodiment of the present invention is intended to be a cross-section. ', ^ according to Figure 2Α, forming a 井-type well-type well area in the -ρ-type base (10) 104 ° Ν-type well area 102 and ρ-type well area forming method can form a photoresist pattern separately, and then separately The type of disk-type ion implantation process, (10) Ν type and Ρ 子 植 植 植 植 植 植 植 植 植 植 植 植 植 植 植 植 植 植 植 植 植In the embodiment, the ν-type is detached, and the implanted ions are, for example, phosphorus or arsenic. For the p-type ion implantation process, the ions are as follows (4). In the logic G5 micron process, the embodiment 9X1^lxl012^, then, the pad oxide layer 2 and the mask layer 2〇2, 2 are formed on the substrate 100, and the port 204 is exposed to expose the substrate which is intended to form the field oxide layer. 100: The enamel pad oxide layer 200 is, for example, a ruthenium oxide layer, and the method of formation is, for example, heat. The mask layer 202 is, for example, a tantalum nitride layer formed by a method such as ruthenium chemical vapor deposition. In the formation of yttrium oxide layer and tantalum nitride layer 200847428

Fyouuzv 23687twf.doc/p 後,可經由微影與蝕刻製程來將其圖案化,以 層200與罩幕層2〇2。 战塾乳化 之後明,¾圖2B,在罩幕層202上形成一光阻層2〇6, 其具=-開口 208。開口 2〇8之尺寸大於開口綱的尺寸, 且裸露出開口 204所裸露之基底102表面以及部分罩幕声 2〇2。其後,以光阻層2〇6為罩幕,進行一離子植入製^ 21〇,KN型井區忉2中形成N型摻雜區106。在—邏輯 〇 G·5微米製程的實施例中’此離子植入製程21G所植入之 離子例如是磷或砷,其劑量為1χ1〇11至9xl〇12/cm2。 在一實施例中,光阻層2〇6之開口 2〇8的尺寸盥 ^須確保後續形成之N型摻雜區⑽的邊界雇&amp;與p型 106區界1G4a緊鄰’或使得所形成的N型摻雜區 : 井區102的邊界106a延伸到P型井區1〇4之 错以透過N型摻雜區祕連糾型井區搬盘 型井區102與?型井區1〇4之間;能因為 成間隙所造成的電性或可靠度的問題。 由於光阻層施是形成在罩幕層2〇2上,因此 i丁=Γ的曝光製程時,相較於光阻層是直接形成在 2土08 ^ 較易於對準。也就是,光阻層施之開口 208的位置較易於批击丨 穩定。 易以使後績形成之通道的長度較為 然後,請參照圖2C,去除来阳Β # 局部敎氧化制_ Μ Γ 層接著,進行一 是邱^ 1 4所裸露的基底_中,也就 ^分Ν型摻雜區1〇6的上方形成場氧化層⑽。也就 200847428After Fyouuzv 23687twf.doc/p, it can be patterned via lithography and etching processes, with layer 200 and mask layer 2〇2. After the trench emulsification, a photoresist layer 2?6 having a =-opening 208 is formed on the mask layer 202. The size of the opening 2〇8 is larger than the size of the opening frame, and the surface of the substrate 102 exposed by the opening 204 and the partial mask sound 2〇2 are exposed. Thereafter, an ion implantation process is performed using the photoresist layer 2〇6 as a mask, and an N-type doping region 106 is formed in the KN-type well region 忉2. In the embodiment of the logic 〇 G·5 micron process, the ion implanted in the ion implantation process 21G is, for example, phosphorus or arsenic at a dose of 1χ1〇11 to 9xl〇12/cm2. In one embodiment, the size of the opening 2〇8 of the photoresist layer 2〇6 is such that the boundary of the subsequently formed N-type doped region (10) is in close proximity to or adjacent to the p-type 106 boundary 1G4a. N-doped region: The boundary 106a of the well region 102 extends to the P-well region 1〇4 error to pass through the N-type doping region, the confusing well-type well region, and the well-type well region 102 and? The well area is between 1 and 4; it can be caused by the electrical or reliability problems caused by the gap. Since the photoresist layer is formed on the mask layer 2〇2, the exposure process of the i-turn=Γ is easier to align with the photoresist layer directly formed in the 2 soil 08^. That is, the position of the opening 208 of the photoresist layer is relatively easy to stabilize. It is easy to make the length of the channel formed by the later performance. Then, please refer to Figure 2C, remove the Yangshuo # Local Oxidation System _ Μ Γ Layer, and then perform a base that is exposed by Qiu ^ 1 4, ie ^ A field oxide layer (10) is formed over the doped-type doped region 1〇6. Also 200847428

Fyouuz/ 23687twf.doc/p 之後i夕除罩幕層202與墊氧 濕她·先用熱Si: ^ 再以虱鼠酸浸蝕去除墊氧化層200。接著,在基 Γιο例電層110與閘極導電層112。閘介“ 極導德㊉層,其形成綠例如是熱氧化法。閘 是利::二2例如是一摻雜的多晶矽層’形成的方法例如 = 積法。其二者的形成方法例如是在基底 與姓刻製雜的多轉層之後’再利用微影After Fyouuz/ 23687twf.doc/p, the mask layer 202 and the mat are wet. We use the hot Si: ^ to remove the pad oxide layer 200 by the acid etching. Next, the gate layer 112 and the gate conductive layer 112 are formed. The method of forming a gate is "a tenth layer of a polar guide, which is formed by a thermal oxidation method, for example, a thermal oxidation method. A gate is a doped polysilicon layer, for example, a doped polysilicon layer." 'Reuse lithography after multiple transitions between substrate and surname

型離基底⑽上形成光阻層212,然後,進行NForming a photoresist layer 212 on the substrate (10), and then performing N

與没極區‘ = ^4別在^底100中形成源極區114 型并F心/ 在閘極導電層112以外的P 2Η所植人之離4;二—丨施财,Ν魏子植入製程 lxl〇15/cm2。離子例如疋磷或砷,其劑量為1Xl〇U至 π圖2D ’去除光阻層212,再於基底刚上 另:層光阻層216。之後,進行ρ型離 戚 二在=他04中形成與源極區114相鄰的基购 里離子植製程218所植入之離子例如為硼。 的製造方法中,由於Ν型摻雜區⑽與場氧化 的光罩與光阻層來定義的,料是以_ 的光罩以及相同的光阻層來定義的,因此 的位置不會受限於場氧化層⑽。 Μ雜㈣6 13 200847428 P960027 23687twf.doc/p 此外,本實施例的製造方法是先形成用來定義場氧化 f 1〇8區域的罩幕層2〇2,再於罩幕層观上形成用來定 義N型摻雜區106位置的光阻層2〇6,因此,在進行光阻 I 2G6的曝光製程時,相較於光阻層是直接形成在基底上 的情況,較易於對準。也就是,光阻層施之開口期 :置二易於控制’可將N型摻雜區1〇6形成在預定的位 *此’本發明之製程可以精確地控制源極叫至 Γ ^區106之間之通道區120的長度,使元件具有一致的 在以上的實施财是以井區、P 品Ν型之摻雜區、場氧化層、Ν型汲極區盘 閘:電層、閘極導電層以及Ρ型基極接觸區之橫向 =二 氧半元件來說明之。然而,本發 廣放金 二井區、⑺之:::二=二型:一井區,第 極區、間介電層、間減=化層、ρ型汲極區與Ρ型源 Ο 缝金氧半元;。、w以及Ν型基極接觸區之橫向 限定二,在露如上’然其並非用以 和範圍内,當可作:不脫離本發明之精神 ”見後附之申請專利範圍所:者=本發明之保護 【圖式間單說明】 氧半=是依照本發明一實施例所緣示之一種橫向擴散金 14 200847428 P960027 23687twf.doc/p 圖2A至2E是依照本發明一實施例所繪示之一種橫向 擴散金氧半元件的製造方法流程剖面示意圖。 【主要元件符號說明】 10 :擴散金氧半元件 100 :基底 100a :基底表面 102、104 :井區 104a、106a :邊界 f 106 :摻雜區 110 :閘介電層 112 :閘極導電層 114 ·源極區 114a、116a、106a ··底部 116 ·&gt;及極區 118 :基極接觸區 120 :通道區 〇 200 :墊氧化層 202 ··罩幕層 204、208 :開口 210、214、218 :離子植入製程 206、212、216 :光阻層 L:通道長度 15And the immersion zone ' = ^4 does not form the source region 114 type in the bottom 100 and the F heart / P 2 以外 outside the gate conductive layer 112 is implanted 4; 2 - 丨 财 Ν, Ν 子 植入 植入The process is lxl〇15/cm2. An ion such as bismuth phosphorus or arsenic is applied at a dose of 1 x 1 〇 U to π in Fig. 2D' to remove the photoresist layer 212, and another layer of the photoresist layer 216 is formed on the substrate. Thereafter, the ions implanted in the base ion implantation process 218 adjacent to the source region 114 in the form of the p-type ion 戚 2 are, for example, boron. In the manufacturing method, since the germanium-type doped region (10) is defined by the field-oxidized mask and the photoresist layer, the material is defined by the photomask of _ and the same photoresist layer, so the position is not limited. Field oxide layer (10). Noisy (4) 6 13 200847428 P960027 23687twf.doc/p In addition, the manufacturing method of the present embodiment is to form a mask layer 2〇2 for defining the field oxide f 1〇8 region, and then formed on the mask layer layer. The photoresist layer 2〇6 defining the position of the N-type doped region 106 is thus easier to align when the photoresist I 2G6 is exposed, compared to the case where the photoresist layer is formed directly on the substrate. That is, the photoresist layer is applied with an opening period: the second layer is easy to control 'the N-type doping region 1〇6 can be formed at a predetermined position*. The process of the present invention can precisely control the source to the Γ^ region 106. Between the length of the channel region 120, the components have a consistent implementation in the above-mentioned implementation, the well region, the P-type doped region, the field oxide layer, the Ν-type bungee region disk: electrical layer, gate The conductive layer and the lateral = dioxane half element of the 基-type base contact region are illustrated. However, this is a wide-ranging Jinshuijing area, (7)::: two = two type: one well area, the first pole area, the inter-dielectric layer, the inter-subduction layer, the p-type bungee area and the Ρ type source Ο Gold oxygen half yuan; And the lateral limitation of the w and the base contact area of the crucible type. In the above, it is not intended to be used in the scope of the invention, and may be made without departing from the spirit of the invention. Protection of the invention [Illustration of the drawings] Oxygen half = is a lateral diffusion gold according to an embodiment of the invention. 200847428 P960027 23687twf.doc/p FIGS. 2A to 2E are diagrams according to an embodiment of the invention. Schematic diagram of a process for manufacturing a laterally diffused gold-oxide half element. [Main element symbol description] 10: Diffusion gold-oxygen half element 100: Substrate 100a: Substrate surface 102, 104: Well area 104a, 106a: Boundary f 106: Doping The impurity region 110: the gate dielectric layer 112: the gate conductive layer 114, the source region 114a, 116a, 106a, the bottom portion 116, and the polar region 118: the base contact region 120: the channel region 〇200: the pad oxide layer 202 · Cover layer 204, 208: openings 210, 214, 218: ion implantation process 206, 212, 216: photoresist layer L: channel length 15

Claims (1)

200847428 P960027 23687tw£d〇c/p 十、申請專利範圓: L一種横向擴散金氧半元件,包括·· 之一基底$第‘私型之第—井區,位於具有第二導電型 於該第二導電型之第二井區,位於該基底中,鄰近 二電型之第一摻雜區,位於該第-井區中 Ο ο 區之:第二 =分一 =閑;導電層與該基底之間;以及 導電層下方的竽第¥:^之弟二摻雜區’位於部分該閘極 t,該間H·;井區中且與該第一換雜區連接,其 的該第二井區定義出一通道區。-弟—摻雜區之間 2·如巾料鄕圍第 ”中該第三摻雜區之摻雜濃度低於該;擴$氧半元 弟一摻雜區之摻雜濃度。 払雜區或該 i如申請專利範圍第(項所述之橫向 ㈣第:弟三摻雜區底部距離該基底之表面的二:+7L 於該弟-摻雜區底部距離該基底之表面的深户的咏度較大 2申請專利範圍第i項所述之橫向ς ,、中戎弟-導電型為Ν型;該第二導電、飞半元 5.如申請專利範圍第1項所述之橫向擴散金氣型半元 16 200847428 P960027 23687twf.doc/p Ο Ο /、中該第-導電型為ρ型;該第二導電型為。 6·如申請專鄉圍第1項所狀橫向擴散金氧车— 其中該第二接雜區更延伸至部分該第二井區中。兀 7mt糊範圍第!項所述之橫 更包括一場氧化層,位於篦一 双备乳+兀 區之間的部分該第三摻雜區上=4'、該第二接雜 件7項所狀橫向贿金氧半元 件其中該閘極導電層更覆蓋在該場氧化層上。+兀 9.如申請專利範圍第i項所述之橫向擴 件,其中該第-摻雜區為—祕區 兀 極區。 乜4 &amp;為一源 10· 一種橫向擴散金氧半元件的製造方法 在-具有第二導電型的基底巾分別: 導電型之第—料與-具㈣二導電狀第二奸有第— 在該第-井區中形成—第—導電型摻雜區.-, 在部分該摻雜區上形成_場氧化層;’ 在該基底上形成閘介電層·2閘介電層與部分該V氧化層上形成1極導電 在該:極導電層一側壁以外的該 有弟一導電型之源極區,並在該 中形成一具 外、緊鄰該摻雜區的該第—井側壁以 之汲極區。 取/、有弟一導電型 u.如申請專利範圍第1G項所述之橫向擴散金氧半元 件 件 件 層 17 23687twf.d〇c/p 200847428 件的製造方法,其令形成該第 層的步驟包括·· 型摻雜區與該場氧化 幕層,該第一開口裸露出預6…開口的一墊氧化層與一罩 在該基底上形成具有一第 面; 疋形成該場氧化層之該基底^ 在該罩幕層上形成一 | Γ 該第一開口所裸露之該基底層,裸露出 以該光阻層為罩幕,進第罩幕層; 第一井區令形成該摻雜區;弟—離子植入製程,於該 去除該光阻層; 所裸露的該基 進行一局部熱氧化製程,於該第-開口 底中形成該場氧化層;以及 移除該罩幕層與該墊氧化層。 ο 件的製造方法,其中該_區之_度3=乳+兀 該汲極區之摻雜濃度。 ’ 氏於該源極區或 13.如ΐ請專鄕圍㈣销狀 件的製造料,其巾進㈣= 2 1χ10ιι 至 9xl〇12/cm2。 τ %之別置為 件的=告如方範^第12項所述之橫向擴散金氧半元 带成衣1進行卞第:亥第一井區是以一第二離子植入製程 形成,立進仃忒弟二離子植入製程的劑量 9χΐ〇ΐ3_2。 川至 15·如申請專利範圍第12項所述之橫向擴散金氧半元 18 200847428 P960027 23687twf.doc/p 件的製造方法’其t該第二井區是以—第二離子植入製程 形成,且進行該第二離子植入製 χ1〇!2 9xI0I3/cm2〇 ^ 株6^i6·如申明專利範圍帛10項所述之橫向擴散金氡半元 D衣k方法,其中該第一導電型為1^型;該第二導電型 X 型。 #、申請專利範圍第10項所述之橫向擴散金氧半元 的方去,其中該第一導電型為ρ型;該第二導電型 ϋ 19200847428 P960027 23687tw£d〇c/p X. Patent application circle: L A laterally diffused gold-oxygen half element, including one of the bases of the first 'private type'-well zone, located in the second conductivity type a second well region of the second conductivity type is located in the substrate adjacent to the first doped region of the second electrical type, located in the middle region of the first well region: second = minute = idle; conductive layer and the Between the substrates; and the second doped region of the 竽 : ^ ^ ^ 位于 位于 位于 位于 位于 位于 位于 位于 位于 位于 位于 位于 位于 位于 : : : : : : : : : : : : : : : : : : : : : : The Erjing District defines a channel area. The doping concentration of the third doped region is lower than the doping concentration in the doped region between the doped regions and the doped region. Or i as claimed in the scope of the patent application (the fourth aspect of the invention): the bottom of the third doped region is two from the surface of the substrate: +7L at the bottom of the di-doped region from the surface of the substrate The greater the degree of twist 2, the lateral ς described in item i of the patent application scope, the middle 戎--conductivity type is Ν type; the second conductive, flying half element 5. The lateral diffusion as described in claim 1 The gold gas type half element 16 200847428 P960027 23687twf.doc/p Ο 、 /, the first conductivity type is p type; the second conductivity type is 6. 6 If the application of the township surrounding the first item of the lateral diffusion of gold oxygen The vehicle - wherein the second junction region extends further into a portion of the second well region. The 所述7mt paste range of the second item includes an oxide layer located between the pair of breast milk and the sputum region. The fourth doped region is 4', and the second impurity member is in the form of a transverse bridging oxygen half element, wherein the gate conductive layer covers the field oxide layer. + 兀9. The lateral expansion described in claim i, wherein the first doped region is a sacral region bungee region. 乜4 &amp; is a source 10· a laterally diffused gold oxide half element The manufacturing method is as follows: a base towel having a second conductivity type: a first type of conductive type and a second type of conductive material having a second conductivity type - forming a first conductive type doped region in the first well region .-, forming a _ field oxide layer on a portion of the doped region; 'forming a gate dielectric layer on the substrate, and forming a gate conductive layer on the V oxide layer: the pole conductive layer a source region of the conductive type other than the sidewall, and forming a drain region of the first well sidewall adjacent to the doped region, and a conductive region. A method of manufacturing a laterally diffused gold-oxygen half-element device layer 17 23687 twf.d〇c/p 200847428, as described in claim 1G, wherein the step of forming the first layer includes a doping region and the doping region a field oxide screen layer, the first opening exposing a pad oxide layer of the pre-6... opening and a cover formed on the substrate a first surface of the substrate; forming a substrate on the mask layer; forming a layer on the mask layer; the base layer exposed by the first opening, exposed with the photoresist layer as a mask, into the mask layer Forming the doped region in the first well region; removing the photoresist layer by the ion-ion implantation process; and exposing the exposed portion to a local thermal oxidation process to form the field oxide in the first open bottom a layer; and a method of manufacturing the mask layer and the pad oxide layer, wherein the _ region of the _ degree 3 = milk + 掺杂 the doping concentration of the drain region. ' 氏 in the source region or 13. If you want to use the special (4) pin-shaped manufacturing materials, the towel is (4) = 2 1χ10ιι to 9xl〇12/cm2. τ % is not part of the = = Fang Fang ^ Item 12 of the horizontal diffusion of the gold oxide half-band with the garment 1 to carry out the first: the first well area of the Hai is formed by a second ion implantation process, The dose of the second ion implantation process was 9χΐ〇ΐ3_2. Kawasaki 15 · The lateral diffusion gold oxide half 18 as described in claim 12, 200847428 P960027 23687twf.doc/p manufacturing method 'the second well area is formed by the second ion implantation process And performing the second ion implantation process 〇122 2xx0I3/cm2〇^ 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 The type is 1^ type; the second conductivity type is X type. #. Applying the laterally diffused gold oxide half element described in claim 10, wherein the first conductivity type is p type; the second conductivity type ϋ 19
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103022125A (en) * 2011-09-22 2013-04-03 上海华虹Nec电子有限公司 NLDMOS (N type Lateral Double Diffusion Metal-Oxide-Semiconductor) device in BCD (Bipolar, CMOS and DMOS) process and manufacturing method
US8648386B2 (en) 2011-08-31 2014-02-11 Macronix International Co., Ltd. Semiconductor structure and manufacturing method for the same and ESD circuit
TWI453887B (en) * 2011-08-26 2014-09-21 Macronix Int Co Ltd Semiconductor structure and manufacturing method for the same and esd circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI453887B (en) * 2011-08-26 2014-09-21 Macronix Int Co Ltd Semiconductor structure and manufacturing method for the same and esd circuit
US8648386B2 (en) 2011-08-31 2014-02-11 Macronix International Co., Ltd. Semiconductor structure and manufacturing method for the same and ESD circuit
CN103022125A (en) * 2011-09-22 2013-04-03 上海华虹Nec电子有限公司 NLDMOS (N type Lateral Double Diffusion Metal-Oxide-Semiconductor) device in BCD (Bipolar, CMOS and DMOS) process and manufacturing method

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