1336132 P960027 23687twf.doc/p 九、發明說明： 【發明所屬之技術領域】 g本發明是有關於一種積體電路及其製造方法，且特別 是有關於一種橫向擴散金氧半導體元件及其製造方法。 【先前技術】 才κ向擴散金氧半導體(LDMOS)元件是一種典型的高 ，兀件，其可與互補式金氧半導體製程整合，藉以在單一 晶片上製造控制、邏輯以及電源開關。LDM〇s元件在操 作時必須具有尚朋潰電壓(breakd〇wn 以及低的開 @^B(on-state resistance，R0n)。具有高崩潰電壓以及低 =開啟電_ LDMOS元件在高壓應㈣具有較低的功率 扣耗^。此外’較低的開啟電阻則可以使得電晶體在飽和 狀態日守具有較咼的汲極電流藉以增加元件的操作速度。 也气向擴散金氧半導體元件在没極端的高電場與高汲 極電流會形成更多帶有更高能量的熱電子去擊穿閘介電 ^而衫響元件的壽命。典型的一種橫向擴散金氧半導體 =件，會在汲極端形成場氧化層，藉以提升元件的壽命。 ^而，％氧化層的形成卻會導致開啟電阻增加，造成飽和 電流下降。 【發明内容】 *本發明就是在提供一種橫向擴散金氧半導體元件及 其製造方法，其可以降低開啟電阻，增加飽和電流。 >本發明提出一種橫向擴散金氧半元件。此元件包括具 有第導電型之第一井區、具有第二導電型之第二井區、 5 1336132 P960027 23687twf.doc/p 八有第^電型第一捧雜區、具有第一導電型第二換雜 區:閘介電層、閘極導電層以及具有第一導電型之第^摻 雜區:第一井區與第二井區並鄰位於基底中。第一摻雜區二 位於第-井區中。第二摻雜區，位於第二井區中。閉 電層，位於源極區與汲極區之間的第二井區上。閘 位於閘極導電層與基底之間。第三摻雜區 ^ ，電^方的該第-井區中且與該第-摻雜= 層下方之第三摻雜區與第二摻雜區之 开^疋義出一通道區。 不 笛-本發明實施騎述之橫向擴散錢半元件，盆中 摻賊度低於第—摻雜區或第二摻 第：if树明實_所叙橫向擴散錄半元件，其令 —1、區底部距離基底之表面的深度較一二 底部距離基底之表面的深度。 4雜區 第橫向擴散金氧半元件，其中 守电生為Ν型，弟二導電型為ρ型。 第橫向擴散金氧半元件，其中 寸·电i馬Ρ型，第二導電型為^^型。 第：實施例所述之橫向擴散金氧半元件，it 弟一夂雜區更延伸至部分第二井區中。 /、t 依照本發明實施例所述之橫向擴散金 括—場氧化層，位於第—摻雜_ =兀件’更包 第三摻雜區上。 、弟—摻雜區之間的部分 6 P960027 23687twf.doc/p 閉極導贿錄-件，- 本發明又提出-種橫向擴散極區。 此方法是在-具有第二導電型的基件的製造方法。 一導電型n區與具衫二彡成:具有第 後，在第一井區中形成一第—之第一井區。之 分摻雜區上形成一場氧化層。接】然後’在部 1層之=二層電與Γ場氧化層上形 =二 具有二相中形成/ 外、緊鄰篦ΛΓ-.喝極導電層另一側壁以 極區緊雜雜㈣弟-井區中形成—具有第—導電型之淡 依照本發明實施例所述之樺 方法’其中形成第一導電型摻雜;=2:的製造 m具有-第，的-塾氧化層;=先 口裸露出預定形成場氧化層之基底表面。；:層在 ^上形成-具有第二開口的光阻層，裸 所裸露之基絲及部分罩幕層。然後，以歧口 '、尤P日再進仃—局部熱氧化製程 :露的紐形成場氣化層。其後，移C: P960027 23687twf.doc/p 、依照本發明實施例所述之橫向擴散錢半元件的制告 其巾摻龍之摻雜濃度低於祕區或汲極區之^ 依照本發明實施例所述之橫向擴散金氧半元件的 方法^其中進行第—離子植人製程之劑 ^ 9xl012/cm2。 文 依照本發明實施例所述之橫向擴散金氧半元件 方其中第—丼區是以—第二離子植人製程形成二進 盯弟—離子植入製程的劑量為1χ1〇12至9xi〇i;^m2。 、依照本發明實施靖述之橫向紐錢半元件的製造 方^ ’其中第二井區是以—第二離子植人製程形成，且進 灯第—離子植入製程的劑量為1><1〇12至扒1〇13^^2。 依照本發明實施例所述之橫向擴散金氧半元件的製 造方法’”其中第-導電型Μ型；第二導電型為ρ型。 依照本發明實施例所述之橫向擴散金氧半元件的戴 造方法’其中第-導電型；第二導電型為Ν型。 本發明之橫向擴散金氧半導體元件可以降低開啟電 阻’增加飽和電流。 本發明之方法是以不同的料來定義Ν型摻雜區以及 场氧化層’因此，Ν型摻雜區的位置不會受限於場氧化層。 土此夕θ 卜’本發明之方法中，用來定義Ν型摻雜區位置的 一阻層是形成在用來定義場氧化層區域的罩幕層上方，因 此在進行光阻層的曝光製程時較易於對準。 為讓本發明之上述和其他目的、特徵和優點能更明雜 1336132 P960027 23687twf.doc/p 易懂，下文特舉較佳實施例，並配合所附圖式，作詳細說 明如下。 〆。 【實施方式】 圖1是依照本發明-實施例所繪示之—種橫向擴散金 氧半元件。1336132 P960027 23687twf.doc/p IX. Description of the invention: [Technical field to which the invention pertains] g The present invention relates to an integrated circuit and a method of fabricating the same, and more particularly to a laterally diffused MOS device and a method of fabricating the same . [Prior Art] A κMOS diffused metal oxide semiconductor (LDMOS) device is a typical high-profile component that can be integrated with a complementary MOS process to fabricate control, logic, and power switches on a single wafer. The LDM〇s component must have a break voltage (breakd〇wn and low on-state resistance (R0n) when operating. It has a high breakdown voltage and a low = turn-on _ LDMOS component has a high voltage (4) The lower power deduction ^. In addition, the 'lower on-resistance allows the transistor to have a more turbulent drain current in the saturation state to increase the operating speed of the component. Also the gas-diffused MOS component is not extreme. The high electric field and high 汲 current will form more hot electrons with higher energy to break through the life of the gate dielectric. A typical lateral diffusion MOS = piece will form at the 汲 extreme The field oxide layer is used to increase the lifetime of the device. However, the formation of the % oxide layer causes an increase in the on-resistance, resulting in a decrease in the saturation current. [Invention] The present invention provides a laterally diffused MOS device and its manufacture. The method can reduce the turn-on resistance and increase the saturation current. The present invention provides a laterally diffused gold-oxygen half element. The element includes a first well region having a first conductivity type, The second well region having the second conductivity type, 5 1336132 P960027 23687 twf.doc/p 八 has the first electric type first holding impurity region, and has the first conductivity type second replacement region: the gate dielectric layer and the gate conductive a layer and a first doping region having a first conductivity type: the first well region and the second well region are adjacent to each other in the substrate. The first doping region 2 is located in the first well region, and the second doping region is located at the first In the second well area, the closed layer is located on the second well area between the source area and the drain area. The gate is located between the gate conductive layer and the substrate. The third doped area ^, the electric square - a channel region in the well region and in the third doped region and the second doped region below the first doping layer. No flute - the lateral diffusing money half element of the present invention The thief in the basin is lower than the first-doped region or the second doped: if-tree _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The depth of the surface of the substrate. 4 The laterally diffused gold-oxygen half element of the miscellaneous region, wherein the electric-storage type is a Ν-type, and the second-dielectric type is a ρ-type. The medium-sized and electric-type horse-type type, the second conductivity type is ^^ type. The lateral diffusion metal-oxide half element described in the embodiment, the it-different area extends to a part of the second well area. The laterally diffused gold-field oxide layer according to the embodiment of the present invention is located on the third doped region of the first doped _=兀 member. The portion between the doped regions is 6 P960027 23687twf .doc/p Closed-circuit bribery-piece, - The invention further proposes a lateral diffusion pole region. This method is a method of manufacturing a base member having a second conductivity type.彡成: With the first, a first well region is formed in the first well region. A layer of oxide is formed on the doped region. Then] then 'in the first layer of the layer = two layers of electricity and the field oxide layer on the shape = two with two phases formed / outside, next to the 篦ΛΓ -. Drinking the other side of the conductive layer to the polar region tightly mixed (four) brother - formed in the well region - having a first conductivity type according to the birch method of the embodiment of the present invention, wherein the first conductivity type doping is formed; the fabrication m of = 2: has a -th, - erbium oxide layer; The front surface exposes the surface of the substrate which is intended to form the field oxide layer. ;: The layer is formed on ^ - a photoresist layer having a second opening, a bare exposed base wire and a portion of the mask layer. Then, with the manifold ', and then P-day into the 仃 - local thermal oxidation process: the exposed New Zealand formed a field gasification layer. Thereafter, moving C: P960027 23687twf.doc/p, according to the embodiment of the present invention, the lateral diffusion money half element is stipulated that the doping concentration of the towel doping is lower than the secret zone or the bungee zone. The method for laterally diffusing a gold-oxygen half element according to the embodiment, wherein the agent for the first ion implantation process is 9xl012/cm2. According to the embodiment of the present invention, the lateral diffusion gold-oxygen half element is in the first-stage region, and the second ion implantation process forms a dichotomous ion-ion implantation process at a dose of 1χ1〇12 to 9xi〇i. ;^m2. According to the present invention, the manufacturing method of the horizontal half-equivalent element of the present invention is formed, wherein the second well region is formed by the second ion implantation process, and the dose of the light-initiating ion implantation process is 1> 1〇12 to 扒1〇13^^2. A method for fabricating a laterally diffused gold-oxide half element according to an embodiment of the invention, wherein the first conductive type is a p-type; the second conductive type is a p-type. The laterally diffused gold-oxygen half element according to an embodiment of the invention The method of manufacturing 'the first-conductivity type; the second conductivity type is the Ν type. The laterally diffused MOS device of the present invention can reduce the on-resistance' to increase the saturation current. The method of the present invention defines the yttrium-type doping with different materials. The impurity region and the field oxide layer 'Therefore, the position of the germanium-type doped region is not limited by the field oxide layer. In the method of the present invention, a resist layer is used to define the position of the germanium-type doped region. It is formed over the mask layer used to define the field oxide layer region, and thus is easier to align during the exposure process of the photoresist layer. The above and other objects, features and advantages of the present invention are more apparent. 1336132 P960027 23687 twf.doc/p is easy to understand, the preferred embodiment is described below, and the following is a detailed description of the following. [Embodiment] FIG. 1 is a horizontal view according to an embodiment of the present invention. Diffusion gold oxide Half component.
請參照圖1 ’橫向擴散金氡半元件10包括N型井區 1〇2、Ρ型井區1〇4、Ν型之摻雜區1〇6、場氧化層觀、n 型摻雜區116做為N型汲極區與N型摻雜區114做為n 型源極區、閘介電層110、閘極導電層112以及p型基極 接觸區（bulk contact region) 118。 N型井區1〇2與P型井區1〇4相並鄰且皆位於基底刚 之中。N型井區102與p型井區1〇4的形成方法可以分別 形成光_錄顧料獻製㈣及驅人步驟來達成 之0 源極區114位於P型井區1〇4之中；汲極區ιι6位於Referring to FIG. 1 'the lateral diffusion gold 氡 half element 10 includes an N-type well region 1 〇 2, a Ρ-type well region 1 〇 4, a Ν-type doped region 1 〇 6 , a field oxide layer view, and an n-type doping region 116 The N-type drain region and the N-type doping region 114 serve as an n-type source region, a gate dielectric layer 110, a gate conductive layer 112, and a p-type bulk contact region 118. The N-type well zone 1〇2 is adjacent to the P-type well zone 1〇4 and is located in the basement. The formation method of the N-type well region 102 and the p-type well region 1〇4 can respectively form a light_recording material contribution (4) and a driving step to achieve the 0 source region 114 is located in the P-type well region 1〇4; Bungee area ιι6 is located
N型井區1〇2之中。源極區114與沒極區116的形成方法 可以在基底1GG上形献_餘_離子植人製程來達 成之。 %氧化層108位於源極區114與汲極區116之間的N =區102上。場氧化層1〇8可以利用局部熱氧化製程來 施行之。在一實施例中，場氧化層1〇8與汲極區ιΐ6鄰接。 間介電層11〇配置於源極區m與場氧化層1〇8之間 的P型井區104與N型井區1()2上方。閘介電層11〇下方 之N型摻雜區106與源極區114之間的p型井區1〇4定義 9 P960027 23687twf.doc/p =通道區ΠΟ。N型摻雜區刚與源極區u 2為通道區120之長度。開介電層no之材質例= 石夕’其形成方法例如是熱氧化法。 疋乳 閘極導電層112覆蓋於閘介電層UG上 的％氧化層108上。閘極導電層112 甲2邙刀 二晶矽’形成的方法例如是利用化學氣相沈積法。雜： /匕雜的多㈣之後’再·微影無刻製程，來將其圖^ N型接雜區1()6位於場氧化層觸與部分閘極導電展 刑换下方的N型井區1G2之中且與該没極區116連接。^ 换乡雜區106的摻雜濃度低於源極區114或沒極區116的 濃度。賴’區的漠度愈高，開啟電阻愈低， ^疋，N型摻騎㈣度太高，崩潰電壓也就愈低。因此， 型捧雜區㈣雜濃度低於源極區纽極區可關時兼顧 =啟電阻與崩潰電壓之需求。此外，N型摻雜區咖底部 6a距離基底刚的表面驗的深度也較大於源極區出 極區Π6底部114&或U6a距離基底1〇〇的表面i〇〇a 的深度。在一邏輯〇5微米製程的實施例中，N型摻雜區 10^的深度為〇.4_〇 5微米左右；源極區U4與汲極區U6 的冰度為〇.1微米左右。在一實施例中，N型摻雜區1〇6 還^伸至部分P型井區1〇4之中。N型摻雜區的形成 方法可以在基底1〇〇上形成光阻圖案並利用離子植入製程 來達成之。 P型基極接觸區118，位於P型井區104之中與源極 1336132 P960027 23687twf.doc/p 區m相鄰。P型基極接觸區m的形成方 100上形成光阻圖案並利用離子植入製程來達成在基底 由於此元件在場氧化層108下方具有曲 雜區’其可以降低開啟電阻’使得電晶體在餘 有較高的汲極電流，藉以增加元件的操作逮戶悲、 =之横向擴散金氧半元件可以採用各^ 來衣以之。以下特舉一實施例來 /方法N type well area is 1〇2. The method of forming the source region 114 and the non-polar region 116 can be carried out by forming a _ _ ion implantation process on the substrate 1GG. The % oxide layer 108 is located on the N = region 102 between the source region 114 and the drain region 116. Field oxide layer 1 〇 8 can be performed using a local thermal oxidation process. In one embodiment, the field oxide layer 1 邻接 8 is adjacent to the drain region ι 6 . The dielectric layer 11 is disposed above the P-type well region 104 and the N-type well region 1 () 2 between the source region m and the field oxide layer 1〇8. The p-type well region 1〇4 between the N-type doped region 106 and the source region 114 below the gate dielectric layer 11〇 defines 9 P960027 23687twf.doc/p = channel region ΠΟ. The N-type doped region and the source region u 2 are the length of the channel region 120. Example of the material of the open dielectric layer no = Shi Xi' The formation method is, for example, a thermal oxidation method. The skim gate conductive layer 112 covers the % oxide layer 108 on the gate dielectric layer UG. The gate conductive layer 112 is formed by a chemical vapor deposition method. Miscellaneous: / Noisy more (4) After the 're- lithography without engraving process, to map it ^ N-type junction region 1 () 6 is located in the field oxide layer touches part of the gate conductive conduction for the N-type well below Among the regions 1G2 and connected to the non-polar region 116. ^ The doping concentration of the swapping region 106 is lower than the concentration of the source region 114 or the non-polar region 116. The higher the desert in Lai's area, the lower the opening resistance, ^疋, the N-type riding (four) degree is too high, and the breakdown voltage is lower. Therefore, the type of miscellaneous zone (four) impurity concentration is lower than the source region of the neopolar zone can be turned off when both the resistance and the breakdown voltage are required. In addition, the depth of the surface of the N-doped region 6a from the surface of the substrate is also greater than the depth of the bottom portion 114& or U6a of the source region region 6 from the surface i〇〇a of the substrate 1〇〇. In an embodiment of a logic 〇 5 micron process, the depth of the N-type doped region 10 is about 4.4_〇 5 μm; the source region U4 and the drain region U6 have an ice of about 微米1 μm. In one embodiment, the N-type doped region 1〇6 is further extended into a portion of the P-type well region 1〇4. The formation of the N-type doped region can be achieved by forming a photoresist pattern on the substrate 1 and using an ion implantation process. A P-type base contact region 118 is located in the P-type well region 104 adjacent to the source 1336132 P960027 23687twf.doc/p region m. A photoresist pattern is formed on the formation side 100 of the P-type base contact region m and is achieved by an ion implantation process. Since the element has a zigzag region under the field oxide layer 108, which can lower the on-resistance, the transistor is There is a higher bungee current, in order to increase the operation of the components, and the horizontally diffused gold-oxygen half-element can be used. The following specific embodiment / method
制本發明。 …、具並非用以限 圆2Α_£2Ε是賴本發明—實關崎示之 擴散金氧半71件㈣造枝流辟m示；ft®。 。 102 f參ί圖2A ’在一 P型基底100中形成-N型井區 ===型井區刚。N型井區搬與P型井區刚的 以分卿錢阻_，再分別進行N —The invention is made. ..., is not used to limit the circle 2 Α _ £ 2 Ε 赖 本 发明 发明 发明 — — — — — — — — — 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本 本. 102 f ί FIG. 2A' forms a -N type well region in a P-type substrate 100 === type well region just. The N-type well area is moved with the P-type well area.
以將N型與p型離子植人於基底⑽之中， 子植制—驅人步驟來達成之。在—實施例巾，N型離 植入人之離子例如為磷料。P型離子植製程所 中^子例如為蝴。在—邏輯G5微米製程的實施例 9M013/cm2型與P獅子植製程之劑量例如是1x1012至 盆直士著在基底1〇0上形成墊氧化層200與罩幕層202， 奈i 2〇4 ’裸露出預定形成場氧化層之基底100 化層例如是—氧切層，形成的方法例如 例法。罩幕層2G2例如是—氮化破層，形成的方法 疋學氣相沈積法。在形成氧化矽層與氮化矽層之 1336132 P960027 23687twf.doc/p 後，可經由微影與蝕刻製程來將其圖案化，以形成墊氧化 層200與罩幕層202。 之後’明妝圖2B’在罩幕層202上形成一光阻層206， 其具有一開口 208。開口 208之尺寸大於開口 2〇4的尺寸， 且裸露出開口 204所裸露之基底1〇2表面以及部分罩幕層 202。其後，以光阻層2〇6為罩幕，進行一離子植入製程 210 ’於N型井區102中形成N型摻雜區1〇6。在一邏輯 0.5微米製程的實施例中，此離子植入製程21〇所植入之 離子例如是磷或砷’其劑量為lxlO11至9xl012/cm2。 在一實施例中，光阻層206之開口 2〇8的尺寸與位置 必須確保後續形成之N型摻雜區⑽的邊界祕型 井區104的邊界104a緊鄰，或使得所形成的N型摻雜區 106彳，N型井區1〇2的邊界1〇6a延伸到p型井區1⑽之 中’藉以透過N型摻雜區1〇6連接1^型井區1〇2與p型井 區104 ’彌補N型井區102與p型井區1〇4之間/可能因為 對準失誤形成間隙所造成的電性或可靠度的問題。 —由於光阻層206是形成在罩幕層2〇2上，因此，在進 行光阻層206的曝光製程時，相較於光阻層是直接形成在 基底上的情況’較易於對準。也就是，光阻層施之開口 =8—的位置較易於控制，以使後續形成之通道的長度較為 穩定。 然後，請參照圖2C，去除光阻層2〇6。接著，進行— 局部熱氧化製程’在開口綱所裸露的基底⑽中， 是部分N型摻雜區1G6的上方形成場氧化層⑽。， 丄 P960027 23687twf.d〇c/p 之後，移除罩幕層2〇2盥塾氧 » 移除的方法可以採用W、塾魏層雇。罩幕層202 幕層202，再以氫氟酸浸財除 = 閘介電層U。與閘極導如二t 是利用化學氣相J法1的形成的方法例如 1ΠΠ ' ---者的形成方法例如是在基底 形成#1切層與摻雜㈣ 與钱刻製程來將其圖案化。 设_用微衫 “其後’在基底⑽上形成細層212，㉝後，進行Ν 型離子植入製程214,以八％丨+ # + …傻進仃Ν 錢顧u6。彡舰極區⑴In order to implant N-type and p-type ions into the substrate (10), the sub-planting-driving step is achieved. In the embodiment, the N-type implanted human ions are, for example, phosphorous. In the P-type ion implantation process, for example, a butterfly is used. In the logic G5 micron process, the dose of the embodiment 9M013/cm2 and the P-lion planting process is, for example, 1x1012 to the basin, and the pad oxide layer 200 and the mask layer 202 are formed on the substrate 1〇0, iei 2〇4 The method of forming the substrate 100 layer which is intended to form the field oxide layer is, for example, an oxygen-cut layer, is formed by, for example, a method. The mask layer 2G2 is, for example, a nitride-deposited layer, and the method of formation is a vapor deposition method. After the formation of the yttrium oxide layer and the tantalum nitride layer 1336132 P960027 23687 twf.doc/p, it can be patterned via a lithography and etching process to form the pad oxide layer 200 and the mask layer 202. Thereafter, the 'Bright Makeup Figure 2B' forms a photoresist layer 206 on the mask layer 202 having an opening 208. The size of the opening 208 is larger than the size of the opening 2〇4, and the surface of the substrate 1〇2 exposed by the opening 204 and a portion of the mask layer 202 are exposed. Thereafter, an ion implantation process 210' is performed to form an N-type doping region 1?6 in the N-type well region 102 with the photoresist layer 2?6 as a mask. In an embodiment of a logic 0.5 micron process, the ions implanted in the ion implantation process 21 are, for example, phosphorus or arsenic's having a dose of lxlO11 to 9xl012/cm2. In an embodiment, the size and position of the opening 2 〇 8 of the photoresist layer 206 must ensure that the boundary 104a of the boundary of the subsequently formed N-type doped region (10) is in close proximity, or the N-type doping is formed. In the miscellaneous area 106彳, the boundary 1〇6a of the N-type well area 1〇2 extends into the p-type well area 1(10) 'to connect the 1^ type well area 1〇2 and the p-type well through the N-type doping area 1〇6 Zone 104 'compensates for the electrical or reliability issues between the N-well zone 102 and the p-well zone 1〇4/may be due to misalignment forming gaps. - Since the photoresist layer 206 is formed on the mask layer 2〇2, it is easier to align when the photoresist layer 206 is subjected to the exposure process as compared with the case where the photoresist layer is directly formed on the substrate. That is, the position where the photoresist layer is opened = 8 - is easier to control so that the length of the subsequently formed channel is relatively stable. Then, referring to FIG. 2C, the photoresist layer 2〇6 is removed. Next, a local thermal oxidation process is performed. In the exposed substrate (10), a field oxide layer (10) is formed over a portion of the N-type doped region 1G6. , 丄 P960027 23687twf.d〇c/p, remove the mask layer 2〇2盥塾 oxygen » The method of removal can be employed by W, Wei Wei layer. The mask layer 202 is covered by a layer 202, which is then distilled by hydrofluoric acid = gate dielectric layer U. The method of forming a method using a chemical vapor phase J method, such as a gate electrode, is formed by, for example, forming a #1 slice layer and doping (4) with a money engraving process to pattern it. Chemical. _With the micro-shirt "after" forming a fine layer 212, 33 on the substrate (10), the Ν-type ion implantation process 214 is performed, with 8% 丨 + # + ... stupid 仃Ν 顾 Gu Gu u6. (1)
型井區104之中·、、祕「 閘極導電層112以外的P Ν=:「 16位在N型井區1〇2之中，盘 2M戶^ 相鄰。在—實施例中，_離子植入製程 二=之離子例如是物，其劑量一至 =照圖2D，去除光阻層212，再於 且ΐ216。^ 妨 «训 m pw:刚中形成與源極區114相鄰的基極接觸區 ⑽。'型離子植製程218所植入之離子例如為硕。觸〔 ^上的製造方法中’由型摻雜g⑽與化 ^ 8是以不同的光罩與光阻層來定義的，而;4 的光罩以及相同的光阻声來宏I 疋以相同 的位置不會受限於的，因此增^ 13 P960027 23687twf.doc/p 此外，本實施例的製造方法是先形成用來定義場氧化 層108區域的罩幕層202，再於罩幕層2〇2上形成用來定 義N型摻雜區106位置的光阻層2〇6，因此，在進行光阻 層鄕的曝光製程時，相勸^阻層是直接形成在基底上 的情況，較易於對準。也就是，光阻層2〇6之開口 2〇δ的 位置較易於控制，可將Ν型摻雜區脳形成在預定的位 置，因此，本發明之製程可以精確地控制源極114至^ 接雜區106之間之通道區120的長度，使元件具有一致的 電性。 。在以上的實施例中是以Ν型第一井區、ρ型第二 型之摻雜區、場氧化層、Ν型没極區與ν型源顧' 匕電：:閑極導電層以及？型基極接觸區之橫向擴散金 ιψπί牛來％明之。然而’本發明中各區之導電型態並不 限於此。本發明亦可以適用於具有卩驾―井區、Ν型第 =區、Ρ型之摻腿、場氧化層、ρ魏麵與ρ型源 =金閘極導電層以U型基極接觸區之橫向 j本發明已赌佳實關揭露如上，然其並非用以 ^何熟f此技藝者’在不脫離本發明之精神 *乾圍内’ #可倾許之更誠_，因此本發明之保護 乾圍當視後附之申請專利範圍所界定者 ’、 【圖式簡單說明】 圖 氧半元件 是依照本發明一實施例所繪 示之一種橫向擴散金 1336132 P960027 23687twf.doc/p 圖2 A至2 E是依照本發明一實施例所繪示之一種橫向 擴散金氧半元件的製造方法流程剖面示意圖。 • 【主要元件符號說明】 10:擴散金氧半元件 100 :基底 100a :基底表面 102、104 :井區 104a、106a :邊界 ® 106 :摻雜區 110 :閘介電層 112 :閘極導電層 114 _源極區 114a、116a、106a :底部 116 及極區 118 :基極接觸區 120 :通道區 φ 200 :墊氧化層 202 :罩幕層 204、208 :開口 210、214、218 :離子植入製程 206、212、216 :光阻層 L:通道長度 15In the well zone 104, the "P Ν other than the gate conductive layer 112": "16 bits are in the N-well zone 1〇2, and the disk 2M households are adjacent. In the embodiment, _ The ion implantation process II is, for example, an object, and the dose thereof is as shown in FIG. 2D, the photoresist layer 212 is removed, and then the ΐ216 is formed. The training matrix is formed in the vicinity of the source region 114. The contact area of the pole contact (10). The ion implanted in the type ion implantation process 218 is, for example, a master. The contact is made by the type doping g(10) and the chemical layer is defined by different masks and photoresist layers. The mask of the 4 and the same photoresist sound are not limited by the same position, so the increase is 13 P960027 23687twf.doc/p In addition, the manufacturing method of the embodiment is formed first. The mask layer 202 for defining the field oxide layer 108 region is formed on the mask layer 2〇2 to define the photoresist layer 2〇6 of the N-doped region 106. Therefore, the photoresist layer is formed. In the exposure process, the resist layer is formed directly on the substrate, and is easier to align. That is, the position of the opening 2 〇 δ of the photoresist layer 2 〇 6 is easier to control. The germanium-type doped region 脳 is formed at a predetermined position, and therefore, the process of the present invention can precisely control the length of the channel region 120 between the source 114 and the dummy region 106, so that the device has uniform electrical properties. In the above embodiments, the first well region of the Ν type, the doped region of the p type second type, the field oxide layer, the 没 type 没 区 area, and the ν type source Gu ' ::: the idle pole conductive layer and ? The lateral diffusion of the type base contact region is ψ ί ί ί 牛 牛 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而 然而Ρ type of legs, field oxide layer, ρ wei surface and ρ type source = gold gate electrode conductive layer with U-shaped base contact area lateral j. The invention has been gamified and exposed as above, but it is not used for Those skilled in the art 'without departing from the spirit of the present invention* can't be more convinced, so the protection of the present invention is defined by the scope of the patent application attached to it', [Picture] BRIEF DESCRIPTION OF THE DRAWINGS A graph oxygen half element is a lateral diffusion gold 1336132 P960 according to an embodiment of the invention. 027 23687twf.doc/p FIGS. 2A to 2E are schematic cross-sectional views showing a process of manufacturing a laterally diffused gold-oxygen half element according to an embodiment of the present invention. • [Major component symbol description] 10: Diffusion gold oxide half Element 100: Substrate 100a: Substrate surface 102, 104: Well region 104a, 106a: Boundary® 106: Doped region 110: Gate dielectric layer 112: Gate conductive layer 114_Source region 114a, 116a, 106a: Bottom 116 Polar region 118: base contact region 120: channel region φ 200: pad oxide layer 202: mask layer 204, 208: openings 210, 214, 218: ion implantation process 206, 212, 216: photoresist layer L: Channel length 15