TW200843080A - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
- Publication number
- TW200843080A TW200843080A TW096147450A TW96147450A TW200843080A TW 200843080 A TW200843080 A TW 200843080A TW 096147450 A TW096147450 A TW 096147450A TW 96147450 A TW96147450 A TW 96147450A TW 200843080 A TW200843080 A TW 200843080A
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- substrate
- bump electrode
- semiconductor device
- semiconductor
- bonding surface
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- H—ELECTRICITY
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
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Description
200843080 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種半導體裝置,例如適用於S0F(System &⑽)的半導體裝置,該卿係包含有安裝於薄膜基板 上且由石夕構成的插入式基板’及為驅動 曰 、 〃 π曰曰而安裝於插入 式基板上的半導體元件。 【先前技術】 組裝於積體電路(1C)内之電晶體數量逐年拗夕, 曰夕,«内 構成之電路數亦增多。近年來,液晶面板係持續高精細化 而使得顯示像素增加,因此驅動電路亦增加。為補充所增 加的驅動電路,需增加安裝於液晶面板上之液晶驅動器^ 數量,或增加搭載於一個液晶驅動器上之驅動電路。近 年,為不增加安裝於液晶面板上之液晶驅動器的數量,多 以後者之增加液晶驅動器之驅動電路而加以對麂。
積體電路晶片係晶片尺寸越小,量產效率越佳,晶片之 原價變得更便宜。因此,多重輸出之驅動器為縮小晶片尺 寸’需使塾片間距精密化。又,隨著積體電路晶片之墊片 的間距精密化,驅動器之封包,即薄膜的内引腳(連接液 晶驅動器與薄膜的配線)之間距亦需加以精密化。作為可 實現精密間距化之構造,已知有S〇F(System 〇n Film :亦 稱為 COF(Chip On Film)) 〇 圖8係表示習知半導體裝置91構成之概略截面圖。半導 體裝置91具有薄膜基板98。薄膜基板98具有孔82。薄膜基 板9 8之表面上形成有配線圖案8 J。 127464.doc 200843080 半導體裝置91上設置有插入式基板92。插入式基板92之 薄膜基板98側表面的配線圖案81之相對向位置上,設置有 以金構成之複數個突起電極90。插入式基板92係經突起電 極90,而組裝於具有配線圖案81的薄膜基板%上。 插入式基板92之薄膜基板98側表面的孔82之相對向位置 上’設置有以金構成之複數個基板突起電極94。 薄膜基板98之孔82中,設有半導體元件93。半導體元件 93之插入式基板92側表面各基板突起電極94的相對向位置 上,設置有以金構成之複數個元件突起電極95。半導體元 件93係經元件突起電極95及基板突起電極叫,而組裝於插 入式基板92上。半導體元件%與薄膜基板98之間,以及插 入式基板92與薄膜基板98及半導體元件93之間,係以密封 樹脂99加以密封。 [特許文件1] 曰本專利公開公報特開2004-207566號(平成16年(2004 年)7月22曰公開) 【發明内容】 然而上述習知之構成中,將半導體元件93組裝於插入式 基板92上時’會產生元件突起電極95與基板突起電極料之 接合位置偏移,使得元件突起電極95之接合面從基板突起 電極94之接合面露出,導致接合荷重產生變動,由該結 果,會有半導體tl件93與插入式基板92之接合品質不穩定 之問題。 本發明係有鑑於上述問題點而創作完成者,目的在於實 127464.doc 200843080 現一種能夠使半導體元件與插入式基板之接合品質穩定化 的半導體裝置。 本發明之半導體裝置為解決上述課題,係包含有組裝於 女衣基板上且以半$體所構成之插入式基板,以及一安裝 於上述插入式基板上之半導體元件,上述插入式基板包含 有形成於半導體元件側的基板突起電極,且上述半導體元 件包含有與基板突起電極接合之元件突起電極之半導體裝 置,其特徵在於上述元件突起電極之元件接合面的面積, 係大於上述基板突起電極之基板接合面的面積。 又,本發明之另一半導體裝置,係包含有一組裝於安裝 基板上且以半導體所構成之插入式基板,以及一安裝於上 述插入式基板上之半導體元件,上述插人式基板包含有形 成於半導體元件側之基板突起電極,且上述半導體元件包 含有與基板突起電極接合之元件突起電極;該半導體裝置 之特徵在於,從上述插入式基板側或半導體元件側透視 時,上述元件突起電極之面積係大於基板突起電極之面 積。 又’本發明之另一半導體裝置,一種半導體裝置,係包 含有一組裝於安裝基板上且以半導體所構成之插入式基 板,以及一安裝於上述插入式基板上之半導體元件,上述 插入式基板包含有形成於半導體元件側之基板突起電極, 且上述半導體元件包含有與基板突起電極接合之元件突起 電極;該半導體裝置之特徵在於,從一側視之,上述元件 突起電極之元件接合面的長度,係長於基板突起電極之基 127464.doc 200843080 板接合面的長度。 依前述特徵,即使基板突起電極與元件突起電極之接人 位置產生偏移,元件突起電極亦可與基板突起電極之基: 接合面中較大面積之面相接觸,故可抑制接合荷重 令接合品質穩定化。 再者,突起電極通常又稱之為%塊”,形成於電極部表 面上,與電性連接之對象物接合。 本發明之半導體裝置中,上述元件接合面及上述基板接 合面宜為長方形狀;上述元件接合面及上述基板接合面各 自之長轴,宜相互平行配置;上述元件接合面之短袖方向 的寬度’宜寬於基板接合面之短軸方向的寬度。 依刖述構成’對於沿基板接合面短軸方向之接合位置的 偏移,係可適當地抑制接合荷重之變動,讓接合品質穩定 化。 本發明之半導體裝置中,上述元件接合面之長軸方向的 長度,宜與基板接合面之長軸方向的長度相等。 沿基板突起電極長軸方向之侧壁,係深人元件突起電極 之疋件接合面,讓接合強度增大,而根據上述構成,因深 入几件接合面之基板突起電極的側壁變長,且為咬合式接 合,故接合強度增大,接合品質提高。 本發明之半導體裝置中,上述基板接合面之長軸方向的 長度二宜長於元件接合面之長軸方向的長度。 π依則述構成’不僅沿基板突起電極長轴方向之側壁,可 /木入7L件大起電極之凡件接合面’且沿元件突起電極短轴 127464.doc 200843080 方向之側壁,可反方向地深入基板突起電極之基板接合 面。由此,基板突起電極與元件突起電極係相互咬合地接 合’接合強度倍增,接合品質更加提高。 本發明之半導體裝置中,從垂直方向看上述插入式基 板,7L件接合面宜圍繞基板接合面而配置;上述元件接合 面及上述基板接合面宜配置為長方形狀;上述元件接合面 及上述基板接合面各自之長軸,宜相互平行配置;從垂直 方向看上述插人式基板,元件接合面之—邊,宜與基板接 5面之對應一邊相離5 1 〇 pm而配置。
依前述述構成,接合位置無論於哪個方向產生5 之偏移’亦可抑制接合荷重之變動,使接合品質穩定化。 本發明之半導體裝置中,上述元件突起電極的高度,宜 與上述基板突起電極之高度互不相同。 依前述述構成,係可降低元件突起電極或基板突起電 極,減少高度之不均等,使接合品質穩定化。 例如為可像載帶般易於進行f曲加卫而加以薄型化,並 將可撓性較高之素材作為封裝基材時,將插人式基板連接 於载f上日寸’若上述基板突起電極較低,即無法充分確保 载帶之配線與插人式基板端部的間隔,載帶之配線會與插 入式基板之端部接觸,產生載帶之配線導體間的短路。孽 如製作15陣之基板突起《,且連接基板突起電極與载 帶之配線時’由於·之配線與插人式基板端部之間隔能 夠確保在9 μηι左右’因此基板突起電極高度為⑺_〜15 _時’即可充分確保載帶之配線與插入式基板端部之間 127464.doc -10· 200843080 隔,避免配線群之短路。x,因元件突起電極無以上問 題’故可低於上述基板突起電極之高度。 因此’本發明之半導體裝置中,上述元件突起電極之高 度且低於上述基板突起電極之高度。 根據上述構成,係可讓元件突起電極低於基板突起電 極,減少元件突起電極高度之不均等,且削減Au使用量, 使接合品質穩定化。 本發明之半導體裝詈φ,μ、+、_ ^ + 在置中上述凡件突起電極高度宜為 5 μιη〜8 μπι。 根據上述構成,係可降低元件突起電極,減少元件突起 電極间度之不均等,削減Au使用量而降低成本,並且使接 合品質穩定化。 本I月之半導體裝置中,上述基板突起電極高度宜為 1 0 μιη〜1 5 μηι 〇 根據上述構成,係可降低基板突起電極,削減Au使用量 而降低成本,且減少凸塊高度之不均#,使接合品質穩定 化。 本發明之半導體裝置中,上述基板突起電極係硬度宜高 於上述元件突起電極。 根據上述構成,因硬度較高的基板突起電極可深入柔軟 的兀件突起電極,故接合強度提高。 為解決上述課題,本發明之另一半導體裝置,其特徵在 於包含有一組裝於安裝基板上且以半導體所構成之插入式 乂及文裝於上述插入式基板上之半導體元件,上 127464.doc 200843080 述插入式基板包含有形成於半導體元件侧之基板突起電 極’且上述半導體元件包含有與上述基板突起電極接合之 端子。 、,根據以上特徵,因半導體元件側未設置突起電極,故可 削減Au使用量而降低成本。 本發明之半導體裝置中,上述端子宜由_成,上述基 板突起電極宜由金構成。 根據上述構成,係可藉由引線接合等一般的aw接 合’讓接合品質穩定化。 本發明之另—半導體裝置,係包含有-組裝於安裝基板 上且以半導體所構成之插入式基板,以及-安裝於上述插 =式基板上之半導體㈣,上述插人式基板包含有形成於 半導體元件側之基板突起電極且上述半導體元件包含有與 基板突起電極接合之㈣突起電極;該半導體裝置之特徵 錢,上述元件突起電極之高度係與上述基板突起電極之 雨度互不不同。 根據以上特徵’係可使元件突起電極構成為低於基板突 起電極,而降低元件突起電極高度之不均等,且減少Au使 用量,使接合品質穩定化。 本發明之另-半導體裝置,係包含有—組裝於安裝基板 上且以半導體所構成之插入式基板’以及-安裝於上述插 =式基板上之半導體元件上述插人式基板包含有形成於半 導體件側之基板突起電極,且上述半導體元件包含有與 基板突起電極接合之元件突起電極;該半島裝置之特徵: 127464.doc 200843080 於:上述元件突起電極之元件接合面及上述基板突起電極 之基板接合面,係呈長方形狀;上述元件接合面及上述基 板接合面各自之長軸’係相互平行配置;上述元件接合面 之短軸方向的寬度,係寬於上述基板接合面之短軸方向的 寬度;且上述基板接合面之長軸方向的長度,係長於上述 元件接合面之長軸方向的長度。 根據以上特徵,不僅沿基板突起電極長軸方向之側壁可 深入元件突起電極之元件接合面,且沿元件突起電極短軸 方向之側壁,亦可反方向地深入基板突起電極之基板接合 面。由此,基板突起電極與元件突起電極可相互咬合地接 合’接合強度倍增,接合品質更加提高。 如上所述,本發明之半導體裝置係即使基板突起電極與 凡件突起電極之接合位置產生偏移,元件突起電極亦可與 基板突起電極之基板接合面中較大面積之面相接觸,而抑 制接合荷重變動’使接合品質穩定化。 【實施方式】 根據圖1至圖7說明本發明一實施形態時,係如下所述。 圖1為表示實施形態之半導體裝置丨構成之概略截面圖。半 導體裝置1具有薄膜基板8。薄膜基板8有孔12。薄膜基板8 之表面上形成有配線單元丨i。 半導體裝置1中設置有插入式基板2。在插入式基板2之 薄膜基板8側表面上之配線單元丨丨相對向的位置上,設置 有由金構成之複數個突起電極(凸塊)1〇。插入式基板2係經 突起電極10而安裝於具有配線單元丨丨的薄臈基板8上。 127464.doc -13- 200843080 插入式基板2之薄膜基板8側表面的孔12相對向之位置 上°又置有由金構成的複數個基板突起電極(凸塊)4。 薄膜基板8之孔12中,設置有用以驅動液晶之半導體元 件3。半導體元件3之插入式基板2侧表面上之各基板突起 電極4相對向的位置上,設置有由金構成的複數個元件突 起電極(凸塊)5。半導體元件3,係經元件突起電極5及基板 突起電極4而安裝於插入式基板2上。半導體元件3與薄膜 基板8之間,以及插入式基板2與薄膜基板8及半導體元件3 之間’係以密封樹脂9加以密封。 圖2為表示實施形態之基板突起電極4的基板接合面6, 與元件突起電極5的元件接合面7之尺寸關係的概略截面 圖,係沿圖1所示截面AA之概略截面圖。基板接合面6為 長方形。元件接合面7係較基板接合面6大的長方形,且將 基板接合面6包圍配置。元件接合面7及基板接合面6各自 之長軸係一致。元件接合面7之短軸方向的寬度W2,係大 於基板接合面6之短軸方向的寬度W1。元件接合面7之長 軸方向的長度L2,係長於基板接合面6之長軸方向的長度 L1。沿基板接合面6之長軸方向的邊緣,係與沿元件接合 面7之長軸方向的邊緣僅相隔距離〇1。沿基板接合面6之短 軸方向的邊緣,係與沿元件接合面7之短軸方向邊緣僅隔 距離D2。元件接合面7之長度L2係例如75 μιη、寬度|2為 例如45 μιη。基板接合面6之長度以係例如6〇 μιη、寬度 為例如30 μιη。因此,距離m及距離d2為7.5 μηι。 基板突起電極4係硬度較元件突起電極5更高。突起電極 127464.doc -14· 200843080 之硬度係可藉由退火之有無而進行調整。硬且細的基板突 起電極4係洙入柔軟且較低的元件突起電極5,藉此而可提 高接合品質。 又,元件突起電極5之表面粗度,與基板突起電極4之表 面粗度之差異可在0.5 μιη以上。增大接觸面之凹凸而使接 觸面積增大’可增強接合強度而使接合品質提高。突起電 極之表面粗度,係可依更改浸潰於㈣中之時間等電鑛條 件而加以調整。 且,可將用以確認凸塊破碎狀態之凸塊設置在晶片的角 部。、由紅外線顯微鏡所獲得之圖像,可判斷凸塊越大,凸 塊群越是會相互碰擊壓縮,可依此判斷而進行微調整,提 冋接合品質。 、再者,k垂直於基板突起電極4及元件突起電極5之插入 式基板3之方向所見的形狀,可為正方形。習知之 中:為確保其與導線之接合面積,需將凸塊設為縱長之長 方形,而在本實施形態中,凸塊只要與金屬配線連接即 y ’由於不必與導線連接,故可為正方形且讓接合狀態均 等化’因此可提高接合品質。 如此,基板突起電極4之凸塊大小與元件突起電極5之凸 :大:係互不相同,元件突起電極5之凸塊尺寸係較基板 I :極4之凸塊大。因此,可抑制由於凸塊形成位置偏 大起位置偏移、以及因設備能力所引起的接合位置偏 移而產生之接合荷重之變動。 圖3為表示實施形態之基板突起電極4,與元件突起電極 127464.doc -15- 200843080 5間之尺寸關係的概略截面圖。基板突起電極々之凸塊高度 H1係例如15 μιη,元件突起電極5之凸塊高度H2係例如 8 μιη。如此,元件突起電極5之凸塊高度與基板突起電極4 之凸塊高度係互不相同,元件突起電極5之凸塊高度係較 基板突起電極4之凸塊高度為低。元件突起電極5之凸塊高 度Η2係可降到例如5 。 T此,降低元件突起電極5之凸塊高度時,可削減八口使 用量從而降低成本。而I,降低元件突起電極5之凸塊高 度’係可降低元件突起電極5之高度不均等,&而穩定接 合品質。 基板突起電極4之凸塊高度H1係可降至例如1〇 。降 低基板突起電極4時,係可削減Au使用量,從而降低成 本。而且高度不均等減少,可穩定接合品質。 如上所述,將大且低之凸塊元件突起電極5連接於細且 高之凸塊,即基板突起電極4上,係可穩定元件突起電極5 與基板突起電極4的接合品質。 大小不同之元件突起電極5與基板突起電極4,在整個凸 塊中以接合面積換算係在8〇%左右。剩餘2〇%之凸塊係讓 其大小相等。並且,在所有凸塊中,可構成為上下凸塊大 小不同。 又,除與半導體元件3之輸入端子連接而設置之輸入凸 塊,以及與輸出端子連接而設置之輸出凸塊以外,尚可設 置為冗餘凸塊。且’輸入凸塊中,若冗餘地設置複數個電 源系統及GND系、统之凸塊,由於元件特性穩定化,故可實 127464.doc 200843080 現高品質化。 又,亦可夠成為不設置元件突起電極5 電極4接合於藉由銘而形成在半導體 =板突起 错* WAI_Au接合來穩定化接合品質。 圖4為表示實施形態 、 與元件突起雷…“反大起電極4的基板接合面6, 几仟大起電極5的元件接合面7之盆他 面圖。亦可使元件接合面7之長抽方、長"係的概略截 合面6之長軸方向的… 的長度,與基板接 11的長度相同。沿基板突起 向的側壁,係深入元件 “之長軸方 強声^ %件大起電極5之元件接合面7内,接合 強度曰大’但若為如圖4所示之構成,深 & 為叹合接合,故接合強度增大,接合品質提高。 圖5為表示實施形態之基板突起電極4的基板接合面6, 與凡件突起電極5的元件接合面7間之其他尺寸關係的概略 截面圖。亦可構成為令基板接合面6之長軸方向的長度, 較元件接合面7之長軸方向的長度更長。若如此構成,不 僅化基板大起電極4之長軸方向的側壁可深入元件突起電 極5之元件接合面7 ’且沿元件突起電極5之短軸方向之側 壁,係可反方向地深入基板突起電極4之基板接合面6。由 此,基板突起電極4與元件突起電極5係相互咬合地接合, 接合強度加倍增大,接合品質更為提高。 圖6為表不實施形態之基板突起電極4,與元件突起電極 5間之其他尺寸關係的概略截面圖。即使基板接合面6與元 件接合面7之形狀及大小相同,亦可讓基板突起電極4之高 127464.doc -17- 200843080 度與元件突起電極5之高度不同。元件突起電極5係低於基 =突起電極4 ’基板突起電極4之高度為例如15叫,元件 犬起電極5之高度為例如8 μβ1。元件突起電極5之高度可低 至例如5 μηι。 若如此構成,由於係使元件突起電極5降低之構成,故 可減少Au的使用量而降低成本。而且,由於元件突起電極 5降低’可減少高度不均等,使接合品質穩定化。
圖7為表示實施形態之基板突起電極4,與元件突起電極 5間之其他尺寸關係的概略截面圖。若令基板接合面6盥元 件接合面7為相同形狀大小,產生接合偏移時,係在基板 突起電極4之—端從元件突起電極5—端突出,元件突起電 極5之另-端從基板突㈣極4之另—端突出之狀態下麼著 ^合。從71件突起電極5—端突出的基板突起電極4之一 ^ ’與從基板突起電極4另—端突出的元件突起電極5之另 -端,係未加以麼著,且構成為從元件突起電極5 一端突 t的基板突起電極4之-端,不接觸於半導體元件3之插入 式基板2側之表面,且從基板突 ^ 起電極4另一端突出的元件 大起電極5之另一端,不接觸於奸 ⑽^ 入式基板2之半導體元件 3側的表面。因此,可避免由於 起的品質降低。 、接觸到晶片表面而引 4 ’ 5所闡明,從插入 元件突起電極4之面 ’由側面觀看譬如圖1 不論從圖2之圖面上下 而且,上述實施形態中,如圖2, 式基板2側或半導體元件3側透視時 積係大於基板突起電極5之面積。且 所示之半導體裝置的側面視圖中, 127464.doc -18 - 200843080 方向還是左右方向纟’元件突起電極5之元件接合面長度 (LI,L2),係都比基板突起電極4之基板接合面長度(臀^, W2)長。且,同樣地於側面視圖中,圖4、圖5之圖面左右 方向中,元件突起電極5之元件接合面長度,係要比基板 突起電極4之基板接合面長度更長。 本發明並不限定於上述實施形態者,可在請求項所示範 圍内進行種種變更。即,將請求項所示之範圍内作適宜地 變更之技術方法組合而獲致之實施形態,亦包括在本發明 之技術範圍中。例如,上述實施形態中,任一者均顯示突 起電極之平面形狀為四角形,但也可為橢圓形或者圓形。 [產業上利用可能性] 本發明適用於半導體裝置,該半導體裝置係包含有安裝 於薄膜基板上且由矽構成的插入式基板,以及為驅動液晶 而安裝於插入式基板上的半導體元件。 【圖式簡單說明】 圖1為表示實施形態之半導體裝置構成的概略截面圖。 圖2為表示實施形態之基板突起電極的基板接合面,與 元件突起電極的元件接合面間之尺寸關係的概略截面圖。 圖3為表示實施形態之基板突起電極與元件突起電極間 之尺寸關係的概略截面圖。 圖4為表示實施形態之基板突起電極的基板接合面,與 元件突起電極的元件接合面間之其他尺寸關係的概略截面 圖。 圖5為表示實施形態之基板突起電極的基板接合面,與 127464.doc -19- 200843080 元件突起電極的元件接合面間之其他尺寸關係的概略截面 圖。 圖6為表示實施形態之基板突起電極與元件突起電極間 之其他尺寸關係的概略截面圖。 . 圖7為表示實施形態之基板突起電極與元件突起電極間 之其他尺寸關係的概略截面圖。 圖8為表示習知半導體裝置構成之概略截面圖。 【主要元件符號說明】 1 2 3 4 5 6 7 8 9 10 11 12 半導體裝置 插入式基板 半導體元件 基板突起電極 元件突起電極 基板接合面 元件接合面 薄膜基板 密封樹脂 突起電極 配線單元 孔 127464.doc -20-
Claims (1)
- 200843080 十、申請專利範圍: 1 · 一種半導體裝置,係包含有 導體所構成之插入式基板, 板上之半導體元件;上述插 半導體元件側之基板突起電 有與上述基板突起電極接合 於: 一組裝於安裝基板上且以半 以及一安裝於上述插入式基 入式基板包含有形成於上述 極,且上述半導體元件包含 之元件突起電極;其特徵在 上述元件突起電極之元件接合面的面積,係大於上述 • 基板突起電極之基板接合面的面積。 2·:種半導體裝置,係包含有—組裝於安裝基板上且以半 導體所構成之插入式基板,以及一安裝於上述插入式基 板上之半導體元件;上述插人式基板包含有形成於上述 半導體元件側之基板突起電極,且上述半導體元件包含 有與上述基板突起電極接合之元件突起電極;其特徵在 於:從上述插入式基板側或半導體元件侧透視時,上述元 件突起電極之面積係大於基板突起電極之面積。 3· 一種半導體裝置,係包含有一組裝於安裝基板上且以半 導體所構成之插入式基板,以及一安裝於上述插入式基 板上之半導體元#;上述插入式基板包含有形成於上述 半導體元件側之基板突起電極,且上述半導體元件包含 有與上述基板突起電極接合之元件突起電極;其特徵在 於: 從一側視之,上述元件突起電極之元件接合面的長 127464.doc 200843080 度’係長於上述基板突起電極之基板接合面的長度。 4. 如請求項丨之半導體裝置,其中上述元件接合面及上述 基板接合面係呈長方形狀; 上述元件接合面及上述基板接合面各自之長軸,係相 互平行配置; 上述元件接合面之短軸方向的寬度,係寬於上述基板 接合面之短軸方向的寬度。 5. 如請求項4之半導體裝置,其中上述元件接合面之長軸 方向的長度,係與上述基板接合面之長軸方向的長度相 等。 6. 如請求項4之半導體裝置,其中上述基板接合面之長軸 方向的長度,係長於上述元件接合面之長軸方向的長 度。 7·如凊求項丨之半導體裝置,其中從垂直方向觀察上述插 入式基板,上述元件接合面係圍繞上述基板接合面而配 置; 上述7L件接合面及上述基板接合面係配置為長方形 狀; 上述元件接合面及上述基板接合面各自之長軸,係相 互平行配置; k垂直方向觀察上述插入式基板,上述元件接合面之 邊係與上述基板接合面之對應一邊相離5 μπι〜1 ο μηι 而配置。 8·如明求項1之半導體裝置,其中上述元件突起電極之高 127464.doc 200843080 度,係與上述基板突起電極之高度互不相同。 9.如請求項!之半導體裝置,其中上述元件突起電極之高 度係低於上述基板突起電極之高度。 10·如清求項1之半導體裝置,其中上述元件突起電極之高 度為5 μπι〜8 μπι。 11 ·如㉝求項1之半導體裝置 度為 10 μιη〜15 μπι。12·如明求項丨之半導體裝置,其中上述基板突起電極係硬 度鬲於上述元件突起電極。 13·種半導體裝置,其特徵在於包含有一組裝於安裝基板 上且以半導體所構成之插入式基板,以及一安裝於上述 插入式基板上之半導體元件;上述插入式基板包含有形 成於上述半導體元件側之基板突起電極,且上述半導體 元件包含有與上述基板突起電極接合之端子。 14·如請求項13之半導體裝置,其中上述端子係由銘構成, 上述基板突起電極係由金構成。 15·:種半導體裝置,係包含有一組裝於安裝基板上且以半 導體所構成之插入式基板,以及一安裝於上述插入式基 板上之半導體兀件,上述插入式基板包含有形成於上述 半導體元件側之基板突起電極且上料導體元件包含有 =上述基板突起電極接合之元件突起電極;其特徵在 上述元件突起電極之高度係與上 度互不不同。 述基板突起電極之 向 127464.doc 200843080 16.:種半導體裝置,係包含有—組裝於安裝基板上且以半 導體所構成之插入式基板,以及一安裝於上述插入式基 板上之半導體元件’上述插人式基板包含有形成於上述 半導體元件側之基板突起電極,且上述半導體元件包含 有與上述基板突起電極接合之元件突起電極;其特徵在 於: 及上述基板突起電極 面各自之長軸,係相上述元件突起電極之元件接合面 之基板接合面,係呈長方形狀; 上述7L件接合面及上述基板接合 互平行配置; 的寬度’係寬於上述基板 的長度’係長於上述元件 上述元件接合面之短軸方向 接合面之短軸方向的寬度;且 上述基板接合面之長軸方向 接合面之長軸方向的長度。127464.doc
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US9679937B2 (en) | 2009-08-24 | 2017-06-13 | Sony Corporation | Semiconductor device and method for production of semiconductor device |
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